Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86/pti updates from Thomas Gleixner:
"Two small fixes correcting the handling of SSB mitigations on AMD
processors"
* 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/bugs: Fix the AMD SSBD usage of the SPEC_CTRL MSR
x86/bugs: Update when to check for the LS_CFG SSBD mitigation
+8
-4
+3
-1
arch/x86/kernel/cpu/amd.c
+3
-1
arch/x86/kernel/cpu/amd.c
···
543
543
nodes_per_socket = ((value >> 3) & 7) + 1;
544
544
}
545
545
546
-
if (c->x86 >= 0x15 && c->x86 <= 0x17) {
546
+
if (!boot_cpu_has(X86_FEATURE_AMD_SSBD) &&
547
+
!boot_cpu_has(X86_FEATURE_VIRT_SSBD) &&
548
+
c->x86 >= 0x15 && c->x86 <= 0x17) {
547
549
unsigned int bit;
548
550
549
551
switch (c->x86) {
+5
-3
arch/x86/kernel/cpu/bugs.c
+5
-3
arch/x86/kernel/cpu/bugs.c
···
155
155
guestval |= guest_spec_ctrl & x86_spec_ctrl_mask;
156
156
157
157
/* SSBD controlled in MSR_SPEC_CTRL */
158
-
if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))
158
+
if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
159
+
static_cpu_has(X86_FEATURE_AMD_SSBD))
159
160
hostval |= ssbd_tif_to_spec_ctrl(ti->flags);
160
161
161
162
if (hostval != guestval) {
···
534
533
* Intel uses the SPEC CTRL MSR Bit(2) for this, while AMD may
535
534
* use a completely different MSR and bit dependent on family.
536
535
*/
537
-
if (!static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
536
+
if (!static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) &&
537
+
!static_cpu_has(X86_FEATURE_AMD_SSBD)) {
538
538
x86_amd_ssb_disable();
539
-
else {
539
+
} else {
540
540
x86_spec_ctrl_base |= SPEC_CTRL_SSBD;
541
541
x86_spec_ctrl_mask |= SPEC_CTRL_SSBD;
542
542
wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);