tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'soc-fixes-6.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann:
"These are mainly devicetree fixes for the arm platforms from Rockchips
NXP, ASpeed and Broadcom, addressing issues with accidental
overclocking, pinctrl, network and dtc warnings.

There are additional fixes for regressions with the i.MX reset and
memory controller drivers as well as the Tegra memory controller
driver.

Minor updates to the MAINTAINERS file, tee documentation and
defconfigs bring those up to date with recent changes elsewhere"

* tag 'soc-fixes-6.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (29 commits)
MAINTAINERS: sync omap devicetree maintainers with omap platform
MAINTAINERS: Update Krzysztof Kozlowski's email
arm64: dts: rockchip: fix PCIe 3.3V regulator voltage on orangepi-5
arm64: dts: rockchip: disable HS400 on RK3588 Tiger
arm64: dts: rockchip: drop reset from rk3576 i2c9 node
tee: <uapi/linux/tee.h: fix all kernel-doc issues
arm64: dts: rockchip: Fix USB power enable pin for BTT CB2 and Pi2
arm64: dts: broadcom: bcm2712: rpi-5: Add ethernet0 alias
arm64: dts: broadcom: Assign clock rates in eth node for RPi5
reset: imx8mp-audiomix: Fix bad mask values
ARM: dts: BCM53573: Fix address of Luxul XAP-1440's Ethernet PHY
arm64: defconfig: Fix V3D deferred probe timeout
arm64: dts: rockchip: Fix vccio4-supply on rk3566-pinetab2
arm64: dts: rockchip: include rk3399-base instead of rk3399 in rk3399-op1
arm64: dts: imx8mp-kontron: Fix USB OTG role switching
arm64: dts: imx95: Fix MSI mapping for PCIe endpoint nodes
arm64: dts: imx8-ss-img: Avoid gpio0_mipi_csi GPIOs being deferred
arm: imx_v6_v7_defconfig: enable ext4 directly
memory: tegra210: Fix incorrect client ids
arm64: dts: rockchip: Fix indentation on rk3399 haikou demo dtso
...

Linus Torvalds 23cb64fb fdeee1cc

+94 -61
+1
.mailmap
··· 438 438 Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com> 439 439 Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski@samsung.com> 440 440 Krzysztof Kozlowski <krzk@kernel.org> <krzysztof.kozlowski@canonical.com> 441 + Krzysztof Kozlowski <krzk@kernel.org> <krzysztof.kozlowski@linaro.org> 441 442 Krzysztof Wilczyński <kwilczynski@kernel.org> <krzysztof.wilczynski@linux.com> 442 443 Krzysztof Wilczyński <kwilczynski@kernel.org> <kw@linux.com> 443 444 Kshitiz Godara <quic_kgodara@quicinc.com> <kgodara@codeaurora.org>
+6 -2
MAINTAINERS
··· 16206 16206 M: Krzysztof Kozlowski <krzk@kernel.org> 16207 16207 L: linux-kernel@vger.kernel.org 16208 16208 S: Maintained 16209 - B: mailto:krzysztof.kozlowski@linaro.org 16209 + B: mailto:krzk@kernel.org 16210 16210 T: git git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git 16211 16211 F: Documentation/devicetree/bindings/memory-controllers/ 16212 16212 F: drivers/memory/ ··· 18781 18781 F: arch/arm/*omap*/*clock* 18782 18782 18783 18783 OMAP DEVICE TREE SUPPORT 18784 + M: Aaro Koskinen <aaro.koskinen@iki.fi> 18785 + M: Andreas Kemnade <andreas@kemnade.info> 18786 + M: Kevin Hilman <khilman@baylibre.com> 18787 + M: Roger Quadros <rogerq@kernel.org> 18784 18788 M: Tony Lindgren <tony@atomide.com> 18785 18789 L: linux-omap@vger.kernel.org 18786 18790 L: devicetree@vger.kernel.org ··· 21183 21179 F: drivers/i2c/busses/i2c-qcom-cci.c 21184 21180 21185 21181 QUALCOMM INTERCONNECT BWMON DRIVER 21186 - M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 21182 + M: Krzysztof Kozlowski <krzk@kernel.org> 21187 21183 L: linux-arm-msm@vger.kernel.org 21188 21184 S: Maintained 21189 21185 F: Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
+14
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji-data64.dts
··· 1254 1254 max-frequency = <25000000>; 1255 1255 bus-width = <4>; 1256 1256 }; 1257 + 1258 + /* 1259 + * FIXME: rgmii delay is introduced by MAC (configured in u-boot now) 1260 + * instead of PCB on fuji board, so the "phy-mode" should be updated to 1261 + * "rgmii-[tx|rx]id" when the aspeed-mac driver can handle the delay 1262 + * properly. 1263 + */ 1264 + &mac3 { 1265 + status = "okay"; 1266 + phy-mode = "rgmii"; 1267 + phy-handle = <&ethphy3>; 1268 + pinctrl-names = "default"; 1269 + pinctrl-0 = <&pinctrl_rgmii4_default>; 1270 + };
+2 -2
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts
··· 55 55 mdio { 56 56 /delete-node/ switch@1e; 57 57 58 - bcm54210e: ethernet-phy@0 { 59 - reg = <0>; 58 + bcm54210e: ethernet-phy@25 { 59 + reg = <25>; 60 60 }; 61 61 }; 62 62 };
+2 -2
arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts
··· 259 259 pinctrl-0 = <&pinctrl_audmux>; 260 260 status = "okay"; 261 261 262 - ssi2 { 262 + mux-ssi2 { 263 263 fsl,audmux-port = <1>; 264 264 fsl,port-config = < 265 265 (IMX_AUDMUX_V2_PTCR_SYN | ··· 271 271 >; 272 272 }; 273 273 274 - aud3 { 274 + mux-aud3 { 275 275 fsl,audmux-port = <2>; 276 276 fsl,port-config = < 277 277 IMX_AUDMUX_V2_PTCR_SYN
+1 -1
arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts
··· 136 136 interrupt-parent = <&gpio2>; 137 137 interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 138 138 reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; 139 - report-rate-hz = <6>; 139 + report-rate-hz = <60>; 140 140 /* settings valid only for Hycon touchscreen */ 141 141 touchscreen-size-x = <1280>; 142 142 touchscreen-size-y = <800>;
+10
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
··· 18 18 19 19 #include "bcm2712-rpi-5-b-ovl-rp1.dts" 20 20 21 + / { 22 + aliases { 23 + ethernet0 = &rp1_eth; 24 + }; 25 + }; 26 + 21 27 &pcie2 { 22 28 #include "rp1-nexus.dtsi" 23 29 }; 24 30 25 31 &rp1_eth { 32 + assigned-clocks = <&rp1_clocks RP1_CLK_ETH_TSU>, 33 + <&rp1_clocks RP1_CLK_ETH>; 34 + assigned-clock-rates = <50000000>, 35 + <125000000>; 26 36 status = "okay"; 27 37 phy-mode = "rgmii-id"; 28 38 phy-handle = <&phy1>;
-2
arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
··· 67 67 power-domains = <&pd IMX_SC_R_CSI_0>; 68 68 fsl,channel = <0>; 69 69 fsl,num-irqs = <32>; 70 - status = "disabled"; 71 70 }; 72 71 73 72 gpio0_mipi_csi0: gpio@58222000 { ··· 143 144 power-domains = <&pd IMX_SC_R_CSI_1>; 144 145 fsl,channel = <0>; 145 146 fsl,num-irqs = <32>; 146 - status = "disabled"; 147 147 }; 148 148 149 149 gpio0_mipi_csi1: gpio@58242000 {
+19 -5
arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts
··· 16 16 ethernet1 = &eqos; 17 17 }; 18 18 19 - extcon_usbc: usbc { 20 - compatible = "linux,extcon-usb-gpio"; 19 + connector { 20 + compatible = "gpio-usb-b-connector", "usb-b-connector"; 21 + id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; 22 + label = "Type-C"; 21 23 pinctrl-names = "default"; 22 24 pinctrl-0 = <&pinctrl_usb1_id>; 23 - id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; 25 + type = "micro"; 26 + vbus-supply = <&reg_usb1_vbus>; 27 + 28 + port { 29 + usb_dr_connector: endpoint { 30 + remote-endpoint = <&usb3_dwc>; 31 + }; 32 + }; 24 33 }; 25 34 26 35 leds { ··· 253 244 hnp-disable; 254 245 srp-disable; 255 246 dr_mode = "otg"; 256 - extcon = <&extcon_usbc>; 257 247 usb-role-switch; 248 + role-switch-default-mode = "peripheral"; 258 249 status = "okay"; 250 + 251 + port { 252 + usb3_dwc: endpoint { 253 + remote-endpoint = <&usb_dr_connector>; 254 + }; 255 + }; 259 256 }; 260 257 261 258 &usb_dwc3_1 { ··· 288 273 }; 289 274 290 275 &usb3_phy0 { 291 - vbus-supply = <&reg_usb1_vbus>; 292 276 status = "okay"; 293 277 }; 294 278
+2 -1
arch/arm64/boot/dts/freescale/imx95.dtsi
··· 1886 1886 assigned-clock-rates = <3600000000>, <100000000>, <10000000>; 1887 1887 assigned-clock-parents = <0>, <0>, 1888 1888 <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>; 1889 - msi-map = <0x0 &its 0x98 0x1>; 1889 + msi-map = <0x0 &its 0x10 0x1>; 1890 1890 power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; 1891 1891 status = "disabled"; 1892 1892 }; ··· 1963 1963 assigned-clock-rates = <3600000000>, <100000000>, <10000000>; 1964 1964 assigned-clock-parents = <0>, <0>, 1965 1965 <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>; 1966 + msi-map = <0x0 &its 0x98 0x1>; 1966 1967 power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; 1967 1968 status = "disabled"; 1968 1969 };
+1
arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi
··· 42 42 interrupt-parent = <&gpio>; 43 43 interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>; 44 44 #phy-cells = <0>; 45 + wakeup-source; 45 46 }; 46 47 }; 47 48 };
-1
arch/arm64/boot/dts/rockchip/rk3328.dtsi
··· 598 598 pinctrl-2 = <&otp_pin>; 599 599 resets = <&cru SRST_TSADC>; 600 600 reset-names = "tsadc-apb"; 601 - rockchip,grf = <&grf>; 602 601 rockchip,hw-tshut-temp = <100000>; 603 602 #thermal-sensor-cells = <1>; 604 603 status = "disabled";
+1 -1
arch/arm64/boot/dts/rockchip/rk3399-op1.dtsi
··· 3 3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd 4 4 */ 5 5 6 - #include "rk3399.dtsi" 6 + #include "rk3399-base.dtsi" 7 7 8 8 / { 9 9 cluster0_opp: opp-table-0 {
+5 -5
arch/arm64/boot/dts/rockchip/rk3399-puma-haikou-video-demo.dtso
··· 45 45 46 46 cam_dovdd_1v8: regulator-cam-dovdd-1v8 { 47 47 compatible = "regulator-fixed"; 48 - gpio = <&pca9670 3 GPIO_ACTIVE_LOW>; 49 - regulator-max-microvolt = <1800000>; 50 - regulator-min-microvolt = <1800000>; 51 - regulator-name = "cam-dovdd-1v8"; 52 - vin-supply = <&vcc1v8_video>; 48 + gpio = <&pca9670 3 GPIO_ACTIVE_LOW>; 49 + regulator-max-microvolt = <1800000>; 50 + regulator-min-microvolt = <1800000>; 51 + regulator-name = "cam-dovdd-1v8"; 52 + vin-supply = <&vcc1v8_video>; 53 53 }; 54 54 55 55 cam_dvdd_1v2: regulator-cam-dvdd-1v2 {
+3 -3
arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
··· 120 120 compatible = "regulator-fixed"; 121 121 regulator-name = "vcc3v3_pcie"; 122 122 enable-active-high; 123 - gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 123 + gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; 124 124 pinctrl-names = "default"; 125 125 pinctrl-0 = <&pcie_drv>; 126 126 regulator-always-on; ··· 187 187 vcc5v0_usb2b: regulator-vcc5v0-usb2b { 188 188 compatible = "regulator-fixed"; 189 189 enable-active-high; 190 - gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 190 + gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; 191 191 pinctrl-names = "default"; 192 192 pinctrl-0 = <&vcc5v0_usb2b_en>; 193 193 regulator-name = "vcc5v0_usb2b"; ··· 199 199 vcc5v0_usb2t: regulator-vcc5v0-usb2t { 200 200 compatible = "regulator-fixed"; 201 201 enable-active-high; 202 - gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; 202 + gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; 203 203 pinctrl-names = "default"; 204 204 pinctrl-0 = <&vcc5v0_usb2t_en>; 205 205 regulator-name = "vcc5v0_usb2t";
+1 -1
arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
··· 789 789 vccio1-supply = <&vccio_acodec>; 790 790 vccio2-supply = <&vcc_1v8>; 791 791 vccio3-supply = <&vccio_sd>; 792 - vccio4-supply = <&vcc_1v8>; 792 + vccio4-supply = <&vcca1v8_pmu>; 793 793 vccio5-supply = <&vcc_1v8>; 794 794 vccio6-supply = <&vcc1v8_dvp>; 795 795 vccio7-supply = <&vcc_3v3>;
+2
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
··· 482 482 }; 483 483 484 484 &i2s1_8ch { 485 + pinctrl-names = "default"; 486 + pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>; 485 487 rockchip,trcm-sync-tx-only; 486 488 status = "okay"; 487 489 };
-14
arch/arm64/boot/dts/rockchip/rk3576.dtsi
··· 276 276 opp-microvolt = <900000 900000 950000>; 277 277 clock-latency-ns = <40000>; 278 278 }; 279 - 280 - opp-2208000000 { 281 - opp-hz = /bits/ 64 <2208000000>; 282 - opp-microvolt = <950000 950000 950000>; 283 - clock-latency-ns = <40000>; 284 - }; 285 279 }; 286 280 287 281 cluster1_opp_table: opp-table-cluster1 { ··· 340 346 opp-2208000000 { 341 347 opp-hz = /bits/ 64 <2208000000>; 342 348 opp-microvolt = <925000 925000 950000>; 343 - clock-latency-ns = <40000>; 344 - }; 345 - 346 - opp-2304000000 { 347 - opp-hz = /bits/ 64 <2304000000>; 348 - opp-microvolt = <950000 950000 950000>; 349 349 clock-latency-ns = <40000>; 350 350 }; 351 351 }; ··· 2549 2561 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 2550 2562 pinctrl-names = "default"; 2551 2563 pinctrl-0 = <&i2c9m0_xfer>; 2552 - resets = <&cru SRST_I2C9>, <&cru SRST_P_I2C9>; 2553 - reset-names = "i2c", "apb"; 2554 2564 #address-cells = <1>; 2555 2565 #size-cells = <0>; 2556 2566 status = "disabled";
+1 -1
arch/arm64/boot/dts/rockchip/rk3588-opp.dtsi
··· 115 115 }; 116 116 }; 117 117 118 - gpu_opp_table: opp-table { 118 + gpu_opp_table: opp-table-gpu { 119 119 compatible = "operating-points-v2"; 120 120 121 121 opp-300000000 {
+1 -3
arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
··· 382 382 cap-mmc-highspeed; 383 383 mmc-ddr-1_8v; 384 384 mmc-hs200-1_8v; 385 - mmc-hs400-1_8v; 386 - mmc-hs400-enhanced-strobe; 387 385 mmc-pwrseq = <&emmc_pwrseq>; 388 386 no-sdio; 389 387 no-sd; 390 388 non-removable; 391 389 pinctrl-names = "default"; 392 - pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>; 390 + pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk>; 393 391 vmmc-supply = <&vcc_3v3_s3>; 394 392 vqmmc-supply = <&vcc_1v8_s3>; 395 393 status = "okay";
+1 -1
arch/arm64/boot/dts/rockchip/rk3588j.dtsi
··· 66 66 }; 67 67 }; 68 68 69 - gpu_opp_table: opp-table { 69 + gpu_opp_table: opp-table-gpu { 70 70 compatible = "operating-points-v2"; 71 71 72 72 opp-300000000 {
+2 -2
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts
··· 14 14 gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 15 15 regulator-name = "vcc3v3_pcie20"; 16 16 regulator-boot-on; 17 - regulator-min-microvolt = <1800000>; 18 - regulator-max-microvolt = <1800000>; 17 + regulator-min-microvolt = <3300000>; 18 + regulator-max-microvolt = <3300000>; 19 19 startup-delay-us = <50000>; 20 20 vin-supply = <&vcc5v0_sys>; 21 21 };
+1 -1
arch/arm64/configs/defconfig
··· 1341 1341 CONFIG_COMMON_CLK_VC3=y 1342 1342 CONFIG_COMMON_CLK_VC5=y 1343 1343 CONFIG_COMMON_CLK_BD718XX=m 1344 - CONFIG_CLK_RASPBERRYPI=m 1344 + CONFIG_CLK_RASPBERRYPI=y 1345 1345 CONFIG_CLK_IMX8MM=y 1346 1346 CONFIG_CLK_IMX8MN=y 1347 1347 CONFIG_CLK_IMX8MP=y
+2 -2
drivers/memory/tegra/tegra210.c
··· 1015 1015 }, 1016 1016 }, 1017 1017 }, { 1018 - .id = TEGRA210_MC_SESRD, 1018 + .id = TEGRA210_MC_SESWR, 1019 1019 .name = "seswr", 1020 1020 .swgroup = TEGRA_SWGROUP_SE, 1021 1021 .regs = { ··· 1079 1079 }, 1080 1080 }, 1081 1081 }, { 1082 - .id = TEGRA210_MC_ETRR, 1082 + .id = TEGRA210_MC_ETRW, 1083 1083 .name = "etrw", 1084 1084 .swgroup = TEGRA_SWGROUP_ETR, 1085 1085 .regs = {
+2 -2
drivers/reset/reset-imx8mp-audiomix.c
··· 14 14 #include <linux/reset-controller.h> 15 15 16 16 #define IMX8MP_AUDIOMIX_EARC_RESET_OFFSET 0x200 17 - #define IMX8MP_AUDIOMIX_EARC_RESET_MASK BIT(1) 18 - #define IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK BIT(2) 17 + #define IMX8MP_AUDIOMIX_EARC_RESET_MASK BIT(0) 18 + #define IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK BIT(1) 19 19 20 20 #define IMX8MP_AUDIOMIX_DSP_RUNSTALL_OFFSET 0x108 21 21 #define IMX8MP_AUDIOMIX_DSP_RUNSTALL_MASK BIT(5)
+14 -9
include/uapi/linux/tee.h
··· 249 249 * @cancel_id: [in] Cancellation id, a unique value to identify this request 250 250 * @session: [out] Session id 251 251 * @ret: [out] return value 252 - * @ret_origin [out] origin of the return value 253 - * @num_params [in] number of parameters following this struct 252 + * @ret_origin: [out] origin of the return value 253 + * @num_params: [in] number of &struct tee_ioctl_param entries in @params 254 + * @params: array of ioctl parameters 254 255 */ 255 256 struct tee_ioctl_open_session_arg { 256 257 __u8 uuid[TEE_IOCTL_UUID_LEN]; ··· 277 276 struct tee_ioctl_buf_data) 278 277 279 278 /** 280 - * struct tee_ioctl_invoke_func_arg - Invokes a function in a Trusted 281 - * Application 279 + * struct tee_ioctl_invoke_arg - Invokes a function in a Trusted Application 282 280 * @func: [in] Trusted Application function, specific to the TA 283 281 * @session: [in] Session id 284 282 * @cancel_id: [in] Cancellation id, a unique value to identify this request 285 283 * @ret: [out] return value 286 - * @ret_origin [out] origin of the return value 287 - * @num_params [in] number of parameters following this struct 284 + * @ret_origin: [out] origin of the return value 285 + * @num_params: [in] number of parameters following this struct 286 + * @params: array of ioctl parameters 288 287 */ 289 288 struct tee_ioctl_invoke_arg { 290 289 __u32 func; ··· 339 338 /** 340 339 * struct tee_iocl_supp_recv_arg - Receive a request for a supplicant function 341 340 * @func: [in] supplicant function 342 - * @num_params [in/out] number of parameters following this struct 341 + * @num_params: [in/out] number of &struct tee_ioctl_param entries in @params 342 + * @params: array of ioctl parameters 343 343 * 344 344 * @num_params is the number of params that tee-supplicant has room to 345 345 * receive when input, @num_params is the number of actual params ··· 365 363 /** 366 364 * struct tee_iocl_supp_send_arg - Send a response to a received request 367 365 * @ret: [out] return value 368 - * @num_params [in] number of parameters following this struct 366 + * @num_params: [in] number of &struct tee_ioctl_param entries in @params 367 + * @params: array of ioctl parameters 369 368 */ 370 369 struct tee_iocl_supp_send_arg { 371 370 __u32 ret; ··· 457 454 */ 458 455 459 456 /** 460 - * struct tee_ioctl_invoke_func_arg - Invokes an object in a Trusted Application 457 + * struct tee_ioctl_object_invoke_arg - Invokes an object in a 458 + * Trusted Application 461 459 * @id: [in] Object id 462 460 * @op: [in] Object operation, specific to the object 463 461 * @ret: [out] return value 464 462 * @num_params: [in] number of parameters following this struct 463 + * @params: array of ioctl parameters 465 464 */ 466 465 struct tee_ioctl_object_invoke_arg { 467 466 __u64 id;