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Merge tag 'pci-v5.8-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci into master

Pull PCI fixes from Bjorn Helgaas:

- Reject invalid IRQ 0 command line argument for virtio_mmio because
IRQ 0 now generates warnings (Bjorn Helgaas)

- Revert "PCI/PM: Assume ports without DLL Link Active train links in
100 ms", which broke nouveau (Bjorn Helgaas)

* tag 'pci-v5.8-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
Revert "PCI/PM: Assume ports without DLL Link Active train links in 100 ms"
virtio-mmio: Reject invalid IRQ 0 command line argument

+11 -23
+9 -21
drivers/pci/pci.c
··· 4638 4638 * pcie_wait_for_link_delay - Wait until link is active or inactive 4639 4639 * @pdev: Bridge device 4640 4640 * @active: waiting for active or inactive? 4641 - * @delay: Delay to wait after link has become active (in ms). Specify %0 4642 - * for no delay. 4641 + * @delay: Delay to wait after link has become active (in ms) 4643 4642 * 4644 4643 * Use this to wait till link becomes active or inactive. 4645 4644 */ ··· 4679 4680 msleep(10); 4680 4681 timeout -= 10; 4681 4682 } 4682 - if (active && ret && delay) 4683 + if (active && ret) 4683 4684 msleep(delay); 4684 4685 else if (ret != active) 4685 4686 pci_info(pdev, "Data Link Layer Link Active not %s in 1000 msec\n", ··· 4800 4801 if (!pcie_downstream_port(dev)) 4801 4802 return; 4802 4803 4803 - /* 4804 - * Per PCIe r5.0, sec 6.6.1, for downstream ports that support 4805 - * speeds > 5 GT/s, we must wait for link training to complete 4806 - * before the mandatory delay. 4807 - * 4808 - * We can only tell when link training completes via DLL Link 4809 - * Active, which is required for downstream ports that support 4810 - * speeds > 5 GT/s (sec 7.5.3.6). Unfortunately some common 4811 - * devices do not implement Link Active reporting even when it's 4812 - * required, so we'll check for that directly instead of checking 4813 - * the supported link speed. We assume devices without Link Active 4814 - * reporting can train in 100 ms regardless of speed. 4815 - */ 4816 - if (dev->link_active_reporting) { 4817 - pci_dbg(dev, "waiting for link to train\n"); 4818 - if (!pcie_wait_for_link_delay(dev, true, 0)) { 4804 + if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) { 4805 + pci_dbg(dev, "waiting %d ms for downstream link\n", delay); 4806 + msleep(delay); 4807 + } else { 4808 + pci_dbg(dev, "waiting %d ms for downstream link, after activation\n", 4809 + delay); 4810 + if (!pcie_wait_for_link_delay(dev, true, delay)) { 4819 4811 /* Did not train, no need to wait any further */ 4820 4812 return; 4821 4813 } 4822 4814 } 4823 - pci_dbg(child, "waiting %d ms to become accessible\n", delay); 4824 - msleep(delay); 4825 4815 4826 4816 if (!pci_device_is_present(child)) { 4827 4817 pci_dbg(child, "waiting additional %d ms to become accessible\n", delay);
+2 -2
drivers/virtio/virtio_mmio.c
··· 641 641 &vm_cmdline_id, &consumed); 642 642 643 643 /* 644 - * sscanf() must processes at least 2 chunks; also there 644 + * sscanf() must process at least 2 chunks; also there 645 645 * must be no extra characters after the last chunk, so 646 646 * str[consumed] must be '\0' 647 647 */ 648 - if (processed < 2 || str[consumed]) 648 + if (processed < 2 || str[consumed] || irq == 0) 649 649 return -EINVAL; 650 650 651 651 resources[0].flags = IORESOURCE_MEM;