Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR (net-6.15-rc3).
No conflicts. Adjacent changes:
tools/net/ynl/pyynl/ynl_gen_c.py
4d07bbf2d456 ("tools: ynl-gen: don't declare loop iterator in place")
7e8ba0c7de2b ("tools: ynl: don't use genlmsghdr in classic netlink")
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+5288
-2649
+5
.mailmap
+5
.mailmap
···
322
322
Jayachandran C <c.jayachandran@gmail.com> <jchandra@digeo.com>
323
323
Jayachandran C <c.jayachandran@gmail.com> <jnair@caviumnetworks.com>
324
324
<jean-philippe@linaro.org> <jean-philippe.brucker@arm.com>
325
+
Jean-Michel Hautbois <jeanmichel.hautbois@yoseli.org> <jeanmichel.hautbois@ideasonboard.com>
325
326
Jean Tourrilhes <jt@hpl.hp.com>
326
327
Jeevan Shriram <quic_jshriram@quicinc.com> <jshriram@codeaurora.org>
327
328
Jeff Garzik <jgarzik@pretzel.yyz.us>
···
439
438
Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>
440
439
Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>
441
440
Lior David <quic_liord@quicinc.com> <liord@codeaurora.org>
441
+
Loic Poulain <loic.poulain@oss.qualcomm.com> <loic.poulain@linaro.org>
442
+
Loic Poulain <loic.poulain@oss.qualcomm.com> <loic.poulain@intel.com>
442
443
Lorenzo Pieralisi <lpieralisi@kernel.org> <lorenzo.pieralisi@arm.com>
443
444
Lorenzo Stoakes <lorenzo.stoakes@oracle.com> <lstoakes@gmail.com>
444
445
Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net>
···
688
685
Simon Wunderlich <sw@simonwunderlich.de> <simon@open-mesh.com>
689
686
Simon Wunderlich <sw@simonwunderlich.de> <siwu@hrz.tu-chemnitz.de>
690
687
Sricharan Ramabadhran <quic_srichara@quicinc.com> <sricharan@codeaurora.org>
688
+
Srinivas Kandagatla <srini@kernel.org> <srinivas.kandagatla@st.com>
689
+
Srinivas Kandagatla <srini@kernel.org> <srinivas.kandagatla@linaro.org>
691
690
Srinivas Ramana <quic_sramana@quicinc.com> <sramana@codeaurora.org>
692
691
Sriram R <quic_srirrama@quicinc.com> <srirrama@codeaurora.org>
693
692
Sriram Yagnaraman <sriram.yagnaraman@ericsson.com> <sriram.yagnaraman@est.tech>
+32
Documentation/ABI/testing/sysfs-driver-ufs
+32
Documentation/ABI/testing/sysfs-driver-ufs
···
1604
1604
prevent the UFS from frequently performing clock gating/ungating.
1605
1605
1606
1606
The attribute is read/write.
1607
+
1608
+
What: /sys/bus/platform/drivers/ufshcd/*/device_lvl_exception_count
1609
+
What: /sys/bus/platform/devices/*.ufs/device_lvl_exception_count
1610
+
Date: March 2025
1611
+
Contact: Bao D. Nguyen <quic_nguyenb@quicinc.com>
1612
+
Description:
1613
+
This attribute is applicable to ufs devices compliant to the
1614
+
JEDEC specifications version 4.1 or later. The
1615
+
device_lvl_exception_count is a counter indicating the number of
1616
+
times the device level exceptions have occurred since the last
1617
+
time this variable is reset. Writing a 0 value to this
1618
+
attribute will reset the device_lvl_exception_count. If the
1619
+
device_lvl_exception_count reads a positive value, the user
1620
+
application should read the device_lvl_exception_id attribute to
1621
+
know more information about the exception.
1622
+
1623
+
The attribute is read/write.
1624
+
1625
+
What: /sys/bus/platform/drivers/ufshcd/*/device_lvl_exception_id
1626
+
What: /sys/bus/platform/devices/*.ufs/device_lvl_exception_id
1627
+
Date: March 2025
1628
+
Contact: Bao D. Nguyen <quic_nguyenb@quicinc.com>
1629
+
Description:
1630
+
Reading the device_lvl_exception_id returns the
1631
+
qDeviceLevelExceptionID attribute of the ufs device JEDEC
1632
+
specification version 4.1. The definition of the
1633
+
qDeviceLevelExceptionID is the ufs device vendor specific
1634
+
implementation. Refer to the device manufacturer datasheet for
1635
+
more information on the meaning of the qDeviceLevelExceptionID
1636
+
attribute value.
1637
+
1638
+
The attribute is read only.
+1
Documentation/admin-guide/hw-vuln/index.rst
+1
Documentation/admin-guide/hw-vuln/index.rst
+268
Documentation/admin-guide/hw-vuln/rsb.rst
+268
Documentation/admin-guide/hw-vuln/rsb.rst
···
1
+
.. SPDX-License-Identifier: GPL-2.0
2
+
3
+
=======================
4
+
RSB-related mitigations
5
+
=======================
6
+
7
+
.. warning::
8
+
Please keep this document up-to-date, otherwise you will be
9
+
volunteered to update it and convert it to a very long comment in
10
+
bugs.c!
11
+
12
+
Since 2018 there have been many Spectre CVEs related to the Return Stack
13
+
Buffer (RSB) (sometimes referred to as the Return Address Stack (RAS) or
14
+
Return Address Predictor (RAP) on AMD).
15
+
16
+
Information about these CVEs and how to mitigate them is scattered
17
+
amongst a myriad of microarchitecture-specific documents.
18
+
19
+
This document attempts to consolidate all the relevant information in
20
+
once place and clarify the reasoning behind the current RSB-related
21
+
mitigations. It's meant to be as concise as possible, focused only on
22
+
the current kernel mitigations: what are the RSB-related attack vectors
23
+
and how are they currently being mitigated?
24
+
25
+
It's *not* meant to describe how the RSB mechanism operates or how the
26
+
exploits work. More details about those can be found in the references
27
+
below.
28
+
29
+
Rather, this is basically a glorified comment, but too long to actually
30
+
be one. So when the next CVE comes along, a kernel developer can
31
+
quickly refer to this as a refresher to see what we're actually doing
32
+
and why.
33
+
34
+
At a high level, there are two classes of RSB attacks: RSB poisoning
35
+
(Intel and AMD) and RSB underflow (Intel only). They must each be
36
+
considered individually for each attack vector (and microarchitecture
37
+
where applicable).
38
+
39
+
----
40
+
41
+
RSB poisoning (Intel and AMD)
42
+
=============================
43
+
44
+
SpectreRSB
45
+
~~~~~~~~~~
46
+
47
+
RSB poisoning is a technique used by SpectreRSB [#spectre-rsb]_ where
48
+
an attacker poisons an RSB entry to cause a victim's return instruction
49
+
to speculate to an attacker-controlled address. This can happen when
50
+
there are unbalanced CALLs/RETs after a context switch or VMEXIT.
51
+
52
+
* All attack vectors can potentially be mitigated by flushing out any
53
+
poisoned RSB entries using an RSB filling sequence
54
+
[#intel-rsb-filling]_ [#amd-rsb-filling]_ when transitioning between
55
+
untrusted and trusted domains. But this has a performance impact and
56
+
should be avoided whenever possible.
57
+
58
+
.. DANGER::
59
+
**FIXME**: Currently we're flushing 32 entries. However, some CPU
60
+
models have more than 32 entries. The loop count needs to be
61
+
increased for those. More detailed information is needed about RSB
62
+
sizes.
63
+
64
+
* On context switch, the user->user mitigation requires ensuring the
65
+
RSB gets filled or cleared whenever IBPB gets written [#cond-ibpb]_
66
+
during a context switch:
67
+
68
+
* AMD:
69
+
On Zen 4+, IBPB (or SBPB [#amd-sbpb]_ if used) clears the RSB.
70
+
This is indicated by IBPB_RET in CPUID [#amd-ibpb-rsb]_.
71
+
72
+
On Zen < 4, the RSB filling sequence [#amd-rsb-filling]_ must be
73
+
always be done in addition to IBPB [#amd-ibpb-no-rsb]_. This is
74
+
indicated by X86_BUG_IBPB_NO_RET.
75
+
76
+
* Intel:
77
+
IBPB always clears the RSB:
78
+
79
+
"Software that executed before the IBPB command cannot control
80
+
the predicted targets of indirect branches executed after the
81
+
command on the same logical processor. The term indirect branch
82
+
in this context includes near return instructions, so these
83
+
predicted targets may come from the RSB." [#intel-ibpb-rsb]_
84
+
85
+
* On context switch, user->kernel attacks are prevented by SMEP. User
86
+
space can only insert user space addresses into the RSB. Even
87
+
non-canonical addresses can't be inserted due to the page gap at the
88
+
end of the user canonical address space reserved by TASK_SIZE_MAX.
89
+
A SMEP #PF at instruction fetch prevents the kernel from speculatively
90
+
executing user space.
91
+
92
+
* AMD:
93
+
"Finally, branches that are predicted as 'ret' instructions get
94
+
their predicted targets from the Return Address Predictor (RAP).
95
+
AMD recommends software use a RAP stuffing sequence (mitigation
96
+
V2-3 in [2]) and/or Supervisor Mode Execution Protection (SMEP)
97
+
to ensure that the addresses in the RAP are safe for
98
+
speculation. Collectively, we refer to these mitigations as "RAP
99
+
Protection"." [#amd-smep-rsb]_
100
+
101
+
* Intel:
102
+
"On processors with enhanced IBRS, an RSB overwrite sequence may
103
+
not suffice to prevent the predicted target of a near return
104
+
from using an RSB entry created in a less privileged predictor
105
+
mode. Software can prevent this by enabling SMEP (for
106
+
transitions from user mode to supervisor mode) and by having
107
+
IA32_SPEC_CTRL.IBRS set during VM exits." [#intel-smep-rsb]_
108
+
109
+
* On VMEXIT, guest->host attacks are mitigated by eIBRS (and PBRSB
110
+
mitigation if needed):
111
+
112
+
* AMD:
113
+
"When Automatic IBRS is enabled, the internal return address
114
+
stack used for return address predictions is cleared on VMEXIT."
115
+
[#amd-eibrs-vmexit]_
116
+
117
+
* Intel:
118
+
"On processors with enhanced IBRS, an RSB overwrite sequence may
119
+
not suffice to prevent the predicted target of a near return
120
+
from using an RSB entry created in a less privileged predictor
121
+
mode. Software can prevent this by enabling SMEP (for
122
+
transitions from user mode to supervisor mode) and by having
123
+
IA32_SPEC_CTRL.IBRS set during VM exits. Processors with
124
+
enhanced IBRS still support the usage model where IBRS is set
125
+
only in the OS/VMM for OSes that enable SMEP. To do this, such
126
+
processors will ensure that guest behavior cannot control the
127
+
RSB after a VM exit once IBRS is set, even if IBRS was not set
128
+
at the time of the VM exit." [#intel-eibrs-vmexit]_
129
+
130
+
Note that some Intel CPUs are susceptible to Post-barrier Return
131
+
Stack Buffer Predictions (PBRSB) [#intel-pbrsb]_, where the last
132
+
CALL from the guest can be used to predict the first unbalanced RET.
133
+
In this case the PBRSB mitigation is needed in addition to eIBRS.
134
+
135
+
AMD RETBleed / SRSO / Branch Type Confusion
136
+
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
137
+
138
+
On AMD, poisoned RSB entries can also be created by the AMD RETBleed
139
+
variant [#retbleed-paper]_ [#amd-btc]_ or by Speculative Return Stack
140
+
Overflow [#amd-srso]_ (Inception [#inception-paper]_). The kernel
141
+
protects itself by replacing every RET in the kernel with a branch to a
142
+
single safe RET.
143
+
144
+
----
145
+
146
+
RSB underflow (Intel only)
147
+
==========================
148
+
149
+
RSB Alternate (RSBA) ("Intel Retbleed")
150
+
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
151
+
152
+
Some Intel Skylake-generation CPUs are susceptible to the Intel variant
153
+
of RETBleed [#retbleed-paper]_ (Return Stack Buffer Underflow
154
+
[#intel-rsbu]_). If a RET is executed when the RSB buffer is empty due
155
+
to mismatched CALLs/RETs or returning from a deep call stack, the branch
156
+
predictor can fall back to using the Branch Target Buffer (BTB). If a
157
+
user forces a BTB collision then the RET can speculatively branch to a
158
+
user-controlled address.
159
+
160
+
* Note that RSB filling doesn't fully mitigate this issue. If there
161
+
are enough unbalanced RETs, the RSB may still underflow and fall back
162
+
to using a poisoned BTB entry.
163
+
164
+
* On context switch, user->user underflow attacks are mitigated by the
165
+
conditional IBPB [#cond-ibpb]_ on context switch which effectively
166
+
clears the BTB:
167
+
168
+
* "The indirect branch predictor barrier (IBPB) is an indirect branch
169
+
control mechanism that establishes a barrier, preventing software
170
+
that executed before the barrier from controlling the predicted
171
+
targets of indirect branches executed after the barrier on the same
172
+
logical processor." [#intel-ibpb-btb]_
173
+
174
+
* On context switch and VMEXIT, user->kernel and guest->host RSB
175
+
underflows are mitigated by IBRS or eIBRS:
176
+
177
+
* "Enabling IBRS (including enhanced IBRS) will mitigate the "RSBU"
178
+
attack demonstrated by the researchers. As previously documented,
179
+
Intel recommends the use of enhanced IBRS, where supported. This
180
+
includes any processor that enumerates RRSBA but not RRSBA_DIS_S."
181
+
[#intel-rsbu]_
182
+
183
+
However, note that eIBRS and IBRS do not mitigate intra-mode attacks.
184
+
Like RRSBA below, this is mitigated by clearing the BHB on kernel
185
+
entry.
186
+
187
+
As an alternative to classic IBRS, call depth tracking (combined with
188
+
retpolines) can be used to track kernel returns and fill the RSB when
189
+
it gets close to being empty.
190
+
191
+
Restricted RSB Alternate (RRSBA)
192
+
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
193
+
194
+
Some newer Intel CPUs have Restricted RSB Alternate (RRSBA) behavior,
195
+
which, similar to RSBA described above, also falls back to using the BTB
196
+
on RSB underflow. The only difference is that the predicted targets are
197
+
restricted to the current domain when eIBRS is enabled:
198
+
199
+
* "Restricted RSB Alternate (RRSBA) behavior allows alternate branch
200
+
predictors to be used by near RET instructions when the RSB is
201
+
empty. When eIBRS is enabled, the predicted targets of these
202
+
alternate predictors are restricted to those belonging to the
203
+
indirect branch predictor entries of the current prediction domain.
204
+
[#intel-eibrs-rrsba]_
205
+
206
+
When a CPU with RRSBA is vulnerable to Branch History Injection
207
+
[#bhi-paper]_ [#intel-bhi]_, an RSB underflow could be used for an
208
+
intra-mode BTI attack. This is mitigated by clearing the BHB on
209
+
kernel entry.
210
+
211
+
However if the kernel uses retpolines instead of eIBRS, it needs to
212
+
disable RRSBA:
213
+
214
+
* "Where software is using retpoline as a mitigation for BHI or
215
+
intra-mode BTI, and the processor both enumerates RRSBA and
216
+
enumerates RRSBA_DIS controls, it should disable this behavior."
217
+
[#intel-retpoline-rrsba]_
218
+
219
+
----
220
+
221
+
References
222
+
==========
223
+
224
+
.. [#spectre-rsb] `Spectre Returns! Speculation Attacks using the Return Stack Buffer <https://arxiv.org/pdf/1807.07940.pdf>`_
225
+
226
+
.. [#intel-rsb-filling] "Empty RSB Mitigation on Skylake-generation" in `Retpoline: A Branch Target Injection Mitigation <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/retpoline-branch-target-injection-mitigation.html#inpage-nav-5-1>`_
227
+
228
+
.. [#amd-rsb-filling] "Mitigation V2-3" in `Software Techniques for Managing Speculation <https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/software-techniques-for-managing-speculation.pdf>`_
229
+
230
+
.. [#cond-ibpb] Whether IBPB is written depends on whether the prev and/or next task is protected from Spectre attacks. It typically requires opting in per task or system-wide. For more details see the documentation for the ``spectre_v2_user`` cmdline option in Documentation/admin-guide/kernel-parameters.txt.
231
+
232
+
.. [#amd-sbpb] IBPB without flushing of branch type predictions. Only exists for AMD.
233
+
234
+
.. [#amd-ibpb-rsb] "Function 8000_0008h -- Processor Capacity Parameters and Extended Feature Identification" in `AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions <https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24594.pdf>`_. SBPB behaves the same way according to `this email <https://lore.kernel.org/5175b163a3736ca5fd01cedf406735636c99a>`_.
235
+
236
+
.. [#amd-ibpb-no-rsb] `Spectre Attacks: Exploiting Speculative Execution <https://comsec.ethz.ch/wp-content/files/ibpb_sp25.pdf>`_
237
+
238
+
.. [#intel-ibpb-rsb] "Introduction" in `Post-barrier Return Stack Buffer Predictions / CVE-2022-26373 / INTEL-SA-00706 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/post-barrier-return-stack-buffer-predictions.html>`_
239
+
240
+
.. [#amd-smep-rsb] "Existing Mitigations" in `Technical Guidance for Mitigating Branch Type Confusion <https://www.amd.com/content/dam/amd/en/documents/resources/technical-guidance-for-mitigating-branch-type-confusion.pdf>`_
241
+
242
+
.. [#intel-smep-rsb] "Enhanced IBRS" in `Indirect Branch Restricted Speculation <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/indirect-branch-restricted-speculation.html>`_
243
+
244
+
.. [#amd-eibrs-vmexit] "Extended Feature Enable Register (EFER)" in `AMD64 Architecture Programmer's Manual Volume 2: System Programming <https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf>`_
245
+
246
+
.. [#intel-eibrs-vmexit] "Enhanced IBRS" in `Indirect Branch Restricted Speculation <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/indirect-branch-restricted-speculation.html>`_
247
+
248
+
.. [#intel-pbrsb] `Post-barrier Return Stack Buffer Predictions / CVE-2022-26373 / INTEL-SA-00706 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/post-barrier-return-stack-buffer-predictions.html>`_
249
+
250
+
.. [#retbleed-paper] `RETBleed: Arbitrary Speculative Code Execution with Return Instruction <https://comsec.ethz.ch/wp-content/files/retbleed_sec22.pdf>`_
251
+
252
+
.. [#amd-btc] `Technical Guidance for Mitigating Branch Type Confusion <https://www.amd.com/content/dam/amd/en/documents/resources/technical-guidance-for-mitigating-branch-type-confusion.pdf>`_
253
+
254
+
.. [#amd-srso] `Technical Update Regarding Speculative Return Stack Overflow <https://www.amd.com/content/dam/amd/en/documents/corporate/cr/speculative-return-stack-overflow-whitepaper.pdf>`_
255
+
256
+
.. [#inception-paper] `Inception: Exposing New Attack Surfaces with Training in Transient Execution <https://comsec.ethz.ch/wp-content/files/inception_sec23.pdf>`_
257
+
258
+
.. [#intel-rsbu] `Return Stack Buffer Underflow / Return Stack Buffer Underflow / CVE-2022-29901, CVE-2022-28693 / INTEL-SA-00702 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/return-stack-buffer-underflow.html>`_
259
+
260
+
.. [#intel-ibpb-btb] `Indirect Branch Predictor Barrier' <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/indirect-branch-predictor-barrier.html>`_
261
+
262
+
.. [#intel-eibrs-rrsba] "Guidance for RSBU" in `Return Stack Buffer Underflow / Return Stack Buffer Underflow / CVE-2022-29901, CVE-2022-28693 / INTEL-SA-00702 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/return-stack-buffer-underflow.html>`_
263
+
264
+
.. [#bhi-paper] `Branch History Injection: On the Effectiveness of Hardware Mitigations Against Cross-Privilege Spectre-v2 Attacks <http://download.vusec.net/papers/bhi-spectre-bhb_sec22.pdf>`_
265
+
266
+
.. [#intel-bhi] `Branch History Injection and Intra-mode Branch Target Injection / CVE-2022-0001, CVE-2022-0002 / INTEL-SA-00598 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html>`_
267
+
268
+
.. [#intel-retpoline-rrsba] "Retpoline" in `Branch History Injection and Intra-mode Branch Target Injection / CVE-2022-0001, CVE-2022-0002 / INTEL-SA-00598 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html>`_
+1
-4
Documentation/admin-guide/kernel-parameters.txt
+1
-4
Documentation/admin-guide/kernel-parameters.txt
···
1407
1407
earlyprintk=serial[,0x...[,baudrate]]
1408
1408
earlyprintk=ttySn[,baudrate]
1409
1409
earlyprintk=dbgp[debugController#]
1410
+
earlyprintk=mmio32,membase[,{nocfg|baudrate}]
1410
1411
earlyprintk=pciserial[,force],bus:device.function[,{nocfg|baudrate}]
1411
1412
earlyprintk=xdbc[xhciController#]
1412
1413
earlyprintk=bios
1413
-
earlyprintk=mmio,membase[,{nocfg|baudrate}]
1414
1414
1415
1415
earlyprintk is useful when the kernel crashes before
1416
1416
the normal console is initialized. It is not enabled by
1417
1417
default because it has some cosmetic problems.
1418
-
1419
-
Only 32-bit memory addresses are supported for "mmio"
1420
-
and "pciserial" devices.
1421
1418
1422
1419
Use "nocfg" to skip UART configuration, assume
1423
1420
BIOS/firmware has configured UART correctly.
+50
Documentation/admin-guide/xfs.rst
+50
Documentation/admin-guide/xfs.rst
···
124
124
controls the size of each buffer and so is also relevant to
125
125
this case.
126
126
127
+
lifetime (default) or nolifetime
128
+
Enable data placement based on write life time hints provided
129
+
by the user. This turns on co-allocation of data of similar
130
+
life times when statistically favorable to reduce garbage
131
+
collection cost.
132
+
133
+
These options are only available for zoned rt file systems.
134
+
127
135
logbsize=value
128
136
Set the size of each in-memory log buffer. The size may be
129
137
specified in bytes, or in kilobytes with a "k" suffix.
···
150
142
section, and a real-time section. The real-time section is
151
143
optional, and the log section can be separate from the data
152
144
section or contained within it.
145
+
146
+
max_open_zones=value
147
+
Specify the max number of zones to keep open for writing on a
148
+
zoned rt device. Many open zones aids file data separation
149
+
but may impact performance on HDDs.
150
+
151
+
If ``max_open_zones`` is not specified, the value is determined
152
+
by the capabilities and the size of the zoned rt device.
153
153
154
154
noalign
155
155
Data allocations will not be aligned at stripe unit
···
558
542
nice Relative priority of scheduling the threads. These are the
559
543
same nice levels that can be applied to userspace processes.
560
544
============ ===========
545
+
546
+
Zoned Filesystems
547
+
=================
548
+
549
+
For zoned file systems, the following attribute is exposed in:
550
+
551
+
/sys/fs/xfs/<dev>/zoned/
552
+
553
+
max_open_zones (Min: 1 Default: Varies Max: UINTMAX)
554
+
This read-only attribute exposes the maximum number of open zones
555
+
available for data placement. The value is determined at mount time and
556
+
is limited by the capabilities of the backing zoned device, file system
557
+
size and the max_open_zones mount option.
558
+
559
+
Zoned Filesystems
560
+
=================
561
+
562
+
For zoned file systems, the following attributes are exposed in:
563
+
564
+
/sys/fs/xfs/<dev>/zoned/
565
+
566
+
max_open_zones (Min: 1 Default: Varies Max: UINTMAX)
567
+
This read-only attribute exposes the maximum number of open zones
568
+
available for data placement. The value is determined at mount time and
569
+
is limited by the capabilities of the backing zoned device, file system
570
+
size and the max_open_zones mount option.
571
+
572
+
zonegc_low_space (Min: 0 Default: 0 Max: 100)
573
+
Define a percentage for how much of the unused space that GC should keep
574
+
available for writing. A high value will reclaim more of the space
575
+
occupied by unused blocks, creating a larger buffer against write
576
+
bursts at the cost of increased write amplification. Regardless
577
+
of this value, garbage collection will always aim to free a minimum
578
+
amount of blocks to keep max_open_zones open for data placement purposes.
+36
-33
Documentation/arch/x86/cpuinfo.rst
+36
-33
Documentation/arch/x86/cpuinfo.rst
···
79
79
How are feature flags created?
80
80
==============================
81
81
82
-
a: Feature flags can be derived from the contents of CPUID leaves.
83
-
------------------------------------------------------------------
82
+
Feature flags can be derived from the contents of CPUID leaves
83
+
--------------------------------------------------------------
84
+
84
85
These feature definitions are organized mirroring the layout of CPUID
85
86
leaves and grouped in words with offsets as mapped in enum cpuid_leafs
86
87
in cpufeatures.h (see arch/x86/include/asm/cpufeatures.h for details).
···
90
89
displayed accordingly in /proc/cpuinfo. For example, the flag "avx2"
91
90
comes from X86_FEATURE_AVX2 in cpufeatures.h.
92
91
93
-
b: Flags can be from scattered CPUID-based features.
94
-
----------------------------------------------------
92
+
Flags can be from scattered CPUID-based features
93
+
------------------------------------------------
94
+
95
95
Hardware features enumerated in sparsely populated CPUID leaves get
96
96
software-defined values. Still, CPUID needs to be queried to determine
97
97
if a given feature is present. This is done in init_scattered_cpuid_features().
···
106
104
array. Since there is a struct cpuinfo_x86 for each possible CPU, the wasted
107
105
memory is not trivial.
108
106
109
-
c: Flags can be created synthetically under certain conditions for hardware features.
110
-
-------------------------------------------------------------------------------------
107
+
Flags can be created synthetically under certain conditions for hardware features
108
+
---------------------------------------------------------------------------------
109
+
111
110
Examples of conditions include whether certain features are present in
112
111
MSR_IA32_CORE_CAPS or specific CPU models are identified. If the needed
113
112
conditions are met, the features are enabled by the set_cpu_cap or
···
117
114
"split_lock_detect" will be displayed. The flag "ring3mwait" will be
118
115
displayed only when running on INTEL_XEON_PHI_[KNL|KNM] processors.
119
116
120
-
d: Flags can represent purely software features.
121
-
------------------------------------------------
117
+
Flags can represent purely software features
118
+
--------------------------------------------
122
119
These flags do not represent hardware features. Instead, they represent a
123
120
software feature implemented in the kernel. For example, Kernel Page Table
124
121
Isolation is purely software feature and its feature flag X86_FEATURE_PTI is
···
133
130
resulting x86_cap/bug_flags[] are used to populate /proc/cpuinfo. The naming
134
131
of flags in the x86_cap/bug_flags[] are as follows:
135
132
136
-
a: The name of the flag is from the string in X86_FEATURE_<name> by default.
137
-
----------------------------------------------------------------------------
138
-
By default, the flag <name> in /proc/cpuinfo is extracted from the respective
139
-
X86_FEATURE_<name> in cpufeatures.h. For example, the flag "avx2" is from
140
-
X86_FEATURE_AVX2.
133
+
Flags do not appear by default in /proc/cpuinfo
134
+
-----------------------------------------------
141
135
142
-
b: The naming can be overridden.
143
-
--------------------------------
136
+
Feature flags are omitted by default from /proc/cpuinfo as it does not make
137
+
sense for the feature to be exposed to userspace in most cases. For example,
138
+
X86_FEATURE_ALWAYS is defined in cpufeatures.h but that flag is an internal
139
+
kernel feature used in the alternative runtime patching functionality. So the
140
+
flag does not appear in /proc/cpuinfo.
141
+
142
+
Specify a flag name if absolutely needed
143
+
----------------------------------------
144
+
144
145
If the comment on the line for the #define X86_FEATURE_* starts with a
145
146
double-quote character (""), the string inside the double-quote characters
146
147
will be the name of the flags. For example, the flag "sse4_1" comes from
···
155
148
constant. If, for some reason, the naming of X86_FEATURE_<name> changes, one
156
149
shall override the new naming with the name already used in /proc/cpuinfo.
157
150
158
-
c: The naming override can be "", which means it will not appear in /proc/cpuinfo.
159
-
----------------------------------------------------------------------------------
160
-
The feature shall be omitted from /proc/cpuinfo if it does not make sense for
161
-
the feature to be exposed to userspace. For example, X86_FEATURE_ALWAYS is
162
-
defined in cpufeatures.h but that flag is an internal kernel feature used
163
-
in the alternative runtime patching functionality. So, its name is overridden
164
-
with "". Its flag will not appear in /proc/cpuinfo.
165
-
166
151
Flags are missing when one or more of these happen
167
152
==================================================
168
153
169
-
a: The hardware does not enumerate support for it.
170
-
--------------------------------------------------
154
+
The hardware does not enumerate support for it
155
+
----------------------------------------------
156
+
171
157
For example, when a new kernel is running on old hardware or the feature is
172
158
not enabled by boot firmware. Even if the hardware is new, there might be a
173
159
problem enabling the feature at run time, the flag will not be displayed.
174
160
175
-
b: The kernel does not know about the flag.
176
-
-------------------------------------------
161
+
The kernel does not know about the flag
162
+
---------------------------------------
163
+
177
164
For example, when an old kernel is running on new hardware.
178
165
179
-
c: The kernel disabled support for it at compile-time.
180
-
------------------------------------------------------
166
+
The kernel disabled support for it at compile-time
167
+
--------------------------------------------------
168
+
181
169
For example, if 5-level-paging is not enabled when building (i.e.,
182
170
CONFIG_X86_5LEVEL is not selected) the flag "la57" will not show up [#f1]_.
183
171
Even though the feature will still be detected via CPUID, the kernel disables
184
172
it by clearing via setup_clear_cpu_cap(X86_FEATURE_LA57).
185
173
186
-
d: The feature is disabled at boot-time.
187
-
----------------------------------------
174
+
The feature is disabled at boot-time
175
+
------------------------------------
188
176
A feature can be disabled either using a command-line parameter or because
189
177
it failed to be enabled. The command-line parameter clearcpuid= can be used
190
178
to disable features using the feature number as defined in
···
192
190
to, nofsgsbase, nosgx, noxsave, etc. 5-level paging can also be disabled using
193
191
"no5lvl".
194
192
195
-
e: The feature was known to be non-functional.
196
-
----------------------------------------------
193
+
The feature was known to be non-functional
194
+
------------------------------------------
195
+
197
196
The feature was known to be non-functional because a dependency was
198
197
missing at runtime. For example, AVX flags will not show up if XSAVE feature
199
198
is disabled since they depend on XSAVE feature. Another example would be broken
-1
Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml
-1
Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml
+17
-1
Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
+17
-1
Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
···
111
111
unevaluatedProperties: false
112
112
113
113
port@1:
114
-
$ref: /schemas/graph.yaml#/properties/port
114
+
$ref: /schemas/graph.yaml#/$defs/port-base
115
+
unevaluatedProperties: false
115
116
description:
116
117
DSI output port node to the panel or the next bridge
117
118
in the chain
119
+
120
+
properties:
121
+
endpoint:
122
+
$ref: /schemas/media/video-interfaces.yaml#
123
+
unevaluatedProperties: false
124
+
125
+
properties:
126
+
data-lanes:
127
+
description: array of physical DSI data lane indexes.
128
+
minItems: 1
129
+
items:
130
+
- const: 1
131
+
- const: 2
132
+
- const: 3
133
+
- const: 4
118
134
119
135
required:
120
136
- port@0
-1
Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
-1
Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
+1
Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml
+1
Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml
-9
Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml
-9
Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml
-1
Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
-1
Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
+1
-1
Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml
+1
-1
Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml
+8
-3
Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml
+8
-3
Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml
···
18
18
19
19
properties:
20
20
compatible:
21
-
enum:
22
-
- nxp,imx95-sysctr-timer
23
-
- nxp,sysctr-timer
21
+
oneOf:
22
+
- enum:
23
+
- nxp,imx95-sysctr-timer
24
+
- nxp,sysctr-timer
25
+
- items:
26
+
- enum:
27
+
- nxp,imx94-sysctr-timer
28
+
- const: nxp,imx95-sysctr-timer
24
29
25
30
reg:
26
31
maxItems: 1
-56
Documentation/devicetree/bindings/timer/renesas,tpu.yaml
-56
Documentation/devicetree/bindings/timer/renesas,tpu.yaml
···
1
-
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
-
%YAML 1.2
3
-
---
4
-
$id: http://devicetree.org/schemas/timer/renesas,tpu.yaml#
5
-
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
-
7
-
title: Renesas H8/300 Timer Pulse Unit
8
-
9
-
maintainers:
10
-
- Yoshinori Sato <ysato@users.sourceforge.jp>
11
-
12
-
description:
13
-
The TPU is a 16bit timer/counter with configurable clock inputs and
14
-
programmable compare match.
15
-
This implementation supports only cascade mode.
16
-
17
-
select:
18
-
properties:
19
-
compatible:
20
-
contains:
21
-
const: renesas,tpu
22
-
'#pwm-cells': false
23
-
required:
24
-
- compatible
25
-
26
-
properties:
27
-
compatible:
28
-
const: renesas,tpu
29
-
30
-
reg:
31
-
items:
32
-
- description: First channel
33
-
- description: Second channel
34
-
35
-
clocks:
36
-
maxItems: 1
37
-
38
-
clock-names:
39
-
const: fck
40
-
41
-
required:
42
-
- compatible
43
-
- reg
44
-
- clocks
45
-
- clock-names
46
-
47
-
additionalProperties: false
48
-
49
-
examples:
50
-
- |
51
-
tpu: tpu@ffffe0 {
52
-
compatible = "renesas,tpu";
53
-
reg = <0xffffe0 16>, <0xfffff0 12>;
54
-
clocks = <&pclk>;
55
-
clock-names = "fck";
56
-
};
-1
Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
-1
Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
-1
Documentation/devicetree/bindings/usb/microchip,usb5744.yaml
-1
Documentation/devicetree/bindings/usb/microchip,usb5744.yaml
-1
Documentation/devicetree/bindings/usb/xlnx,usb2.yaml
-1
Documentation/devicetree/bindings/usb/xlnx,usb2.yaml
+14
-6
Documentation/filesystems/ext4/super.rst
+14
-6
Documentation/filesystems/ext4/super.rst
···
328
328
- s_checksum_type
329
329
- Metadata checksum algorithm type. The only valid value is 1 (crc32c).
330
330
* - 0x176
331
-
- __le16
332
-
- s_reserved_pad
333
-
-
331
+
- \_\_u8
332
+
- s\_encryption\_level
333
+
- Versioning level for encryption.
334
+
* - 0x177
335
+
- \_\_u8
336
+
- s\_reserved\_pad
337
+
- Padding to next 32bits.
334
338
* - 0x178
335
339
- __le64
336
340
- s_kbytes_written
···
470
466
- s_last_error_time_hi
471
467
- Upper 8 bits of the s_last_error_time field.
472
468
* - 0x27A
473
-
- __u8
474
-
- s_pad[2]
475
-
- Zero padding.
469
+
- \_\_u8
470
+
- s\_first\_error\_errcode
471
+
-
472
+
* - 0x27B
473
+
- \_\_u8
474
+
- s\_last\_error\_errcode
475
+
-
476
476
* - 0x27C
477
477
- __le16
478
478
- s_encoding
+1
-3
Documentation/netlink/specs/ovs_vport.yaml
+1
-3
Documentation/netlink/specs/ovs_vport.yaml
···
123
123
124
124
operations:
125
125
name-prefix: ovs-vport-cmd-
126
+
fixed-header: ovs-header
126
127
list:
127
128
-
128
129
name: new
129
130
doc: Create a new OVS vport
130
131
attribute-set: vport
131
-
fixed-header: ovs-header
132
132
do:
133
133
request:
134
134
attributes:
···
141
141
name: del
142
142
doc: Delete existing OVS vport from a data path
143
143
attribute-set: vport
144
-
fixed-header: ovs-header
145
144
do:
146
145
request:
147
146
attributes:
···
151
152
name: get
152
153
doc: Get / dump OVS vport configuration and state
153
154
attribute-set: vport
154
-
fixed-header: ovs-header
155
155
do: &vport-get-op
156
156
request:
157
157
attributes:
+13
-7
Documentation/netlink/specs/rt-link.yaml
+13
-7
Documentation/netlink/specs/rt-link.yaml
···
1119
1119
-
1120
1120
name: prop-list
1121
1121
type: nest
1122
-
nested-attributes: link-attrs
1122
+
nested-attributes: prop-list-link-attrs
1123
1123
-
1124
1124
name: alt-ifname
1125
1125
type: string
1126
-
multi-attr: true
1127
1126
-
1128
1127
name: perm-address
1129
1128
type: binary
···
1168
1169
-
1169
1170
name: netns-immutable
1170
1171
type: u8
1172
+
-
1173
+
name: prop-list-link-attrs
1174
+
subset-of: link-attrs
1175
+
attributes:
1176
+
-
1177
+
name: alt-ifname
1178
+
multi-attr: true
1171
1179
-
1172
1180
name: af-spec-attrs
1173
1181
attributes:
···
1597
1591
name: nf-call-iptables
1598
1592
type: u8
1599
1593
-
1600
-
name: nf-call-ip6-tables
1594
+
name: nf-call-ip6tables
1601
1595
type: u8
1602
1596
-
1603
1597
name: nf-call-arptables
···
2089
2083
name: id
2090
2084
type: u16
2091
2085
-
2092
-
name: flag
2086
+
name: flags
2093
2087
type: binary
2094
2088
struct: ifla-vlan-flags
2095
2089
-
···
2177
2171
type: binary
2178
2172
struct: ifla-cacheinfo
2179
2173
-
2180
-
name: icmp6-stats
2174
+
name: icmp6stats
2181
2175
type: binary
2182
2176
struct: ifla-icmp6-stats
2183
2177
-
···
2191
2185
type: u32
2192
2186
-
2193
2187
name: mctp-attrs
2188
+
name-prefix: ifla-mctp-
2194
2189
attributes:
2195
2190
-
2196
-
name: mctp-net
2191
+
name: net
2197
2192
type: u32
2198
2193
-
2199
2194
name: phys-binding
···
2476
2469
- min-mtu
2477
2470
- max-mtu
2478
2471
- prop-list
2479
-
- alt-ifname
2480
2472
- perm-address
2481
2473
- proto-down-reason
2482
2474
- parent-dev-name
+7
-7
Documentation/netlink/specs/rt-neigh.yaml
+7
-7
Documentation/netlink/specs/rt-neigh.yaml
···
13
13
type: struct
14
14
members:
15
15
-
16
-
name: family
16
+
name: ndm-family
17
17
type: u8
18
18
-
19
-
name: pad
19
+
name: ndm-pad
20
20
type: pad
21
21
len: 3
22
22
-
23
-
name: ifindex
23
+
name: ndm-ifindex
24
24
type: s32
25
25
-
26
-
name: state
26
+
name: ndm-state
27
27
type: u16
28
28
enum: nud-state
29
29
-
30
-
name: flags
30
+
name: ndm-flags
31
31
type: u8
32
32
enum: ntf-flags
33
33
-
34
-
name: type
34
+
name: ndm-type
35
35
type: u8
36
36
enum: rtm-type
37
37
-
···
189
189
type: binary
190
190
display-hint: ipv4
191
191
-
192
-
name: lladr
192
+
name: lladdr
193
193
type: binary
194
194
display-hint: mac
195
195
-
+1
-1
Documentation/userspace-api/mseal.rst
+1
-1
Documentation/userspace-api/mseal.rst
···
27
27
=======
28
28
mseal syscall signature
29
29
-----------------------
30
-
``int mseal(void \* addr, size_t len, unsigned long flags)``
30
+
``int mseal(void *addr, size_t len, unsigned long flags)``
31
31
32
32
**addr**/**len**: virtual memory address range.
33
33
The address range set by **addr**/**len** must meet:
+4
Documentation/wmi/devices/msi-wmi-platform.rst
+4
Documentation/wmi/devices/msi-wmi-platform.rst
···
138
138
The output buffer contains a single byte which signals success or failure (``0x00`` on failure)
139
139
and 31 bytes of output data, the meaning if which depends on the subfeature being accessed.
140
140
141
+
.. note::
142
+
The ACPI control method responsible for handling the WMI method calls is not thread-safe.
143
+
This is a firmware bug that needs to be handled inside the driver itself.
144
+
141
145
WMI method Get_EC()
142
146
-------------------
143
147
+14
-4
MAINTAINERS
+14
-4
MAINTAINERS
···
6335
6335
6336
6336
CW1200 WLAN driver
6337
6337
S: Orphan
6338
+
L: linux-wireless@vger.kernel.org
6338
6339
F: drivers/net/wireless/st/
6339
6340
F: include/linux/platform_data/net-cw1200.h
6340
6341
···
10948
10947
10949
10948
HUGETLB SUBSYSTEM
10950
10949
M: Muchun Song <muchun.song@linux.dev>
10950
+
R: Oscar Salvador <osalvador@suse.de>
10951
10951
L: linux-mm@kvack.org
10952
10952
S: Maintained
10953
10953
F: Documentation/ABI/testing/sysfs-kernel-mm-hugepages
···
12805
12803
F: scripts/Makefile.kcsan
12806
12804
12807
12805
KDUMP
12806
+
M: Andrew Morton <akpm@linux-foundation.org>
12808
12807
M: Baoquan He <bhe@redhat.com>
12809
12808
R: Vivek Goyal <vgoyal@redhat.com>
12810
12809
R: Dave Young <dyoung@redhat.com>
···
13107
13104
F: include/linux/kernfs.h
13108
13105
13109
13106
KEXEC
13107
+
M: Andrew Morton <akpm@linux-foundation.org>
13108
+
M: Baoquan He <bhe@redhat.com>
13110
13109
L: kexec@lists.infradead.org
13111
13110
W: http://kernel.org/pub/linux/utils/kernel/kexec/
13112
13111
F: include/linux/kexec.h
···
14281
14276
F: drivers/net/ethernet/marvell/sk*
14282
14277
14283
14278
MARVELL LIBERTAS WIRELESS DRIVER
14279
+
L: linux-wireless@vger.kernel.org
14284
14280
L: libertas-dev@lists.infradead.org
14285
14281
S: Orphan
14286
14282
F: drivers/net/wireless/marvell/libertas/
···
17367
17361
F: drivers/nvme/target/
17368
17362
17369
17363
NVMEM FRAMEWORK
17370
-
M: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
17364
+
M: Srinivas Kandagatla <srini@kernel.org>
17371
17365
S: Maintained
17372
17366
T: git git://git.kernel.org/pub/scm/linux/kernel/git/srini/nvmem.git
17373
17367
F: Documentation/ABI/stable/sysfs-bus-nvmem
···
19583
19577
F: drivers/crypto/intel/qat/
19584
19578
19585
19579
QCOM AUDIO (ASoC) DRIVERS
19586
-
M: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
19580
+
M: Srinivas Kandagatla <srini@kernel.org>
19587
19581
L: linux-sound@vger.kernel.org
19588
19582
L: linux-arm-msm@vger.kernel.org
19589
19583
S: Supported
···
19756
19750
19757
19751
QUALCOMM ATH12K WIRELESS DRIVER
19758
19752
M: Jeff Johnson <jjohnson@kernel.org>
19753
+
L: linux-wireless@vger.kernel.org
19759
19754
L: ath12k@lists.infradead.org
19760
19755
S: Supported
19761
19756
W: https://wireless.wiki.kernel.org/en/users/Drivers/ath12k
···
19766
19759
19767
19760
QUALCOMM ATHEROS ATH10K WIRELESS DRIVER
19768
19761
M: Jeff Johnson <jjohnson@kernel.org>
19762
+
L: linux-wireless@vger.kernel.org
19769
19763
L: ath10k@lists.infradead.org
19770
19764
S: Supported
19771
19765
W: https://wireless.wiki.kernel.org/en/users/Drivers/ath10k
···
19776
19768
19777
19769
QUALCOMM ATHEROS ATH11K WIRELESS DRIVER
19778
19770
M: Jeff Johnson <jjohnson@kernel.org>
19771
+
L: linux-wireless@vger.kernel.org
19779
19772
L: ath11k@lists.infradead.org
19780
19773
S: Supported
19781
19774
W: https://wireless.wiki.kernel.org/en/users/Drivers/ath11k
···
19886
19877
F: drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
19887
19878
19888
19879
QUALCOMM FASTRPC DRIVER
19889
-
M: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
19880
+
M: Srinivas Kandagatla <srini@kernel.org>
19890
19881
M: Amol Maheshwari <amahesh@qti.qualcomm.com>
19891
19882
L: linux-arm-msm@vger.kernel.org
19892
19883
L: dri-devel@lists.freedesktop.org
···
21934
21925
F: drivers/media/rc/serial_ir.c
21935
21926
21936
21927
SERIAL LOW-POWER INTER-CHIP MEDIA BUS (SLIMbus)
21937
-
M: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
21928
+
M: Srinivas Kandagatla <srini@kernel.org>
21938
21929
L: linux-sound@vger.kernel.org
21939
21930
S: Maintained
21940
21931
F: Documentation/devicetree/bindings/slimbus/
···
22150
22141
22151
22142
SILICON LABS WIRELESS DRIVERS (for WFxxx series)
22152
22143
M: Jérôme Pouiller <jerome.pouiller@silabs.com>
22144
+
L: linux-wireless@vger.kernel.org
22153
22145
S: Supported
22154
22146
F: Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml
22155
22147
F: drivers/net/wireless/silabs/
+1
-1
Makefile
+1
-1
Makefile
+1
-1
arch/arm64/include/asm/rqspinlock.h
+1
-1
arch/arm64/include/asm/rqspinlock.h
+19
arch/s390/Kconfig
+19
arch/s390/Kconfig
···
332
332
def_bool n
333
333
select HAVE_MARCH_Z15_FEATURES
334
334
335
+
config HAVE_MARCH_Z17_FEATURES
336
+
def_bool n
337
+
select HAVE_MARCH_Z16_FEATURES
338
+
335
339
choice
336
340
prompt "Processor type"
337
341
default MARCH_Z196
···
401
397
Select this to enable optimizations for IBM z16 (3931 and
402
398
3932 series).
403
399
400
+
config MARCH_Z17
401
+
bool "IBM z17"
402
+
select HAVE_MARCH_Z17_FEATURES
403
+
depends on $(cc-option,-march=z17)
404
+
help
405
+
Select this to enable optimizations for IBM z17 (9175 and
406
+
9176 series).
407
+
404
408
endchoice
405
409
406
410
config MARCH_Z10_TUNE
···
431
419
432
420
config MARCH_Z16_TUNE
433
421
def_bool TUNE_Z16 || MARCH_Z16 && TUNE_DEFAULT
422
+
423
+
config MARCH_Z17_TUNE
424
+
def_bool TUNE_Z17 || MARCH_Z17 && TUNE_DEFAULT
434
425
435
426
choice
436
427
prompt "Tune code generation"
···
478
463
config TUNE_Z16
479
464
bool "IBM z16"
480
465
depends on $(cc-option,-mtune=z16)
466
+
467
+
config TUNE_Z17
468
+
bool "IBM z17"
469
+
depends on $(cc-option,-mtune=z17)
481
470
482
471
endchoice
483
472
+2
arch/s390/Makefile
+2
arch/s390/Makefile
···
48
48
mflags-$(CONFIG_MARCH_Z14) := -march=z14
49
49
mflags-$(CONFIG_MARCH_Z15) := -march=z15
50
50
mflags-$(CONFIG_MARCH_Z16) := -march=z16
51
+
mflags-$(CONFIG_MARCH_Z17) := -march=z17
51
52
52
53
export CC_FLAGS_MARCH := $(mflags-y)
53
54
···
62
61
cflags-$(CONFIG_MARCH_Z14_TUNE) += -mtune=z14
63
62
cflags-$(CONFIG_MARCH_Z15_TUNE) += -mtune=z15
64
63
cflags-$(CONFIG_MARCH_Z16_TUNE) += -mtune=z16
64
+
cflags-$(CONFIG_MARCH_Z17_TUNE) += -mtune=z17
65
65
66
66
cflags-y += -Wa,-I$(srctree)/arch/$(ARCH)/include
67
67
+4
arch/s390/include/asm/march.h
+4
arch/s390/include/asm/march.h
+2
-9
arch/s390/kernel/perf_cpum_cf.c
+2
-9
arch/s390/kernel/perf_cpum_cf.c
···
442
442
ctrset_size = 48;
443
443
else if (cpumf_ctr_info.csvn >= 3 && cpumf_ctr_info.csvn <= 5)
444
444
ctrset_size = 128;
445
-
else if (cpumf_ctr_info.csvn == 6 || cpumf_ctr_info.csvn == 7)
445
+
else if (cpumf_ctr_info.csvn >= 6 && cpumf_ctr_info.csvn <= 8)
446
446
ctrset_size = 160;
447
447
break;
448
448
case CPUMF_CTR_SET_MT_DIAG:
···
858
858
static int cpumf_pmu_event_init(struct perf_event *event)
859
859
{
860
860
unsigned int type = event->attr.type;
861
-
int err;
861
+
int err = -ENOENT;
862
862
863
863
if (type == PERF_TYPE_HARDWARE || type == PERF_TYPE_RAW)
864
864
err = __hw_perf_event_init(event, type);
865
865
else if (event->pmu->type == type)
866
866
/* Registered as unknown PMU */
867
867
err = __hw_perf_event_init(event, cpumf_pmu_event_type(event));
868
-
else
869
-
return -ENOENT;
870
-
871
-
if (unlikely(err) && event->destroy)
872
-
event->destroy(event);
873
868
874
869
return err;
875
870
}
···
1814
1819
event->destroy = hw_perf_event_destroy;
1815
1820
1816
1821
err = cfdiag_event_init2(event);
1817
-
if (unlikely(err))
1818
-
event->destroy(event);
1819
1822
out:
1820
1823
return err;
1821
1824
}
+164
-3
arch/s390/kernel/perf_cpum_cf_events.c
+164
-3
arch/s390/kernel/perf_cpum_cf_events.c
···
237
237
CPUMF_EVENT_ATTR(cf_z14, TX_C_TABORT_SPECIAL, 0x00f5);
238
238
CPUMF_EVENT_ATTR(cf_z14, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);
239
239
CPUMF_EVENT_ATTR(cf_z14, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);
240
-
241
240
CPUMF_EVENT_ATTR(cf_z15, L1D_RO_EXCL_WRITES, 0x0080);
242
241
CPUMF_EVENT_ATTR(cf_z15, DTLB2_WRITES, 0x0081);
243
242
CPUMF_EVENT_ATTR(cf_z15, DTLB2_MISSES, 0x0082);
···
364
365
CPUMF_EVENT_ATTR(cf_z16, NNPA_HOLD_LOCK, 0x010e);
365
366
CPUMF_EVENT_ATTR(cf_z16, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);
366
367
CPUMF_EVENT_ATTR(cf_z16, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);
368
+
CPUMF_EVENT_ATTR(cf_z17, L1D_RO_EXCL_WRITES, 0x0080);
369
+
CPUMF_EVENT_ATTR(cf_z17, DTLB2_WRITES, 0x0081);
370
+
CPUMF_EVENT_ATTR(cf_z17, DTLB2_MISSES, 0x0082);
371
+
CPUMF_EVENT_ATTR(cf_z17, CRSTE_1MB_WRITES, 0x0083);
372
+
CPUMF_EVENT_ATTR(cf_z17, DTLB2_GPAGE_WRITES, 0x0084);
373
+
CPUMF_EVENT_ATTR(cf_z17, ITLB2_WRITES, 0x0086);
374
+
CPUMF_EVENT_ATTR(cf_z17, ITLB2_MISSES, 0x0087);
375
+
CPUMF_EVENT_ATTR(cf_z17, TLB2_PTE_WRITES, 0x0089);
376
+
CPUMF_EVENT_ATTR(cf_z17, TLB2_CRSTE_WRITES, 0x008a);
377
+
CPUMF_EVENT_ATTR(cf_z17, TLB2_ENGINES_BUSY, 0x008b);
378
+
CPUMF_EVENT_ATTR(cf_z17, TX_C_TEND, 0x008c);
379
+
CPUMF_EVENT_ATTR(cf_z17, TX_NC_TEND, 0x008d);
380
+
CPUMF_EVENT_ATTR(cf_z17, L1C_TLB2_MISSES, 0x008f);
381
+
CPUMF_EVENT_ATTR(cf_z17, DCW_REQ, 0x0091);
382
+
CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_IV, 0x0092);
383
+
CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_CHIP_HIT, 0x0093);
384
+
CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_DRAWER_HIT, 0x0094);
385
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP, 0x0095);
386
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_IV, 0x0096);
387
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_CHIP_HIT, 0x0097);
388
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_DRAWER_HIT, 0x0098);
389
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_MODULE, 0x0099);
390
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_DRAWER, 0x009a);
391
+
CPUMF_EVENT_ATTR(cf_z17, DCW_OFF_DRAWER, 0x009b);
392
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_MEMORY, 0x009c);
393
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_MODULE_MEMORY, 0x009d);
394
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_DRAWER_MEMORY, 0x009e);
395
+
CPUMF_EVENT_ATTR(cf_z17, DCW_OFF_DRAWER_MEMORY, 0x009f);
396
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_IV, 0x00a0);
397
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_CHIP_HIT, 0x00a1);
398
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_DRAWER_HIT, 0x00a2);
399
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_IV, 0x00a3);
400
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_CHIP_HIT, 0x00a4);
401
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_DRAWER_HIT, 0x00a5);
402
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_IV, 0x00a6);
403
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_CHIP_HIT, 0x00a7);
404
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_DRAWER_HIT, 0x00a8);
405
+
CPUMF_EVENT_ATTR(cf_z17, ICW_REQ, 0x00a9);
406
+
CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_IV, 0x00aa);
407
+
CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_CHIP_HIT, 0x00ab);
408
+
CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_DRAWER_HIT, 0x00ac);
409
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP, 0x00ad);
410
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_IV, 0x00ae);
411
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_CHIP_HIT, 0x00af);
412
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_DRAWER_HIT, 0x00b0);
413
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_MODULE, 0x00b1);
414
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_DRAWER, 0x00b2);
415
+
CPUMF_EVENT_ATTR(cf_z17, ICW_OFF_DRAWER, 0x00b3);
416
+
CPUMF_EVENT_ATTR(cf_z17, CYCLES_SAMETHRD, 0x00ca);
417
+
CPUMF_EVENT_ATTR(cf_z17, CYCLES_DIFFTHRD, 0x00cb);
418
+
CPUMF_EVENT_ATTR(cf_z17, INST_SAMETHRD, 0x00cc);
419
+
CPUMF_EVENT_ATTR(cf_z17, INST_DIFFTHRD, 0x00cd);
420
+
CPUMF_EVENT_ATTR(cf_z17, WRONG_BRANCH_PREDICTION, 0x00ce);
421
+
CPUMF_EVENT_ATTR(cf_z17, VX_BCD_EXECUTION_SLOTS, 0x00e1);
422
+
CPUMF_EVENT_ATTR(cf_z17, DECIMAL_INSTRUCTIONS, 0x00e2);
423
+
CPUMF_EVENT_ATTR(cf_z17, LAST_HOST_TRANSLATIONS, 0x00e8);
424
+
CPUMF_EVENT_ATTR(cf_z17, TX_NC_TABORT, 0x00f4);
425
+
CPUMF_EVENT_ATTR(cf_z17, TX_C_TABORT_NO_SPECIAL, 0x00f5);
426
+
CPUMF_EVENT_ATTR(cf_z17, TX_C_TABORT_SPECIAL, 0x00f6);
427
+
CPUMF_EVENT_ATTR(cf_z17, DFLT_ACCESS, 0x00f8);
428
+
CPUMF_EVENT_ATTR(cf_z17, DFLT_CYCLES, 0x00fd);
429
+
CPUMF_EVENT_ATTR(cf_z17, SORTL, 0x0100);
430
+
CPUMF_EVENT_ATTR(cf_z17, DFLT_CC, 0x0109);
431
+
CPUMF_EVENT_ATTR(cf_z17, DFLT_CCFINISH, 0x010a);
432
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_INVOCATIONS, 0x010b);
433
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_COMPLETIONS, 0x010c);
434
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_WAIT_LOCK, 0x010d);
435
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_HOLD_LOCK, 0x010e);
436
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_ONCHIP, 0x0110);
437
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_OFFCHIP, 0x0111);
438
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_DIFF, 0x0112);
439
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_4K_PREFETCH, 0x0114);
440
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_COMPL_LOCK, 0x0115);
441
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_RETRY_LOCK, 0x0116);
442
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_RETRY_LOCK_WITH_PLO, 0x0117);
443
+
CPUMF_EVENT_ATTR(cf_z17, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);
444
+
CPUMF_EVENT_ATTR(cf_z17, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);
367
445
368
446
static struct attribute *cpumcf_fvn1_pmu_event_attr[] __initdata = {
369
447
CPUMF_EVENT_PTR(cf_fvn1, CPU_CYCLES),
···
490
414
NULL,
491
415
};
492
416
493
-
static struct attribute *cpumcf_svn_67_pmu_event_attr[] __initdata = {
417
+
static struct attribute *cpumcf_svn_678_pmu_event_attr[] __initdata = {
494
418
CPUMF_EVENT_PTR(cf_svn_12345, PRNG_FUNCTIONS),
495
419
CPUMF_EVENT_PTR(cf_svn_12345, PRNG_CYCLES),
496
420
CPUMF_EVENT_PTR(cf_svn_12345, PRNG_BLOCKED_FUNCTIONS),
···
855
779
NULL,
856
780
};
857
781
782
+
static struct attribute *cpumcf_z17_pmu_event_attr[] __initdata = {
783
+
CPUMF_EVENT_PTR(cf_z17, L1D_RO_EXCL_WRITES),
784
+
CPUMF_EVENT_PTR(cf_z17, DTLB2_WRITES),
785
+
CPUMF_EVENT_PTR(cf_z17, DTLB2_MISSES),
786
+
CPUMF_EVENT_PTR(cf_z17, CRSTE_1MB_WRITES),
787
+
CPUMF_EVENT_PTR(cf_z17, DTLB2_GPAGE_WRITES),
788
+
CPUMF_EVENT_PTR(cf_z17, ITLB2_WRITES),
789
+
CPUMF_EVENT_PTR(cf_z17, ITLB2_MISSES),
790
+
CPUMF_EVENT_PTR(cf_z17, TLB2_PTE_WRITES),
791
+
CPUMF_EVENT_PTR(cf_z17, TLB2_CRSTE_WRITES),
792
+
CPUMF_EVENT_PTR(cf_z17, TLB2_ENGINES_BUSY),
793
+
CPUMF_EVENT_PTR(cf_z17, TX_C_TEND),
794
+
CPUMF_EVENT_PTR(cf_z17, TX_NC_TEND),
795
+
CPUMF_EVENT_PTR(cf_z17, L1C_TLB2_MISSES),
796
+
CPUMF_EVENT_PTR(cf_z17, DCW_REQ),
797
+
CPUMF_EVENT_PTR(cf_z17, DCW_REQ_IV),
798
+
CPUMF_EVENT_PTR(cf_z17, DCW_REQ_CHIP_HIT),
799
+
CPUMF_EVENT_PTR(cf_z17, DCW_REQ_DRAWER_HIT),
800
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP),
801
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_IV),
802
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_CHIP_HIT),
803
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_DRAWER_HIT),
804
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_MODULE),
805
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_DRAWER),
806
+
CPUMF_EVENT_PTR(cf_z17, DCW_OFF_DRAWER),
807
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_MEMORY),
808
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_MODULE_MEMORY),
809
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_DRAWER_MEMORY),
810
+
CPUMF_EVENT_PTR(cf_z17, DCW_OFF_DRAWER_MEMORY),
811
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_IV),
812
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_CHIP_HIT),
813
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_DRAWER_HIT),
814
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_IV),
815
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_CHIP_HIT),
816
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_DRAWER_HIT),
817
+
CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_IV),
818
+
CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_CHIP_HIT),
819
+
CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_DRAWER_HIT),
820
+
CPUMF_EVENT_PTR(cf_z17, ICW_REQ),
821
+
CPUMF_EVENT_PTR(cf_z17, ICW_REQ_IV),
822
+
CPUMF_EVENT_PTR(cf_z17, ICW_REQ_CHIP_HIT),
823
+
CPUMF_EVENT_PTR(cf_z17, ICW_REQ_DRAWER_HIT),
824
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP),
825
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_IV),
826
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_CHIP_HIT),
827
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_DRAWER_HIT),
828
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_MODULE),
829
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_DRAWER),
830
+
CPUMF_EVENT_PTR(cf_z17, ICW_OFF_DRAWER),
831
+
CPUMF_EVENT_PTR(cf_z17, CYCLES_SAMETHRD),
832
+
CPUMF_EVENT_PTR(cf_z17, CYCLES_DIFFTHRD),
833
+
CPUMF_EVENT_PTR(cf_z17, INST_SAMETHRD),
834
+
CPUMF_EVENT_PTR(cf_z17, INST_DIFFTHRD),
835
+
CPUMF_EVENT_PTR(cf_z17, WRONG_BRANCH_PREDICTION),
836
+
CPUMF_EVENT_PTR(cf_z17, VX_BCD_EXECUTION_SLOTS),
837
+
CPUMF_EVENT_PTR(cf_z17, DECIMAL_INSTRUCTIONS),
838
+
CPUMF_EVENT_PTR(cf_z17, LAST_HOST_TRANSLATIONS),
839
+
CPUMF_EVENT_PTR(cf_z17, TX_NC_TABORT),
840
+
CPUMF_EVENT_PTR(cf_z17, TX_C_TABORT_NO_SPECIAL),
841
+
CPUMF_EVENT_PTR(cf_z17, TX_C_TABORT_SPECIAL),
842
+
CPUMF_EVENT_PTR(cf_z17, DFLT_ACCESS),
843
+
CPUMF_EVENT_PTR(cf_z17, DFLT_CYCLES),
844
+
CPUMF_EVENT_PTR(cf_z17, SORTL),
845
+
CPUMF_EVENT_PTR(cf_z17, DFLT_CC),
846
+
CPUMF_EVENT_PTR(cf_z17, DFLT_CCFINISH),
847
+
CPUMF_EVENT_PTR(cf_z17, NNPA_INVOCATIONS),
848
+
CPUMF_EVENT_PTR(cf_z17, NNPA_COMPLETIONS),
849
+
CPUMF_EVENT_PTR(cf_z17, NNPA_WAIT_LOCK),
850
+
CPUMF_EVENT_PTR(cf_z17, NNPA_HOLD_LOCK),
851
+
CPUMF_EVENT_PTR(cf_z17, NNPA_INST_ONCHIP),
852
+
CPUMF_EVENT_PTR(cf_z17, NNPA_INST_OFFCHIP),
853
+
CPUMF_EVENT_PTR(cf_z17, NNPA_INST_DIFF),
854
+
CPUMF_EVENT_PTR(cf_z17, NNPA_4K_PREFETCH),
855
+
CPUMF_EVENT_PTR(cf_z17, NNPA_COMPL_LOCK),
856
+
CPUMF_EVENT_PTR(cf_z17, NNPA_RETRY_LOCK),
857
+
CPUMF_EVENT_PTR(cf_z17, NNPA_RETRY_LOCK_WITH_PLO),
858
+
CPUMF_EVENT_PTR(cf_z17, MT_DIAG_CYCLES_ONE_THR_ACTIVE),
859
+
CPUMF_EVENT_PTR(cf_z17, MT_DIAG_CYCLES_TWO_THR_ACTIVE),
860
+
NULL,
861
+
};
862
+
858
863
/* END: CPUM_CF COUNTER DEFINITIONS ===================================== */
859
864
860
865
static struct attribute_group cpumcf_pmu_events_group = {
···
1016
859
if (ci.csvn >= 1 && ci.csvn <= 5)
1017
860
csvn = cpumcf_svn_12345_pmu_event_attr;
1018
861
else if (ci.csvn >= 6)
1019
-
csvn = cpumcf_svn_67_pmu_event_attr;
862
+
csvn = cpumcf_svn_678_pmu_event_attr;
1020
863
1021
864
/* Determine model-specific counter set(s) */
1022
865
get_cpu_id(&cpu_id);
···
1048
891
case 0x3931:
1049
892
case 0x3932:
1050
893
model = cpumcf_z16_pmu_event_attr;
894
+
break;
895
+
case 0x9175:
896
+
case 0x9176:
897
+
model = cpumcf_z17_pmu_event_attr;
1051
898
break;
1052
899
default:
1053
900
model = none;
-3
arch/s390/kernel/perf_cpum_sf.c
-3
arch/s390/kernel/perf_cpum_sf.c
+4
arch/s390/kernel/processor.c
+4
arch/s390/kernel/processor.c
+3
arch/s390/tools/gen_facilities.c
+3
arch/s390/tools/gen_facilities.c
+5
-4
arch/x86/entry/entry.S
+5
-4
arch/x86/entry/entry.S
···
17
17
18
18
.pushsection .noinstr.text, "ax"
19
19
20
-
SYM_FUNC_START(entry_ibpb)
20
+
/* Clobbers AX, CX, DX */
21
+
SYM_FUNC_START(write_ibpb)
21
22
ANNOTATE_NOENDBR
22
23
movl $MSR_IA32_PRED_CMD, %ecx
23
-
movl $PRED_CMD_IBPB, %eax
24
+
movl _ASM_RIP(x86_pred_cmd), %eax
24
25
xorl %edx, %edx
25
26
wrmsr
26
27
27
28
/* Make sure IBPB clears return stack preductions too. */
28
29
FILL_RETURN_BUFFER %rax, RSB_CLEAR_LOOPS, X86_BUG_IBPB_NO_RET
29
30
RET
30
-
SYM_FUNC_END(entry_ibpb)
31
+
SYM_FUNC_END(write_ibpb)
31
32
/* For KVM */
32
-
EXPORT_SYMBOL_GPL(entry_ibpb);
33
+
EXPORT_SYMBOL_GPL(write_ibpb);
33
34
34
35
.popsection
35
36
+6
-6
arch/x86/include/asm/nospec-branch.h
+6
-6
arch/x86/include/asm/nospec-branch.h
···
269
269
* typically has NO_MELTDOWN).
270
270
*
271
271
* While retbleed_untrain_ret() doesn't clobber anything but requires stack,
272
-
* entry_ibpb() will clobber AX, CX, DX.
272
+
* write_ibpb() will clobber AX, CX, DX.
273
273
*
274
274
* As such, this must be placed after every *SWITCH_TO_KERNEL_CR3 at a point
275
275
* where we have a stack but before any RET instruction.
···
279
279
VALIDATE_UNRET_END
280
280
CALL_UNTRAIN_RET
281
281
ALTERNATIVE_2 "", \
282
-
"call entry_ibpb", \ibpb_feature, \
282
+
"call write_ibpb", \ibpb_feature, \
283
283
__stringify(\call_depth_insns), X86_FEATURE_CALL_DEPTH
284
284
#endif
285
285
.endm
···
368
368
extern void srso_alias_return_thunk(void);
369
369
370
370
extern void entry_untrain_ret(void);
371
-
extern void entry_ibpb(void);
371
+
extern void write_ibpb(void);
372
372
373
373
#ifdef CONFIG_X86_64
374
374
extern void clear_bhb_loop(void);
···
514
514
: "memory");
515
515
}
516
516
517
-
extern u64 x86_pred_cmd;
518
-
519
517
static inline void indirect_branch_prediction_barrier(void)
520
518
{
521
-
alternative_msr_write(MSR_IA32_PRED_CMD, x86_pred_cmd, X86_FEATURE_IBPB);
519
+
asm_inline volatile(ALTERNATIVE("", "call write_ibpb", X86_FEATURE_IBPB)
520
+
: ASM_CALL_CONSTRAINT
521
+
:: "rax", "rcx", "rdx", "memory");
522
522
}
523
523
524
524
/* The Intel SPEC CTRL MSR base value cache */
+6
-6
arch/x86/include/asm/smap.h
+6
-6
arch/x86/include/asm/smap.h
···
16
16
#ifdef __ASSEMBLER__
17
17
18
18
#define ASM_CLAC \
19
-
ALTERNATIVE __stringify(ANNOTATE_IGNORE_ALTERNATIVE), "clac", X86_FEATURE_SMAP
19
+
ALTERNATIVE "", "clac", X86_FEATURE_SMAP
20
20
21
21
#define ASM_STAC \
22
-
ALTERNATIVE __stringify(ANNOTATE_IGNORE_ALTERNATIVE), "stac", X86_FEATURE_SMAP
22
+
ALTERNATIVE "", "stac", X86_FEATURE_SMAP
23
23
24
24
#else /* __ASSEMBLER__ */
25
25
26
26
static __always_inline void clac(void)
27
27
{
28
28
/* Note: a barrier is implicit in alternative() */
29
-
alternative(ANNOTATE_IGNORE_ALTERNATIVE "", "clac", X86_FEATURE_SMAP);
29
+
alternative("", "clac", X86_FEATURE_SMAP);
30
30
}
31
31
32
32
static __always_inline void stac(void)
33
33
{
34
34
/* Note: a barrier is implicit in alternative() */
35
-
alternative(ANNOTATE_IGNORE_ALTERNATIVE "", "stac", X86_FEATURE_SMAP);
35
+
alternative("", "stac", X86_FEATURE_SMAP);
36
36
}
37
37
38
38
static __always_inline unsigned long smap_save(void)
···
59
59
60
60
/* These macros can be used in asm() statements */
61
61
#define ASM_CLAC \
62
-
ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE "", "clac", X86_FEATURE_SMAP)
62
+
ALTERNATIVE("", "clac", X86_FEATURE_SMAP)
63
63
#define ASM_STAC \
64
-
ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE "", "stac", X86_FEATURE_SMAP)
64
+
ALTERNATIVE("", "stac", X86_FEATURE_SMAP)
65
65
66
66
#define ASM_CLAC_UNSAFE \
67
67
ALTERNATIVE("", ANNOTATE_IGNORE_ALTERNATIVE "clac", X86_FEATURE_SMAP)
+11
arch/x86/kernel/acpi/boot.c
+11
arch/x86/kernel/acpi/boot.c
···
23
23
#include <linux/serial_core.h>
24
24
#include <linux/pgtable.h>
25
25
26
+
#include <xen/xen.h>
27
+
26
28
#include <asm/e820/api.h>
27
29
#include <asm/irqdomain.h>
28
30
#include <asm/pci_x86.h>
···
1731
1729
{
1732
1730
#if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE)
1733
1731
/* mptable code is not built-in*/
1732
+
1733
+
/*
1734
+
* Xen disables ACPI in PV DomU guests but it still emulates APIC and
1735
+
* supports SMP. Returning early here ensures that APIC is not disabled
1736
+
* unnecessarily and the guest is not limited to a single vCPU.
1737
+
*/
1738
+
if (xen_pv_domain() && !xen_initial_domain())
1739
+
return 0;
1740
+
1734
1741
if (acpi_disabled || acpi_noirq) {
1735
1742
pr_warn("MPS support code is not built-in, using acpi=off or acpi=noirq or pci=noacpi may have problem\n");
1736
1743
return 1;
+1
arch/x86/kernel/cpu/amd.c
+1
arch/x86/kernel/cpu/amd.c
···
805
805
static const struct x86_cpu_id erratum_1386_microcode[] = {
806
806
X86_MATCH_VFM_STEPS(VFM_MAKE(X86_VENDOR_AMD, 0x17, 0x01), 0x2, 0x2, 0x0800126e),
807
807
X86_MATCH_VFM_STEPS(VFM_MAKE(X86_VENDOR_AMD, 0x17, 0x31), 0x0, 0x0, 0x08301052),
808
+
{}
808
809
};
809
810
810
811
static void fix_erratum_1386(struct cpuinfo_x86 *c)
+34
-73
arch/x86/kernel/cpu/bugs.c
+34
-73
arch/x86/kernel/cpu/bugs.c
···
59
59
EXPORT_PER_CPU_SYMBOL_GPL(x86_spec_ctrl_current);
60
60
61
61
u64 x86_pred_cmd __ro_after_init = PRED_CMD_IBPB;
62
-
EXPORT_SYMBOL_GPL(x86_pred_cmd);
63
62
64
63
static u64 __ro_after_init x86_arch_cap_msr;
65
64
···
1141
1142
setup_clear_cpu_cap(X86_FEATURE_RETHUNK);
1142
1143
1143
1144
/*
1144
-
* There is no need for RSB filling: entry_ibpb() ensures
1145
+
* There is no need for RSB filling: write_ibpb() ensures
1145
1146
* all predictions, including the RSB, are invalidated,
1146
1147
* regardless of IBPB implementation.
1147
1148
*/
···
1591
1592
rrsba_disabled = true;
1592
1593
}
1593
1594
1594
-
static void __init spectre_v2_determine_rsb_fill_type_at_vmexit(enum spectre_v2_mitigation mode)
1595
+
static void __init spectre_v2_select_rsb_mitigation(enum spectre_v2_mitigation mode)
1595
1596
{
1596
1597
/*
1597
-
* Similar to context switches, there are two types of RSB attacks
1598
-
* after VM exit:
1598
+
* WARNING! There are many subtleties to consider when changing *any*
1599
+
* code related to RSB-related mitigations. Before doing so, carefully
1600
+
* read the following document, and update if necessary:
1599
1601
*
1600
-
* 1) RSB underflow
1602
+
* Documentation/admin-guide/hw-vuln/rsb.rst
1601
1603
*
1602
-
* 2) Poisoned RSB entry
1604
+
* In an overly simplified nutshell:
1603
1605
*
1604
-
* When retpoline is enabled, both are mitigated by filling/clearing
1605
-
* the RSB.
1606
+
* - User->user RSB attacks are conditionally mitigated during
1607
+
* context switches by cond_mitigation -> write_ibpb().
1606
1608
*
1607
-
* When IBRS is enabled, while #1 would be mitigated by the IBRS branch
1608
-
* prediction isolation protections, RSB still needs to be cleared
1609
-
* because of #2. Note that SMEP provides no protection here, unlike
1610
-
* user-space-poisoned RSB entries.
1609
+
* - User->kernel and guest->host attacks are mitigated by eIBRS or
1610
+
* RSB filling.
1611
1611
*
1612
-
* eIBRS should protect against RSB poisoning, but if the EIBRS_PBRSB
1613
-
* bug is present then a LITE version of RSB protection is required,
1614
-
* just a single call needs to retire before a RET is executed.
1612
+
* Though, depending on config, note that other alternative
1613
+
* mitigations may end up getting used instead, e.g., IBPB on
1614
+
* entry/vmexit, call depth tracking, or return thunks.
1615
1615
*/
1616
+
1616
1617
switch (mode) {
1617
1618
case SPECTRE_V2_NONE:
1618
-
return;
1619
+
break;
1619
1620
1620
-
case SPECTRE_V2_EIBRS_LFENCE:
1621
1621
case SPECTRE_V2_EIBRS:
1622
-
if (boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB)) {
1623
-
setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT_LITE);
1624
-
pr_info("Spectre v2 / PBRSB-eIBRS: Retire a single CALL on VMEXIT\n");
1625
-
}
1626
-
return;
1627
-
1622
+
case SPECTRE_V2_EIBRS_LFENCE:
1628
1623
case SPECTRE_V2_EIBRS_RETPOLINE:
1624
+
if (boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB)) {
1625
+
pr_info("Spectre v2 / PBRSB-eIBRS: Retire a single CALL on VMEXIT\n");
1626
+
setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT_LITE);
1627
+
}
1628
+
break;
1629
+
1629
1630
case SPECTRE_V2_RETPOLINE:
1630
1631
case SPECTRE_V2_LFENCE:
1631
1632
case SPECTRE_V2_IBRS:
1633
+
pr_info("Spectre v2 / SpectreRSB: Filling RSB on context switch and VMEXIT\n");
1634
+
setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
1632
1635
setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT);
1633
-
pr_info("Spectre v2 / SpectreRSB : Filling RSB on VMEXIT\n");
1634
-
return;
1635
-
}
1636
+
break;
1636
1637
1637
-
pr_warn_once("Unknown Spectre v2 mode, disabling RSB mitigation at VM exit");
1638
-
dump_stack();
1638
+
default:
1639
+
pr_warn_once("Unknown Spectre v2 mode, disabling RSB mitigation\n");
1640
+
dump_stack();
1641
+
break;
1642
+
}
1639
1643
}
1640
1644
1641
1645
/*
···
1832
1830
spectre_v2_enabled = mode;
1833
1831
pr_info("%s\n", spectre_v2_strings[mode]);
1834
1832
1835
-
/*
1836
-
* If Spectre v2 protection has been enabled, fill the RSB during a
1837
-
* context switch. In general there are two types of RSB attacks
1838
-
* across context switches, for which the CALLs/RETs may be unbalanced.
1839
-
*
1840
-
* 1) RSB underflow
1841
-
*
1842
-
* Some Intel parts have "bottomless RSB". When the RSB is empty,
1843
-
* speculated return targets may come from the branch predictor,
1844
-
* which could have a user-poisoned BTB or BHB entry.
1845
-
*
1846
-
* AMD has it even worse: *all* returns are speculated from the BTB,
1847
-
* regardless of the state of the RSB.
1848
-
*
1849
-
* When IBRS or eIBRS is enabled, the "user -> kernel" attack
1850
-
* scenario is mitigated by the IBRS branch prediction isolation
1851
-
* properties, so the RSB buffer filling wouldn't be necessary to
1852
-
* protect against this type of attack.
1853
-
*
1854
-
* The "user -> user" attack scenario is mitigated by RSB filling.
1855
-
*
1856
-
* 2) Poisoned RSB entry
1857
-
*
1858
-
* If the 'next' in-kernel return stack is shorter than 'prev',
1859
-
* 'next' could be tricked into speculating with a user-poisoned RSB
1860
-
* entry.
1861
-
*
1862
-
* The "user -> kernel" attack scenario is mitigated by SMEP and
1863
-
* eIBRS.
1864
-
*
1865
-
* The "user -> user" scenario, also known as SpectreBHB, requires
1866
-
* RSB clearing.
1867
-
*
1868
-
* So to mitigate all cases, unconditionally fill RSB on context
1869
-
* switches.
1870
-
*
1871
-
* FIXME: Is this pointless for retbleed-affected AMD?
1872
-
*/
1873
-
setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
1874
-
pr_info("Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch\n");
1875
-
1876
-
spectre_v2_determine_rsb_fill_type_at_vmexit(mode);
1833
+
spectre_v2_select_rsb_mitigation(mode);
1877
1834
1878
1835
/*
1879
1836
* Retpoline protects the kernel, but doesn't protect firmware. IBRS
···
2637
2676
setup_clear_cpu_cap(X86_FEATURE_RETHUNK);
2638
2677
2639
2678
/*
2640
-
* There is no need for RSB filling: entry_ibpb() ensures
2679
+
* There is no need for RSB filling: write_ibpb() ensures
2641
2680
* all predictions, including the RSB, are invalidated,
2642
2681
* regardless of IBPB implementation.
2643
2682
*/
···
2662
2701
srso_mitigation = SRSO_MITIGATION_IBPB_ON_VMEXIT;
2663
2702
2664
2703
/*
2665
-
* There is no need for RSB filling: entry_ibpb() ensures
2704
+
* There is no need for RSB filling: write_ibpb() ensures
2666
2705
* all predictions, including the RSB, are invalidated,
2667
2706
* regardless of IBPB implementation.
2668
2707
*/
+27
-21
arch/x86/kernel/cpu/resctrl/rdtgroup.c
+27
-21
arch/x86/kernel/cpu/resctrl/rdtgroup.c
···
3553
3553
free_rmid(rgrp->closid, rgrp->mon.rmid);
3554
3554
}
3555
3555
3556
+
/*
3557
+
* We allow creating mon groups only with in a directory called "mon_groups"
3558
+
* which is present in every ctrl_mon group. Check if this is a valid
3559
+
* "mon_groups" directory.
3560
+
*
3561
+
* 1. The directory should be named "mon_groups".
3562
+
* 2. The mon group itself should "not" be named "mon_groups".
3563
+
* This makes sure "mon_groups" directory always has a ctrl_mon group
3564
+
* as parent.
3565
+
*/
3566
+
static bool is_mon_groups(struct kernfs_node *kn, const char *name)
3567
+
{
3568
+
return (!strcmp(rdt_kn_name(kn), "mon_groups") &&
3569
+
strcmp(name, "mon_groups"));
3570
+
}
3571
+
3556
3572
static int mkdir_rdt_prepare(struct kernfs_node *parent_kn,
3557
3573
const char *name, umode_t mode,
3558
3574
enum rdt_group_type rtype, struct rdtgroup **r)
···
3581
3565
prdtgrp = rdtgroup_kn_lock_live(parent_kn);
3582
3566
if (!prdtgrp) {
3583
3567
ret = -ENODEV;
3568
+
goto out_unlock;
3569
+
}
3570
+
3571
+
/*
3572
+
* Check that the parent directory for a monitor group is a "mon_groups"
3573
+
* directory.
3574
+
*/
3575
+
if (rtype == RDTMON_GROUP && !is_mon_groups(parent_kn, name)) {
3576
+
ret = -EPERM;
3584
3577
goto out_unlock;
3585
3578
}
3586
3579
···
3776
3751
return ret;
3777
3752
}
3778
3753
3779
-
/*
3780
-
* We allow creating mon groups only with in a directory called "mon_groups"
3781
-
* which is present in every ctrl_mon group. Check if this is a valid
3782
-
* "mon_groups" directory.
3783
-
*
3784
-
* 1. The directory should be named "mon_groups".
3785
-
* 2. The mon group itself should "not" be named "mon_groups".
3786
-
* This makes sure "mon_groups" directory always has a ctrl_mon group
3787
-
* as parent.
3788
-
*/
3789
-
static bool is_mon_groups(struct kernfs_node *kn, const char *name)
3790
-
{
3791
-
return (!strcmp(rdt_kn_name(kn), "mon_groups") &&
3792
-
strcmp(name, "mon_groups"));
3793
-
}
3794
-
3795
3754
static int rdtgroup_mkdir(struct kernfs_node *parent_kn, const char *name,
3796
3755
umode_t mode)
3797
3756
{
···
3791
3782
if (resctrl_arch_alloc_capable() && parent_kn == rdtgroup_default.kn)
3792
3783
return rdtgroup_mkdir_ctrl_mon(parent_kn, name, mode);
3793
3784
3794
-
/*
3795
-
* If RDT monitoring is supported and the parent directory is a valid
3796
-
* "mon_groups" directory, add a monitoring subdirectory.
3797
-
*/
3798
-
if (resctrl_arch_mon_capable() && is_mon_groups(parent_kn, name))
3785
+
/* Else, attempt to add a monitoring subdirectory. */
3786
+
if (resctrl_arch_mon_capable())
3799
3787
return rdtgroup_mkdir_mon(parent_kn, name, mode);
3800
3788
3801
3789
return -EPERM;
+8
-9
arch/x86/kernel/e820.c
+8
-9
arch/x86/kernel/e820.c
···
753
753
void __init e820__register_nosave_regions(unsigned long limit_pfn)
754
754
{
755
755
int i;
756
-
unsigned long pfn = 0;
756
+
u64 last_addr = 0;
757
757
758
758
for (i = 0; i < e820_table->nr_entries; i++) {
759
759
struct e820_entry *entry = &e820_table->entries[i];
760
760
761
-
if (pfn < PFN_UP(entry->addr))
762
-
register_nosave_region(pfn, PFN_UP(entry->addr));
763
-
764
-
pfn = PFN_DOWN(entry->addr + entry->size);
765
-
766
761
if (entry->type != E820_TYPE_RAM)
767
-
register_nosave_region(PFN_UP(entry->addr), pfn);
762
+
continue;
768
763
769
-
if (pfn >= limit_pfn)
770
-
break;
764
+
if (last_addr < entry->addr)
765
+
register_nosave_region(PFN_DOWN(last_addr), PFN_UP(entry->addr));
766
+
767
+
last_addr = entry->addr + entry->size;
771
768
}
769
+
770
+
register_nosave_region(PFN_DOWN(last_addr), limit_pfn);
772
771
}
773
772
774
773
#ifdef CONFIG_ACPI
+5
-5
arch/x86/kernel/early_printk.c
+5
-5
arch/x86/kernel/early_printk.c
···
389
389
keep = (strstr(buf, "keep") != NULL);
390
390
391
391
while (*buf != '\0') {
392
-
if (!strncmp(buf, "mmio", 4)) {
393
-
early_mmio_serial_init(buf + 4);
392
+
if (!strncmp(buf, "mmio32", 6)) {
393
+
buf += 6;
394
+
early_mmio_serial_init(buf);
394
395
early_console_register(&early_serial_console, keep);
395
-
buf += 4;
396
396
}
397
397
if (!strncmp(buf, "serial", 6)) {
398
398
buf += 6;
···
407
407
}
408
408
#ifdef CONFIG_PCI
409
409
if (!strncmp(buf, "pciserial", 9)) {
410
-
early_pci_serial_init(buf + 9);
410
+
buf += 9; /* Keep from match the above "pciserial" */
411
+
early_pci_serial_init(buf);
411
412
early_console_register(&early_serial_console, keep);
412
-
buf += 9; /* Keep from match the above "serial" */
413
413
}
414
414
#endif
415
415
if (!strncmp(buf, "vga", 3) &&
+3
-3
arch/x86/mm/tlb.c
+3
-3
arch/x86/mm/tlb.c
···
667
667
prev_mm = this_cpu_read(cpu_tlbstate.last_user_mm_spec);
668
668
669
669
/*
670
-
* Avoid user/user BTB poisoning by flushing the branch predictor
671
-
* when switching between processes. This stops one process from
672
-
* doing Spectre-v2 attacks on another.
670
+
* Avoid user->user BTB/RSB poisoning by flushing them when switching
671
+
* between processes. This stops one process from doing Spectre-v2
672
+
* attacks on another.
673
673
*
674
674
* Both, the conditional and the always IBPB mode use the mm
675
675
* pointer to avoid the IBPB when switching between tasks of the
+2
-2
arch/x86/power/hibernate_asm_64.S
+2
-2
arch/x86/power/hibernate_asm_64.S
···
26
26
/* code below belongs to the image kernel */
27
27
.align PAGE_SIZE
28
28
SYM_FUNC_START(restore_registers)
29
-
ANNOTATE_NOENDBR
29
+
ENDBR
30
30
/* go back to the original page tables */
31
31
movq %r9, %cr3
32
32
···
120
120
121
121
/* code below has been relocated to a safe page */
122
122
SYM_FUNC_START(core_restore_code)
123
-
ANNOTATE_NOENDBR
123
+
ENDBR
124
124
/* switch to temporary page tables */
125
125
movq %rax, %cr3
126
126
/* flush TLB */
+14
-12
arch/x86/xen/multicalls.c
+14
-12
arch/x86/xen/multicalls.c
···
54
54
55
55
static DEFINE_PER_CPU(struct mc_buffer, mc_buffer);
56
56
static struct mc_debug_data mc_debug_data_early __initdata;
57
-
static DEFINE_PER_CPU(struct mc_debug_data *, mc_debug_data) =
58
-
&mc_debug_data_early;
59
57
static struct mc_debug_data __percpu *mc_debug_data_ptr;
60
58
DEFINE_PER_CPU(unsigned long, xen_mc_irq_flags);
61
59
62
60
static struct static_key mc_debug __ro_after_init;
63
61
static bool mc_debug_enabled __initdata;
62
+
63
+
static struct mc_debug_data * __ref get_mc_debug(void)
64
+
{
65
+
if (!mc_debug_data_ptr)
66
+
return &mc_debug_data_early;
67
+
68
+
return this_cpu_ptr(mc_debug_data_ptr);
69
+
}
64
70
65
71
static int __init xen_parse_mc_debug(char *arg)
66
72
{
···
77
71
}
78
72
early_param("xen_mc_debug", xen_parse_mc_debug);
79
73
80
-
void mc_percpu_init(unsigned int cpu)
81
-
{
82
-
per_cpu(mc_debug_data, cpu) = per_cpu_ptr(mc_debug_data_ptr, cpu);
83
-
}
84
-
85
74
static int __init mc_debug_enable(void)
86
75
{
87
76
unsigned long flags;
77
+
struct mc_debug_data __percpu *mcdb;
88
78
89
79
if (!mc_debug_enabled)
90
80
return 0;
91
81
92
-
mc_debug_data_ptr = alloc_percpu(struct mc_debug_data);
93
-
if (!mc_debug_data_ptr) {
82
+
mcdb = alloc_percpu(struct mc_debug_data);
83
+
if (!mcdb) {
94
84
pr_err("xen_mc_debug inactive\n");
95
85
static_key_slow_dec(&mc_debug);
96
86
return -ENOMEM;
···
95
93
/* Be careful when switching to percpu debug data. */
96
94
local_irq_save(flags);
97
95
xen_mc_flush();
98
-
mc_percpu_init(0);
96
+
mc_debug_data_ptr = mcdb;
99
97
local_irq_restore(flags);
100
98
101
99
pr_info("xen_mc_debug active\n");
···
157
155
trace_xen_mc_flush(b->mcidx, b->argidx, b->cbidx);
158
156
159
157
if (static_key_false(&mc_debug)) {
160
-
mcdb = __this_cpu_read(mc_debug_data);
158
+
mcdb = get_mc_debug();
161
159
memcpy(mcdb->entries, b->entries,
162
160
b->mcidx * sizeof(struct multicall_entry));
163
161
}
···
237
235
238
236
ret.mc = &b->entries[b->mcidx];
239
237
if (static_key_false(&mc_debug)) {
240
-
struct mc_debug_data *mcdb = __this_cpu_read(mc_debug_data);
238
+
struct mc_debug_data *mcdb = get_mc_debug();
241
239
242
240
mcdb->caller[b->mcidx] = __builtin_return_address(0);
243
241
mcdb->argsz[b->mcidx] = args;
-1
arch/x86/xen/smp_pv.c
-1
arch/x86/xen/smp_pv.c
+1
-3
arch/x86/xen/xen-asm.S
+1
-3
arch/x86/xen/xen-asm.S
-3
arch/x86/xen/xen-ops.h
-3
arch/x86/xen/xen-ops.h
···
261
261
*/
262
262
struct multicall_space xen_mc_extend_args(unsigned long op, size_t arg_size);
263
263
264
-
/* Do percpu data initialization for multicalls. */
265
-
void mc_percpu_init(unsigned int cpu);
266
-
267
264
extern bool is_xen_pmu;
268
265
269
266
irqreturn_t xen_pmu_irq_handler(int irq, void *dev_id);
+1
-75
crypto/ahash.c
+1
-75
crypto/ahash.c
···
315
315
316
316
static bool ahash_request_hasvirt(struct ahash_request *req)
317
317
{
318
-
struct ahash_request *r2;
319
-
320
-
if (ahash_request_isvirt(req))
321
-
return true;
322
-
323
-
list_for_each_entry(r2, &req->base.list, base.list)
324
-
if (ahash_request_isvirt(r2))
325
-
return true;
326
-
327
-
return false;
318
+
return ahash_request_isvirt(req);
328
319
}
329
320
330
321
static int ahash_reqchain_virt(struct ahash_save_req_state *state,
···
463
472
bool update = op == crypto_ahash_alg(tfm)->update;
464
473
struct ahash_save_req_state *state;
465
474
struct ahash_save_req_state state0;
466
-
struct ahash_request *r2;
467
475
u8 *page = NULL;
468
476
int err;
469
477
···
499
509
state->offset = 0;
500
510
state->nbytes = 0;
501
511
INIT_LIST_HEAD(&state->head);
502
-
list_splice_init(&req->base.list, &state->head);
503
512
504
513
if (page)
505
514
sg_init_one(&state->sg, page, PAGE_SIZE);
···
529
540
530
541
out_set_chain:
531
542
req->base.err = err;
532
-
list_for_each_entry(r2, &req->base.list, base.list)
533
-
r2->base.err = err;
534
-
535
543
return err;
536
544
}
537
545
···
537
551
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
538
552
539
553
if (likely(tfm->using_shash)) {
540
-
struct ahash_request *r2;
541
554
int err;
542
555
543
556
err = crypto_shash_init(prepare_shash_desc(req, tfm));
544
557
req->base.err = err;
545
-
546
-
list_for_each_entry(r2, &req->base.list, base.list) {
547
-
struct shash_desc *desc;
548
-
549
-
desc = prepare_shash_desc(r2, tfm);
550
-
r2->base.err = crypto_shash_init(desc);
551
-
}
552
-
553
558
return err;
554
559
}
555
560
···
597
620
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
598
621
599
622
if (likely(tfm->using_shash)) {
600
-
struct ahash_request *r2;
601
623
int err;
602
624
603
625
err = shash_ahash_update(req, ahash_request_ctx(req));
604
626
req->base.err = err;
605
-
606
-
list_for_each_entry(r2, &req->base.list, base.list) {
607
-
struct shash_desc *desc;
608
-
609
-
desc = ahash_request_ctx(r2);
610
-
r2->base.err = shash_ahash_update(r2, desc);
611
-
}
612
-
613
627
return err;
614
628
}
615
629
···
613
645
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
614
646
615
647
if (likely(tfm->using_shash)) {
616
-
struct ahash_request *r2;
617
648
int err;
618
649
619
650
err = crypto_shash_final(ahash_request_ctx(req), req->result);
620
651
req->base.err = err;
621
-
622
-
list_for_each_entry(r2, &req->base.list, base.list) {
623
-
struct shash_desc *desc;
624
-
625
-
desc = ahash_request_ctx(r2);
626
-
r2->base.err = crypto_shash_final(desc, r2->result);
627
-
}
628
-
629
652
return err;
630
653
}
631
654
···
629
670
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
630
671
631
672
if (likely(tfm->using_shash)) {
632
-
struct ahash_request *r2;
633
673
int err;
634
674
635
675
err = shash_ahash_finup(req, ahash_request_ctx(req));
636
676
req->base.err = err;
637
-
638
-
list_for_each_entry(r2, &req->base.list, base.list) {
639
-
struct shash_desc *desc;
640
-
641
-
desc = ahash_request_ctx(r2);
642
-
r2->base.err = shash_ahash_finup(r2, desc);
643
-
}
644
-
645
677
return err;
646
678
}
647
679
···
707
757
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
708
758
709
759
if (likely(tfm->using_shash)) {
710
-
struct ahash_request *r2;
711
760
int err;
712
761
713
762
err = shash_ahash_digest(req, prepare_shash_desc(req, tfm));
714
763
req->base.err = err;
715
-
716
-
list_for_each_entry(r2, &req->base.list, base.list) {
717
-
struct shash_desc *desc;
718
-
719
-
desc = prepare_shash_desc(r2, tfm);
720
-
r2->base.err = shash_ahash_digest(r2, desc);
721
-
}
722
-
723
764
return err;
724
765
}
725
766
···
1073
1132
return crypto_register_instance(tmpl, ahash_crypto_instance(inst));
1074
1133
}
1075
1134
EXPORT_SYMBOL_GPL(ahash_register_instance);
1076
-
1077
-
void ahash_request_free(struct ahash_request *req)
1078
-
{
1079
-
struct ahash_request *tmp;
1080
-
struct ahash_request *r2;
1081
-
1082
-
if (unlikely(!req))
1083
-
return;
1084
-
1085
-
list_for_each_entry_safe(r2, tmp, &req->base.list, base.list)
1086
-
kfree_sensitive(r2);
1087
-
1088
-
kfree_sensitive(req);
1089
-
}
1090
-
EXPORT_SYMBOL_GPL(ahash_request_free);
1091
1135
1092
1136
MODULE_LICENSE("GPL");
1093
1137
MODULE_DESCRIPTION("Asynchronous cryptographic hash type");
+7
-3
crypto/scompress.c
+7
-3
crypto/scompress.c
···
111
111
struct crypto_acomp_stream __percpu *stream = alg->stream;
112
112
int i;
113
113
114
+
alg->stream = NULL;
115
+
if (!stream)
116
+
return;
117
+
114
118
for_each_possible_cpu(i) {
115
119
struct crypto_acomp_stream *ps = per_cpu_ptr(stream, i);
116
120
117
-
if (!ps->ctx)
121
+
if (IS_ERR_OR_NULL(ps->ctx))
118
122
break;
119
123
120
124
alg->free_ctx(ps->ctx);
···
136
132
if (!stream)
137
133
return -ENOMEM;
138
134
135
+
alg->stream = stream;
136
+
139
137
for_each_possible_cpu(i) {
140
138
struct crypto_acomp_stream *ps = per_cpu_ptr(stream, i);
141
139
···
149
143
150
144
spin_lock_init(&ps->lock);
151
145
}
152
-
153
-
alg->stream = stream;
154
146
return 0;
155
147
}
156
148
+2
-2
drivers/accel/ivpu/ivpu_debugfs.c
+2
-2
drivers/accel/ivpu/ivpu_debugfs.c
···
332
332
return -EINVAL;
333
333
334
334
ret = ivpu_rpm_get(vdev);
335
-
if (ret)
335
+
if (ret < 0)
336
336
return ret;
337
337
338
338
ivpu_pm_trigger_recovery(vdev, "debugfs");
···
383
383
return -EINVAL;
384
384
385
385
ret = ivpu_rpm_get(vdev);
386
-
if (ret)
386
+
if (ret < 0)
387
387
return ret;
388
388
389
389
if (active_percent)
+2
-1
drivers/accel/ivpu/ivpu_ipc.c
+2
-1
drivers/accel/ivpu/ivpu_ipc.c
···
302
302
struct ivpu_ipc_consumer cons;
303
303
int ret;
304
304
305
-
drm_WARN_ON(&vdev->drm, pm_runtime_status_suspended(vdev->drm.dev));
305
+
drm_WARN_ON(&vdev->drm, pm_runtime_status_suspended(vdev->drm.dev) &&
306
+
pm_runtime_enabled(vdev->drm.dev));
306
307
307
308
ivpu_ipc_consumer_add(vdev, &cons, channel, NULL);
308
309
+24
drivers/accel/ivpu/ivpu_ms.c
+24
drivers/accel/ivpu/ivpu_ms.c
···
4
4
*/
5
5
6
6
#include <drm/drm_file.h>
7
+
#include <linux/pm_runtime.h>
7
8
8
9
#include "ivpu_drv.h"
9
10
#include "ivpu_gem.h"
···
44
43
if (!args->metric_group_mask || !args->read_period_samples ||
45
44
args->sampling_period_ns < MS_MIN_SAMPLE_PERIOD_NS)
46
45
return -EINVAL;
46
+
47
+
ret = ivpu_rpm_get(vdev);
48
+
if (ret < 0)
49
+
return ret;
47
50
48
51
mutex_lock(&file_priv->ms_lock);
49
52
···
101
96
kfree(ms);
102
97
unlock:
103
98
mutex_unlock(&file_priv->ms_lock);
99
+
100
+
ivpu_rpm_put(vdev);
104
101
return ret;
105
102
}
106
103
···
167
160
if (!args->metric_group_mask)
168
161
return -EINVAL;
169
162
163
+
ret = ivpu_rpm_get(vdev);
164
+
if (ret < 0)
165
+
return ret;
166
+
170
167
mutex_lock(&file_priv->ms_lock);
171
168
172
169
ms = get_instance_by_mask(file_priv, args->metric_group_mask);
···
198
187
unlock:
199
188
mutex_unlock(&file_priv->ms_lock);
200
189
190
+
ivpu_rpm_put(vdev);
201
191
return ret;
202
192
}
203
193
···
216
204
{
217
205
struct ivpu_file_priv *file_priv = file->driver_priv;
218
206
struct drm_ivpu_metric_streamer_stop *args = data;
207
+
struct ivpu_device *vdev = file_priv->vdev;
219
208
struct ivpu_ms_instance *ms;
209
+
int ret;
220
210
221
211
if (!args->metric_group_mask)
222
212
return -EINVAL;
213
+
214
+
ret = ivpu_rpm_get(vdev);
215
+
if (ret < 0)
216
+
return ret;
223
217
224
218
mutex_lock(&file_priv->ms_lock);
225
219
···
235
217
236
218
mutex_unlock(&file_priv->ms_lock);
237
219
220
+
ivpu_rpm_put(vdev);
238
221
return ms ? 0 : -EINVAL;
239
222
}
240
223
···
300
281
void ivpu_ms_cleanup(struct ivpu_file_priv *file_priv)
301
282
{
302
283
struct ivpu_ms_instance *ms, *tmp;
284
+
struct ivpu_device *vdev = file_priv->vdev;
285
+
286
+
pm_runtime_get_sync(vdev->drm.dev);
303
287
304
288
mutex_lock(&file_priv->ms_lock);
305
289
···
315
293
free_instance(file_priv, ms);
316
294
317
295
mutex_unlock(&file_priv->ms_lock);
296
+
297
+
pm_runtime_put_autosuspend(vdev->drm.dev);
318
298
}
319
299
320
300
void ivpu_ms_cleanup_all(struct ivpu_device *vdev)
+28
drivers/acpi/ec.c
+28
drivers/acpi/ec.c
···
2301
2301
DMI_MATCH(DMI_PRODUCT_FAMILY, "103C_5336AN HP ZHAN 66 Pro"),
2302
2302
},
2303
2303
},
2304
+
/*
2305
+
* Lenovo Legion Go S; touchscreen blocks HW sleep when woken up from EC
2306
+
* https://gitlab.freedesktop.org/drm/amd/-/issues/3929
2307
+
*/
2308
+
{
2309
+
.matches = {
2310
+
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
2311
+
DMI_MATCH(DMI_PRODUCT_NAME, "83L3"),
2312
+
}
2313
+
},
2314
+
{
2315
+
.matches = {
2316
+
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
2317
+
DMI_MATCH(DMI_PRODUCT_NAME, "83N6"),
2318
+
}
2319
+
},
2320
+
{
2321
+
.matches = {
2322
+
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
2323
+
DMI_MATCH(DMI_PRODUCT_NAME, "83Q2"),
2324
+
}
2325
+
},
2326
+
{
2327
+
.matches = {
2328
+
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
2329
+
DMI_MATCH(DMI_PRODUCT_NAME, "83Q3"),
2330
+
}
2331
+
},
2304
2332
{ },
2305
2333
};
2306
2334
+2
-2
drivers/acpi/pptt.c
+2
-2
drivers/acpi/pptt.c
···
229
229
node_entry = ACPI_PTR_DIFF(node, table_hdr);
230
230
entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr,
231
231
sizeof(struct acpi_table_pptt));
232
-
proc_sz = sizeof(struct acpi_pptt_processor *);
232
+
proc_sz = sizeof(struct acpi_pptt_processor);
233
233
234
234
while ((unsigned long)entry + proc_sz < table_end) {
235
235
cpu_node = (struct acpi_pptt_processor *)entry;
···
270
270
table_end = (unsigned long)table_hdr + table_hdr->length;
271
271
entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr,
272
272
sizeof(struct acpi_table_pptt));
273
-
proc_sz = sizeof(struct acpi_pptt_processor *);
273
+
proc_sz = sizeof(struct acpi_pptt_processor);
274
274
275
275
/* find the processor structure associated with this cpuid */
276
276
while ((unsigned long)entry + proc_sz < table_end) {
+15
drivers/ata/libata-sata.c
+15
drivers/ata/libata-sata.c
···
1510
1510
unsigned int err_mask, tag;
1511
1511
u8 *sense, sk = 0, asc = 0, ascq = 0;
1512
1512
u64 sense_valid, val;
1513
+
u16 extended_sense;
1514
+
bool aux_icc_valid;
1513
1515
int ret = 0;
1514
1516
1515
1517
err_mask = ata_read_log_page(dev, ATA_LOG_SENSE_NCQ, 0, buf, 2);
···
1531
1529
1532
1530
sense_valid = (u64)buf[8] | ((u64)buf[9] << 8) |
1533
1531
((u64)buf[10] << 16) | ((u64)buf[11] << 24);
1532
+
extended_sense = get_unaligned_le16(&buf[14]);
1533
+
aux_icc_valid = extended_sense & BIT(15);
1534
1534
1535
1535
ata_qc_for_each_raw(ap, qc, tag) {
1536
1536
if (!(qc->flags & ATA_QCFLAG_EH) ||
···
1559
1555
ret = -EIO;
1560
1556
continue;
1561
1557
}
1558
+
1559
+
qc->result_tf.nsect = sense[6];
1560
+
qc->result_tf.hob_nsect = sense[7];
1561
+
qc->result_tf.lbal = sense[8];
1562
+
qc->result_tf.lbam = sense[9];
1563
+
qc->result_tf.lbah = sense[10];
1564
+
qc->result_tf.hob_lbal = sense[11];
1565
+
qc->result_tf.hob_lbam = sense[12];
1566
+
qc->result_tf.hob_lbah = sense[13];
1567
+
if (aux_icc_valid)
1568
+
qc->result_tf.auxiliary = get_unaligned_le32(&sense[16]);
1562
1569
1563
1570
/* Set sense without also setting scsicmd->result */
1564
1571
scsi_build_sense_buffer(dev->flags & ATA_DFLAG_D_SENSE,
+6
drivers/ata/pata_pxa.c
+6
drivers/ata/pata_pxa.c
···
223
223
224
224
ap->ioaddr.cmd_addr = devm_ioremap(&pdev->dev, cmd_res->start,
225
225
resource_size(cmd_res));
226
+
if (!ap->ioaddr.cmd_addr)
227
+
return -ENOMEM;
226
228
ap->ioaddr.ctl_addr = devm_ioremap(&pdev->dev, ctl_res->start,
227
229
resource_size(ctl_res));
230
+
if (!ap->ioaddr.ctl_addr)
231
+
return -ENOMEM;
228
232
ap->ioaddr.bmdma_addr = devm_ioremap(&pdev->dev, dma_res->start,
229
233
resource_size(dma_res));
234
+
if (!ap->ioaddr.bmdma_addr)
235
+
return -ENOMEM;
230
236
231
237
/*
232
238
* Adjust register offsets
+10
-3
drivers/ata/sata_sx4.c
+10
-3
drivers/ata/sata_sx4.c
···
1117
1117
mmio += PDC_CHIP0_OFS;
1118
1118
1119
1119
for (i = 0; i < ARRAY_SIZE(pdc_i2c_read_data); i++)
1120
-
pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
1121
-
pdc_i2c_read_data[i].reg,
1122
-
&spd0[pdc_i2c_read_data[i].ofs]);
1120
+
if (!pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
1121
+
pdc_i2c_read_data[i].reg,
1122
+
&spd0[pdc_i2c_read_data[i].ofs])) {
1123
+
dev_err(host->dev,
1124
+
"Failed in i2c read at index %d: device=%#x, reg=%#x\n",
1125
+
i, PDC_DIMM0_SPD_DEV_ADDRESS, pdc_i2c_read_data[i].reg);
1126
+
return -EIO;
1127
+
}
1123
1128
1124
1129
data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4);
1125
1130
data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) |
···
1289
1284
1290
1285
/* Programming DIMM0 Module Control Register (index_CID0:80h) */
1291
1286
size = pdc20621_prog_dimm0(host);
1287
+
if (size < 0)
1288
+
return size;
1292
1289
dev_dbg(host->dev, "Local DIMM Size = %dMB\n", size);
1293
1290
1294
1291
/* Programming DIMM Module Global Control Register (index_CID0:88h) */
+1
-1
drivers/block/null_blk/main.c
+1
-1
drivers/block/null_blk/main.c
···
2031
2031
nullb->disk->minors = 1;
2032
2032
nullb->disk->fops = &null_ops;
2033
2033
nullb->disk->private_data = nullb;
2034
-
strscpy_pad(nullb->disk->disk_name, nullb->disk_name, DISK_NAME_LEN);
2034
+
strscpy(nullb->disk->disk_name, nullb->disk_name);
2035
2035
2036
2036
if (nullb->dev->zoned) {
2037
2037
rv = null_register_zoned_dev(nullb);
+11
-10
drivers/bluetooth/btnxpuart.c
+11
-10
drivers/bluetooth/btnxpuart.c
···
1286
1286
u8 pcmd = 2;
1287
1287
1288
1288
skb = nxp_drv_send_cmd(hdev, HCI_NXP_TRIGGER_DUMP, 1, &pcmd);
1289
-
if (!IS_ERR(skb))
1289
+
if (IS_ERR(skb))
1290
+
bt_dev_err(hdev, "Failed to trigger FW Dump. (%ld)", PTR_ERR(skb));
1291
+
else
1290
1292
kfree_skb(skb);
1291
1293
}
1292
1294
···
1447
1445
/* HCI_NXP_IND_RESET command may not returns any response */
1448
1446
if (!IS_ERR(skb))
1449
1447
kfree_skb(skb);
1450
-
} else if (nxpdev->current_baudrate != nxpdev->fw_init_baudrate) {
1451
-
nxpdev->new_baudrate = nxpdev->fw_init_baudrate;
1452
-
nxp_set_baudrate_cmd(hdev, NULL);
1453
1448
}
1454
1449
1455
1450
return 0;
···
1798
1799
clear_bit(BTNXPUART_FW_DOWNLOADING, &nxpdev->tx_state);
1799
1800
wake_up_interruptible(&nxpdev->check_boot_sign_wait_q);
1800
1801
wake_up_interruptible(&nxpdev->fw_dnld_done_wait_q);
1801
-
}
1802
-
1803
-
if (test_bit(HCI_RUNNING, &hdev->flags)) {
1804
-
/* Ensure shutdown callback is executed before unregistering, so
1805
-
* that baudrate is reset to initial value.
1802
+
} else {
1803
+
/* Restore FW baudrate to fw_init_baudrate if changed.
1804
+
* This will ensure FW baudrate is in sync with
1805
+
* driver baudrate in case this driver is re-inserted.
1806
1806
*/
1807
-
nxp_shutdown(hdev);
1807
+
if (nxpdev->current_baudrate != nxpdev->fw_init_baudrate) {
1808
+
nxpdev->new_baudrate = nxpdev->fw_init_baudrate;
1809
+
nxp_set_baudrate_cmd(hdev, NULL);
1810
+
}
1808
1811
}
1809
1812
1810
1813
ps_cleanup(nxpdev);
+1
-1
drivers/bluetooth/btqca.c
+1
-1
drivers/bluetooth/btqca.c
···
889
889
if (le32_to_cpu(ver.soc_id) == QCA_WCN3950_SOC_ID_T)
890
890
variant = "t";
891
891
else if (le32_to_cpu(ver.soc_id) == QCA_WCN3950_SOC_ID_S)
892
-
variant = "u";
892
+
variant = "s";
893
893
894
894
snprintf(config.fwname, sizeof(config.fwname),
895
895
"qca/cmnv%02x%s.bin", rom_ver, variant);
+2
drivers/bluetooth/btrtl.c
+2
drivers/bluetooth/btrtl.c
+5
-5
drivers/bluetooth/hci_vhci.c
+5
-5
drivers/bluetooth/hci_vhci.c
···
289
289
290
290
static void vhci_coredump_hdr(struct hci_dev *hdev, struct sk_buff *skb)
291
291
{
292
-
char buf[80];
292
+
const char *buf;
293
293
294
-
snprintf(buf, sizeof(buf), "Controller Name: vhci_ctrl\n");
294
+
buf = "Controller Name: vhci_ctrl\n";
295
295
skb_put_data(skb, buf, strlen(buf));
296
296
297
-
snprintf(buf, sizeof(buf), "Firmware Version: vhci_fw\n");
297
+
buf = "Firmware Version: vhci_fw\n";
298
298
skb_put_data(skb, buf, strlen(buf));
299
299
300
-
snprintf(buf, sizeof(buf), "Driver: vhci_drv\n");
300
+
buf = "Driver: vhci_drv\n";
301
301
skb_put_data(skb, buf, strlen(buf));
302
302
303
-
snprintf(buf, sizeof(buf), "Vendor: vhci\n");
303
+
buf = "Vendor: vhci\n";
304
304
skb_put_data(skb, buf, strlen(buf));
305
305
}
306
306
+3
-3
drivers/crypto/caam/qi.c
+3
-3
drivers/crypto/caam/qi.c
···
122
122
qm_fd_addr_set64(&fd, addr);
123
123
124
124
do {
125
+
refcount_inc(&req->drv_ctx->refcnt);
125
126
ret = qman_enqueue(req->drv_ctx->req_fq, &fd);
126
-
if (likely(!ret)) {
127
-
refcount_inc(&req->drv_ctx->refcnt);
127
+
if (likely(!ret))
128
128
return 0;
129
-
}
130
129
130
+
refcount_dec(&req->drv_ctx->refcnt);
131
131
if (ret != -EBUSY)
132
132
break;
133
133
num_retries++;
+1
-4
drivers/crypto/tegra/tegra-se-aes.c
+1
-4
drivers/crypto/tegra/tegra-se-aes.c
···
269
269
unsigned int cmdlen, key1_id, key2_id;
270
270
int ret;
271
271
272
-
rctx->iv = (u32 *)req->iv;
272
+
rctx->iv = (ctx->alg == SE_ALG_ECB) ? NULL : (u32 *)req->iv;
273
273
rctx->len = req->cryptlen;
274
274
key1_id = ctx->key1_id;
275
275
key2_id = ctx->key2_id;
···
497
497
498
498
if (!req->cryptlen)
499
499
return 0;
500
-
501
-
if (ctx->alg == SE_ALG_ECB)
502
-
req->iv = NULL;
503
500
504
501
rctx->encrypt = encrypt;
505
502
+1
-1
drivers/dma-buf/udmabuf.c
+1
-1
drivers/dma-buf/udmabuf.c
-30
drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c
-30
drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c
···
462
462
EXPORT_SYMBOL_NS_GPL(cs_dsp_mock_xm_header_get_alg_base_in_words, "FW_CS_DSP_KUNIT_TEST_UTILS");
463
463
464
464
/**
465
-
* cs_dsp_mock_xm_header_get_fw_version_from_regmap() - Firmware version.
466
-
*
467
-
* @priv: Pointer to struct cs_dsp_test.
468
-
*
469
-
* Return: Firmware version word value.
470
-
*/
471
-
unsigned int cs_dsp_mock_xm_header_get_fw_version_from_regmap(struct cs_dsp_test *priv)
472
-
{
473
-
unsigned int xm = cs_dsp_mock_base_addr_for_mem(priv, WMFW_ADSP2_XM);
474
-
union {
475
-
struct wmfw_id_hdr adsp2;
476
-
struct wmfw_v3_id_hdr halo;
477
-
} hdr;
478
-
479
-
switch (priv->dsp->type) {
480
-
case WMFW_ADSP2:
481
-
regmap_raw_read(priv->dsp->regmap, xm, &hdr.adsp2, sizeof(hdr.adsp2));
482
-
return be32_to_cpu(hdr.adsp2.ver);
483
-
case WMFW_HALO:
484
-
regmap_raw_read(priv->dsp->regmap, xm, &hdr.halo, sizeof(hdr.halo));
485
-
return be32_to_cpu(hdr.halo.ver);
486
-
default:
487
-
KUNIT_FAIL(priv->test, NULL);
488
-
return 0;
489
-
}
490
-
}
491
-
EXPORT_SYMBOL_NS_GPL(cs_dsp_mock_xm_header_get_fw_version_from_regmap,
492
-
"FW_CS_DSP_KUNIT_TEST_UTILS");
493
-
494
-
/**
495
465
* cs_dsp_mock_xm_header_get_fw_version() - Firmware version.
496
466
*
497
467
* @header: Pointer to struct cs_dsp_mock_xm_header.
+1
-1
drivers/firmware/cirrus/test/cs_dsp_test_bin.c
+1
-1
drivers/firmware/cirrus/test/cs_dsp_test_bin.c
···
2198
2198
2199
2199
priv->local->bin_builder =
2200
2200
cs_dsp_mock_bin_init(priv, 1,
2201
-
cs_dsp_mock_xm_header_get_fw_version_from_regmap(priv));
2201
+
cs_dsp_mock_xm_header_get_fw_version(xm_hdr));
2202
2202
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, priv->local->bin_builder);
2203
2203
2204
2204
/* We must provide a dummy wmfw to load */
+1
-1
drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c
+1
-1
drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c
···
451
451
452
452
local->bin_builder =
453
453
cs_dsp_mock_bin_init(priv, 1,
454
-
cs_dsp_mock_xm_header_get_fw_version_from_regmap(priv));
454
+
cs_dsp_mock_xm_header_get_fw_version(local->xm_header));
455
455
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, local->bin_builder);
456
456
457
457
/* Init cs_dsp */
+1
drivers/fpga/tests/fpga-bridge-test.c
+1
drivers/fpga/tests/fpga-bridge-test.c
+1
drivers/fpga/tests/fpga-mgr-test.c
+1
drivers/fpga/tests/fpga-mgr-test.c
+1
drivers/fpga/tests/fpga-region-test.c
+1
drivers/fpga/tests/fpga-region-test.c
+1
-1
drivers/fwctl/main.c
+1
-1
drivers/fwctl/main.c
···
105
105
if (!test_and_set_bit(0, &fwctl_tainted)) {
106
106
dev_warn(
107
107
&fwctl->dev,
108
-
"%s(%d): has requested full access to the physical device device",
108
+
"%s(%d): has requested full access to the physical device",
109
109
current->comm, task_pid_nr(current));
110
110
add_taint(TAINT_FWCTL, LOCKDEP_STILL_OK);
111
111
}
+20
-13
drivers/fwctl/pds/main.c
+20
-13
drivers/fwctl/pds/main.c
···
105
105
static void pdsfc_free_endpoints(struct pdsfc_dev *pdsfc)
106
106
{
107
107
struct device *dev = &pdsfc->fwctl.dev;
108
+
u32 num_endpoints;
108
109
int i;
109
110
110
111
if (!pdsfc->endpoints)
111
112
return;
112
113
113
-
for (i = 0; pdsfc->endpoint_info && i < pdsfc->endpoints->num_entries; i++)
114
+
num_endpoints = le32_to_cpu(pdsfc->endpoints->num_entries);
115
+
for (i = 0; pdsfc->endpoint_info && i < num_endpoints; i++)
114
116
mutex_destroy(&pdsfc->endpoint_info[i].lock);
115
117
vfree(pdsfc->endpoint_info);
116
118
pdsfc->endpoint_info = NULL;
···
201
199
ep_entry = (struct pds_fwctl_query_data_endpoint *)pdsfc->endpoints->entries;
202
200
for (i = 0; i < num_endpoints; i++) {
203
201
mutex_init(&pdsfc->endpoint_info[i].lock);
204
-
pdsfc->endpoint_info[i].endpoint = ep_entry[i].id;
202
+
pdsfc->endpoint_info[i].endpoint = le32_to_cpu(ep_entry[i].id);
205
203
}
206
204
207
205
return 0;
···
216
214
struct pds_fwctl_query_data *data;
217
215
union pds_core_adminq_cmd cmd;
218
216
dma_addr_t data_pa;
217
+
u32 num_entries;
219
218
int err;
220
219
int i;
221
220
···
249
246
*pa = data_pa;
250
247
251
248
entries = (struct pds_fwctl_query_data_operation *)data->entries;
252
-
dev_dbg(dev, "num_entries %d\n", data->num_entries);
253
-
for (i = 0; i < data->num_entries; i++) {
249
+
num_entries = le32_to_cpu(data->num_entries);
250
+
dev_dbg(dev, "num_entries %d\n", num_entries);
251
+
for (i = 0; i < num_entries; i++) {
254
252
255
253
/* Translate FW command attribute to fwctl scope */
256
254
switch (entries[i].scope) {
···
271
267
break;
272
268
}
273
269
dev_dbg(dev, "endpoint %d operation: id %x scope %d\n",
274
-
ep, entries[i].id, entries[i].scope);
270
+
ep, le32_to_cpu(entries[i].id), entries[i].scope);
275
271
}
276
272
277
273
return data;
···
284
280
struct pds_fwctl_query_data_operation *op_entry;
285
281
struct pdsfc_rpc_endpoint_info *ep_info = NULL;
286
282
struct device *dev = &pdsfc->fwctl.dev;
283
+
u32 num_entries;
287
284
int i;
288
285
289
286
/* validate rpc in_len & out_len based
290
287
* on ident.max_req_sz & max_resp_sz
291
288
*/
292
-
if (rpc->in.len > pdsfc->ident.max_req_sz) {
289
+
if (rpc->in.len > le32_to_cpu(pdsfc->ident.max_req_sz)) {
293
290
dev_dbg(dev, "Invalid request size %u, max %u\n",
294
-
rpc->in.len, pdsfc->ident.max_req_sz);
291
+
rpc->in.len, le32_to_cpu(pdsfc->ident.max_req_sz));
295
292
return -EINVAL;
296
293
}
297
294
298
-
if (rpc->out.len > pdsfc->ident.max_resp_sz) {
295
+
if (rpc->out.len > le32_to_cpu(pdsfc->ident.max_resp_sz)) {
299
296
dev_dbg(dev, "Invalid response size %u, max %u\n",
300
-
rpc->out.len, pdsfc->ident.max_resp_sz);
297
+
rpc->out.len, le32_to_cpu(pdsfc->ident.max_resp_sz));
301
298
return -EINVAL;
302
299
}
303
300
304
-
for (i = 0; i < pdsfc->endpoints->num_entries; i++) {
301
+
num_entries = le32_to_cpu(pdsfc->endpoints->num_entries);
302
+
for (i = 0; i < num_entries; i++) {
305
303
if (pdsfc->endpoint_info[i].endpoint == rpc->in.ep) {
306
304
ep_info = &pdsfc->endpoint_info[i];
307
305
break;
···
332
326
333
327
/* reject unsupported and/or out of scope commands */
334
328
op_entry = (struct pds_fwctl_query_data_operation *)ep_info->operations->entries;
335
-
for (i = 0; i < ep_info->operations->num_entries; i++) {
336
-
if (PDS_FWCTL_RPC_OPCODE_CMP(rpc->in.op, op_entry[i].id)) {
329
+
num_entries = le32_to_cpu(ep_info->operations->num_entries);
330
+
for (i = 0; i < num_entries; i++) {
331
+
if (PDS_FWCTL_RPC_OPCODE_CMP(rpc->in.op, le32_to_cpu(op_entry[i].id))) {
337
332
if (scope < op_entry[i].scope)
338
333
return -EPERM;
339
334
return 0;
···
409
402
cmd = (union pds_core_adminq_cmd) {
410
403
.fwctl_rpc = {
411
404
.opcode = PDS_FWCTL_CMD_RPC,
412
-
.flags = PDS_FWCTL_RPC_IND_REQ | PDS_FWCTL_RPC_IND_RESP,
405
+
.flags = cpu_to_le16(PDS_FWCTL_RPC_IND_REQ | PDS_FWCTL_RPC_IND_RESP),
413
406
.ep = cpu_to_le32(rpc->in.ep),
414
407
.op = cpu_to_le32(rpc->in.op),
415
408
.req_pa = cpu_to_le64(in_payload_dma_addr),
-1
drivers/gpu/drm/amd/amdgpu/amdgpu.h
-1
drivers/gpu/drm/amd/amdgpu/amdgpu.h
···
353
353
AMDGPU_CP_KIQ_IRQ_DRIVER0 = 0,
354
354
AMDGPU_CP_KIQ_IRQ_LAST
355
355
};
356
-
#define SRIOV_USEC_TIMEOUT 1200000 /* wait 12 * 100ms for SRIOV */
357
356
#define MAX_KIQ_REG_WAIT 5000 /* in usecs, 5ms */
358
357
#define MAX_KIQ_REG_BAILOUT_INTERVAL 5 /* in msecs, 5ms */
359
358
#define MAX_KIQ_REG_TRY 1000
+7
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+7
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
···
3643
3643
adev, adev->ip_blocks[i].version->type))
3644
3644
continue;
3645
3645
3646
+
/* Since we skip suspend for S0i3, we need to cancel the delayed
3647
+
* idle work here as the suspend callback never gets called.
3648
+
*/
3649
+
if (adev->in_s0ix &&
3650
+
adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GFX &&
3651
+
amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(10, 0, 0))
3652
+
cancel_delayed_work_sync(&adev->gfx.idle_work);
3646
3653
/* skip suspend of gfx/mes and psp for S0ix
3647
3654
* gfx is in gfxoff state, so on resume it will exit gfxoff just
3648
3655
* like at runtime. PSP is also part of the always on hardware
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
···
120
120
MODULE_FIRMWARE("amdgpu/raven_ip_discovery.bin");
121
121
MODULE_FIRMWARE("amdgpu/raven2_ip_discovery.bin");
122
122
MODULE_FIRMWARE("amdgpu/picasso_ip_discovery.bin");
123
+
MODULE_FIRMWARE("amdgpu/arcturus_ip_discovery.bin");
124
+
MODULE_FIRMWARE("amdgpu/aldebaran_ip_discovery.bin");
123
125
124
126
#define mmIP_DISCOVERY_VERSION 0x16A00
125
127
#define mmRCC_CONFIG_MEMSIZE 0xde3
+19
-8
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
+19
-8
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
···
75
75
*/
76
76
static int amdgpu_dma_buf_pin(struct dma_buf_attachment *attach)
77
77
{
78
-
struct drm_gem_object *obj = attach->dmabuf->priv;
79
-
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
78
+
struct dma_buf *dmabuf = attach->dmabuf;
79
+
struct amdgpu_bo *bo = gem_to_amdgpu_bo(dmabuf->priv);
80
+
u32 domains = bo->preferred_domains;
80
81
81
-
/* pin buffer into GTT */
82
-
return amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);
82
+
dma_resv_assert_held(dmabuf->resv);
83
+
84
+
/*
85
+
* Try pinning into VRAM to allow P2P with RDMA NICs without ODP
86
+
* support if all attachments can do P2P. If any attachment can't do
87
+
* P2P just pin into GTT instead.
88
+
*/
89
+
list_for_each_entry(attach, &dmabuf->attachments, node)
90
+
if (!attach->peer2peer)
91
+
domains &= ~AMDGPU_GEM_DOMAIN_VRAM;
92
+
93
+
if (domains & AMDGPU_GEM_DOMAIN_VRAM)
94
+
bo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
95
+
96
+
return amdgpu_bo_pin(bo, domains);
83
97
}
84
98
85
99
/**
···
148
134
r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
149
135
if (r)
150
136
return ERR_PTR(r);
151
-
152
-
} else if (bo->tbo.resource->mem_type != TTM_PL_TT) {
153
-
return ERR_PTR(-EBUSY);
154
137
}
155
138
156
139
switch (bo->tbo.resource->mem_type) {
···
195
184
struct sg_table *sgt,
196
185
enum dma_data_direction dir)
197
186
{
198
-
if (sgt->sgl->page_link) {
187
+
if (sg_page(sgt->sgl)) {
199
188
dma_unmap_sgtable(attach->dev, sgt, dir, 0);
200
189
sg_free_table(sgt);
201
190
kfree(sgt);
+14
-5
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+14
-5
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
···
699
699
uint32_t flush_type, bool all_hub,
700
700
uint32_t inst)
701
701
{
702
-
u32 usec_timeout = amdgpu_sriov_vf(adev) ? SRIOV_USEC_TIMEOUT :
703
-
adev->usec_timeout;
704
702
struct amdgpu_ring *ring = &adev->gfx.kiq[inst].ring;
705
703
struct amdgpu_kiq *kiq = &adev->gfx.kiq[inst];
706
704
unsigned int ndw;
707
-
int r;
705
+
int r, cnt = 0;
708
706
uint32_t seq;
709
707
710
708
/*
···
759
761
760
762
amdgpu_ring_commit(ring);
761
763
spin_unlock(&adev->gfx.kiq[inst].ring_lock);
762
-
if (amdgpu_fence_wait_polling(ring, seq, usec_timeout) < 1) {
764
+
765
+
r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT);
766
+
767
+
might_sleep();
768
+
while (r < 1 && cnt++ < MAX_KIQ_REG_TRY &&
769
+
!amdgpu_reset_pending(adev->reset_domain)) {
770
+
msleep(MAX_KIQ_REG_BAILOUT_INTERVAL);
771
+
r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT);
772
+
}
773
+
774
+
if (cnt > MAX_KIQ_REG_TRY) {
763
775
dev_err(adev->dev, "timeout waiting for kiq fence\n");
764
776
r = -ETIME;
765
-
}
777
+
} else
778
+
r = 0;
766
779
}
767
780
768
781
error_unlock_reset:
+2
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+2
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
···
163
163
* When GTT is just an alternative to VRAM make sure that we
164
164
* only use it as fallback and still try to fill up VRAM first.
165
165
*/
166
-
if (domain & abo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM &&
167
-
!(adev->flags & AMD_IS_APU))
166
+
if (abo->tbo.resource && !(adev->flags & AMD_IS_APU) &&
167
+
domain & abo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM)
168
168
places[c].flags |= TTM_PL_FLAG_FALLBACK;
169
169
c++;
170
170
}
+4
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+4
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
···
24
24
25
25
#include <linux/dma-mapping.h>
26
26
#include <drm/ttm/ttm_range_manager.h>
27
+
#include <drm/drm_drv.h>
27
28
28
29
#include "amdgpu.h"
29
30
#include "amdgpu_vm.h"
···
908
907
struct ttm_resource_manager *man = &mgr->manager;
909
908
int err;
910
909
910
+
man->cg = drmm_cgroup_register_region(adev_to_drm(adev), "vram", adev->gmc.real_vram_size);
911
+
if (IS_ERR(man->cg))
912
+
return PTR_ERR(man->cg);
911
913
ttm_resource_manager_init(man, &adev->mman.bdev,
912
914
adev->gmc.real_vram_size);
913
915
+4
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+4
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+12
-9
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+12
-9
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
···
1392
1392
mes_v12_0_queue_init_register(ring);
1393
1393
}
1394
1394
1395
-
/* get MES scheduler/KIQ versions */
1396
-
mutex_lock(&adev->srbm_mutex);
1397
-
soc21_grbm_select(adev, 3, pipe, 0, 0);
1395
+
if (((pipe == AMDGPU_MES_SCHED_PIPE) && !adev->mes.sched_version) ||
1396
+
((pipe == AMDGPU_MES_KIQ_PIPE) && !adev->mes.kiq_version)) {
1397
+
/* get MES scheduler/KIQ versions */
1398
+
mutex_lock(&adev->srbm_mutex);
1399
+
soc21_grbm_select(adev, 3, pipe, 0, 0);
1398
1400
1399
-
if (pipe == AMDGPU_MES_SCHED_PIPE)
1400
-
adev->mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
1401
-
else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
1402
-
adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
1401
+
if (pipe == AMDGPU_MES_SCHED_PIPE)
1402
+
adev->mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
1403
+
else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
1404
+
adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
1403
1405
1404
-
soc21_grbm_select(adev, 0, 0, 0, 0);
1405
-
mutex_unlock(&adev->srbm_mutex);
1406
+
soc21_grbm_select(adev, 0, 0, 0, 0);
1407
+
mutex_unlock(&adev->srbm_mutex);
1408
+
}
1406
1409
1407
1410
return 0;
1408
1411
}
+5
-4
drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+5
-4
drivers/gpu/drm/amd/amdkfd/kfd_topology.c
···
1983
1983
if (kfd_dbg_has_ttmps_always_setup(dev->gpu))
1984
1984
dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID;
1985
1985
1986
-
if (dev->gpu->adev->sdma.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE)
1987
-
dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED;
1988
-
1989
1986
if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0)) {
1990
1987
if (KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 3) ||
1991
1988
KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 4))
···
1998
2001
dev->node_props.capability |=
1999
2002
HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED;
2000
2003
2001
-
dev->node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED;
2004
+
if (!amdgpu_sriov_vf(dev->gpu->adev))
2005
+
dev->node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED;
2006
+
2007
+
if (dev->gpu->adev->sdma.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE)
2008
+
dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED;
2002
2009
} else {
2003
2010
dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 |
2004
2011
HSA_DBG_WATCH_ADDR_MASK_HI_BIT;
+21
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+21
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
···
1726
1726
.callback = edp0_on_dp1_callback,
1727
1727
.matches = {
1728
1728
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1729
+
DMI_MATCH(DMI_PRODUCT_NAME, "HP EliteBook 645 14 inch G11 Notebook PC"),
1730
+
},
1731
+
},
1732
+
{
1733
+
.callback = edp0_on_dp1_callback,
1734
+
.matches = {
1735
+
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1729
1736
DMI_MATCH(DMI_PRODUCT_NAME, "HP EliteBook 665 16 inch G11 Notebook PC"),
1737
+
},
1738
+
},
1739
+
{
1740
+
.callback = edp0_on_dp1_callback,
1741
+
.matches = {
1742
+
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1743
+
DMI_MATCH(DMI_PRODUCT_NAME, "HP ProBook 445 14 inch G11 Notebook PC"),
1744
+
},
1745
+
},
1746
+
{
1747
+
.callback = edp0_on_dp1_callback,
1748
+
.matches = {
1749
+
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1750
+
DMI_MATCH(DMI_PRODUCT_NAME, "HP ProBook 465 16 inch G11 Notebook PC"),
1730
1751
},
1731
1752
},
1732
1753
{}
+14
-3
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+14
-3
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
···
113
113
*
114
114
* Panel Replay and PSR SU
115
115
* - Enable when:
116
+
* - VRR is disabled
116
117
* - vblank counter is disabled
117
118
* - entry is allowed: usermode demonstrates an adequate number of fast
118
119
* commits)
···
132
131
bool is_sr_active = (link->replay_settings.replay_allow_active ||
133
132
link->psr_settings.psr_allow_active);
134
133
bool is_crc_window_active = false;
134
+
bool vrr_active = amdgpu_dm_crtc_vrr_active_irq(vblank_work->acrtc);
135
135
136
136
#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
137
137
is_crc_window_active =
138
138
amdgpu_dm_crc_window_is_activated(&vblank_work->acrtc->base);
139
139
#endif
140
140
141
-
if (link->replay_settings.replay_feature_enabled &&
141
+
if (link->replay_settings.replay_feature_enabled && !vrr_active &&
142
142
allow_sr_entry && !is_sr_active && !is_crc_window_active) {
143
143
amdgpu_dm_replay_enable(vblank_work->stream, true);
144
144
} else if (vblank_enabled) {
145
145
if (link->psr_settings.psr_version < DC_PSR_VERSION_SU_1 && is_sr_active)
146
146
amdgpu_dm_psr_disable(vblank_work->stream, false);
147
-
} else if (link->psr_settings.psr_feature_enabled &&
147
+
} else if (link->psr_settings.psr_feature_enabled && !vrr_active &&
148
148
allow_sr_entry && !is_sr_active && !is_crc_window_active) {
149
149
150
150
struct amdgpu_dm_connector *aconn =
···
246
244
struct vblank_control_work *vblank_work =
247
245
container_of(work, struct vblank_control_work, work);
248
246
struct amdgpu_display_manager *dm = vblank_work->dm;
247
+
struct amdgpu_device *adev = drm_to_adev(dm->ddev);
248
+
int r;
249
249
250
250
mutex_lock(&dm->dc_lock);
251
251
···
275
271
vblank_work->acrtc->dm_irq_params.allow_sr_entry);
276
272
}
277
273
278
-
if (dm->active_vblank_irq_count == 0)
274
+
if (dm->active_vblank_irq_count == 0) {
275
+
r = amdgpu_dpm_pause_power_profile(adev, true);
276
+
if (r)
277
+
dev_warn(adev->dev, "failed to set default power profile mode\n");
279
278
dc_allow_idle_optimizations(dm->dc, true);
279
+
r = amdgpu_dpm_pause_power_profile(adev, false);
280
+
if (r)
281
+
dev_warn(adev->dev, "failed to restore the power profile mode\n");
282
+
}
280
283
281
284
mutex_unlock(&dm->dc_lock);
282
285
+15
-2
drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c
+15
-2
drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c
···
86
86
/* Store configuration options */
87
87
(*dml_ctx)->config = *config;
88
88
89
+
DC_FP_START();
90
+
89
91
/*Initialize SOCBB and DCNIP params */
90
92
dml21_initialize_soc_bb_params(&(*dml_ctx)->v21.dml_init, config, in_dc);
91
93
dml21_initialize_ip_params(&(*dml_ctx)->v21.dml_init, config, in_dc);
···
98
96
99
97
/*Initialize DML21 instance */
100
98
dml2_initialize_instance(&(*dml_ctx)->v21.dml_init);
99
+
100
+
DC_FP_END();
101
101
}
102
102
103
103
bool dml21_create(const struct dc *in_dc, struct dml2_context **dml_ctx, const struct dml2_configuration_options *config)
···
287
283
{
288
284
bool out = false;
289
285
286
+
DC_FP_START();
287
+
290
288
/* Use dml_validate_only for fast_validate path */
291
-
if (fast_validate) {
289
+
if (fast_validate)
292
290
out = dml21_check_mode_support(in_dc, context, dml_ctx);
293
-
} else
291
+
else
294
292
out = dml21_mode_check_and_programming(in_dc, context, dml_ctx);
293
+
294
+
DC_FP_END();
295
+
295
296
return out;
296
297
}
297
298
···
435
426
436
427
dst_dml_ctx->v21.mode_programming.programming = dst_dml2_programming;
437
428
429
+
DC_FP_START();
430
+
438
431
/* need to initialize copied instance for internal references to be correct */
439
432
dml2_initialize_instance(&dst_dml_ctx->v21.dml_init);
433
+
434
+
DC_FP_END();
440
435
}
441
436
442
437
bool dml21_create_copy(struct dml2_context **dst_dml_ctx,
+9
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
+9
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
···
732
732
return out;
733
733
}
734
734
735
+
DC_FP_START();
736
+
735
737
/* Use dml_validate_only for fast_validate path */
736
738
if (fast_validate)
737
739
out = dml2_validate_only(context);
738
740
else
739
741
out = dml2_validate_and_build_resource(in_dc, context);
742
+
743
+
DC_FP_END();
744
+
740
745
return out;
741
746
}
742
747
···
784
779
break;
785
780
}
786
781
782
+
DC_FP_START();
783
+
787
784
initialize_dml2_ip_params(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.ip);
788
785
789
786
initialize_dml2_soc_bbox(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc);
790
787
791
788
initialize_dml2_soc_states(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc, &(*dml2)->v20.dml_core_ctx.states);
789
+
790
+
DC_FP_END();
792
791
}
793
792
794
793
bool dml2_create(const struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2)
+1
drivers/gpu/drm/amd/include/kgd_pp_interface.h
+1
drivers/gpu/drm/amd/include/kgd_pp_interface.h
···
429
429
int (*set_pp_table)(void *handle, const char *buf, size_t size);
430
430
void (*debugfs_print_current_performance_level)(void *handle, struct seq_file *m);
431
431
int (*switch_power_profile)(void *handle, enum PP_SMC_POWER_PROFILE type, bool en);
432
+
int (*pause_power_profile)(void *handle, bool pause);
432
433
/* export to amdgpu */
433
434
struct amd_vce_state *(*get_vce_clock_state)(void *handle, u32 idx);
434
435
int (*dispatch_tasks)(void *handle, enum amd_pp_task task_id,
+19
drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+19
drivers/gpu/drm/amd/pm/amdgpu_dpm.c
···
349
349
return ret;
350
350
}
351
351
352
+
int amdgpu_dpm_pause_power_profile(struct amdgpu_device *adev,
353
+
bool pause)
354
+
{
355
+
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
356
+
int ret = 0;
357
+
358
+
if (amdgpu_sriov_vf(adev))
359
+
return 0;
360
+
361
+
if (pp_funcs && pp_funcs->pause_power_profile) {
362
+
mutex_lock(&adev->pm.mutex);
363
+
ret = pp_funcs->pause_power_profile(
364
+
adev->powerplay.pp_handle, pause);
365
+
mutex_unlock(&adev->pm.mutex);
366
+
}
367
+
368
+
return ret;
369
+
}
370
+
352
371
int amdgpu_dpm_set_xgmi_pstate(struct amdgpu_device *adev,
353
372
uint32_t pstate)
354
373
{
+2
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
+2
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
···
410
410
int amdgpu_dpm_switch_power_profile(struct amdgpu_device *adev,
411
411
enum PP_SMC_POWER_PROFILE type,
412
412
bool en);
413
+
int amdgpu_dpm_pause_power_profile(struct amdgpu_device *adev,
414
+
bool pause);
413
415
414
416
int amdgpu_dpm_baco_reset(struct amdgpu_device *adev);
415
417
+35
-1
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+35
-1
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
···
2398
2398
smu_power_profile_mode_get(smu, type);
2399
2399
else
2400
2400
smu_power_profile_mode_put(smu, type);
2401
-
ret = smu_bump_power_profile_mode(smu, NULL, 0);
2401
+
/* don't switch the active workload when paused */
2402
+
if (smu->pause_workload)
2403
+
ret = 0;
2404
+
else
2405
+
ret = smu_bump_power_profile_mode(smu, NULL, 0);
2402
2406
if (ret) {
2403
2407
if (enable)
2404
2408
smu_power_profile_mode_put(smu, type);
···
2410
2406
smu_power_profile_mode_get(smu, type);
2411
2407
return ret;
2412
2408
}
2409
+
}
2410
+
2411
+
return 0;
2412
+
}
2413
+
2414
+
static int smu_pause_power_profile(void *handle,
2415
+
bool pause)
2416
+
{
2417
+
struct smu_context *smu = handle;
2418
+
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
2419
+
u32 workload_mask = 1 << PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT;
2420
+
int ret;
2421
+
2422
+
if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
2423
+
return -EOPNOTSUPP;
2424
+
2425
+
if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL &&
2426
+
smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) {
2427
+
smu->pause_workload = pause;
2428
+
2429
+
/* force to bootup default profile */
2430
+
if (smu->pause_workload && smu->ppt_funcs->set_power_profile_mode)
2431
+
ret = smu->ppt_funcs->set_power_profile_mode(smu,
2432
+
workload_mask,
2433
+
NULL,
2434
+
0);
2435
+
else
2436
+
ret = smu_bump_power_profile_mode(smu, NULL, 0);
2437
+
return ret;
2413
2438
}
2414
2439
2415
2440
return 0;
···
3766
3733
.get_pp_table = smu_sys_get_pp_table,
3767
3734
.set_pp_table = smu_sys_set_pp_table,
3768
3735
.switch_power_profile = smu_switch_power_profile,
3736
+
.pause_power_profile = smu_pause_power_profile,
3769
3737
/* export to amdgpu */
3770
3738
.dispatch_tasks = smu_handle_dpm_task,
3771
3739
.load_firmware = smu_load_microcode,
+1
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+1
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+1
-1
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+1
-1
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+13
-1
drivers/gpu/drm/i915/display/intel_bw.c
+13
-1
drivers/gpu/drm/i915/display/intel_bw.c
···
244
244
qi->deinterleave = 4;
245
245
break;
246
246
case INTEL_DRAM_GDDR:
247
+
case INTEL_DRAM_GDDR_ECC:
247
248
qi->channel_width = 32;
248
249
break;
249
250
default:
···
395
394
396
395
static const struct intel_sa_info xe2_hpd_sa_info = {
397
396
.derating = 30,
397
+
.deprogbwlimit = 53,
398
+
/* Other values not used by simplified algorithm */
399
+
};
400
+
401
+
static const struct intel_sa_info xe2_hpd_ecc_sa_info = {
402
+
.derating = 45,
398
403
.deprogbwlimit = 53,
399
404
/* Other values not used by simplified algorithm */
400
405
};
···
747
740
748
741
void intel_bw_init_hw(struct drm_i915_private *dev_priv)
749
742
{
743
+
const struct dram_info *dram_info = &dev_priv->dram_info;
744
+
750
745
if (!HAS_DISPLAY(dev_priv))
751
746
return;
752
747
753
-
if (DISPLAY_VERx100(dev_priv) >= 1401 && IS_DGFX(dev_priv))
748
+
if (DISPLAY_VERx100(dev_priv) >= 1401 && IS_DGFX(dev_priv) &&
749
+
dram_info->type == INTEL_DRAM_GDDR_ECC)
750
+
xe2_hpd_get_bw_info(dev_priv, &xe2_hpd_ecc_sa_info);
751
+
else if (DISPLAY_VERx100(dev_priv) >= 1401 && IS_DGFX(dev_priv))
754
752
xe2_hpd_get_bw_info(dev_priv, &xe2_hpd_sa_info);
755
753
else if (DISPLAY_VER(dev_priv) >= 14)
756
754
tgl_get_bw_info(dev_priv, &mtl_sa_info);
+3
-1
drivers/gpu/drm/i915/display/intel_display.c
+3
-1
drivers/gpu/drm/i915/display/intel_display.c
···
968
968
old_crtc_state->vrr.vmin != new_crtc_state->vrr.vmin ||
969
969
old_crtc_state->vrr.vmax != new_crtc_state->vrr.vmax ||
970
970
old_crtc_state->vrr.guardband != new_crtc_state->vrr.guardband ||
971
-
old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full;
971
+
old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full ||
972
+
old_crtc_state->vrr.vsync_start != new_crtc_state->vrr.vsync_start ||
973
+
old_crtc_state->vrr.vsync_end != new_crtc_state->vrr.vsync_end;
972
974
}
973
975
974
976
static bool cmrr_params_changed(const struct intel_crtc_state *old_crtc_state,
+43
-8
drivers/gpu/drm/i915/display/intel_dp.c
+43
-8
drivers/gpu/drm/i915/display/intel_dp.c
···
172
172
173
173
static int max_dprx_rate(struct intel_dp *intel_dp)
174
174
{
175
-
if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
176
-
return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
175
+
struct intel_display *display = to_intel_display(intel_dp);
176
+
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
177
+
int max_rate;
177
178
178
-
return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
179
+
if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
180
+
max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
181
+
else
182
+
max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
183
+
184
+
/*
185
+
* Some broken eDP sinks illegally declare support for
186
+
* HBR3 without TPS4, and are unable to produce a stable
187
+
* output. Reject HBR3 when TPS4 is not available.
188
+
*/
189
+
if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
190
+
drm_dbg_kms(display->drm,
191
+
"[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
192
+
encoder->base.base.id, encoder->base.name);
193
+
max_rate = 540000;
194
+
}
195
+
196
+
return max_rate;
179
197
}
180
198
181
199
static int max_dprx_lane_count(struct intel_dp *intel_dp)
···
4188
4170
static void
4189
4171
intel_edp_set_sink_rates(struct intel_dp *intel_dp)
4190
4172
{
4173
+
struct intel_display *display = to_intel_display(intel_dp);
4174
+
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
4175
+
4191
4176
intel_dp->num_sink_rates = 0;
4192
4177
4193
4178
if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
···
4201
4180
sink_rates, sizeof(sink_rates));
4202
4181
4203
4182
for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
4204
-
int val = le16_to_cpu(sink_rates[i]);
4205
-
4206
-
if (val == 0)
4207
-
break;
4183
+
int rate;
4208
4184
4209
4185
/* Value read multiplied by 200kHz gives the per-lane
4210
4186
* link rate in kHz. The source rates are, however,
···
4209
4191
* back to symbols is
4210
4192
* (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
4211
4193
*/
4212
-
intel_dp->sink_rates[i] = (val * 200) / 10;
4194
+
rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
4195
+
4196
+
if (rate == 0)
4197
+
break;
4198
+
4199
+
/*
4200
+
* Some broken eDP sinks illegally declare support for
4201
+
* HBR3 without TPS4, and are unable to produce a stable
4202
+
* output. Reject HBR3 when TPS4 is not available.
4203
+
*/
4204
+
if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
4205
+
drm_dbg_kms(display->drm,
4206
+
"[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
4207
+
encoder->base.base.id, encoder->base.name);
4208
+
break;
4209
+
}
4210
+
4211
+
intel_dp->sink_rates[i] = rate;
4213
4212
}
4214
4213
intel_dp->num_sink_rates = i;
4215
4214
}
+3
-1
drivers/gpu/drm/i915/display/intel_vblank.c
+3
-1
drivers/gpu/drm/i915/display/intel_vblank.c
···
222
222
* However if queried just before the start of vblank we'll get an
223
223
* answer that's slightly in the future.
224
224
*/
225
-
if (DISPLAY_VER(display) == 2)
225
+
if (DISPLAY_VER(display) >= 20 || display->platform.battlemage)
226
+
return 1;
227
+
else if (DISPLAY_VER(display) == 2)
226
228
return -1;
227
229
else if (HAS_DDI(display) && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
228
230
return 2;
+4
-15
drivers/gpu/drm/i915/gt/intel_rc6.c
+4
-15
drivers/gpu/drm/i915/gt/intel_rc6.c
···
117
117
GEN6_RC_CTL_RC6_ENABLE |
118
118
GEN6_RC_CTL_EI_MODE(1);
119
119
120
-
/*
121
-
* BSpec 52698 - Render powergating must be off.
122
-
* FIXME BSpec is outdated, disabling powergating for MTL is just
123
-
* temporary wa and should be removed after fixing real cause
124
-
* of forcewake timeouts.
125
-
*/
126
-
if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
127
-
pg_enable =
128
-
GEN9_MEDIA_PG_ENABLE |
129
-
GEN11_MEDIA_SAMPLER_PG_ENABLE;
130
-
else
131
-
pg_enable =
132
-
GEN9_RENDER_PG_ENABLE |
133
-
GEN9_MEDIA_PG_ENABLE |
134
-
GEN11_MEDIA_SAMPLER_PG_ENABLE;
120
+
pg_enable =
121
+
GEN9_RENDER_PG_ENABLE |
122
+
GEN9_MEDIA_PG_ENABLE |
123
+
GEN11_MEDIA_SAMPLER_PG_ENABLE;
135
124
136
125
if (GRAPHICS_VER(gt->i915) >= 12 && !IS_DG1(gt->i915)) {
137
126
for (i = 0; i < I915_MAX_VCS; i++)
+5
-6
drivers/gpu/drm/i915/gt/uc/intel_huc.c
+5
-6
drivers/gpu/drm/i915/gt/uc/intel_huc.c
···
317
317
}
318
318
}
319
319
320
+
void intel_huc_fini_late(struct intel_huc *huc)
321
+
{
322
+
delayed_huc_load_fini(huc);
323
+
}
324
+
320
325
#define HUC_LOAD_MODE_STRING(x) (x ? "GSC" : "legacy")
321
326
static int check_huc_loading_mode(struct intel_huc *huc)
322
327
{
···
419
414
420
415
void intel_huc_fini(struct intel_huc *huc)
421
416
{
422
-
/*
423
-
* the fence is initialized in init_early, so we need to clean it up
424
-
* even if HuC loading is off.
425
-
*/
426
-
delayed_huc_load_fini(huc);
427
-
428
417
if (huc->heci_pkt)
429
418
i915_vma_unpin_and_release(&huc->heci_pkt, 0);
430
419
+1
drivers/gpu/drm/i915/gt/uc/intel_huc.h
+1
drivers/gpu/drm/i915/gt/uc/intel_huc.h
···
55
55
56
56
int intel_huc_sanitize(struct intel_huc *huc);
57
57
void intel_huc_init_early(struct intel_huc *huc);
58
+
void intel_huc_fini_late(struct intel_huc *huc);
58
59
int intel_huc_init(struct intel_huc *huc);
59
60
void intel_huc_fini(struct intel_huc *huc);
60
61
int intel_huc_auth(struct intel_huc *huc, enum intel_huc_authentication_type type);
+1
drivers/gpu/drm/i915/gt/uc/intel_uc.c
+1
drivers/gpu/drm/i915/gt/uc/intel_uc.c
+4
-3
drivers/gpu/drm/i915/gvt/opregion.c
+4
-3
drivers/gpu/drm/i915/gvt/opregion.c
···
222
222
u8 *buf;
223
223
struct opregion_header *header;
224
224
struct vbt v;
225
-
const char opregion_signature[16] = OPREGION_SIGNATURE;
226
225
227
226
gvt_dbg_core("init vgpu%d opregion\n", vgpu->id);
228
227
vgpu_opregion(vgpu)->va = (void *)__get_free_pages(GFP_KERNEL |
···
235
236
/* emulated opregion with VBT mailbox only */
236
237
buf = (u8 *)vgpu_opregion(vgpu)->va;
237
238
header = (struct opregion_header *)buf;
238
-
memcpy(header->signature, opregion_signature,
239
-
sizeof(opregion_signature));
239
+
240
+
static_assert(sizeof(header->signature) == sizeof(OPREGION_SIGNATURE) - 1);
241
+
memcpy(header->signature, OPREGION_SIGNATURE, sizeof(header->signature));
242
+
240
243
header->size = 0x8;
241
244
header->opregion_ver = 0x02000000;
242
245
header->mboxes = MBOX_VBT;
+1
drivers/gpu/drm/i915/i915_drv.h
+1
drivers/gpu/drm/i915/i915_drv.h
+18
drivers/gpu/drm/i915/selftests/i915_selftest.c
+18
drivers/gpu/drm/i915/selftests/i915_selftest.c
···
23
23
24
24
#include <linux/random.h>
25
25
26
+
#include "gt/intel_gt.h"
26
27
#include "gt/intel_gt_pm.h"
28
+
#include "gt/intel_gt_regs.h"
27
29
#include "gt/uc/intel_gsc_fw.h"
28
30
29
31
#include "i915_driver.h"
···
255
253
int i915_live_selftests(struct pci_dev *pdev)
256
254
{
257
255
struct drm_i915_private *i915 = pdev_to_i915(pdev);
256
+
struct intel_uncore *uncore = &i915->uncore;
258
257
int err;
258
+
u32 pg_enable;
259
+
intel_wakeref_t wakeref;
259
260
260
261
if (!i915_selftest.live)
261
262
return 0;
263
+
264
+
/*
265
+
* FIXME Disable render powergating, this is temporary wa and should be removed
266
+
* after fixing real cause of forcewake timeouts.
267
+
*/
268
+
with_intel_runtime_pm(uncore->rpm, wakeref) {
269
+
if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 00), IP_VER(12, 74))) {
270
+
pg_enable = intel_uncore_read(uncore, GEN9_PG_ENABLE);
271
+
if (pg_enable & GEN9_RENDER_PG_ENABLE)
272
+
intel_uncore_write_fw(uncore, GEN9_PG_ENABLE,
273
+
pg_enable & ~GEN9_RENDER_PG_ENABLE);
274
+
}
275
+
}
262
276
263
277
__wait_gsc_proxy_completed(i915);
264
278
__wait_gsc_huc_load_completed(i915);
+4
drivers/gpu/drm/i915/soc/intel_dram.c
+4
drivers/gpu/drm/i915/soc/intel_dram.c
+20
-7
drivers/gpu/drm/imagination/pvr_fw.c
+20
-7
drivers/gpu/drm/imagination/pvr_fw.c
···
732
732
fw_mem->core_data, fw_mem->core_code_alloc_size);
733
733
734
734
if (err)
735
-
goto err_free_fw_core_data_obj;
735
+
goto err_free_kdata;
736
736
737
737
memcpy(fw_code_ptr, fw_mem->code, fw_mem->code_alloc_size);
738
738
memcpy(fw_data_ptr, fw_mem->data, fw_mem->data_alloc_size);
···
742
742
memcpy(fw_core_data_ptr, fw_mem->core_data, fw_mem->core_data_alloc_size);
743
743
744
744
/* We're finished with the firmware section memory on the CPU, unmap. */
745
-
if (fw_core_data_ptr)
745
+
if (fw_core_data_ptr) {
746
746
pvr_fw_object_vunmap(fw_mem->core_data_obj);
747
-
if (fw_core_code_ptr)
747
+
fw_core_data_ptr = NULL;
748
+
}
749
+
if (fw_core_code_ptr) {
748
750
pvr_fw_object_vunmap(fw_mem->core_code_obj);
751
+
fw_core_code_ptr = NULL;
752
+
}
749
753
pvr_fw_object_vunmap(fw_mem->data_obj);
750
754
fw_data_ptr = NULL;
751
755
pvr_fw_object_vunmap(fw_mem->code_obj);
···
757
753
758
754
err = pvr_fw_create_fwif_connection_ctl(pvr_dev);
759
755
if (err)
760
-
goto err_free_fw_core_data_obj;
756
+
goto err_free_kdata;
761
757
762
758
return 0;
763
759
···
767
763
kfree(fw_mem->data);
768
764
kfree(fw_mem->code);
769
765
770
-
err_free_fw_core_data_obj:
771
766
if (fw_core_data_ptr)
772
-
pvr_fw_object_unmap_and_destroy(fw_mem->core_data_obj);
767
+
pvr_fw_object_vunmap(fw_mem->core_data_obj);
768
+
if (fw_mem->core_data_obj)
769
+
pvr_fw_object_destroy(fw_mem->core_data_obj);
773
770
774
771
err_free_fw_core_code_obj:
775
772
if (fw_core_code_ptr)
776
-
pvr_fw_object_unmap_and_destroy(fw_mem->core_code_obj);
773
+
pvr_fw_object_vunmap(fw_mem->core_code_obj);
774
+
if (fw_mem->core_code_obj)
775
+
pvr_fw_object_destroy(fw_mem->core_code_obj);
777
776
778
777
err_free_fw_data_obj:
779
778
if (fw_data_ptr)
···
843
836
struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem;
844
837
845
838
pvr_fw_fini_fwif_connection_ctl(pvr_dev);
839
+
840
+
kfree(fw_mem->core_data);
841
+
kfree(fw_mem->core_code);
842
+
kfree(fw_mem->data);
843
+
kfree(fw_mem->code);
844
+
846
845
if (fw_mem->core_code_obj)
847
846
pvr_fw_object_destroy(fw_mem->core_code_obj);
848
847
if (fw_mem->core_data_obj)
+7
drivers/gpu/drm/imagination/pvr_job.c
+7
drivers/gpu/drm/imagination/pvr_job.c
···
671
671
geom_job->paired_job = frag_job;
672
672
frag_job->paired_job = geom_job;
673
673
674
+
/* The geometry job pvr_job structure is used when the fragment
675
+
* job is being prepared by the GPU scheduler. Have the fragment
676
+
* job hold a reference on the geometry job to prevent it being
677
+
* freed until the fragment job has finished with it.
678
+
*/
679
+
pvr_job_get(geom_job);
680
+
674
681
/* Skip the fragment job we just paired to the geometry job. */
675
682
i++;
676
683
}
+4
drivers/gpu/drm/imagination/pvr_queue.c
+4
drivers/gpu/drm/imagination/pvr_queue.c
···
866
866
struct pvr_job *job = container_of(sched_job, struct pvr_job, base);
867
867
868
868
drm_sched_job_cleanup(sched_job);
869
+
870
+
if (job->type == DRM_PVR_JOB_TYPE_FRAGMENT && job->paired_job)
871
+
pvr_job_put(job->paired_job);
872
+
869
873
job->paired_job = NULL;
870
874
pvr_job_put(job);
871
875
}
+3
drivers/gpu/drm/nouveau/nouveau_bo.c
+3
drivers/gpu/drm/nouveau/nouveau_bo.c
···
144
144
nouveau_bo_del_io_reserve_lru(bo);
145
145
nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
146
146
147
+
if (bo->base.import_attach)
148
+
drm_prime_gem_destroy(&bo->base, bo->sg);
149
+
147
150
/*
148
151
* If nouveau_bo_new() allocated this buffer, the GEM object was never
149
152
* initialized, so don't attempt to release it.
-3
drivers/gpu/drm/nouveau/nouveau_gem.c
-3
drivers/gpu/drm/nouveau/nouveau_gem.c
+3
-20
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
+3
-20
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
···
94
94
struct gpio_desc *enable_gpio;
95
95
struct delayed_work hpd_work;
96
96
int port_id;
97
+
const struct rockchip_hdmi_qp_ctrl_ops *ctrl_ops;
97
98
};
98
99
99
100
struct rockchip_hdmi_qp_ctrl_ops {
···
462
461
return -ENODEV;
463
462
}
464
463
464
+
hdmi->ctrl_ops = cfg->ctrl_ops;
465
465
hdmi->dev = &pdev->dev;
466
466
hdmi->port_id = -ENODEV;
467
467
···
602
600
static int __maybe_unused dw_hdmi_qp_rockchip_resume(struct device *dev)
603
601
{
604
602
struct rockchip_hdmi_qp *hdmi = dev_get_drvdata(dev);
605
-
u32 val;
606
603
607
-
val = HIWORD_UPDATE(RK3588_SCLIN_MASK, RK3588_SCLIN_MASK) |
608
-
HIWORD_UPDATE(RK3588_SDAIN_MASK, RK3588_SDAIN_MASK) |
609
-
HIWORD_UPDATE(RK3588_MODE_MASK, RK3588_MODE_MASK) |
610
-
HIWORD_UPDATE(RK3588_I2S_SEL_MASK, RK3588_I2S_SEL_MASK);
611
-
regmap_write(hdmi->vo_regmap,
612
-
hdmi->port_id ? RK3588_GRF_VO1_CON6 : RK3588_GRF_VO1_CON3,
613
-
val);
614
-
615
-
val = HIWORD_UPDATE(RK3588_SET_HPD_PATH_MASK,
616
-
RK3588_SET_HPD_PATH_MASK);
617
-
regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON7, val);
618
-
619
-
if (hdmi->port_id)
620
-
val = HIWORD_UPDATE(RK3588_HDMI1_GRANT_SEL,
621
-
RK3588_HDMI1_GRANT_SEL);
622
-
else
623
-
val = HIWORD_UPDATE(RK3588_HDMI0_GRANT_SEL,
624
-
RK3588_HDMI0_GRANT_SEL);
625
-
regmap_write(hdmi->vo_regmap, RK3588_GRF_VO1_CON9, val);
604
+
hdmi->ctrl_ops->io_init(hdmi);
626
605
627
606
dw_hdmi_qp_resume(dev, hdmi->hdmi);
628
607
+3
-3
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+3
-3
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
···
1754
1754
dip |= FIELD_PREP(RK3588_DSP_IF_POL__DP0_PIN_POL, polflags);
1755
1755
break;
1756
1756
case ROCKCHIP_VOP2_EP_DP1:
1757
-
die &= ~RK3588_SYS_DSP_INFACE_EN_MIPI1_MUX;
1758
-
die |= RK3588_SYS_DSP_INFACE_EN_MIPI1 |
1759
-
FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_MIPI1_MUX, vp->id);
1757
+
die &= ~RK3588_SYS_DSP_INFACE_EN_DP1_MUX;
1758
+
die |= RK3588_SYS_DSP_INFACE_EN_DP1 |
1759
+
FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_DP1_MUX, vp->id);
1760
1760
dip &= ~RK3588_DSP_IF_POL__DP1_PIN_POL;
1761
1761
dip |= FIELD_PREP(RK3588_DSP_IF_POL__DP1_PIN_POL, polflags);
1762
1762
break;
-2
drivers/gpu/drm/sti/Makefile
-2
drivers/gpu/drm/sti/Makefile
+8
-1
drivers/gpu/drm/tests/drm_client_modeset_test.c
+8
-1
drivers/gpu/drm/tests/drm_client_modeset_test.c
···
95
95
expected_mode = drm_mode_find_dmt(priv->drm, 1920, 1080, 60, false);
96
96
KUNIT_ASSERT_NOT_NULL(test, expected_mode);
97
97
98
+
ret = drm_kunit_add_mode_destroy_action(test, expected_mode);
99
+
KUNIT_ASSERT_EQ(test, ret, 0);
100
+
98
101
KUNIT_ASSERT_TRUE(test,
99
102
drm_mode_parse_command_line_for_connector(cmdline,
100
103
connector,
···
132
129
struct drm_device *drm = priv->drm;
133
130
struct drm_connector *connector = &priv->connector;
134
131
struct drm_cmdline_mode *cmdline_mode = &connector->cmdline_mode;
135
-
const struct drm_display_mode *expected_mode, *mode;
132
+
const struct drm_display_mode *mode;
133
+
struct drm_display_mode *expected_mode;
136
134
const char *cmdline = params->cmdline;
137
135
int ret;
138
136
···
152
148
153
149
expected_mode = params->func(drm);
154
150
KUNIT_ASSERT_NOT_NULL(test, expected_mode);
151
+
152
+
ret = drm_kunit_add_mode_destroy_action(test, expected_mode);
153
+
KUNIT_ASSERT_EQ(test, ret, 0);
155
154
156
155
KUNIT_EXPECT_TRUE(test, drm_mode_equal(expected_mode, mode));
157
156
}
+9
-1
drivers/gpu/drm/tests/drm_cmdline_parser_test.c
+9
-1
drivers/gpu/drm/tests/drm_cmdline_parser_test.c
···
7
7
#include <kunit/test.h>
8
8
9
9
#include <drm/drm_connector.h>
10
+
#include <drm/drm_kunit_helpers.h>
10
11
#include <drm/drm_modes.h>
11
12
12
13
static const struct drm_connector no_connector = {};
···
956
955
static void drm_test_cmdline_tv_options(struct kunit *test)
957
956
{
958
957
const struct drm_cmdline_tv_option_test *params = test->param_value;
959
-
const struct drm_display_mode *expected_mode = params->mode_fn(NULL);
958
+
struct drm_display_mode *expected_mode;
960
959
struct drm_cmdline_mode mode = { };
960
+
int ret;
961
+
962
+
expected_mode = params->mode_fn(NULL);
963
+
KUNIT_ASSERT_NOT_NULL(test, expected_mode);
964
+
965
+
ret = drm_kunit_add_mode_destroy_action(test, expected_mode);
966
+
KUNIT_ASSERT_EQ(test, ret, 0);
961
967
962
968
KUNIT_EXPECT_TRUE(test, drm_mode_parse_command_line_for_connector(params->cmdline,
963
969
&no_connector, &mode));
+22
drivers/gpu/drm/tests/drm_kunit_helpers.c
+22
drivers/gpu/drm/tests/drm_kunit_helpers.c
···
279
279
}
280
280
281
281
/**
282
+
* drm_kunit_add_mode_destroy_action() - Add a drm_destroy_mode kunit action
283
+
* @test: The test context object
284
+
* @mode: The drm_display_mode to destroy eventually
285
+
*
286
+
* Registers a kunit action that will destroy the drm_display_mode at
287
+
* the end of the test.
288
+
*
289
+
* If an error occurs, the drm_display_mode will be destroyed.
290
+
*
291
+
* Returns:
292
+
* 0 on success, an error code otherwise.
293
+
*/
294
+
int drm_kunit_add_mode_destroy_action(struct kunit *test,
295
+
struct drm_display_mode *mode)
296
+
{
297
+
return kunit_add_action_or_reset(test,
298
+
kunit_action_drm_mode_destroy,
299
+
mode);
300
+
}
301
+
EXPORT_SYMBOL_GPL(drm_kunit_add_mode_destroy_action);
302
+
303
+
/**
282
304
* drm_kunit_display_mode_from_cea_vic() - return a mode for CEA VIC for a KUnit test
283
305
* @test: The test context object
284
306
* @dev: DRM device
+26
drivers/gpu/drm/tests/drm_modes_test.c
+26
drivers/gpu/drm/tests/drm_modes_test.c
···
40
40
{
41
41
struct drm_test_modes_priv *priv = test->priv;
42
42
struct drm_display_mode *mode;
43
+
int ret;
43
44
44
45
mode = drm_analog_tv_mode(priv->drm,
45
46
DRM_MODE_TV_MODE_NTSC,
46
47
13500 * HZ_PER_KHZ, 720, 480,
47
48
true);
48
49
KUNIT_ASSERT_NOT_NULL(test, mode);
50
+
51
+
ret = drm_kunit_add_mode_destroy_action(test, mode);
52
+
KUNIT_ASSERT_EQ(test, ret, 0);
49
53
50
54
KUNIT_EXPECT_EQ(test, drm_mode_vrefresh(mode), 60);
51
55
KUNIT_EXPECT_EQ(test, mode->hdisplay, 720);
···
74
70
{
75
71
struct drm_test_modes_priv *priv = test->priv;
76
72
struct drm_display_mode *expected, *mode;
73
+
int ret;
77
74
78
75
expected = drm_analog_tv_mode(priv->drm,
79
76
DRM_MODE_TV_MODE_NTSC,
···
82
77
true);
83
78
KUNIT_ASSERT_NOT_NULL(test, expected);
84
79
80
+
ret = drm_kunit_add_mode_destroy_action(test, expected);
81
+
KUNIT_ASSERT_EQ(test, ret, 0);
82
+
85
83
mode = drm_mode_analog_ntsc_480i(priv->drm);
86
84
KUNIT_ASSERT_NOT_NULL(test, mode);
85
+
86
+
ret = drm_kunit_add_mode_destroy_action(test, mode);
87
+
KUNIT_ASSERT_EQ(test, ret, 0);
87
88
88
89
KUNIT_EXPECT_TRUE(test, drm_mode_equal(expected, mode));
89
90
}
···
98
87
{
99
88
struct drm_test_modes_priv *priv = test->priv;
100
89
struct drm_display_mode *mode;
90
+
int ret;
101
91
102
92
mode = drm_analog_tv_mode(priv->drm,
103
93
DRM_MODE_TV_MODE_PAL,
104
94
13500 * HZ_PER_KHZ, 720, 576,
105
95
true);
106
96
KUNIT_ASSERT_NOT_NULL(test, mode);
97
+
98
+
ret = drm_kunit_add_mode_destroy_action(test, mode);
99
+
KUNIT_ASSERT_EQ(test, ret, 0);
107
100
108
101
KUNIT_EXPECT_EQ(test, drm_mode_vrefresh(mode), 50);
109
102
KUNIT_EXPECT_EQ(test, mode->hdisplay, 720);
···
132
117
{
133
118
struct drm_test_modes_priv *priv = test->priv;
134
119
struct drm_display_mode *expected, *mode;
120
+
int ret;
135
121
136
122
expected = drm_analog_tv_mode(priv->drm,
137
123
DRM_MODE_TV_MODE_PAL,
···
140
124
true);
141
125
KUNIT_ASSERT_NOT_NULL(test, expected);
142
126
127
+
ret = drm_kunit_add_mode_destroy_action(test, expected);
128
+
KUNIT_ASSERT_EQ(test, ret, 0);
129
+
143
130
mode = drm_mode_analog_pal_576i(priv->drm);
144
131
KUNIT_ASSERT_NOT_NULL(test, mode);
132
+
133
+
ret = drm_kunit_add_mode_destroy_action(test, mode);
134
+
KUNIT_ASSERT_EQ(test, ret, 0);
145
135
146
136
KUNIT_EXPECT_TRUE(test, drm_mode_equal(expected, mode));
147
137
}
···
156
134
{
157
135
struct drm_test_modes_priv *priv = test->priv;
158
136
struct drm_display_mode *mode;
137
+
int ret;
159
138
160
139
mode = drm_analog_tv_mode(priv->drm,
161
140
DRM_MODE_TV_MODE_MONOCHROME,
162
141
13500 * HZ_PER_KHZ, 720, 576,
163
142
true);
164
143
KUNIT_ASSERT_NOT_NULL(test, mode);
144
+
145
+
ret = drm_kunit_add_mode_destroy_action(test, mode);
146
+
KUNIT_ASSERT_EQ(test, ret, 0);
165
147
166
148
KUNIT_EXPECT_EQ(test, drm_mode_vrefresh(mode), 50);
167
149
KUNIT_EXPECT_EQ(test, mode->hdisplay, 720);
+7
-1
drivers/gpu/drm/tests/drm_probe_helper_test.c
+7
-1
drivers/gpu/drm/tests/drm_probe_helper_test.c
···
98
98
struct drm_connector *connector = &priv->connector;
99
99
struct drm_cmdline_mode *cmdline = &connector->cmdline_mode;
100
100
struct drm_display_mode *mode;
101
-
const struct drm_display_mode *expected;
101
+
struct drm_display_mode *expected;
102
102
size_t len;
103
103
int ret;
104
104
···
134
134
135
135
KUNIT_EXPECT_TRUE(test, drm_mode_equal(mode, expected));
136
136
KUNIT_EXPECT_TRUE(test, mode->type & DRM_MODE_TYPE_PREFERRED);
137
+
138
+
ret = drm_kunit_add_mode_destroy_action(test, expected);
139
+
KUNIT_ASSERT_EQ(test, ret, 0);
137
140
}
138
141
139
142
if (params->num_expected_modes >= 2) {
···
148
145
149
146
KUNIT_EXPECT_TRUE(test, drm_mode_equal(mode, expected));
150
147
KUNIT_EXPECT_FALSE(test, mode->type & DRM_MODE_TYPE_PREFERRED);
148
+
149
+
ret = drm_kunit_add_mode_destroy_action(test, expected);
150
+
KUNIT_ASSERT_EQ(test, ret, 0);
151
151
}
152
152
153
153
mutex_unlock(&priv->drm->mode_config.mutex);
+6
-5
drivers/gpu/drm/virtio/virtgpu_gem.c
+6
-5
drivers/gpu/drm/virtio/virtgpu_gem.c
···
115
115
if (!vgdev->has_context_init)
116
116
virtio_gpu_create_context(obj->dev, file);
117
117
118
-
objs = virtio_gpu_array_alloc(1);
119
-
if (!objs)
120
-
return -ENOMEM;
121
-
virtio_gpu_array_add_obj(objs, obj);
118
+
if (vfpriv->context_created) {
119
+
objs = virtio_gpu_array_alloc(1);
120
+
if (!objs)
121
+
return -ENOMEM;
122
+
virtio_gpu_array_add_obj(objs, obj);
122
123
123
-
if (vfpriv->ctx_id)
124
124
virtio_gpu_cmd_context_attach_resource(vgdev, vfpriv->ctx_id, objs);
125
+
}
125
126
126
127
out_notify:
127
128
virtio_gpu_notify(vgdev);
+14
-6
drivers/gpu/drm/virtio/virtgpu_plane.c
+14
-6
drivers/gpu/drm/virtio/virtgpu_plane.c
···
366
366
return 0;
367
367
368
368
obj = new_state->fb->obj[0];
369
-
if (obj->import_attach) {
370
-
ret = virtio_gpu_prepare_imported_obj(plane, new_state, obj);
371
-
if (ret)
372
-
return ret;
373
-
}
374
-
375
369
if (bo->dumb || obj->import_attach) {
376
370
vgplane_st->fence = virtio_gpu_fence_alloc(vgdev,
377
371
vgdev->fence_drv.context,
···
374
380
return -ENOMEM;
375
381
}
376
382
383
+
if (obj->import_attach) {
384
+
ret = virtio_gpu_prepare_imported_obj(plane, new_state, obj);
385
+
if (ret)
386
+
goto err_fence;
387
+
}
388
+
377
389
return 0;
390
+
391
+
err_fence:
392
+
if (vgplane_st->fence) {
393
+
dma_fence_put(&vgplane_st->fence->f);
394
+
vgplane_st->fence = NULL;
395
+
}
396
+
397
+
return ret;
378
398
}
379
399
380
400
static void virtio_gpu_cleanup_imported_obj(struct drm_gem_object *obj)
+1
drivers/gpu/drm/virtio/virtgpu_prime.c
+1
drivers/gpu/drm/virtio/virtgpu_prime.c
+1
drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
+1
drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
···
41
41
42
42
#define GFX_OP_PIPE_CONTROL(len) ((0x3<<29)|(0x3<<27)|(0x2<<24)|((len)-2))
43
43
44
+
#define PIPE_CONTROL0_L3_READ_ONLY_CACHE_INVALIDATE BIT(10) /* gen12 */
44
45
#define PIPE_CONTROL0_HDC_PIPELINE_FLUSH BIT(9) /* gen12 */
45
46
46
47
#define PIPE_CONTROL_COMMAND_CACHE_INVALIDATE (1<<29)
+1
drivers/gpu/drm/xe/xe_device_types.h
+1
drivers/gpu/drm/xe/xe_device_types.h
+10
-2
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
+10
-2
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
···
322
322
return 0;
323
323
}
324
324
325
+
/*
326
+
* Ensure that roundup_pow_of_two(length) doesn't overflow.
327
+
* Note that roundup_pow_of_two() operates on unsigned long,
328
+
* not on u64.
329
+
*/
330
+
#define MAX_RANGE_TLB_INVALIDATION_LENGTH (rounddown_pow_of_two(ULONG_MAX))
331
+
325
332
/**
326
333
* xe_gt_tlb_invalidation_range - Issue a TLB invalidation on this GT for an
327
334
* address range
···
353
346
struct xe_device *xe = gt_to_xe(gt);
354
347
#define MAX_TLB_INVALIDATION_LEN 7
355
348
u32 action[MAX_TLB_INVALIDATION_LEN];
349
+
u64 length = end - start;
356
350
int len = 0;
357
351
358
352
xe_gt_assert(gt, fence);
···
366
358
367
359
action[len++] = XE_GUC_ACTION_TLB_INVALIDATION;
368
360
action[len++] = 0; /* seqno, replaced in send_tlb_invalidation */
369
-
if (!xe->info.has_range_tlb_invalidation) {
361
+
if (!xe->info.has_range_tlb_invalidation ||
362
+
length > MAX_RANGE_TLB_INVALIDATION_LENGTH) {
370
363
action[len++] = MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL);
371
364
} else {
372
365
u64 orig_start = start;
373
-
u64 length = end - start;
374
366
u64 align;
375
367
376
368
if (length < SZ_4K)
+1
drivers/gpu/drm/xe/xe_guc_pc.c
+1
drivers/gpu/drm/xe/xe_guc_pc.c
+6
-6
drivers/gpu/drm/xe/xe_hw_engine.c
+6
-6
drivers/gpu/drm/xe/xe_hw_engine.c
···
389
389
blit_cctl_val,
390
390
XE_RTP_ACTION_FLAG(ENGINE_BASE)))
391
391
},
392
-
/* Use Fixed slice CCS mode */
393
-
{ XE_RTP_NAME("RCU_MODE_FIXED_SLICE_CCS_MODE"),
394
-
XE_RTP_RULES(FUNC(xe_hw_engine_match_fixed_cslice_mode)),
395
-
XE_RTP_ACTIONS(FIELD_SET(RCU_MODE, RCU_MODE_FIXED_SLICE_CCS_MODE,
396
-
RCU_MODE_FIXED_SLICE_CCS_MODE))
397
-
},
398
392
/* Disable WMTP if HW doesn't support it */
399
393
{ XE_RTP_NAME("DISABLE_WMTP_ON_UNSUPPORTED_HW"),
400
394
XE_RTP_RULES(FUNC(xe_rtp_cfeg_wmtp_disabled)),
···
454
460
XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, XE_RTP_END_VERSION_UNDEFINED)),
455
461
XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0), CS_PRIORITY_MEM_READ,
456
462
XE_RTP_ACTION_FLAG(ENGINE_BASE)))
463
+
},
464
+
/* Use Fixed slice CCS mode */
465
+
{ XE_RTP_NAME("RCU_MODE_FIXED_SLICE_CCS_MODE"),
466
+
XE_RTP_RULES(FUNC(xe_hw_engine_match_fixed_cslice_mode)),
467
+
XE_RTP_ACTIONS(FIELD_SET(RCU_MODE, RCU_MODE_FIXED_SLICE_CCS_MODE,
468
+
RCU_MODE_FIXED_SLICE_CCS_MODE))
457
469
},
458
470
};
459
471
+52
-56
drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c
+52
-56
drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c
···
32
32
return timeout >= min && timeout <= max;
33
33
}
34
34
35
-
static void kobj_xe_hw_engine_release(struct kobject *kobj)
35
+
static void xe_hw_engine_sysfs_kobj_release(struct kobject *kobj)
36
36
{
37
37
kfree(kobj);
38
38
}
39
39
40
+
static ssize_t xe_hw_engine_class_sysfs_attr_show(struct kobject *kobj,
41
+
struct attribute *attr,
42
+
char *buf)
43
+
{
44
+
struct xe_device *xe = kobj_to_xe(kobj);
45
+
struct kobj_attribute *kattr;
46
+
ssize_t ret = -EIO;
47
+
48
+
kattr = container_of(attr, struct kobj_attribute, attr);
49
+
if (kattr->show) {
50
+
xe_pm_runtime_get(xe);
51
+
ret = kattr->show(kobj, kattr, buf);
52
+
xe_pm_runtime_put(xe);
53
+
}
54
+
55
+
return ret;
56
+
}
57
+
58
+
static ssize_t xe_hw_engine_class_sysfs_attr_store(struct kobject *kobj,
59
+
struct attribute *attr,
60
+
const char *buf,
61
+
size_t count)
62
+
{
63
+
struct xe_device *xe = kobj_to_xe(kobj);
64
+
struct kobj_attribute *kattr;
65
+
ssize_t ret = -EIO;
66
+
67
+
kattr = container_of(attr, struct kobj_attribute, attr);
68
+
if (kattr->store) {
69
+
xe_pm_runtime_get(xe);
70
+
ret = kattr->store(kobj, kattr, buf, count);
71
+
xe_pm_runtime_put(xe);
72
+
}
73
+
74
+
return ret;
75
+
}
76
+
77
+
static const struct sysfs_ops xe_hw_engine_class_sysfs_ops = {
78
+
.show = xe_hw_engine_class_sysfs_attr_show,
79
+
.store = xe_hw_engine_class_sysfs_attr_store,
80
+
};
81
+
40
82
static const struct kobj_type kobj_xe_hw_engine_type = {
41
-
.release = kobj_xe_hw_engine_release,
42
-
.sysfs_ops = &kobj_sysfs_ops
83
+
.release = xe_hw_engine_sysfs_kobj_release,
84
+
.sysfs_ops = &xe_hw_engine_class_sysfs_ops,
85
+
};
86
+
87
+
static const struct kobj_type kobj_xe_hw_engine_type_def = {
88
+
.release = xe_hw_engine_sysfs_kobj_release,
89
+
.sysfs_ops = &kobj_sysfs_ops,
43
90
};
44
91
45
92
static ssize_t job_timeout_max_store(struct kobject *kobj,
···
590
543
if (!kobj)
591
544
return -ENOMEM;
592
545
593
-
kobject_init(kobj, &kobj_xe_hw_engine_type);
546
+
kobject_init(kobj, &kobj_xe_hw_engine_type_def);
594
547
err = kobject_add(kobj, parent, "%s", ".defaults");
595
548
if (err)
596
549
goto err_object;
···
606
559
return err;
607
560
}
608
561
609
-
static void xe_hw_engine_sysfs_kobj_release(struct kobject *kobj)
610
-
{
611
-
kfree(kobj);
612
-
}
613
-
614
-
static ssize_t xe_hw_engine_class_sysfs_attr_show(struct kobject *kobj,
615
-
struct attribute *attr,
616
-
char *buf)
617
-
{
618
-
struct xe_device *xe = kobj_to_xe(kobj);
619
-
struct kobj_attribute *kattr;
620
-
ssize_t ret = -EIO;
621
-
622
-
kattr = container_of(attr, struct kobj_attribute, attr);
623
-
if (kattr->show) {
624
-
xe_pm_runtime_get(xe);
625
-
ret = kattr->show(kobj, kattr, buf);
626
-
xe_pm_runtime_put(xe);
627
-
}
628
-
629
-
return ret;
630
-
}
631
-
632
-
static ssize_t xe_hw_engine_class_sysfs_attr_store(struct kobject *kobj,
633
-
struct attribute *attr,
634
-
const char *buf,
635
-
size_t count)
636
-
{
637
-
struct xe_device *xe = kobj_to_xe(kobj);
638
-
struct kobj_attribute *kattr;
639
-
ssize_t ret = -EIO;
640
-
641
-
kattr = container_of(attr, struct kobj_attribute, attr);
642
-
if (kattr->store) {
643
-
xe_pm_runtime_get(xe);
644
-
ret = kattr->store(kobj, kattr, buf, count);
645
-
xe_pm_runtime_put(xe);
646
-
}
647
-
648
-
return ret;
649
-
}
650
-
651
-
static const struct sysfs_ops xe_hw_engine_class_sysfs_ops = {
652
-
.show = xe_hw_engine_class_sysfs_attr_show,
653
-
.store = xe_hw_engine_class_sysfs_attr_store,
654
-
};
655
-
656
-
static const struct kobj_type xe_hw_engine_sysfs_kobj_type = {
657
-
.release = xe_hw_engine_sysfs_kobj_release,
658
-
.sysfs_ops = &xe_hw_engine_class_sysfs_ops,
659
-
};
660
562
661
563
static void hw_engine_class_sysfs_fini(void *arg)
662
564
{
···
636
640
if (!kobj)
637
641
return -ENOMEM;
638
642
639
-
kobject_init(kobj, &xe_hw_engine_sysfs_kobj_type);
643
+
kobject_init(kobj, &kobj_xe_hw_engine_type);
640
644
641
645
err = kobject_add(kobj, gt->sysfs, "engines");
642
646
if (err)
+3
-3
drivers/gpu/drm/xe/xe_migrate.c
+3
-3
drivers/gpu/drm/xe/xe_migrate.c
···
1177
1177
err_sync:
1178
1178
/* Sync partial copies if any. FIXME: job_mutex? */
1179
1179
if (fence) {
1180
-
dma_fence_wait(m->fence, false);
1180
+
dma_fence_wait(fence, false);
1181
1181
dma_fence_put(fence);
1182
1182
}
1183
1183
···
1547
1547
static u32 pte_update_cmd_size(u64 size)
1548
1548
{
1549
1549
u32 num_dword;
1550
-
u64 entries = DIV_ROUND_UP(size, XE_PAGE_SIZE);
1550
+
u64 entries = DIV_U64_ROUND_UP(size, XE_PAGE_SIZE);
1551
1551
1552
1552
XE_WARN_ON(size > MAX_PREEMPTDISABLE_TRANSFER);
1553
1553
/*
···
1558
1558
* 2 dword for the page table's physical location
1559
1559
* 2*n dword for value of pte to fill (each pte entry is 2 dwords)
1560
1560
*/
1561
-
num_dword = (1 + 2) * DIV_ROUND_UP(entries, 0x1ff);
1561
+
num_dword = (1 + 2) * DIV_U64_ROUND_UP(entries, 0x1ff);
1562
1562
num_dword += entries * 2;
1563
1563
1564
1564
return num_dword;
+9
-4
drivers/gpu/drm/xe/xe_ring_ops.c
+9
-4
drivers/gpu/drm/xe/xe_ring_ops.c
···
137
137
static int emit_pipe_invalidate(u32 mask_flags, bool invalidate_tlb, u32 *dw,
138
138
int i)
139
139
{
140
-
u32 flags = PIPE_CONTROL_CS_STALL |
140
+
u32 flags0 = 0;
141
+
u32 flags1 = PIPE_CONTROL_CS_STALL |
141
142
PIPE_CONTROL_COMMAND_CACHE_INVALIDATE |
142
143
PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE |
143
144
PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
···
149
148
PIPE_CONTROL_STORE_DATA_INDEX;
150
149
151
150
if (invalidate_tlb)
152
-
flags |= PIPE_CONTROL_TLB_INVALIDATE;
151
+
flags1 |= PIPE_CONTROL_TLB_INVALIDATE;
153
152
154
-
flags &= ~mask_flags;
153
+
flags1 &= ~mask_flags;
155
154
156
-
return emit_pipe_control(dw, i, 0, flags, LRC_PPHWSP_FLUSH_INVAL_SCRATCH_ADDR, 0);
155
+
if (flags1 & PIPE_CONTROL_VF_CACHE_INVALIDATE)
156
+
flags0 |= PIPE_CONTROL0_L3_READ_ONLY_CACHE_INVALIDATE;
157
+
158
+
return emit_pipe_control(dw, i, flags0, flags1,
159
+
LRC_PPHWSP_FLUSH_INVAL_SCRATCH_ADDR, 0);
157
160
}
158
161
159
162
static int emit_store_imm_ppgtt_posted(u64 addr, u64 value,
+5
-2
drivers/gpu/drm/xe/xe_svm.c
+5
-2
drivers/gpu/drm/xe/xe_svm.c
···
696
696
list_for_each_entry(block, blocks, link)
697
697
block->private = vr;
698
698
699
+
xe_bo_get(bo);
699
700
err = drm_gpusvm_migrate_to_devmem(&vm->svm.gpusvm, &range->base,
700
701
&bo->devmem_allocation, ctx);
701
-
xe_bo_unlock(bo);
702
702
if (err)
703
-
xe_bo_put(bo); /* Creation ref */
703
+
xe_svm_devmem_release(&bo->devmem_allocation);
704
+
705
+
xe_bo_unlock(bo);
706
+
xe_bo_put(bo);
704
707
705
708
unlock:
706
709
mmap_read_unlock(mm);
+2
drivers/gpu/drm/xe/xe_wa_oob.rules
+2
drivers/gpu/drm/xe/xe_wa_oob.rules
···
32
32
GRAPHICS_VERSION(3001)
33
33
14022293748 GRAPHICS_VERSION(2001)
34
34
GRAPHICS_VERSION(2004)
35
+
GRAPHICS_VERSION_RANGE(3000, 3001)
35
36
22019794406 GRAPHICS_VERSION(2001)
36
37
GRAPHICS_VERSION(2004)
38
+
GRAPHICS_VERSION_RANGE(3000, 3001)
37
39
22019338487 MEDIA_VERSION(2000)
38
40
GRAPHICS_VERSION(2001)
39
41
MEDIA_VERSION(3000), MEDIA_STEP(A0, B0), FUNC(xe_rtp_match_not_sriov_vf)
+3
-1
drivers/infiniband/core/cma.c
+3
-1
drivers/infiniband/core/cma.c
···
72
72
static void cma_iboe_set_mgid(struct sockaddr *addr, union ib_gid *mgid,
73
73
enum ib_gid_type gid_type);
74
74
75
+
static void cma_netevent_work_handler(struct work_struct *_work);
76
+
75
77
const char *__attribute_const__ rdma_event_msg(enum rdma_cm_event_type event)
76
78
{
77
79
size_t index = event;
···
1049
1047
get_random_bytes(&id_priv->seq_num, sizeof id_priv->seq_num);
1050
1048
id_priv->id.route.addr.dev_addr.net = get_net(net);
1051
1049
id_priv->seq_num &= 0x00ffffff;
1050
+
INIT_WORK(&id_priv->id.net_work, cma_netevent_work_handler);
1052
1051
1053
1052
rdma_restrack_new(&id_priv->res, RDMA_RESTRACK_CM_ID);
1054
1053
if (parent)
···
5244
5241
if (!memcmp(current_id->id.route.addr.dev_addr.dst_dev_addr,
5245
5242
neigh->ha, ETH_ALEN))
5246
5243
continue;
5247
-
INIT_WORK(¤t_id->id.net_work, cma_netevent_work_handler);
5248
5244
cma_id_get(current_id);
5249
5245
queue_work(cma_wq, ¤t_id->id.net_work);
5250
5246
}
+1
-1
drivers/infiniband/core/ucaps.c
+1
-1
drivers/infiniband/core/ucaps.c
···
170
170
ucap->dev.class = &ucaps_class;
171
171
ucap->dev.devt = MKDEV(MAJOR(ucaps_base_dev), type);
172
172
ucap->dev.release = ucap_dev_release;
173
-
ret = dev_set_name(&ucap->dev, ucap_names[type]);
173
+
ret = dev_set_name(&ucap->dev, "%s", ucap_names[type]);
174
174
if (ret)
175
175
goto err_device;
176
176
+4
-2
drivers/infiniband/core/umem_odp.c
+4
-2
drivers/infiniband/core/umem_odp.c
···
76
76
77
77
npfns = (end - start) >> PAGE_SHIFT;
78
78
umem_odp->pfn_list = kvcalloc(
79
-
npfns, sizeof(*umem_odp->pfn_list), GFP_KERNEL);
79
+
npfns, sizeof(*umem_odp->pfn_list),
80
+
GFP_KERNEL | __GFP_NOWARN);
80
81
if (!umem_odp->pfn_list)
81
82
return -ENOMEM;
82
83
83
84
umem_odp->dma_list = kvcalloc(
84
-
ndmas, sizeof(*umem_odp->dma_list), GFP_KERNEL);
85
+
ndmas, sizeof(*umem_odp->dma_list),
86
+
GFP_KERNEL | __GFP_NOWARN);
85
87
if (!umem_odp->dma_list) {
86
88
ret = -ENOMEM;
87
89
goto out_pfn_list;
-10
drivers/infiniband/hw/bnxt_re/ib_verbs.c
-10
drivers/infiniband/hw/bnxt_re/ib_verbs.c
···
1774
1774
ib_srq);
1775
1775
struct bnxt_re_dev *rdev = srq->rdev;
1776
1776
struct bnxt_qplib_srq *qplib_srq = &srq->qplib_srq;
1777
-
struct bnxt_qplib_nq *nq = NULL;
1778
1777
1779
-
if (qplib_srq->cq)
1780
-
nq = qplib_srq->cq->nq;
1781
1778
if (rdev->chip_ctx->modes.toggle_bits & BNXT_QPLIB_SRQ_TOGGLE_BIT) {
1782
1779
free_page((unsigned long)srq->uctx_srq_page);
1783
1780
hash_del(&srq->hash_entry);
···
1782
1785
bnxt_qplib_destroy_srq(&rdev->qplib_res, qplib_srq);
1783
1786
ib_umem_release(srq->umem);
1784
1787
atomic_dec(&rdev->stats.res.srq_count);
1785
-
if (nq)
1786
-
nq->budget--;
1787
1788
return 0;
1788
1789
}
1789
1790
···
1822
1827
struct ib_udata *udata)
1823
1828
{
1824
1829
struct bnxt_qplib_dev_attr *dev_attr;
1825
-
struct bnxt_qplib_nq *nq = NULL;
1826
1830
struct bnxt_re_ucontext *uctx;
1827
1831
struct bnxt_re_dev *rdev;
1828
1832
struct bnxt_re_srq *srq;
···
1867
1873
srq->qplib_srq.eventq_hw_ring_id = rdev->nqr->nq[0].ring_id;
1868
1874
srq->qplib_srq.sg_info.pgsize = PAGE_SIZE;
1869
1875
srq->qplib_srq.sg_info.pgshft = PAGE_SHIFT;
1870
-
nq = &rdev->nqr->nq[0];
1871
1876
1872
1877
if (udata) {
1873
1878
rc = bnxt_re_init_user_srq(rdev, pd, srq, udata);
···
1901
1908
goto fail;
1902
1909
}
1903
1910
}
1904
-
if (nq)
1905
-
nq->budget++;
1906
1911
active_srqs = atomic_inc_return(&rdev->stats.res.srq_count);
1907
1912
if (active_srqs > rdev->stats.res.srq_watermark)
1908
1913
rdev->stats.res.srq_watermark = active_srqs;
···
3070
3079
ib_umem_release(cq->umem);
3071
3080
3072
3081
atomic_dec(&rdev->stats.res.cq_count);
3073
-
nq->budget--;
3074
3082
kfree(cq->cql);
3075
3083
return 0;
3076
3084
}
+1
-1
drivers/infiniband/hw/hns/hns_roce_main.c
+1
-1
drivers/infiniband/hw/hns/hns_roce_main.c
-2
drivers/infiniband/hw/mlx5/fs.c
-2
drivers/infiniband/hw/mlx5/fs.c
···
3461
3461
&UVERBS_METHOD(MLX5_IB_METHOD_STEERING_ANCHOR_DESTROY));
3462
3462
3463
3463
const struct uapi_definition mlx5_ib_flow_defs[] = {
3464
-
#if IS_ENABLED(CONFIG_INFINIBAND_USER_ACCESS)
3465
3464
UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3466
3465
MLX5_IB_OBJECT_FLOW_MATCHER),
3467
3466
UAPI_DEF_CHAIN_OBJ_TREE(
···
3471
3472
UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3472
3473
MLX5_IB_OBJECT_STEERING_ANCHOR,
3473
3474
UAPI_DEF_IS_OBJ_SUPPORTED(mlx5_ib_shared_ft_allowed)),
3474
-
#endif
3475
3475
{},
3476
3476
};
3477
3477
+7
-7
drivers/infiniband/hw/usnic/usnic_ib_main.c
+7
-7
drivers/infiniband/hw/usnic/usnic_ib_main.c
···
397
397
if (!us_ibdev) {
398
398
usnic_err("Device %s context alloc failed\n",
399
399
netdev_name(pci_get_drvdata(dev)));
400
-
return ERR_PTR(-EFAULT);
400
+
return NULL;
401
401
}
402
402
403
403
us_ibdev->ufdev = usnic_fwd_dev_alloc(dev);
···
517
517
}
518
518
519
519
us_ibdev = usnic_ib_device_add(parent_pci);
520
-
if (IS_ERR_OR_NULL(us_ibdev)) {
521
-
us_ibdev = us_ibdev ? us_ibdev : ERR_PTR(-EFAULT);
520
+
if (!us_ibdev) {
521
+
us_ibdev = ERR_PTR(-EFAULT);
522
522
goto out;
523
523
}
524
524
···
586
586
}
587
587
588
588
pf = usnic_ib_discover_pf(vf->vnic);
589
-
if (IS_ERR_OR_NULL(pf)) {
590
-
usnic_err("Failed to discover pf of vnic %s with err%ld\n",
591
-
pci_name(pdev), PTR_ERR(pf));
592
-
err = pf ? PTR_ERR(pf) : -EFAULT;
589
+
if (IS_ERR(pf)) {
590
+
err = PTR_ERR(pf);
591
+
usnic_err("Failed to discover pf of vnic %s with err%d\n",
592
+
pci_name(pdev), err);
593
593
goto out_clean_vnic;
594
594
}
595
595
+6
drivers/infiniband/sw/rxe/rxe_loc.h
+6
drivers/infiniband/sw/rxe/rxe_loc.h
···
140
140
return IB_MTU_4096;
141
141
}
142
142
143
+
static inline bool is_odp_mr(struct rxe_mr *mr)
144
+
{
145
+
return IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING) && mr->umem &&
146
+
mr->umem->is_odp;
147
+
}
148
+
143
149
void free_rd_atomic_resource(struct resp_res *res);
144
150
145
151
static inline void rxe_advance_resp_resource(struct rxe_qp *qp)
+2
-2
drivers/infiniband/sw/rxe/rxe_mr.c
+2
-2
drivers/infiniband/sw/rxe/rxe_mr.c
···
323
323
return err;
324
324
}
325
325
326
-
if (mr->umem->is_odp)
326
+
if (is_odp_mr(mr))
327
327
return rxe_odp_mr_copy(mr, iova, addr, length, dir);
328
328
else
329
329
return rxe_mr_copy_xarray(mr, iova, addr, length, dir);
···
536
536
u64 *va;
537
537
538
538
/* ODP is not supported right now. WIP. */
539
-
if (mr->umem->is_odp)
539
+
if (is_odp_mr(mr))
540
540
return RESPST_ERR_UNSUPPORTED_OPCODE;
541
541
542
542
/* See IBA oA19-28 */
+2
-2
drivers/infiniband/sw/rxe/rxe_resp.c
+2
-2
drivers/infiniband/sw/rxe/rxe_resp.c
···
650
650
struct resp_res *res = qp->resp.res;
651
651
652
652
/* ODP is not supported right now. WIP. */
653
-
if (mr->umem->is_odp)
653
+
if (is_odp_mr(mr))
654
654
return RESPST_ERR_UNSUPPORTED_OPCODE;
655
655
656
656
/* oA19-14, oA19-15 */
···
706
706
if (!res->replay) {
707
707
u64 iova = qp->resp.va + qp->resp.offset;
708
708
709
-
if (mr->umem->is_odp)
709
+
if (is_odp_mr(mr))
710
710
err = rxe_odp_atomic_op(mr, iova, pkt->opcode,
711
711
atmeth_comp(pkt),
712
712
atmeth_swap_add(pkt),
+5
-27
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
+5
-27
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
···
487
487
488
488
/* VCMDQ Resource Helpers */
489
489
490
-
static void tegra241_vcmdq_free_smmu_cmdq(struct tegra241_vcmdq *vcmdq)
491
-
{
492
-
struct arm_smmu_queue *q = &vcmdq->cmdq.q;
493
-
size_t nents = 1 << q->llq.max_n_shift;
494
-
size_t qsz = nents << CMDQ_ENT_SZ_SHIFT;
495
-
496
-
if (!q->base)
497
-
return;
498
-
dmam_free_coherent(vcmdq->cmdqv->smmu.dev, qsz, q->base, q->base_dma);
499
-
}
500
-
501
490
static int tegra241_vcmdq_alloc_smmu_cmdq(struct tegra241_vcmdq *vcmdq)
502
491
{
503
492
struct arm_smmu_device *smmu = &vcmdq->cmdqv->smmu;
···
549
560
struct tegra241_vcmdq *vcmdq = vintf->lvcmdqs[lidx];
550
561
char header[64];
551
562
552
-
tegra241_vcmdq_free_smmu_cmdq(vcmdq);
563
+
/* Note that the lvcmdq queue memory space is managed by devres */
564
+
553
565
tegra241_vintf_deinit_lvcmdq(vintf, lidx);
554
566
555
567
dev_dbg(vintf->cmdqv->dev,
···
758
768
759
769
vintf = kzalloc(sizeof(*vintf), GFP_KERNEL);
760
770
if (!vintf)
761
-
goto out_fallback;
771
+
return -ENOMEM;
762
772
763
773
/* Init VINTF0 for in-kernel use */
764
774
ret = tegra241_cmdqv_init_vintf(cmdqv, 0, vintf);
765
775
if (ret) {
766
776
dev_err(cmdqv->dev, "failed to init vintf0: %d\n", ret);
767
-
goto free_vintf;
777
+
return ret;
768
778
}
769
779
770
780
/* Preallocate logical VCMDQs to VINTF0 */
···
773
783
774
784
vcmdq = tegra241_vintf_alloc_lvcmdq(vintf, lidx);
775
785
if (IS_ERR(vcmdq))
776
-
goto free_lvcmdq;
786
+
return PTR_ERR(vcmdq);
777
787
}
778
788
779
789
/* Now, we are ready to run all the impl ops */
780
790
smmu->impl_ops = &tegra241_cmdqv_impl_ops;
781
-
return 0;
782
-
783
-
free_lvcmdq:
784
-
for (lidx--; lidx >= 0; lidx--)
785
-
tegra241_vintf_free_lvcmdq(vintf, lidx);
786
-
tegra241_cmdqv_deinit_vintf(cmdqv, vintf->idx);
787
-
free_vintf:
788
-
kfree(vintf);
789
-
out_fallback:
790
-
dev_info(smmu->impl_dev, "Falling back to standard SMMU CMDQ\n");
791
-
smmu->options &= ~ARM_SMMU_OPT_TEGRA241_CMDQV;
792
-
tegra241_cmdqv_remove(smmu);
793
791
return 0;
794
792
}
795
793
+2
-2
drivers/iommu/dma-iommu.c
+2
-2
drivers/iommu/dma-iommu.c
···
1754
1754
return PAGE_SIZE;
1755
1755
default:
1756
1756
BUG();
1757
-
};
1757
+
}
1758
1758
}
1759
1759
1760
1760
static struct list_head *cookie_msi_pages(const struct iommu_domain *domain)
···
1766
1766
return &domain->msi_cookie->msi_page_list;
1767
1767
default:
1768
1768
BUG();
1769
-
};
1769
+
}
1770
1770
}
1771
1771
1772
1772
static struct iommu_dma_msi_page *iommu_dma_get_msi_page(struct device *dev,
+2
-2
drivers/iommu/exynos-iommu.c
+2
-2
drivers/iommu/exynos-iommu.c
···
832
832
struct exynos_iommu_owner *owner = dev_iommu_priv_get(master);
833
833
834
834
mutex_lock(&owner->rpm_lock);
835
-
if (&data->domain->domain != &exynos_identity_domain) {
835
+
if (data->domain) {
836
836
dev_dbg(data->sysmmu, "saving state\n");
837
837
__sysmmu_disable(data);
838
838
}
···
850
850
struct exynos_iommu_owner *owner = dev_iommu_priv_get(master);
851
851
852
852
mutex_lock(&owner->rpm_lock);
853
-
if (&data->domain->domain != &exynos_identity_domain) {
853
+
if (data->domain) {
854
854
dev_dbg(data->sysmmu, "restoring state\n");
855
855
__sysmmu_enable(data);
856
856
}
-1
drivers/iommu/intel/iommu.c
-1
drivers/iommu/intel/iommu.c
+15
-14
drivers/iommu/intel/irq_remapping.c
+15
-14
drivers/iommu/intel/irq_remapping.c
···
1287
1287
};
1288
1288
1289
1289
/*
1290
-
* With posted MSIs, all vectors are multiplexed into a single notification
1291
-
* vector. Devices MSIs are then dispatched in a demux loop where
1292
-
* EOIs can be coalesced as well.
1290
+
* With posted MSIs, the MSI vectors are multiplexed into a single notification
1291
+
* vector, and only the notification vector is sent to the APIC IRR. Device
1292
+
* MSIs are then dispatched in a demux loop that harvests the MSIs from the
1293
+
* CPU's Posted Interrupt Request bitmap. I.e. Posted MSIs never get sent to
1294
+
* the APIC IRR, and thus do not need an EOI. The notification handler instead
1295
+
* performs a single EOI after processing the PIR.
1293
1296
*
1294
-
* "INTEL-IR-POST" IRQ chip does not do EOI on ACK, thus the dummy irq_ack()
1295
-
* function. Instead EOI is performed by the posted interrupt notification
1296
-
* handler.
1297
+
* Note! Pending SMP/CPU affinity changes, which are per MSI, must still be
1298
+
* honored, only the APIC EOI is omitted.
1297
1299
*
1298
1300
* For the example below, 3 MSIs are coalesced into one CPU notification. Only
1299
-
* one apic_eoi() is needed.
1301
+
* one apic_eoi() is needed, but each MSI needs to process pending changes to
1302
+
* its CPU affinity.
1300
1303
*
1301
1304
* __sysvec_posted_msi_notification()
1302
1305
* irq_enter();
1303
1306
* handle_edge_irq()
1304
1307
* irq_chip_ack_parent()
1305
-
* dummy(); // No EOI
1308
+
* irq_move_irq(); // No EOI
1306
1309
* handle_irq_event()
1307
1310
* driver_handler()
1308
1311
* handle_edge_irq()
1309
1312
* irq_chip_ack_parent()
1310
-
* dummy(); // No EOI
1313
+
* irq_move_irq(); // No EOI
1311
1314
* handle_irq_event()
1312
1315
* driver_handler()
1313
1316
* handle_edge_irq()
1314
1317
* irq_chip_ack_parent()
1315
-
* dummy(); // No EOI
1318
+
* irq_move_irq(); // No EOI
1316
1319
* handle_irq_event()
1317
1320
* driver_handler()
1318
1321
* apic_eoi()
1319
1322
* irq_exit()
1323
+
*
1320
1324
*/
1321
-
1322
-
static void dummy_ack(struct irq_data *d) { }
1323
-
1324
1325
static struct irq_chip intel_ir_chip_post_msi = {
1325
1326
.name = "INTEL-IR-POST",
1326
-
.irq_ack = dummy_ack,
1327
+
.irq_ack = irq_move_irq,
1327
1328
.irq_set_affinity = intel_ir_set_affinity,
1328
1329
.irq_compose_msi_msg = intel_ir_compose_msi_msg,
1329
1330
.irq_set_vcpu_affinity = intel_ir_set_vcpu_affinity,
+5
-1
drivers/iommu/iommu.c
+5
-1
drivers/iommu/iommu.c
···
538
538
dev->iommu_group = NULL;
539
539
module_put(ops->owner);
540
540
dev_iommu_free(dev);
541
+
#ifdef CONFIG_IOMMU_DMA
542
+
dev->dma_iommu = false;
543
+
#endif
541
544
}
542
545
543
546
static struct iommu_domain *pasid_array_entry_to_domain(void *entry)
···
2720
2717
* if upper layers showed interest and installed a fault handler,
2721
2718
* invoke it.
2722
2719
*/
2723
-
if (domain->handler)
2720
+
if (domain->cookie_type == IOMMU_COOKIE_FAULT_HANDLER &&
2721
+
domain->handler)
2724
2722
ret = domain->handler(domain, dev, iova, flags,
2725
2723
domain->handler_token);
2726
2724
+10
-17
drivers/iommu/ipmmu-vmsa.c
+10
-17
drivers/iommu/ipmmu-vmsa.c
···
1081
1081
}
1082
1082
}
1083
1083
1084
+
platform_set_drvdata(pdev, mmu);
1084
1085
/*
1085
1086
* Register the IPMMU to the IOMMU subsystem in the following cases:
1086
1087
* - R-Car Gen2 IPMMU (all devices registered)
1087
1088
* - R-Car Gen3 IPMMU (leaf devices only - skip root IPMMU-MM device)
1088
1089
*/
1089
-
if (!mmu->features->has_cache_leaf_nodes || !ipmmu_is_root(mmu)) {
1090
-
ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL,
1091
-
dev_name(&pdev->dev));
1092
-
if (ret)
1093
-
return ret;
1090
+
if (mmu->features->has_cache_leaf_nodes && ipmmu_is_root(mmu))
1091
+
return 0;
1094
1092
1095
-
ret = iommu_device_register(&mmu->iommu, &ipmmu_ops, &pdev->dev);
1096
-
if (ret)
1097
-
return ret;
1098
-
}
1093
+
ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL, dev_name(&pdev->dev));
1094
+
if (ret)
1095
+
return ret;
1099
1096
1100
-
/*
1101
-
* We can't create the ARM mapping here as it requires the bus to have
1102
-
* an IOMMU, which only happens when bus_set_iommu() is called in
1103
-
* ipmmu_init() after the probe function returns.
1104
-
*/
1097
+
ret = iommu_device_register(&mmu->iommu, &ipmmu_ops, &pdev->dev);
1098
+
if (ret)
1099
+
iommu_device_sysfs_remove(&mmu->iommu);
1105
1100
1106
-
platform_set_drvdata(pdev, mmu);
1107
-
1108
-
return 0;
1101
+
return ret;
1109
1102
}
1110
1103
1111
1104
static void ipmmu_remove(struct platform_device *pdev)
+13
-13
drivers/iommu/mtk_iommu.c
+13
-13
drivers/iommu/mtk_iommu.c
···
1372
1372
platform_set_drvdata(pdev, data);
1373
1373
mutex_init(&data->mutex);
1374
1374
1375
-
ret = iommu_device_sysfs_add(&data->iommu, dev, NULL,
1376
-
"mtk-iommu.%pa", &ioaddr);
1377
-
if (ret)
1378
-
goto out_link_remove;
1379
-
1380
-
ret = iommu_device_register(&data->iommu, &mtk_iommu_ops, dev);
1381
-
if (ret)
1382
-
goto out_sysfs_remove;
1383
-
1384
1375
if (MTK_IOMMU_HAS_FLAG(data->plat_data, SHARE_PGTABLE)) {
1385
1376
list_add_tail(&data->list, data->plat_data->hw_list);
1386
1377
data->hw_list = data->plat_data->hw_list;
···
1381
1390
data->hw_list = &data->hw_list_head;
1382
1391
}
1383
1392
1393
+
ret = iommu_device_sysfs_add(&data->iommu, dev, NULL,
1394
+
"mtk-iommu.%pa", &ioaddr);
1395
+
if (ret)
1396
+
goto out_list_del;
1397
+
1398
+
ret = iommu_device_register(&data->iommu, &mtk_iommu_ops, dev);
1399
+
if (ret)
1400
+
goto out_sysfs_remove;
1401
+
1384
1402
if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) {
1385
1403
ret = component_master_add_with_match(dev, &mtk_iommu_com_ops, match);
1386
1404
if (ret)
1387
-
goto out_list_del;
1405
+
goto out_device_unregister;
1388
1406
}
1389
1407
return ret;
1390
1408
1391
-
out_list_del:
1392
-
list_del(&data->list);
1409
+
out_device_unregister:
1393
1410
iommu_device_unregister(&data->iommu);
1394
1411
out_sysfs_remove:
1395
1412
iommu_device_sysfs_remove(&data->iommu);
1396
-
out_link_remove:
1413
+
out_list_del:
1414
+
list_del(&data->list);
1397
1415
if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM))
1398
1416
device_link_remove(data->smicomm_dev, dev);
1399
1417
out_runtime_disable:
+1
drivers/irqchip/irq-bcm2712-mip.c
+1
drivers/irqchip/irq-bcm2712-mip.c
···
163
163
static const struct msi_parent_ops mip_msi_parent_ops = {
164
164
.supported_flags = MIP_MSI_FLAGS_SUPPORTED,
165
165
.required_flags = MIP_MSI_FLAGS_REQUIRED,
166
+
.chip_flags = MSI_CHIP_FLAG_SET_EOI | MSI_CHIP_FLAG_SET_ACK,
166
167
.bus_select_token = DOMAIN_BUS_GENERIC_MSI,
167
168
.bus_select_mask = MATCH_PCI_MSI,
168
169
.prefix = "MIP-MSI-",
+1
drivers/irqchip/irq-sg2042-msi.c
+1
drivers/irqchip/irq-sg2042-msi.c
···
151
151
static const struct msi_parent_ops sg2042_msi_parent_ops = {
152
152
.required_flags = SG2042_MSI_FLAGS_REQUIRED,
153
153
.supported_flags = SG2042_MSI_FLAGS_SUPPORTED,
154
+
.chip_flags = MSI_CHIP_FLAG_SET_ACK,
154
155
.bus_select_mask = MATCH_PCI_MSI,
155
156
.bus_select_token = DOMAIN_BUS_NEXUS,
156
157
.prefix = "SG2042-",
+9
-4
drivers/net/bonding/bond_main.c
+9
-4
drivers/net/bonding/bond_main.c
···
850
850
struct net_device *slave_dev, int reporting)
851
851
{
852
852
const struct net_device_ops *slave_ops = slave_dev->netdev_ops;
853
-
struct ifreq ifr;
854
853
struct mii_ioctl_data *mii;
854
+
struct ifreq ifr;
855
+
int ret;
855
856
856
857
if (!reporting && !netif_running(slave_dev))
857
858
return 0;
···
861
860
return netif_carrier_ok(slave_dev) ? BMSR_LSTATUS : 0;
862
861
863
862
/* Try to get link status using Ethtool first. */
864
-
if (slave_dev->ethtool_ops->get_link)
865
-
return slave_dev->ethtool_ops->get_link(slave_dev) ?
866
-
BMSR_LSTATUS : 0;
863
+
if (slave_dev->ethtool_ops->get_link) {
864
+
netdev_lock_ops(slave_dev);
865
+
ret = slave_dev->ethtool_ops->get_link(slave_dev);
866
+
netdev_unlock_ops(slave_dev);
867
+
868
+
return ret ? BMSR_LSTATUS : 0;
869
+
}
867
870
868
871
/* Ethtool can't be used, fallback to MII ioctls. */
869
872
if (slave_ops->ndo_eth_ioctl) {
+4
-3
drivers/net/can/rockchip/rockchip_canfd-core.c
+4
-3
drivers/net/can/rockchip/rockchip_canfd-core.c
···
902
902
priv->can.data_bittiming_const = &rkcanfd_data_bittiming_const;
903
903
priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
904
904
CAN_CTRLMODE_BERR_REPORTING;
905
-
if (!(priv->devtype_data.quirks & RKCANFD_QUIRK_CANFD_BROKEN))
906
-
priv->can.ctrlmode_supported |= CAN_CTRLMODE_FD;
907
905
priv->can.do_set_mode = rkcanfd_set_mode;
908
906
priv->can.do_get_berr_counter = rkcanfd_get_berr_counter;
909
907
priv->ndev = ndev;
910
908
911
909
match = device_get_match_data(&pdev->dev);
912
-
if (match)
910
+
if (match) {
913
911
priv->devtype_data = *(struct rkcanfd_devtype_data *)match;
912
+
if (!(priv->devtype_data.quirks & RKCANFD_QUIRK_CANFD_BROKEN))
913
+
priv->can.ctrlmode_supported |= CAN_CTRLMODE_FD;
914
+
}
914
915
915
916
err = can_rx_offload_add_manual(ndev, &priv->offload,
916
917
RKCANFD_NAPI_WEIGHT);
+10
drivers/net/dsa/b53/b53_common.c
+10
drivers/net/dsa/b53/b53_common.c
···
737
737
b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc);
738
738
}
739
739
740
+
static void b53_enable_stp(struct b53_device *dev)
741
+
{
742
+
u8 gc;
743
+
744
+
b53_read8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &gc);
745
+
gc |= GC_RX_BPDU_EN;
746
+
b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc);
747
+
}
748
+
740
749
static u16 b53_default_pvid(struct b53_device *dev)
741
750
{
742
751
if (is5325(dev) || is5365(dev))
···
885
876
}
886
877
887
878
b53_enable_mib(dev);
879
+
b53_enable_stp(dev);
888
880
889
881
return b53_flush_arl(dev, FAST_AGE_STATIC);
890
882
}
+12
-1
drivers/net/dsa/mv88e6xxx/chip.c
+12
-1
drivers/net/dsa/mv88e6xxx/chip.c
···
1852
1852
if (!chip->info->ops->vtu_getnext)
1853
1853
return -EOPNOTSUPP;
1854
1854
1855
+
memset(entry, 0, sizeof(*entry));
1856
+
1855
1857
entry->vid = vid ? vid - 1 : mv88e6xxx_max_vid(chip);
1856
1858
entry->valid = false;
1857
1859
···
1962
1960
struct mv88e6xxx_mst *mst, *tmp;
1963
1961
int err;
1964
1962
1965
-
if (!sid)
1963
+
/* If the SID is zero, it is for a VLAN mapped to the default MSTI,
1964
+
* and mv88e6xxx_stu_setup() made sure it is always present, and thus,
1965
+
* should not be removed here.
1966
+
*
1967
+
* If the chip lacks STU support, numerically the "sid" variable will
1968
+
* happen to also be zero, but we don't want to rely on that fact, so
1969
+
* we explicitly test that first. In that case, there is also nothing
1970
+
* to do here.
1971
+
*/
1972
+
if (!mv88e6xxx_has_stu(chip) || !sid)
1966
1973
return 0;
1967
1974
1968
1975
list_for_each_entry_safe(mst, tmp, &chip->msts, node) {
+2
-1
drivers/net/dsa/mv88e6xxx/devlink.c
+2
-1
drivers/net/dsa/mv88e6xxx/devlink.c
···
736
736
int i;
737
737
738
738
for (i = 0; i < ARRAY_SIZE(mv88e6xxx_regions); i++)
739
-
dsa_devlink_region_destroy(chip->regions[i]);
739
+
if (chip->regions[i])
740
+
dsa_devlink_region_destroy(chip->regions[i]);
740
741
}
741
742
742
743
void mv88e6xxx_teardown_devlink_regions_port(struct dsa_switch *ds, int port)
+3
-2
drivers/net/ethernet/amd/pds_core/debugfs.c
+3
-2
drivers/net/ethernet/amd/pds_core/debugfs.c
···
154
154
debugfs_create_u32("index", 0400, intr_dentry, &intr->index);
155
155
debugfs_create_u32("vector", 0400, intr_dentry, &intr->vector);
156
156
157
-
intr_ctrl_regset = kzalloc(sizeof(*intr_ctrl_regset),
158
-
GFP_KERNEL);
157
+
intr_ctrl_regset = devm_kzalloc(pdsc->dev,
158
+
sizeof(*intr_ctrl_regset),
159
+
GFP_KERNEL);
159
160
if (!intr_ctrl_regset)
160
161
return;
161
162
intr_ctrl_regset->regs = intr_ctrl_regs;
+2
-2
drivers/net/ethernet/broadcom/bnxt/bnxt.c
+2
-2
drivers/net/ethernet/broadcom/bnxt/bnxt.c
···
787
787
dev_kfree_skb_any(skb);
788
788
tx_kick_pending:
789
789
if (BNXT_TX_PTP_IS_SET(lflags)) {
790
-
txr->tx_buf_ring[txr->tx_prod].is_ts_pkt = 0;
790
+
txr->tx_buf_ring[RING_TX(bp, txr->tx_prod)].is_ts_pkt = 0;
791
791
atomic64_inc(&bp->ptp_cfg->stats.ts_err);
792
792
if (!(bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP))
793
793
/* set SKB to err so PTP worker will clean up */
···
795
795
}
796
796
if (txr->kick_pending)
797
797
bnxt_txr_db_kick(bp, txr, txr->tx_prod);
798
-
txr->tx_buf_ring[txr->tx_prod].skb = NULL;
798
+
txr->tx_buf_ring[RING_TX(bp, txr->tx_prod)].skb = NULL;
799
799
dev_core_stats_tx_dropped_inc(dev);
800
800
return NETDEV_TX_OK;
801
801
}
+1
drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c
+1
drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c
+5
-3
drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h
+5
-3
drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h
···
108
108
bool re_enable;
109
109
bool need_print;
110
110
bool need_reset;
111
-
u64 count;
112
111
113
-
void (*irq_handle)(struct hbg_priv *priv, struct hbg_irq_info *info);
112
+
void (*irq_handle)(struct hbg_priv *priv,
113
+
const struct hbg_irq_info *info);
114
114
};
115
115
116
116
struct hbg_vector {
117
117
char name[HBG_VECTOR_NUM][32];
118
-
struct hbg_irq_info *info_array;
118
+
119
+
u64 *stats_array;
120
+
const struct hbg_irq_info *info_array;
119
121
u32 info_array_len;
120
122
};
121
123
+7
-4
drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c
+7
-4
drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c
···
61
61
{
62
62
struct net_device *netdev = dev_get_drvdata(s->private);
63
63
struct hbg_priv *priv = netdev_priv(netdev);
64
-
struct hbg_irq_info *info;
64
+
const struct hbg_irq_info *info;
65
65
u32 i;
66
66
67
67
for (i = 0; i < priv->vectors.info_array_len; i++) {
···
73
73
info->mask)),
74
74
str_true_false(info->need_reset),
75
75
str_true_false(info->need_print),
76
-
info->count);
76
+
priv->vectors.stats_array[i]);
77
77
}
78
78
79
79
return 0;
···
106
106
{
107
107
struct net_device *netdev = dev_get_drvdata(s->private);
108
108
struct hbg_priv *priv = netdev_priv(netdev);
109
+
bool np_link_fail;
109
110
110
111
seq_printf(s, "event handling state: %s\n",
111
112
state_str_true_false(priv, HBG_NIC_STATE_EVENT_HANDLING));
···
118
117
reset_type_str[priv->reset_type]);
119
118
seq_printf(s, "need reset state: %s\n",
120
119
state_str_true_false(priv, HBG_NIC_STATE_NEED_RESET));
121
-
seq_printf(s, "np_link fail state: %s\n",
122
-
state_str_true_false(priv, HBG_NIC_STATE_NP_LINK_FAIL));
120
+
121
+
np_link_fail = !hbg_reg_read_field(priv, HBG_REG_AN_NEG_STATE_ADDR,
122
+
HBG_REG_AN_NEG_STATE_NP_LINK_OK_B);
123
+
seq_printf(s, "np_link fail state: %s\n", str_true_false(np_link_fail));
123
124
124
125
return 0;
125
126
}
+1
-1
drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c
+1
-1
drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c
+3
drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c
+3
drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c
···
26
26
27
27
static void hbg_restore_user_def_settings(struct hbg_priv *priv)
28
28
{
29
+
/* The index of host mac is always 0. */
30
+
u64 rx_pause_addr = ether_addr_to_u64(priv->filter.mac_table[0].addr);
29
31
struct ethtool_pauseparam *pause_param = &priv->user_def.pause_param;
30
32
31
33
hbg_restore_mac_table(priv);
32
34
hbg_hw_set_mtu(priv, priv->netdev->mtu);
33
35
hbg_hw_set_pause_enable(priv, pause_param->tx_pause,
34
36
pause_param->rx_pause);
37
+
hbg_hw_set_rx_pause_mac_addr(priv, rx_pause_addr);
35
38
}
36
39
37
40
int hbg_rebuild(struct hbg_priv *priv)
+7
drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c
+7
drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c
···
234
234
{
235
235
hbg_reg_write_field(priv, HBG_REG_REC_FILT_CTRL_ADDR,
236
236
HBG_REG_REC_FILT_CTRL_UC_MATCH_EN_B, enable);
237
+
238
+
/* only uc filter is supported, so set all bits of mc mask reg to 1 */
239
+
hbg_reg_write64(priv, HBG_REG_STATION_ADDR_LOW_MSK_0, U64_MAX);
240
+
hbg_reg_write64(priv, HBG_REG_STATION_ADDR_LOW_MSK_1, U64_MAX);
237
241
}
238
242
239
243
void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en)
···
246
242
HBG_REG_PAUSE_ENABLE_TX_B, tx_en);
247
243
hbg_reg_write_field(priv, HBG_REG_PAUSE_ENABLE_ADDR,
248
244
HBG_REG_PAUSE_ENABLE_RX_B, rx_en);
245
+
246
+
hbg_reg_write_field(priv, HBG_REG_REC_FILT_CTRL_ADDR,
247
+
HBG_REG_REC_FILT_CTRL_PAUSE_FRM_PASS_B, rx_en);
249
248
}
250
249
251
250
void hbg_hw_get_pause_enable(struct hbg_priv *priv, u32 *tx_en, u32 *rx_en)
+15
-9
drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c
+15
-9
drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c
···
6
6
#include "hbg_hw.h"
7
7
8
8
static void hbg_irq_handle_err(struct hbg_priv *priv,
9
-
struct hbg_irq_info *irq_info)
9
+
const struct hbg_irq_info *irq_info)
10
10
{
11
11
if (irq_info->need_print)
12
12
dev_err(&priv->pdev->dev,
···
17
17
}
18
18
19
19
static void hbg_irq_handle_tx(struct hbg_priv *priv,
20
-
struct hbg_irq_info *irq_info)
20
+
const struct hbg_irq_info *irq_info)
21
21
{
22
22
napi_schedule(&priv->tx_ring.napi);
23
23
}
24
24
25
25
static void hbg_irq_handle_rx(struct hbg_priv *priv,
26
-
struct hbg_irq_info *irq_info)
26
+
const struct hbg_irq_info *irq_info)
27
27
{
28
28
napi_schedule(&priv->rx_ring.napi);
29
29
}
30
30
31
31
static void hbg_irq_handle_rx_buf_val(struct hbg_priv *priv,
32
-
struct hbg_irq_info *irq_info)
32
+
const struct hbg_irq_info *irq_info)
33
33
{
34
34
priv->stats.rx_fifo_less_empty_thrsld_cnt++;
35
35
}
36
36
37
37
#define HBG_IRQ_I(name, handle) \
38
-
{#name, HBG_INT_MSK_##name##_B, false, false, false, 0, handle}
38
+
{#name, HBG_INT_MSK_##name##_B, false, false, false, handle}
39
39
#define HBG_ERR_IRQ_I(name, need_print, ndde_reset) \
40
40
{#name, HBG_INT_MSK_##name##_B, true, need_print, \
41
-
ndde_reset, 0, hbg_irq_handle_err}
41
+
ndde_reset, hbg_irq_handle_err}
42
42
43
-
static struct hbg_irq_info hbg_irqs[] = {
43
+
static const struct hbg_irq_info hbg_irqs[] = {
44
44
HBG_IRQ_I(RX, hbg_irq_handle_rx),
45
45
HBG_IRQ_I(TX, hbg_irq_handle_tx),
46
46
HBG_ERR_IRQ_I(TX_PKT_CPL, true, true),
···
64
64
65
65
static irqreturn_t hbg_irq_handle(int irq_num, void *p)
66
66
{
67
-
struct hbg_irq_info *info;
67
+
const struct hbg_irq_info *info;
68
68
struct hbg_priv *priv = p;
69
69
u32 status;
70
70
u32 i;
···
79
79
hbg_hw_irq_enable(priv, info->mask, false);
80
80
hbg_hw_irq_clear(priv, info->mask);
81
81
82
-
info->count++;
82
+
priv->vectors.stats_array[i]++;
83
83
if (info->irq_handle)
84
84
info->irq_handle(priv, info);
85
85
···
131
131
"failed to request irq: %s\n",
132
132
irq_names_map[i]);
133
133
}
134
+
135
+
vectors->stats_array = devm_kcalloc(&priv->pdev->dev,
136
+
ARRAY_SIZE(hbg_irqs),
137
+
sizeof(u64), GFP_KERNEL);
138
+
if (!vectors->stats_array)
139
+
return -ENOMEM;
134
140
135
141
vectors->info_array = hbg_irqs;
136
142
vectors->info_array_len = ARRAY_SIZE(hbg_irqs);
+4
-4
drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c
+4
-4
drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c
···
21
21
22
22
static void hbg_all_irq_enable(struct hbg_priv *priv, bool enabled)
23
23
{
24
-
struct hbg_irq_info *info;
24
+
const struct hbg_irq_info *info;
25
25
u32 i;
26
26
27
27
for (i = 0; i < priv->vectors.info_array_len; i++) {
···
203
203
if (netif_running(netdev))
204
204
return -EBUSY;
205
205
206
-
hbg_hw_set_mtu(priv, new_mtu);
207
-
WRITE_ONCE(netdev->mtu, new_mtu);
208
-
209
206
dev_dbg(&priv->pdev->dev,
210
207
"change mtu from %u to %u\n", netdev->mtu, new_mtu);
208
+
209
+
hbg_hw_set_mtu(priv, new_mtu);
210
+
WRITE_ONCE(netdev->mtu, new_mtu);
211
211
212
212
return 0;
213
213
}
+10
-1
drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c
+10
-1
drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c
···
2
2
// Copyright (c) 2024 Hisilicon Limited.
3
3
4
4
#include <linux/phy.h>
5
+
#include <linux/rtnetlink.h>
5
6
#include "hbg_common.h"
6
7
#include "hbg_hw.h"
7
8
#include "hbg_mdio.h"
···
134
133
{
135
134
struct device *dev = &priv->pdev->dev;
136
135
136
+
rtnl_lock();
137
+
137
138
if (priv->stats.np_link_fail_cnt >= HBG_NP_LINK_FAIL_RETRY_TIMES) {
138
139
dev_err(dev, "failed to fix the MAC link status\n");
139
140
priv->stats.np_link_fail_cnt = 0;
140
-
return;
141
+
goto unlock;
141
142
}
143
+
144
+
if (!priv->mac.phydev->link)
145
+
goto unlock;
142
146
143
147
priv->stats.np_link_fail_cnt++;
144
148
dev_err(dev, "failed to link between MAC and PHY, try to fix...\n");
···
153
147
*/
154
148
hbg_phy_stop(priv);
155
149
hbg_phy_start(priv);
150
+
151
+
unlock:
152
+
rtnl_unlock();
156
153
}
157
154
158
155
static void hbg_phy_adjust_link(struct net_device *netdev)
+3
drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h
+3
drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h
···
68
68
#define HBG_REG_TRANSMIT_CTRL_AN_EN_B BIT(5)
69
69
#define HBG_REG_REC_FILT_CTRL_ADDR (HBG_REG_SGMII_BASE + 0x0064)
70
70
#define HBG_REG_REC_FILT_CTRL_UC_MATCH_EN_B BIT(0)
71
+
#define HBG_REG_REC_FILT_CTRL_PAUSE_FRM_PASS_B BIT(4)
71
72
#define HBG_REG_RX_OCTETS_TOTAL_OK_ADDR (HBG_REG_SGMII_BASE + 0x0080)
72
73
#define HBG_REG_RX_OCTETS_BAD_ADDR (HBG_REG_SGMII_BASE + 0x0084)
73
74
#define HBG_REG_RX_UC_PKTS_ADDR (HBG_REG_SGMII_BASE + 0x0088)
···
135
134
#define HBG_REG_STATION_ADDR_HIGH_4_ADDR (HBG_REG_SGMII_BASE + 0x0224)
136
135
#define HBG_REG_STATION_ADDR_LOW_5_ADDR (HBG_REG_SGMII_BASE + 0x0228)
137
136
#define HBG_REG_STATION_ADDR_HIGH_5_ADDR (HBG_REG_SGMII_BASE + 0x022C)
137
+
#define HBG_REG_STATION_ADDR_LOW_MSK_0 (HBG_REG_SGMII_BASE + 0x0230)
138
+
#define HBG_REG_STATION_ADDR_LOW_MSK_1 (HBG_REG_SGMII_BASE + 0x0238)
138
139
139
140
/* PCU */
140
141
#define HBG_REG_TX_FIFO_THRSLD_ADDR (HBG_REG_SGMII_BASE + 0x0420)
+1
drivers/net/ethernet/intel/igc/igc.h
+1
drivers/net/ethernet/intel/igc/igc.h
···
319
319
struct timespec64 prev_ptp_time; /* Pre-reset PTP clock */
320
320
ktime_t ptp_reset_start; /* Reset time in clock mono */
321
321
struct system_time_snapshot snapshot;
322
+
struct mutex ptm_lock; /* Only allow one PTM transaction at a time */
322
323
323
324
char fw_version[32];
324
325
+5
-1
drivers/net/ethernet/intel/igc/igc_defines.h
+5
-1
drivers/net/ethernet/intel/igc/igc_defines.h
···
574
574
#define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x3f) << 2)
575
575
#define IGC_PTM_CTRL_PTM_TO(usec) (((usec) & 0xff) << 8)
576
576
577
-
#define IGC_PTM_SHORT_CYC_DEFAULT 1 /* Default short cycle interval */
577
+
/* A short cycle time of 1us theoretically should work, but appears to be too
578
+
* short in practice.
579
+
*/
580
+
#define IGC_PTM_SHORT_CYC_DEFAULT 4 /* Default short cycle interval */
578
581
#define IGC_PTM_CYC_TIME_DEFAULT 5 /* Default PTM cycle time */
579
582
#define IGC_PTM_TIMEOUT_DEFAULT 255 /* Default timeout for PTM errors */
580
583
···
596
593
#define IGC_PTM_STAT_T4M1_OVFL BIT(3) /* T4 minus T1 overflow */
597
594
#define IGC_PTM_STAT_ADJUST_1ST BIT(4) /* 1588 timer adjusted during 1st PTM cycle */
598
595
#define IGC_PTM_STAT_ADJUST_CYC BIT(5) /* 1588 timer adjusted during non-1st PTM cycle */
596
+
#define IGC_PTM_STAT_ALL GENMASK(5, 0) /* Used to clear all status */
599
597
600
598
/* PCIe PTM Cycle Control */
601
599
#define IGC_PTM_CYCLE_CTRL_CYC_TIME(msec) ((msec) & 0x3ff) /* PTM Cycle Time (msec) */
+1
drivers/net/ethernet/intel/igc/igc_main.c
+1
drivers/net/ethernet/intel/igc/igc_main.c
+74
-39
drivers/net/ethernet/intel/igc/igc_ptp.c
+74
-39
drivers/net/ethernet/intel/igc/igc_ptp.c
···
963
963
}
964
964
}
965
965
966
+
/* The PTM lock: adapter->ptm_lock must be held when calling igc_ptm_trigger() */
967
+
static void igc_ptm_trigger(struct igc_hw *hw)
968
+
{
969
+
u32 ctrl;
970
+
971
+
/* To "manually" start the PTM cycle we need to set the
972
+
* trigger (TRIG) bit
973
+
*/
974
+
ctrl = rd32(IGC_PTM_CTRL);
975
+
ctrl |= IGC_PTM_CTRL_TRIG;
976
+
wr32(IGC_PTM_CTRL, ctrl);
977
+
/* Perform flush after write to CTRL register otherwise
978
+
* transaction may not start
979
+
*/
980
+
wrfl();
981
+
}
982
+
983
+
/* The PTM lock: adapter->ptm_lock must be held when calling igc_ptm_reset() */
984
+
static void igc_ptm_reset(struct igc_hw *hw)
985
+
{
986
+
u32 ctrl;
987
+
988
+
ctrl = rd32(IGC_PTM_CTRL);
989
+
ctrl &= ~IGC_PTM_CTRL_TRIG;
990
+
wr32(IGC_PTM_CTRL, ctrl);
991
+
/* Write to clear all status */
992
+
wr32(IGC_PTM_STAT, IGC_PTM_STAT_ALL);
993
+
}
994
+
966
995
static int igc_phc_get_syncdevicetime(ktime_t *device,
967
996
struct system_counterval_t *system,
968
997
void *ctx)
969
998
{
970
-
u32 stat, t2_curr_h, t2_curr_l, ctrl;
971
999
struct igc_adapter *adapter = ctx;
972
1000
struct igc_hw *hw = &adapter->hw;
1001
+
u32 stat, t2_curr_h, t2_curr_l;
973
1002
int err, count = 100;
974
1003
ktime_t t1, t2_curr;
975
1004
976
-
/* Get a snapshot of system clocks to use as historic value. */
977
-
ktime_get_snapshot(&adapter->snapshot);
978
-
1005
+
/* Doing this in a loop because in the event of a
1006
+
* badly timed (ha!) system clock adjustment, we may
1007
+
* get PTM errors from the PCI root, but these errors
1008
+
* are transitory. Repeating the process returns valid
1009
+
* data eventually.
1010
+
*/
979
1011
do {
980
-
/* Doing this in a loop because in the event of a
981
-
* badly timed (ha!) system clock adjustment, we may
982
-
* get PTM errors from the PCI root, but these errors
983
-
* are transitory. Repeating the process returns valid
984
-
* data eventually.
985
-
*/
1012
+
/* Get a snapshot of system clocks to use as historic value. */
1013
+
ktime_get_snapshot(&adapter->snapshot);
986
1014
987
-
/* To "manually" start the PTM cycle we need to clear and
988
-
* then set again the TRIG bit.
989
-
*/
990
-
ctrl = rd32(IGC_PTM_CTRL);
991
-
ctrl &= ~IGC_PTM_CTRL_TRIG;
992
-
wr32(IGC_PTM_CTRL, ctrl);
993
-
ctrl |= IGC_PTM_CTRL_TRIG;
994
-
wr32(IGC_PTM_CTRL, ctrl);
995
-
996
-
/* The cycle only starts "for real" when software notifies
997
-
* that it has read the registers, this is done by setting
998
-
* VALID bit.
999
-
*/
1000
-
wr32(IGC_PTM_STAT, IGC_PTM_STAT_VALID);
1015
+
igc_ptm_trigger(hw);
1001
1016
1002
1017
err = readx_poll_timeout(rd32, IGC_PTM_STAT, stat,
1003
1018
stat, IGC_PTM_STAT_SLEEP,
1004
1019
IGC_PTM_STAT_TIMEOUT);
1020
+
igc_ptm_reset(hw);
1021
+
1005
1022
if (err < 0) {
1006
1023
netdev_err(adapter->netdev, "Timeout reading IGC_PTM_STAT register\n");
1007
1024
return err;
···
1027
1010
if ((stat & IGC_PTM_STAT_VALID) == IGC_PTM_STAT_VALID)
1028
1011
break;
1029
1012
1030
-
if (stat & ~IGC_PTM_STAT_VALID) {
1031
-
/* An error occurred, log it. */
1032
-
igc_ptm_log_error(adapter, stat);
1033
-
/* The STAT register is write-1-to-clear (W1C),
1034
-
* so write the previous error status to clear it.
1035
-
*/
1036
-
wr32(IGC_PTM_STAT, stat);
1037
-
continue;
1038
-
}
1013
+
igc_ptm_log_error(adapter, stat);
1039
1014
} while (--count);
1040
1015
1041
1016
if (!count) {
···
1059
1050
{
1060
1051
struct igc_adapter *adapter = container_of(ptp, struct igc_adapter,
1061
1052
ptp_caps);
1053
+
int ret;
1062
1054
1063
-
return get_device_system_crosststamp(igc_phc_get_syncdevicetime,
1064
-
adapter, &adapter->snapshot, cts);
1055
+
/* This blocks until any in progress PTM transactions complete */
1056
+
mutex_lock(&adapter->ptm_lock);
1057
+
1058
+
ret = get_device_system_crosststamp(igc_phc_get_syncdevicetime,
1059
+
adapter, &adapter->snapshot, cts);
1060
+
mutex_unlock(&adapter->ptm_lock);
1061
+
1062
+
return ret;
1065
1063
}
1066
1064
1067
1065
static int igc_ptp_getcyclesx64(struct ptp_clock_info *ptp,
···
1170
1154
spin_lock_init(&adapter->ptp_tx_lock);
1171
1155
spin_lock_init(&adapter->free_timer_lock);
1172
1156
spin_lock_init(&adapter->tmreg_lock);
1157
+
mutex_init(&adapter->ptm_lock);
1173
1158
1174
1159
adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
1175
1160
adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
···
1183
1166
if (IS_ERR(adapter->ptp_clock)) {
1184
1167
adapter->ptp_clock = NULL;
1185
1168
netdev_err(netdev, "ptp_clock_register failed\n");
1169
+
mutex_destroy(&adapter->ptm_lock);
1186
1170
} else if (adapter->ptp_clock) {
1187
1171
netdev_info(netdev, "PHC added\n");
1188
1172
adapter->ptp_flags |= IGC_PTP_ENABLED;
···
1213
1195
struct igc_hw *hw = &adapter->hw;
1214
1196
u32 ctrl;
1215
1197
1198
+
mutex_lock(&adapter->ptm_lock);
1216
1199
ctrl = rd32(IGC_PTM_CTRL);
1217
1200
ctrl &= ~IGC_PTM_CTRL_EN;
1218
1201
1219
1202
wr32(IGC_PTM_CTRL, ctrl);
1203
+
mutex_unlock(&adapter->ptm_lock);
1220
1204
}
1221
1205
1222
1206
/**
···
1249
1229
**/
1250
1230
void igc_ptp_stop(struct igc_adapter *adapter)
1251
1231
{
1232
+
if (!(adapter->ptp_flags & IGC_PTP_ENABLED))
1233
+
return;
1234
+
1252
1235
igc_ptp_suspend(adapter);
1253
1236
1237
+
adapter->ptp_flags &= ~IGC_PTP_ENABLED;
1254
1238
if (adapter->ptp_clock) {
1255
1239
ptp_clock_unregister(adapter->ptp_clock);
1256
1240
netdev_info(adapter->netdev, "PHC removed\n");
1257
1241
adapter->ptp_flags &= ~IGC_PTP_ENABLED;
1258
1242
}
1243
+
mutex_destroy(&adapter->ptm_lock);
1259
1244
}
1260
1245
1261
1246
/**
···
1272
1247
void igc_ptp_reset(struct igc_adapter *adapter)
1273
1248
{
1274
1249
struct igc_hw *hw = &adapter->hw;
1275
-
u32 cycle_ctrl, ctrl;
1250
+
u32 cycle_ctrl, ctrl, stat;
1276
1251
unsigned long flags;
1277
1252
u32 timadj;
1253
+
1254
+
if (!(adapter->ptp_flags & IGC_PTP_ENABLED))
1255
+
return;
1278
1256
1279
1257
/* reset the tstamp_config */
1280
1258
igc_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
···
1300
1272
if (!igc_is_crosststamp_supported(adapter))
1301
1273
break;
1302
1274
1275
+
mutex_lock(&adapter->ptm_lock);
1303
1276
wr32(IGC_PCIE_DIG_DELAY, IGC_PCIE_DIG_DELAY_DEFAULT);
1304
1277
wr32(IGC_PCIE_PHY_DELAY, IGC_PCIE_PHY_DELAY_DEFAULT);
1305
1278
···
1311
1282
ctrl = IGC_PTM_CTRL_EN |
1312
1283
IGC_PTM_CTRL_START_NOW |
1313
1284
IGC_PTM_CTRL_SHRT_CYC(IGC_PTM_SHORT_CYC_DEFAULT) |
1314
-
IGC_PTM_CTRL_PTM_TO(IGC_PTM_TIMEOUT_DEFAULT) |
1315
-
IGC_PTM_CTRL_TRIG;
1285
+
IGC_PTM_CTRL_PTM_TO(IGC_PTM_TIMEOUT_DEFAULT);
1316
1286
1317
1287
wr32(IGC_PTM_CTRL, ctrl);
1318
1288
1319
1289
/* Force the first cycle to run. */
1320
-
wr32(IGC_PTM_STAT, IGC_PTM_STAT_VALID);
1290
+
igc_ptm_trigger(hw);
1321
1291
1292
+
if (readx_poll_timeout_atomic(rd32, IGC_PTM_STAT, stat,
1293
+
stat, IGC_PTM_STAT_SLEEP,
1294
+
IGC_PTM_STAT_TIMEOUT))
1295
+
netdev_err(adapter->netdev, "Timeout reading IGC_PTM_STAT register\n");
1296
+
1297
+
igc_ptm_reset(hw);
1298
+
mutex_unlock(&adapter->ptm_lock);
1322
1299
break;
1323
1300
default:
1324
1301
/* No work to do. */
+2
drivers/net/ethernet/marvell/octeontx2/nic/rep.c
+2
drivers/net/ethernet/marvell/octeontx2/nic/rep.c
+29
-20
drivers/net/ethernet/mediatek/mtk_eth_soc.c
+29
-20
drivers/net/ethernet/mediatek/mtk_eth_soc.c
···
734
734
case SPEED_100:
735
735
val |= MTK_QTX_SCH_MAX_RATE_EN |
736
736
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 103) |
737
-
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 3);
737
+
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 3) |
738
738
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 1);
739
739
break;
740
740
case SPEED_1000:
···
757
757
case SPEED_100:
758
758
val |= MTK_QTX_SCH_MAX_RATE_EN |
759
759
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 1) |
760
-
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 5);
760
+
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 5) |
761
761
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 1);
762
762
break;
763
763
case SPEED_1000:
764
764
val |= MTK_QTX_SCH_MAX_RATE_EN |
765
-
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 10) |
766
-
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 5) |
765
+
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 1) |
766
+
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 6) |
767
767
FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 10);
768
768
break;
769
769
default:
···
871
871
.mac_enable_tx_lpi = mtk_mac_enable_tx_lpi,
872
872
};
873
873
874
+
static void mtk_mdio_config(struct mtk_eth *eth)
875
+
{
876
+
u32 val;
877
+
878
+
/* Configure MDC Divider */
879
+
val = FIELD_PREP(PPSC_MDC_CFG, eth->mdc_divider);
880
+
881
+
/* Configure MDC Turbo Mode */
882
+
if (mtk_is_netsys_v3_or_greater(eth))
883
+
mtk_m32(eth, 0, MISC_MDC_TURBO, MTK_MAC_MISC_V3);
884
+
else
885
+
val |= PPSC_MDC_TURBO;
886
+
887
+
mtk_m32(eth, PPSC_MDC_CFG, val, MTK_PPSC);
888
+
}
889
+
874
890
static int mtk_mdio_init(struct mtk_eth *eth)
875
891
{
876
-
unsigned int max_clk = 2500000, divider;
892
+
unsigned int max_clk = 2500000;
877
893
struct device_node *mii_np;
878
894
int ret;
879
895
u32 val;
···
924
908
}
925
909
max_clk = val;
926
910
}
927
-
divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63);
928
-
929
-
/* Configure MDC Turbo Mode */
930
-
if (mtk_is_netsys_v3_or_greater(eth))
931
-
mtk_m32(eth, 0, MISC_MDC_TURBO, MTK_MAC_MISC_V3);
932
-
933
-
/* Configure MDC Divider */
934
-
val = FIELD_PREP(PPSC_MDC_CFG, divider);
935
-
if (!mtk_is_netsys_v3_or_greater(eth))
936
-
val |= PPSC_MDC_TURBO;
937
-
mtk_m32(eth, PPSC_MDC_CFG, val, MTK_PPSC);
938
-
939
-
dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider);
940
-
911
+
eth->mdc_divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63);
912
+
mtk_mdio_config(eth);
913
+
dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / eth->mdc_divider);
941
914
ret = of_mdiobus_register(eth->mii_bus, mii_np);
942
915
943
916
err_put_node:
···
3320
3315
if (mtk_is_netsys_v2_or_greater(eth))
3321
3316
val |= MTK_MUTLI_CNT | MTK_RESV_BUF |
3322
3317
MTK_WCOMP_EN | MTK_DMAD_WR_WDONE |
3323
-
MTK_CHK_DDONE_EN | MTK_LEAKY_BUCKET_EN;
3318
+
MTK_CHK_DDONE_EN;
3324
3319
else
3325
3320
val |= MTK_RX_BT_32DWORDS;
3326
3321
mtk_w32(eth, val, reg_map->qdma.glo_cfg);
···
3978
3973
mtk_hw_warm_reset(eth);
3979
3974
else
3980
3975
mtk_hw_reset(eth);
3976
+
3977
+
/* No MT7628/88 support yet */
3978
+
if (reset && !MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
3979
+
mtk_mdio_config(eth);
3981
3980
3982
3981
if (mtk_is_netsys_v3_or_greater(eth)) {
3983
3982
/* Set FE to PDMAv2 if necessary */
+1
drivers/net/ethernet/mediatek/mtk_eth_soc.h
+1
drivers/net/ethernet/mediatek/mtk_eth_soc.h
+14
-1
drivers/net/ethernet/ti/am65-cpsw-nuss.c
+14
-1
drivers/net/ethernet/ti/am65-cpsw-nuss.c
···
2666
2666
of_property_read_bool(port_np, "ti,mac-only");
2667
2667
2668
2668
/* get phy/link info */
2669
-
port->slave.port_np = port_np;
2669
+
port->slave.port_np = of_node_get(port_np);
2670
2670
ret = of_get_phy_mode(port_np, &port->slave.phy_if);
2671
2671
if (ret) {
2672
2672
dev_err(dev, "%pOF read phy-mode err %d\n",
···
2719
2719
port = &common->ports[i];
2720
2720
if (port->slave.phylink)
2721
2721
phylink_destroy(port->slave.phylink);
2722
+
}
2723
+
}
2724
+
2725
+
static void am65_cpsw_remove_dt(struct am65_cpsw_common *common)
2726
+
{
2727
+
struct am65_cpsw_port *port;
2728
+
int i;
2729
+
2730
+
for (i = 0; i < common->port_num; i++) {
2731
+
port = &common->ports[i];
2732
+
of_node_put(port->slave.port_np);
2722
2733
}
2723
2734
}
2724
2735
···
3635
3624
am65_cpsw_nuss_cleanup_ndev(common);
3636
3625
am65_cpsw_nuss_phylink_cleanup(common);
3637
3626
am65_cpts_release(common->cpts);
3627
+
am65_cpsw_remove_dt(common);
3638
3628
err_of_clear:
3639
3629
if (common->mdio_dev)
3640
3630
of_platform_device_destroy(common->mdio_dev, NULL);
···
3675
3663
am65_cpsw_nuss_phylink_cleanup(common);
3676
3664
am65_cpts_release(common->cpts);
3677
3665
am65_cpsw_disable_serdes_phy(common);
3666
+
am65_cpsw_remove_dt(common);
3678
3667
3679
3668
if (common->mdio_dev)
3680
3669
of_platform_device_destroy(common->mdio_dev, NULL);
+56
-61
drivers/net/ethernet/ti/icssg/icss_iep.c
+56
-61
drivers/net/ethernet/ti/icssg/icss_iep.c
···
412
412
int ret;
413
413
u64 cmp;
414
414
415
+
if (!on) {
416
+
/* Disable CMP 1 */
417
+
regmap_update_bits(iep->map, ICSS_IEP_CMP_CFG_REG,
418
+
IEP_CMP_CFG_CMP_EN(1), 0);
419
+
420
+
/* clear CMP regs */
421
+
regmap_write(iep->map, ICSS_IEP_CMP1_REG0, 0);
422
+
if (iep->plat_data->flags & ICSS_IEP_64BIT_COUNTER_SUPPORT)
423
+
regmap_write(iep->map, ICSS_IEP_CMP1_REG1, 0);
424
+
425
+
/* Disable sync */
426
+
regmap_write(iep->map, ICSS_IEP_SYNC_CTRL_REG, 0);
427
+
428
+
return 0;
429
+
}
430
+
415
431
/* Calculate width of the signal for PPS/PEROUT handling */
416
432
ts.tv_sec = req->on.sec;
417
433
ts.tv_nsec = req->on.nsec;
···
446
430
if (ret)
447
431
return ret;
448
432
449
-
if (on) {
450
-
/* Configure CMP */
451
-
regmap_write(iep->map, ICSS_IEP_CMP1_REG0, lower_32_bits(cmp));
452
-
if (iep->plat_data->flags & ICSS_IEP_64BIT_COUNTER_SUPPORT)
453
-
regmap_write(iep->map, ICSS_IEP_CMP1_REG1, upper_32_bits(cmp));
454
-
/* Configure SYNC, based on req on width */
455
-
regmap_write(iep->map, ICSS_IEP_SYNC_PWIDTH_REG,
456
-
div_u64(ns_width, iep->def_inc));
457
-
regmap_write(iep->map, ICSS_IEP_SYNC0_PERIOD_REG, 0);
458
-
regmap_write(iep->map, ICSS_IEP_SYNC_START_REG,
459
-
div_u64(ns_start, iep->def_inc));
460
-
regmap_write(iep->map, ICSS_IEP_SYNC_CTRL_REG, 0); /* one-shot mode */
461
-
/* Enable CMP 1 */
462
-
regmap_update_bits(iep->map, ICSS_IEP_CMP_CFG_REG,
463
-
IEP_CMP_CFG_CMP_EN(1), IEP_CMP_CFG_CMP_EN(1));
464
-
} else {
465
-
/* Disable CMP 1 */
466
-
regmap_update_bits(iep->map, ICSS_IEP_CMP_CFG_REG,
467
-
IEP_CMP_CFG_CMP_EN(1), 0);
468
-
469
-
/* clear regs */
470
-
regmap_write(iep->map, ICSS_IEP_CMP1_REG0, 0);
471
-
if (iep->plat_data->flags & ICSS_IEP_64BIT_COUNTER_SUPPORT)
472
-
regmap_write(iep->map, ICSS_IEP_CMP1_REG1, 0);
473
-
}
433
+
/* Configure CMP */
434
+
regmap_write(iep->map, ICSS_IEP_CMP1_REG0, lower_32_bits(cmp));
435
+
if (iep->plat_data->flags & ICSS_IEP_64BIT_COUNTER_SUPPORT)
436
+
regmap_write(iep->map, ICSS_IEP_CMP1_REG1, upper_32_bits(cmp));
437
+
/* Configure SYNC, based on req on width */
438
+
regmap_write(iep->map, ICSS_IEP_SYNC_PWIDTH_REG,
439
+
div_u64(ns_width, iep->def_inc));
440
+
regmap_write(iep->map, ICSS_IEP_SYNC0_PERIOD_REG, 0);
441
+
regmap_write(iep->map, ICSS_IEP_SYNC_START_REG,
442
+
div_u64(ns_start, iep->def_inc));
443
+
regmap_write(iep->map, ICSS_IEP_SYNC_CTRL_REG, 0); /* one-shot mode */
444
+
/* Enable CMP 1 */
445
+
regmap_update_bits(iep->map, ICSS_IEP_CMP_CFG_REG,
446
+
IEP_CMP_CFG_CMP_EN(1), IEP_CMP_CFG_CMP_EN(1));
474
447
} else {
475
-
if (on) {
476
-
u64 start_ns;
448
+
u64 start_ns;
477
449
478
-
iep->period = ((u64)req->period.sec * NSEC_PER_SEC) +
479
-
req->period.nsec;
480
-
start_ns = ((u64)req->period.sec * NSEC_PER_SEC)
481
-
+ req->period.nsec;
482
-
icss_iep_update_to_next_boundary(iep, start_ns);
450
+
iep->period = ((u64)req->period.sec * NSEC_PER_SEC) +
451
+
req->period.nsec;
452
+
start_ns = ((u64)req->period.sec * NSEC_PER_SEC)
453
+
+ req->period.nsec;
454
+
icss_iep_update_to_next_boundary(iep, start_ns);
483
455
484
-
regmap_write(iep->map, ICSS_IEP_SYNC_PWIDTH_REG,
485
-
div_u64(ns_width, iep->def_inc));
486
-
regmap_write(iep->map, ICSS_IEP_SYNC_START_REG,
487
-
div_u64(ns_start, iep->def_inc));
488
-
/* Enable Sync in single shot mode */
489
-
regmap_write(iep->map, ICSS_IEP_SYNC_CTRL_REG,
490
-
IEP_SYNC_CTRL_SYNC_N_EN(0) | IEP_SYNC_CTRL_SYNC_EN);
491
-
/* Enable CMP 1 */
492
-
regmap_update_bits(iep->map, ICSS_IEP_CMP_CFG_REG,
493
-
IEP_CMP_CFG_CMP_EN(1), IEP_CMP_CFG_CMP_EN(1));
494
-
} else {
495
-
/* Disable CMP 1 */
496
-
regmap_update_bits(iep->map, ICSS_IEP_CMP_CFG_REG,
497
-
IEP_CMP_CFG_CMP_EN(1), 0);
498
-
499
-
/* clear CMP regs */
500
-
regmap_write(iep->map, ICSS_IEP_CMP1_REG0, 0);
501
-
if (iep->plat_data->flags & ICSS_IEP_64BIT_COUNTER_SUPPORT)
502
-
regmap_write(iep->map, ICSS_IEP_CMP1_REG1, 0);
503
-
504
-
/* Disable sync */
505
-
regmap_write(iep->map, ICSS_IEP_SYNC_CTRL_REG, 0);
506
-
}
456
+
regmap_write(iep->map, ICSS_IEP_SYNC_PWIDTH_REG,
457
+
div_u64(ns_width, iep->def_inc));
458
+
regmap_write(iep->map, ICSS_IEP_SYNC_START_REG,
459
+
div_u64(ns_start, iep->def_inc));
460
+
/* Enable Sync in single shot mode */
461
+
regmap_write(iep->map, ICSS_IEP_SYNC_CTRL_REG,
462
+
IEP_SYNC_CTRL_SYNC_N_EN(0) | IEP_SYNC_CTRL_SYNC_EN);
463
+
/* Enable CMP 1 */
464
+
regmap_update_bits(iep->map, ICSS_IEP_CMP_CFG_REG,
465
+
IEP_CMP_CFG_CMP_EN(1), IEP_CMP_CFG_CMP_EN(1));
507
466
}
508
467
509
468
return 0;
···
489
498
{
490
499
int ret = 0;
491
500
501
+
if (!on)
502
+
goto disable;
503
+
492
504
/* Reject requests with unsupported flags */
493
505
if (req->flags & ~(PTP_PEROUT_DUTY_CYCLE |
494
506
PTP_PEROUT_PHASE))
495
507
return -EOPNOTSUPP;
496
508
509
+
/* Set default "on" time (1ms) for the signal if not passed by the app */
510
+
if (!(req->flags & PTP_PEROUT_DUTY_CYCLE)) {
511
+
req->on.sec = 0;
512
+
req->on.nsec = NSEC_PER_MSEC;
513
+
}
514
+
515
+
disable:
497
516
mutex_lock(&iep->ptp_clk_mutex);
498
517
499
518
if (iep->pps_enabled) {
···
513
512
514
513
if (iep->perout_enabled == !!on)
515
514
goto exit;
516
-
517
-
/* Set default "on" time (1ms) for the signal if not passed by the app */
518
-
if (!(req->flags & PTP_PEROUT_DUTY_CYCLE)) {
519
-
req->on.sec = 0;
520
-
req->on.nsec = NSEC_PER_MSEC;
521
-
}
522
515
523
516
ret = icss_iep_perout_enable_hw(iep, req, on);
524
517
if (!ret)
+4
-5
drivers/net/ethernet/ti/icssg/icssg_common.c
+4
-5
drivers/net/ethernet/ti/icssg/icssg_common.c
···
583
583
first_desc = k3_cppi_desc_pool_alloc(tx_chn->desc_pool);
584
584
if (!first_desc) {
585
585
netdev_dbg(ndev, "xdp tx: failed to allocate descriptor\n");
586
-
goto drop_free_descs; /* drop */
586
+
return ICSSG_XDP_CONSUMED; /* drop */
587
587
}
588
588
589
589
if (page) { /* already DMA mapped by page_pool */
···
671
671
672
672
q_idx = smp_processor_id() % emac->tx_ch_num;
673
673
result = emac_xmit_xdp_frame(emac, xdpf, page, q_idx);
674
-
if (result == ICSSG_XDP_CONSUMED)
674
+
if (result == ICSSG_XDP_CONSUMED) {
675
+
ndev->stats.tx_dropped++;
675
676
goto drop;
677
+
}
676
678
677
679
dev_sw_netstats_rx_add(ndev, xdpf->len);
678
680
return result;
···
1217
1215
prueth_rx_cleanup);
1218
1216
if (disable)
1219
1217
k3_udma_glue_disable_rx_chn(chn->rx_chn);
1220
-
1221
-
page_pool_destroy(chn->pg_pool);
1222
-
chn->pg_pool = NULL;
1223
1218
}
1224
1219
EXPORT_SYMBOL_GPL(prueth_reset_rx_chan);
1225
1220
+2
-1
drivers/net/ethernet/wangxun/ngbe/ngbe_main.c
+2
-1
drivers/net/ethernet/wangxun/ngbe/ngbe_main.c
···
698
698
/* setup the private structure */
699
699
err = ngbe_sw_init(wx);
700
700
if (err)
701
-
goto err_free_mac_table;
701
+
goto err_pci_release_regions;
702
702
703
703
/* check if flash load is done after hw power up */
704
704
err = wx_check_flash_load(wx, NGBE_SPI_ILDR_STATUS_PERST);
···
792
792
err_clear_interrupt_scheme:
793
793
wx_clear_interrupt_scheme(wx);
794
794
err_free_mac_table:
795
+
kfree(wx->rss_key);
795
796
kfree(wx->mac_table);
796
797
err_pci_release_regions:
797
798
pci_release_selected_regions(pdev,
+2
-1
drivers/net/ethernet/wangxun/txgbe/txgbe_main.c
+2
-1
drivers/net/ethernet/wangxun/txgbe/txgbe_main.c
···
636
636
/* setup the private structure */
637
637
err = txgbe_sw_init(wx);
638
638
if (err)
639
-
goto err_free_mac_table;
639
+
goto err_pci_release_regions;
640
640
641
641
/* check if flash load is done after hw power up */
642
642
err = wx_check_flash_load(wx, TXGBE_SPI_ILDR_STATUS_PERST);
···
794
794
wx_clear_interrupt_scheme(wx);
795
795
wx_control_hw(wx, false);
796
796
err_free_mac_table:
797
+
kfree(wx->rss_key);
797
798
kfree(wx->mac_table);
798
799
err_pci_release_regions:
799
800
pci_release_selected_regions(pdev,
+1
-1
drivers/net/wireless/atmel/at76c50x-usb.c
+1
-1
drivers/net/wireless/atmel/at76c50x-usb.c
+3
-1
drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
+3
-1
drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
···
561
561
if (!found) {
562
562
/* No platform data for this device, try OF and DMI data */
563
563
brcmf_dmi_probe(settings, chip, chiprev);
564
-
if (brcmf_of_probe(dev, bus_type, settings) == -EPROBE_DEFER)
564
+
if (brcmf_of_probe(dev, bus_type, settings) == -EPROBE_DEFER) {
565
+
kfree(settings);
565
566
return ERR_PTR(-EPROBE_DEFER);
567
+
}
566
568
brcmf_acpi_probe(dev, bus_type, settings);
567
569
}
568
570
return settings;
+3
-5
drivers/net/wireless/intel/iwlwifi/mld/d3.c
+3
-5
drivers/net/wireless/intel/iwlwifi/mld/d3.c
···
1895
1895
int link_id;
1896
1896
int ret;
1897
1897
bool fw_err = false;
1898
-
bool keep_connection;
1899
1898
1900
1899
lockdep_assert_wiphy(mld->wiphy);
1901
1900
···
1964
1965
iwl_mld_process_netdetect_res(mld, bss_vif, &resume_data);
1965
1966
mld->netdetect = false;
1966
1967
} else {
1967
-
keep_connection =
1968
+
bool keep_connection =
1968
1969
iwl_mld_process_wowlan_status(mld, bss_vif,
1969
1970
resume_data.wowlan_status);
1970
1971
···
1972
1973
if (keep_connection)
1973
1974
iwl_mld_unblock_emlsr(mld, bss_vif,
1974
1975
IWL_MLD_EMLSR_BLOCKED_WOWLAN);
1976
+
else
1977
+
ieee80211_resume_disconnect(bss_vif);
1975
1978
}
1976
-
1977
-
if (!mld->netdetect && !keep_connection)
1978
-
ieee80211_resume_disconnect(bss_vif);
1979
1979
1980
1980
goto out;
1981
1981
+1
-1
drivers/net/wireless/intel/iwlwifi/mld/debugfs.c
+1
-1
drivers/net/wireless/intel/iwlwifi/mld/debugfs.c
+1
-1
drivers/net/wireless/intel/iwlwifi/mld/iface.h
+1
-1
drivers/net/wireless/intel/iwlwifi/mld/iface.h
+5
-2
drivers/net/wireless/intel/iwlwifi/mld/mac80211.c
+5
-2
drivers/net/wireless/intel/iwlwifi/mld/mac80211.c
···
475
475
int iwl_mld_mac80211_start(struct ieee80211_hw *hw)
476
476
{
477
477
struct iwl_mld *mld = IWL_MAC80211_GET_MLD(hw);
478
-
int ret;
479
478
bool in_d3 = false;
479
+
int ret = 0;
480
480
481
481
lockdep_assert_wiphy(mld->wiphy);
482
482
···
537
537
/* if the suspend flow fails the fw is in error. Stop it here, and it
538
538
* will be started upon wakeup
539
539
*/
540
-
if (!suspend || iwl_mld_no_wowlan_suspend(mld))
540
+
if (!suspend ||
541
+
(IS_ENABLED(CONFIG_PM_SLEEP) && iwl_mld_no_wowlan_suspend(mld)))
541
542
iwl_mld_stop_fw(mld);
542
543
543
544
/* HW is stopped, no more coming RX. OTOH, the worker can't run as the
···
1944
1943
}
1945
1944
}
1946
1945
1946
+
#ifdef CONFIG_PM_SLEEP
1947
1947
static void iwl_mld_set_wakeup(struct ieee80211_hw *hw, bool enabled)
1948
1948
{
1949
1949
struct iwl_mld *mld = IWL_MAC80211_GET_MLD(hw);
···
1996
1994
1997
1995
return 0;
1998
1996
}
1997
+
#endif
1999
1998
2000
1999
static int iwl_mld_alloc_ptk_pn(struct iwl_mld *mld,
2001
2000
struct iwl_mld_sta *mld_sta,
+7
-1
drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c
+7
-1
drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c
···
147
147
return;
148
148
149
149
if (trans->state >= IWL_TRANS_FW_STARTED &&
150
-
trans_pcie->fw_reset_handshake)
150
+
trans_pcie->fw_reset_handshake) {
151
+
/*
152
+
* Reset handshake can dump firmware on timeout, but that
153
+
* should assume that the firmware is already dead.
154
+
*/
155
+
trans->state = IWL_TRANS_NO_FW;
151
156
iwl_trans_pcie_fw_reset_handshake(trans);
157
+
}
152
158
153
159
trans_pcie->is_down = true;
154
160
+3
-1
drivers/net/wireless/ti/wl1251/tx.c
+3
-1
drivers/net/wireless/ti/wl1251/tx.c
+9
drivers/nvme/host/core.c
+9
drivers/nvme/host/core.c
···
4295
4295
nvme_scan_ns_sequential(ctrl);
4296
4296
}
4297
4297
mutex_unlock(&ctrl->scan_lock);
4298
+
4299
+
/* Requeue if we have missed AENs */
4300
+
if (test_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events))
4301
+
nvme_queue_scan(ctrl);
4302
+
#ifdef CONFIG_NVME_MULTIPATH
4303
+
else
4304
+
/* Re-read the ANA log page to not miss updates */
4305
+
queue_work(nvme_wq, &ctrl->ana_work);
4306
+
#endif
4298
4307
}
4299
4308
4300
4309
/*
+1
-1
drivers/nvme/host/multipath.c
+1
-1
drivers/nvme/host/multipath.c
+2
drivers/nvme/host/tcp.c
+2
drivers/nvme/host/tcp.c
+20
-40
drivers/nvme/target/fc.c
+20
-40
drivers/nvme/target/fc.c
···
995
995
return kref_get_unless_zero(&hostport->ref);
996
996
}
997
997
998
-
static void
999
-
nvmet_fc_free_hostport(struct nvmet_fc_hostport *hostport)
1000
-
{
1001
-
/* if LLDD not implemented, leave as NULL */
1002
-
if (!hostport || !hostport->hosthandle)
1003
-
return;
1004
-
1005
-
nvmet_fc_hostport_put(hostport);
1006
-
}
1007
-
1008
998
static struct nvmet_fc_hostport *
1009
999
nvmet_fc_match_hostport(struct nvmet_fc_tgtport *tgtport, void *hosthandle)
1010
1000
{
···
1018
1028
struct nvmet_fc_hostport *newhost, *match = NULL;
1019
1029
unsigned long flags;
1020
1030
1031
+
/*
1032
+
* Caller holds a reference on tgtport.
1033
+
*/
1034
+
1021
1035
/* if LLDD not implemented, leave as NULL */
1022
1036
if (!hosthandle)
1023
1037
return NULL;
1024
-
1025
-
/*
1026
-
* take reference for what will be the newly allocated hostport if
1027
-
* we end up using a new allocation
1028
-
*/
1029
-
if (!nvmet_fc_tgtport_get(tgtport))
1030
-
return ERR_PTR(-EINVAL);
1031
1038
1032
1039
spin_lock_irqsave(&tgtport->lock, flags);
1033
1040
match = nvmet_fc_match_hostport(tgtport, hosthandle);
1034
1041
spin_unlock_irqrestore(&tgtport->lock, flags);
1035
1042
1036
-
if (match) {
1037
-
/* no new allocation - release reference */
1038
-
nvmet_fc_tgtport_put(tgtport);
1043
+
if (match)
1039
1044
return match;
1040
-
}
1041
1045
1042
1046
newhost = kzalloc(sizeof(*newhost), GFP_KERNEL);
1043
-
if (!newhost) {
1044
-
/* no new allocation - release reference */
1045
-
nvmet_fc_tgtport_put(tgtport);
1047
+
if (!newhost)
1046
1048
return ERR_PTR(-ENOMEM);
1047
-
}
1048
1049
1049
1050
spin_lock_irqsave(&tgtport->lock, flags);
1050
1051
match = nvmet_fc_match_hostport(tgtport, hosthandle);
···
1044
1063
kfree(newhost);
1045
1064
newhost = match;
1046
1065
} else {
1066
+
nvmet_fc_tgtport_get(tgtport);
1047
1067
newhost->tgtport = tgtport;
1048
1068
newhost->hosthandle = hosthandle;
1049
1069
INIT_LIST_HEAD(&newhost->host_list);
···
1058
1076
}
1059
1077
1060
1078
static void
1061
-
nvmet_fc_delete_assoc(struct nvmet_fc_tgt_assoc *assoc)
1062
-
{
1063
-
nvmet_fc_delete_target_assoc(assoc);
1064
-
nvmet_fc_tgt_a_put(assoc);
1065
-
}
1066
-
1067
-
static void
1068
1079
nvmet_fc_delete_assoc_work(struct work_struct *work)
1069
1080
{
1070
1081
struct nvmet_fc_tgt_assoc *assoc =
1071
1082
container_of(work, struct nvmet_fc_tgt_assoc, del_work);
1072
1083
struct nvmet_fc_tgtport *tgtport = assoc->tgtport;
1073
1084
1074
-
nvmet_fc_delete_assoc(assoc);
1085
+
nvmet_fc_delete_target_assoc(assoc);
1086
+
nvmet_fc_tgt_a_put(assoc);
1075
1087
nvmet_fc_tgtport_put(tgtport);
1076
1088
}
1077
1089
···
1073
1097
nvmet_fc_schedule_delete_assoc(struct nvmet_fc_tgt_assoc *assoc)
1074
1098
{
1075
1099
nvmet_fc_tgtport_get(assoc->tgtport);
1076
-
queue_work(nvmet_wq, &assoc->del_work);
1100
+
if (!queue_work(nvmet_wq, &assoc->del_work))
1101
+
nvmet_fc_tgtport_put(assoc->tgtport);
1077
1102
}
1078
1103
1079
1104
static bool
···
1120
1143
goto out_ida;
1121
1144
1122
1145
assoc->tgtport = tgtport;
1146
+
nvmet_fc_tgtport_get(tgtport);
1123
1147
assoc->a_id = idx;
1124
1148
INIT_LIST_HEAD(&assoc->a_list);
1125
1149
kref_init(&assoc->ref);
···
1168
1190
/* Send Disconnect now that all i/o has completed */
1169
1191
nvmet_fc_xmt_disconnect_assoc(assoc);
1170
1192
1171
-
nvmet_fc_free_hostport(assoc->hostport);
1193
+
nvmet_fc_hostport_put(assoc->hostport);
1172
1194
spin_lock_irqsave(&tgtport->lock, flags);
1173
1195
oldls = assoc->rcv_disconn;
1174
1196
spin_unlock_irqrestore(&tgtport->lock, flags);
···
1222
1244
dev_info(tgtport->dev,
1223
1245
"{%d:%d} Association deleted\n",
1224
1246
tgtport->fc_target_port.port_num, assoc->a_id);
1247
+
1248
+
nvmet_fc_tgtport_put(tgtport);
1225
1249
}
1226
1250
1227
1251
static struct nvmet_fc_tgt_assoc *
···
1435
1455
struct nvmet_fc_tgtport *tgtport =
1436
1456
container_of(ref, struct nvmet_fc_tgtport, ref);
1437
1457
struct device *dev = tgtport->dev;
1438
-
unsigned long flags;
1439
-
1440
-
spin_lock_irqsave(&nvmet_fc_tgtlock, flags);
1441
-
list_del(&tgtport->tgt_list);
1442
-
spin_unlock_irqrestore(&nvmet_fc_tgtlock, flags);
1443
1458
1444
1459
nvmet_fc_free_ls_iodlist(tgtport);
1445
1460
···
1595
1620
nvmet_fc_unregister_targetport(struct nvmet_fc_target_port *target_port)
1596
1621
{
1597
1622
struct nvmet_fc_tgtport *tgtport = targetport_to_tgtport(target_port);
1623
+
unsigned long flags;
1624
+
1625
+
spin_lock_irqsave(&nvmet_fc_tgtlock, flags);
1626
+
list_del(&tgtport->tgt_list);
1627
+
spin_unlock_irqrestore(&nvmet_fc_tgtlock, flags);
1598
1628
1599
1629
nvmet_fc_portentry_unbind_tgt(tgtport);
1600
1630
+41
-35
drivers/nvme/target/fcloop.c
+41
-35
drivers/nvme/target/fcloop.c
···
208
208
struct nvme_fc_local_port *localport;
209
209
struct list_head lport_list;
210
210
struct completion unreg_done;
211
+
refcount_t ref;
211
212
};
212
213
213
214
struct fcloop_lport_priv {
···
240
239
struct fcloop_tport *tport;
241
240
struct fcloop_lport *lport;
242
241
struct list_head nport_list;
243
-
struct kref ref;
242
+
refcount_t ref;
244
243
u64 node_name;
245
244
u64 port_name;
246
245
u32 port_role;
···
275
274
u32 inistate;
276
275
bool active;
277
276
bool aborted;
278
-
struct kref ref;
277
+
refcount_t ref;
279
278
struct work_struct fcp_rcv_work;
280
279
struct work_struct abort_rcv_work;
281
280
struct work_struct tio_done_work;
···
479
478
if (targetport) {
480
479
tport = targetport->private;
481
480
spin_lock(&tport->lock);
482
-
list_add_tail(&tport->ls_list, &tls_req->ls_list);
481
+
list_add_tail(&tls_req->ls_list, &tport->ls_list);
483
482
spin_unlock(&tport->lock);
484
483
queue_work(nvmet_wq, &tport->ls_work);
485
484
}
···
535
534
}
536
535
537
536
static void
538
-
fcloop_tfcp_req_free(struct kref *ref)
539
-
{
540
-
struct fcloop_fcpreq *tfcp_req =
541
-
container_of(ref, struct fcloop_fcpreq, ref);
542
-
543
-
kfree(tfcp_req);
544
-
}
545
-
546
-
static void
547
537
fcloop_tfcp_req_put(struct fcloop_fcpreq *tfcp_req)
548
538
{
549
-
kref_put(&tfcp_req->ref, fcloop_tfcp_req_free);
539
+
if (!refcount_dec_and_test(&tfcp_req->ref))
540
+
return;
541
+
542
+
kfree(tfcp_req);
550
543
}
551
544
552
545
static int
553
546
fcloop_tfcp_req_get(struct fcloop_fcpreq *tfcp_req)
554
547
{
555
-
return kref_get_unless_zero(&tfcp_req->ref);
548
+
return refcount_inc_not_zero(&tfcp_req->ref);
556
549
}
557
550
558
551
static void
···
743
748
INIT_WORK(&tfcp_req->fcp_rcv_work, fcloop_fcp_recv_work);
744
749
INIT_WORK(&tfcp_req->abort_rcv_work, fcloop_fcp_abort_recv_work);
745
750
INIT_WORK(&tfcp_req->tio_done_work, fcloop_tgt_fcprqst_done_work);
746
-
kref_init(&tfcp_req->ref);
751
+
refcount_set(&tfcp_req->ref, 1);
747
752
748
753
queue_work(nvmet_wq, &tfcp_req->fcp_rcv_work);
749
754
···
996
1001
}
997
1002
998
1003
static void
999
-
fcloop_nport_free(struct kref *ref)
1004
+
fcloop_lport_put(struct fcloop_lport *lport)
1000
1005
{
1001
-
struct fcloop_nport *nport =
1002
-
container_of(ref, struct fcloop_nport, ref);
1006
+
unsigned long flags;
1003
1007
1004
-
kfree(nport);
1008
+
if (!refcount_dec_and_test(&lport->ref))
1009
+
return;
1010
+
1011
+
spin_lock_irqsave(&fcloop_lock, flags);
1012
+
list_del(&lport->lport_list);
1013
+
spin_unlock_irqrestore(&fcloop_lock, flags);
1014
+
1015
+
kfree(lport);
1016
+
}
1017
+
1018
+
static int
1019
+
fcloop_lport_get(struct fcloop_lport *lport)
1020
+
{
1021
+
return refcount_inc_not_zero(&lport->ref);
1005
1022
}
1006
1023
1007
1024
static void
1008
1025
fcloop_nport_put(struct fcloop_nport *nport)
1009
1026
{
1010
-
kref_put(&nport->ref, fcloop_nport_free);
1027
+
if (!refcount_dec_and_test(&nport->ref))
1028
+
return;
1029
+
1030
+
kfree(nport);
1011
1031
}
1012
1032
1013
1033
static int
1014
1034
fcloop_nport_get(struct fcloop_nport *nport)
1015
1035
{
1016
-
return kref_get_unless_zero(&nport->ref);
1036
+
return refcount_inc_not_zero(&nport->ref);
1017
1037
}
1018
1038
1019
1039
static void
···
1039
1029
1040
1030
/* release any threads waiting for the unreg to complete */
1041
1031
complete(&lport->unreg_done);
1032
+
1033
+
fcloop_lport_put(lport);
1042
1034
}
1043
1035
1044
1036
static void
···
1152
1140
1153
1141
lport->localport = localport;
1154
1142
INIT_LIST_HEAD(&lport->lport_list);
1143
+
refcount_set(&lport->ref, 1);
1155
1144
1156
1145
spin_lock_irqsave(&fcloop_lock, flags);
1157
1146
list_add_tail(&lport->lport_list, &fcloop_lports);
···
1169
1156
return ret ? ret : count;
1170
1157
}
1171
1158
1172
-
1173
-
static void
1174
-
__unlink_local_port(struct fcloop_lport *lport)
1175
-
{
1176
-
list_del(&lport->lport_list);
1177
-
}
1178
-
1179
1159
static int
1180
1160
__wait_localport_unreg(struct fcloop_lport *lport)
1181
1161
{
···
1180
1174
1181
1175
if (!ret)
1182
1176
wait_for_completion(&lport->unreg_done);
1183
-
1184
-
kfree(lport);
1185
1177
1186
1178
return ret;
1187
1179
}
···
1203
1199
list_for_each_entry(tlport, &fcloop_lports, lport_list) {
1204
1200
if (tlport->localport->node_name == nodename &&
1205
1201
tlport->localport->port_name == portname) {
1202
+
if (!fcloop_lport_get(tlport))
1203
+
break;
1206
1204
lport = tlport;
1207
-
__unlink_local_port(lport);
1208
1205
break;
1209
1206
}
1210
1207
}
···
1215
1210
return -ENOENT;
1216
1211
1217
1212
ret = __wait_localport_unreg(lport);
1213
+
fcloop_lport_put(lport);
1218
1214
1219
1215
return ret ? ret : count;
1220
1216
}
···
1255
1249
newnport->port_role = opts->roles;
1256
1250
if (opts->mask & NVMF_OPT_FCADDR)
1257
1251
newnport->port_id = opts->fcaddr;
1258
-
kref_init(&newnport->ref);
1252
+
refcount_set(&newnport->ref, 1);
1259
1253
1260
1254
spin_lock_irqsave(&fcloop_lock, flags);
1261
1255
···
1643
1637
for (;;) {
1644
1638
lport = list_first_entry_or_null(&fcloop_lports,
1645
1639
typeof(*lport), lport_list);
1646
-
if (!lport)
1640
+
if (!lport || !fcloop_lport_get(lport))
1647
1641
break;
1648
-
1649
-
__unlink_local_port(lport);
1650
1642
1651
1643
spin_unlock_irqrestore(&fcloop_lock, flags);
1652
1644
1653
1645
ret = __wait_localport_unreg(lport);
1654
1646
if (ret)
1655
1647
pr_warn("%s: Failed deleting local port\n", __func__);
1648
+
1649
+
fcloop_lport_put(lport);
1656
1650
1657
1651
spin_lock_irqsave(&fcloop_lock, flags);
1658
1652
}
+6
-6
drivers/pci/quirks.c
+6
-6
drivers/pci/quirks.c
···
1990
1990
device_create_managed_software_node(&pdev->dev, properties, NULL))
1991
1991
pci_warn(pdev, "could not add stall property");
1992
1992
}
1993
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa250, quirk_huawei_pcie_sva);
1994
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva);
1995
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa255, quirk_huawei_pcie_sva);
1996
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa256, quirk_huawei_pcie_sva);
1997
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa258, quirk_huawei_pcie_sva);
1998
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa259, quirk_huawei_pcie_sva);
1993
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa250, quirk_huawei_pcie_sva);
1994
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva);
1995
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa255, quirk_huawei_pcie_sva);
1996
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa256, quirk_huawei_pcie_sva);
1997
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa258, quirk_huawei_pcie_sva);
1998
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa259, quirk_huawei_pcie_sva);
1999
1999
2000
2000
/*
2001
2001
* It's possible for the MSI to get corrupted if SHPC and ACPI are used
+2
-2
drivers/platform/mellanox/mlxbf-bootctl.c
+2
-2
drivers/platform/mellanox/mlxbf-bootctl.c
···
333
333
else
334
334
status = valid ? "Invalid" : "Free";
335
335
}
336
-
buf_len += sysfs_emit(buf + buf_len, "%d:%s ", key, status);
336
+
buf_len += sysfs_emit_at(buf, buf_len, "%d:%s ", key, status);
337
337
}
338
-
buf_len += sysfs_emit(buf + buf_len, "\n");
338
+
buf_len += sysfs_emit_at(buf, buf_len, "\n");
339
339
340
340
return buf_len;
341
341
}
+2
-2
drivers/platform/x86/amd/pmf/auto-mode.c
+2
-2
drivers/platform/x86/amd/pmf/auto-mode.c
···
120
120
amd_pmf_send_cmd(dev, SET_SPPT_APU_ONLY, false, pwr_ctrl->sppt_apu_only, NULL);
121
121
amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false, pwr_ctrl->stt_min, NULL);
122
122
amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,
123
-
pwr_ctrl->stt_skin_temp[STT_TEMP_APU], NULL);
123
+
fixp_q88_fromint(pwr_ctrl->stt_skin_temp[STT_TEMP_APU]), NULL);
124
124
amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,
125
-
pwr_ctrl->stt_skin_temp[STT_TEMP_HS2], NULL);
125
+
fixp_q88_fromint(pwr_ctrl->stt_skin_temp[STT_TEMP_HS2]), NULL);
126
126
127
127
if (is_apmf_func_supported(dev, APMF_FUNC_SET_FAN_IDX))
128
128
apmf_update_fan_idx(dev, config_store.mode_set[idx].fan_control.manual,
+4
-4
drivers/platform/x86/amd/pmf/cnqf.c
+4
-4
drivers/platform/x86/amd/pmf/cnqf.c
···
81
81
amd_pmf_send_cmd(dev, SET_SPPT, false, pc->sppt, NULL);
82
82
amd_pmf_send_cmd(dev, SET_SPPT_APU_ONLY, false, pc->sppt_apu_only, NULL);
83
83
amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false, pc->stt_min, NULL);
84
-
amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false, pc->stt_skin_temp[STT_TEMP_APU],
85
-
NULL);
86
-
amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false, pc->stt_skin_temp[STT_TEMP_HS2],
87
-
NULL);
84
+
amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,
85
+
fixp_q88_fromint(pc->stt_skin_temp[STT_TEMP_APU]), NULL);
86
+
amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,
87
+
fixp_q88_fromint(pc->stt_skin_temp[STT_TEMP_HS2]), NULL);
88
88
89
89
if (is_apmf_func_supported(dev, APMF_FUNC_SET_FAN_IDX))
90
90
apmf_update_fan_idx(dev,
+14
drivers/platform/x86/amd/pmf/core.c
+14
drivers/platform/x86/amd/pmf/core.c
···
176
176
dev_dbg(dev->dev, "AMD_PMF_REGISTER_MESSAGE:%x\n", value);
177
177
}
178
178
179
+
/**
180
+
* fixp_q88_fromint: Convert integer to Q8.8
181
+
* @val: input value
182
+
*
183
+
* Converts an integer into binary fixed point format where 8 bits
184
+
* are used for integer and 8 bits are used for the decimal.
185
+
*
186
+
* Return: unsigned integer converted to Q8.8 format
187
+
*/
188
+
u32 fixp_q88_fromint(u32 val)
189
+
{
190
+
return val << 8;
191
+
}
192
+
179
193
int amd_pmf_send_cmd(struct amd_pmf_dev *dev, u8 message, bool get, u32 arg, u32 *data)
180
194
{
181
195
int rc;
+1
drivers/platform/x86/amd/pmf/pmf.h
+1
drivers/platform/x86/amd/pmf/pmf.h
···
777
777
int apmf_os_power_slider_update(struct amd_pmf_dev *dev, u8 flag);
778
778
int amd_pmf_set_dram_addr(struct amd_pmf_dev *dev, bool alloc_buffer);
779
779
int amd_pmf_notify_sbios_heartbeat_event_v2(struct amd_pmf_dev *dev, u8 flag);
780
+
u32 fixp_q88_fromint(u32 val);
780
781
781
782
/* SPS Layer */
782
783
int amd_pmf_get_pprof_modes(struct amd_pmf_dev *pmf);
+8
-4
drivers/platform/x86/amd/pmf/sps.c
+8
-4
drivers/platform/x86/amd/pmf/sps.c
···
198
198
amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false,
199
199
apts_config_store.val[idx].stt_min_limit, NULL);
200
200
amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,
201
-
apts_config_store.val[idx].stt_skin_temp_limit_apu, NULL);
201
+
fixp_q88_fromint(apts_config_store.val[idx].stt_skin_temp_limit_apu),
202
+
NULL);
202
203
amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,
203
-
apts_config_store.val[idx].stt_skin_temp_limit_hs2, NULL);
204
+
fixp_q88_fromint(apts_config_store.val[idx].stt_skin_temp_limit_hs2),
205
+
NULL);
204
206
}
205
207
206
208
void amd_pmf_update_slider(struct amd_pmf_dev *dev, bool op, int idx,
···
219
217
amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false,
220
218
config_store.prop[src][idx].stt_min, NULL);
221
219
amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,
222
-
config_store.prop[src][idx].stt_skin_temp[STT_TEMP_APU], NULL);
220
+
fixp_q88_fromint(config_store.prop[src][idx].stt_skin_temp[STT_TEMP_APU]),
221
+
NULL);
223
222
amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,
224
-
config_store.prop[src][idx].stt_skin_temp[STT_TEMP_HS2], NULL);
223
+
fixp_q88_fromint(config_store.prop[src][idx].stt_skin_temp[STT_TEMP_HS2]),
224
+
NULL);
225
225
} else if (op == SLIDER_OP_GET) {
226
226
amd_pmf_send_cmd(dev, GET_SPL, true, ARG_NONE, &table->prop[src][idx].spl);
227
227
amd_pmf_send_cmd(dev, GET_FPPT, true, ARG_NONE, &table->prop[src][idx].fppt);
+4
-2
drivers/platform/x86/amd/pmf/tee-if.c
+4
-2
drivers/platform/x86/amd/pmf/tee-if.c
···
123
123
124
124
case PMF_POLICY_STT_SKINTEMP_APU:
125
125
if (dev->prev_data->stt_skintemp_apu != val) {
126
-
amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false, val, NULL);
126
+
amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,
127
+
fixp_q88_fromint(val), NULL);
127
128
dev_dbg(dev->dev, "update STT_SKINTEMP_APU: %u\n", val);
128
129
dev->prev_data->stt_skintemp_apu = val;
129
130
}
···
132
131
133
132
case PMF_POLICY_STT_SKINTEMP_HS2:
134
133
if (dev->prev_data->stt_skintemp_hs2 != val) {
135
-
amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false, val, NULL);
134
+
amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,
135
+
fixp_q88_fromint(val), NULL);
136
136
dev_dbg(dev->dev, "update STT_SKINTEMP_HS2: %u\n", val);
137
137
dev->prev_data->stt_skintemp_hs2 = val;
138
138
}
+6
-3
drivers/platform/x86/asus-laptop.c
+6
-3
drivers/platform/x86/asus-laptop.c
···
426
426
427
427
static int pega_acc_axis(struct asus_laptop *asus, int curr, char *method)
428
428
{
429
+
unsigned long long val = (unsigned long long)curr;
430
+
acpi_status status;
429
431
int i, delta;
430
-
unsigned long long val;
431
-
for (i = 0; i < PEGA_ACC_RETRIES; i++) {
432
-
acpi_evaluate_integer(asus->handle, method, NULL, &val);
433
432
433
+
for (i = 0; i < PEGA_ACC_RETRIES; i++) {
434
+
status = acpi_evaluate_integer(asus->handle, method, NULL, &val);
435
+
if (ACPI_FAILURE(status))
436
+
continue;
434
437
/* The output is noisy. From reading the ASL
435
438
* dissassembly, timeout errors are returned with 1's
436
439
* in the high word, and the lack of locking around
+48
drivers/platform/x86/dell/alienware-wmi-wmax.c
+48
drivers/platform/x86/dell/alienware-wmi-wmax.c
···
62
62
63
63
static const struct dmi_system_id awcc_dmi_table[] __initconst = {
64
64
{
65
+
.ident = "Alienware Area-51m R2",
66
+
.matches = {
67
+
DMI_MATCH(DMI_SYS_VENDOR, "Alienware"),
68
+
DMI_MATCH(DMI_PRODUCT_NAME, "Alienware Area-51m R2"),
69
+
},
70
+
.driver_data = &generic_quirks,
71
+
},
72
+
{
73
+
.ident = "Alienware m16 R1",
74
+
.matches = {
75
+
DMI_MATCH(DMI_SYS_VENDOR, "Alienware"),
76
+
DMI_MATCH(DMI_PRODUCT_NAME, "Alienware m16 R1"),
77
+
},
78
+
.driver_data = &g_series_quirks,
79
+
},
80
+
{
65
81
.ident = "Alienware m16 R1 AMD",
66
82
.matches = {
67
83
DMI_MATCH(DMI_SYS_VENDOR, "Alienware"),
68
84
DMI_MATCH(DMI_PRODUCT_NAME, "Alienware m16 R1 AMD"),
85
+
},
86
+
.driver_data = &g_series_quirks,
87
+
},
88
+
{
89
+
.ident = "Alienware m16 R2",
90
+
.matches = {
91
+
DMI_MATCH(DMI_SYS_VENDOR, "Alienware"),
92
+
DMI_MATCH(DMI_PRODUCT_NAME, "Alienware m16 R2"),
69
93
},
70
94
.driver_data = &generic_quirks,
71
95
},
···
114
90
.matches = {
115
91
DMI_MATCH(DMI_SYS_VENDOR, "Alienware"),
116
92
DMI_MATCH(DMI_PRODUCT_NAME, "Alienware x15 R1"),
93
+
},
94
+
.driver_data = &generic_quirks,
95
+
},
96
+
{
97
+
.ident = "Alienware x15 R2",
98
+
.matches = {
99
+
DMI_MATCH(DMI_SYS_VENDOR, "Alienware"),
100
+
DMI_MATCH(DMI_PRODUCT_NAME, "Alienware x15 R2"),
117
101
},
118
102
.driver_data = &generic_quirks,
119
103
},
···
158
126
.driver_data = &g_series_quirks,
159
127
},
160
128
{
129
+
.ident = "Dell Inc. G16 7630",
130
+
.matches = {
131
+
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
132
+
DMI_MATCH(DMI_PRODUCT_NAME, "Dell G16 7630"),
133
+
},
134
+
.driver_data = &g_series_quirks,
135
+
},
136
+
{
161
137
.ident = "Dell Inc. G3 3500",
162
138
.matches = {
163
139
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
···
186
146
.matches = {
187
147
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
188
148
DMI_MATCH(DMI_PRODUCT_NAME, "G5 5500"),
149
+
},
150
+
.driver_data = &g_series_quirks,
151
+
},
152
+
{
153
+
.ident = "Dell Inc. G5 5505",
154
+
.matches = {
155
+
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
156
+
DMI_MATCH(DMI_PRODUCT_NAME, "G5 5505"),
189
157
},
190
158
.driver_data = &g_series_quirks,
191
159
},
+63
-36
drivers/platform/x86/msi-wmi-platform.c
+63
-36
drivers/platform/x86/msi-wmi-platform.c
···
10
10
#include <linux/acpi.h>
11
11
#include <linux/bits.h>
12
12
#include <linux/bitfield.h>
13
+
#include <linux/cleanup.h>
13
14
#include <linux/debugfs.h>
14
15
#include <linux/device.h>
15
16
#include <linux/device/driver.h>
···
18
17
#include <linux/hwmon.h>
19
18
#include <linux/kernel.h>
20
19
#include <linux/module.h>
20
+
#include <linux/mutex.h>
21
21
#include <linux/printk.h>
22
22
#include <linux/rwsem.h>
23
23
#include <linux/types.h>
···
78
76
MSI_PLATFORM_GET_WMI = 0x1d,
79
77
};
80
78
81
-
struct msi_wmi_platform_debugfs_data {
79
+
struct msi_wmi_platform_data {
82
80
struct wmi_device *wdev;
81
+
struct mutex wmi_lock; /* Necessary when calling WMI methods */
82
+
};
83
+
84
+
struct msi_wmi_platform_debugfs_data {
85
+
struct msi_wmi_platform_data *data;
83
86
enum msi_wmi_platform_method method;
84
87
struct rw_semaphore buffer_lock; /* Protects debugfs buffer */
85
88
size_t length;
···
139
132
return 0;
140
133
}
141
134
142
-
static int msi_wmi_platform_query(struct wmi_device *wdev, enum msi_wmi_platform_method method,
143
-
u8 *input, size_t input_length, u8 *output, size_t output_length)
135
+
static int msi_wmi_platform_query(struct msi_wmi_platform_data *data,
136
+
enum msi_wmi_platform_method method, u8 *input,
137
+
size_t input_length, u8 *output, size_t output_length)
144
138
{
145
139
struct acpi_buffer out = { ACPI_ALLOCATE_BUFFER, NULL };
146
140
struct acpi_buffer in = {
···
155
147
if (!input_length || !output_length)
156
148
return -EINVAL;
157
149
158
-
status = wmidev_evaluate_method(wdev, 0x0, method, &in, &out);
159
-
if (ACPI_FAILURE(status))
160
-
return -EIO;
150
+
/*
151
+
* The ACPI control method responsible for handling the WMI method calls
152
+
* is not thread-safe. Because of this we have to do the locking ourself.
153
+
*/
154
+
scoped_guard(mutex, &data->wmi_lock) {
155
+
status = wmidev_evaluate_method(data->wdev, 0x0, method, &in, &out);
156
+
if (ACPI_FAILURE(status))
157
+
return -EIO;
158
+
}
161
159
162
160
obj = out.pointer;
163
161
if (!obj)
···
184
170
static int msi_wmi_platform_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
185
171
int channel, long *val)
186
172
{
187
-
struct wmi_device *wdev = dev_get_drvdata(dev);
173
+
struct msi_wmi_platform_data *data = dev_get_drvdata(dev);
188
174
u8 input[32] = { 0 };
189
175
u8 output[32];
190
-
u16 data;
176
+
u16 value;
191
177
int ret;
192
178
193
-
ret = msi_wmi_platform_query(wdev, MSI_PLATFORM_GET_FAN, input, sizeof(input), output,
179
+
ret = msi_wmi_platform_query(data, MSI_PLATFORM_GET_FAN, input, sizeof(input), output,
194
180
sizeof(output));
195
181
if (ret < 0)
196
182
return ret;
197
183
198
-
data = get_unaligned_be16(&output[channel * 2 + 1]);
199
-
if (!data)
184
+
value = get_unaligned_be16(&output[channel * 2 + 1]);
185
+
if (!value)
200
186
*val = 0;
201
187
else
202
-
*val = 480000 / data;
188
+
*val = 480000 / value;
203
189
204
190
return 0;
205
191
}
···
245
231
return ret;
246
232
247
233
down_write(&data->buffer_lock);
248
-
ret = msi_wmi_platform_query(data->wdev, data->method, payload, data->length, data->buffer,
234
+
ret = msi_wmi_platform_query(data->data, data->method, payload, data->length, data->buffer,
249
235
data->length);
250
236
up_write(&data->buffer_lock);
251
237
···
291
277
debugfs_remove_recursive(dir);
292
278
}
293
279
294
-
static void msi_wmi_platform_debugfs_add(struct wmi_device *wdev, struct dentry *dir,
280
+
static void msi_wmi_platform_debugfs_add(struct msi_wmi_platform_data *drvdata, struct dentry *dir,
295
281
const char *name, enum msi_wmi_platform_method method)
296
282
{
297
283
struct msi_wmi_platform_debugfs_data *data;
298
284
struct dentry *entry;
299
285
300
-
data = devm_kzalloc(&wdev->dev, sizeof(*data), GFP_KERNEL);
286
+
data = devm_kzalloc(&drvdata->wdev->dev, sizeof(*data), GFP_KERNEL);
301
287
if (!data)
302
288
return;
303
289
304
-
data->wdev = wdev;
290
+
data->data = drvdata;
305
291
data->method = method;
306
292
init_rwsem(&data->buffer_lock);
307
293
···
312
298
313
299
entry = debugfs_create_file(name, 0600, dir, data, &msi_wmi_platform_debugfs_fops);
314
300
if (IS_ERR(entry))
315
-
devm_kfree(&wdev->dev, data);
301
+
devm_kfree(&drvdata->wdev->dev, data);
316
302
}
317
303
318
-
static void msi_wmi_platform_debugfs_init(struct wmi_device *wdev)
304
+
static void msi_wmi_platform_debugfs_init(struct msi_wmi_platform_data *data)
319
305
{
320
306
struct dentry *dir;
321
307
char dir_name[64];
322
308
int ret, method;
323
309
324
-
scnprintf(dir_name, ARRAY_SIZE(dir_name), "%s-%s", DRIVER_NAME, dev_name(&wdev->dev));
310
+
scnprintf(dir_name, ARRAY_SIZE(dir_name), "%s-%s", DRIVER_NAME, dev_name(&data->wdev->dev));
325
311
326
312
dir = debugfs_create_dir(dir_name, NULL);
327
313
if (IS_ERR(dir))
328
314
return;
329
315
330
-
ret = devm_add_action_or_reset(&wdev->dev, msi_wmi_platform_debugfs_remove, dir);
316
+
ret = devm_add_action_or_reset(&data->wdev->dev, msi_wmi_platform_debugfs_remove, dir);
331
317
if (ret < 0)
332
318
return;
333
319
334
320
for (method = MSI_PLATFORM_GET_PACKAGE; method <= MSI_PLATFORM_GET_WMI; method++)
335
-
msi_wmi_platform_debugfs_add(wdev, dir, msi_wmi_platform_debugfs_names[method - 1],
321
+
msi_wmi_platform_debugfs_add(data, dir, msi_wmi_platform_debugfs_names[method - 1],
336
322
method);
337
323
}
338
324
339
-
static int msi_wmi_platform_hwmon_init(struct wmi_device *wdev)
325
+
static int msi_wmi_platform_hwmon_init(struct msi_wmi_platform_data *data)
340
326
{
341
327
struct device *hdev;
342
328
343
-
hdev = devm_hwmon_device_register_with_info(&wdev->dev, "msi_wmi_platform", wdev,
329
+
hdev = devm_hwmon_device_register_with_info(&data->wdev->dev, "msi_wmi_platform", data,
344
330
&msi_wmi_platform_chip_info, NULL);
345
331
346
332
return PTR_ERR_OR_ZERO(hdev);
347
333
}
348
334
349
-
static int msi_wmi_platform_ec_init(struct wmi_device *wdev)
335
+
static int msi_wmi_platform_ec_init(struct msi_wmi_platform_data *data)
350
336
{
351
337
u8 input[32] = { 0 };
352
338
u8 output[32];
353
339
u8 flags;
354
340
int ret;
355
341
356
-
ret = msi_wmi_platform_query(wdev, MSI_PLATFORM_GET_EC, input, sizeof(input), output,
342
+
ret = msi_wmi_platform_query(data, MSI_PLATFORM_GET_EC, input, sizeof(input), output,
357
343
sizeof(output));
358
344
if (ret < 0)
359
345
return ret;
360
346
361
347
flags = output[MSI_PLATFORM_EC_FLAGS_OFFSET];
362
348
363
-
dev_dbg(&wdev->dev, "EC RAM version %lu.%lu\n",
349
+
dev_dbg(&data->wdev->dev, "EC RAM version %lu.%lu\n",
364
350
FIELD_GET(MSI_PLATFORM_EC_MAJOR_MASK, flags),
365
351
FIELD_GET(MSI_PLATFORM_EC_MINOR_MASK, flags));
366
-
dev_dbg(&wdev->dev, "EC firmware version %.28s\n",
352
+
dev_dbg(&data->wdev->dev, "EC firmware version %.28s\n",
367
353
&output[MSI_PLATFORM_EC_VERSION_OFFSET]);
368
354
369
355
if (!(flags & MSI_PLATFORM_EC_IS_TIGERLAKE)) {
370
356
if (!force)
371
357
return -ENODEV;
372
358
373
-
dev_warn(&wdev->dev, "Loading on a non-Tigerlake platform\n");
359
+
dev_warn(&data->wdev->dev, "Loading on a non-Tigerlake platform\n");
374
360
}
375
361
376
362
return 0;
377
363
}
378
364
379
-
static int msi_wmi_platform_init(struct wmi_device *wdev)
365
+
static int msi_wmi_platform_init(struct msi_wmi_platform_data *data)
380
366
{
381
367
u8 input[32] = { 0 };
382
368
u8 output[32];
383
369
int ret;
384
370
385
-
ret = msi_wmi_platform_query(wdev, MSI_PLATFORM_GET_WMI, input, sizeof(input), output,
371
+
ret = msi_wmi_platform_query(data, MSI_PLATFORM_GET_WMI, input, sizeof(input), output,
386
372
sizeof(output));
387
373
if (ret < 0)
388
374
return ret;
389
375
390
-
dev_dbg(&wdev->dev, "WMI interface version %u.%u\n",
376
+
dev_dbg(&data->wdev->dev, "WMI interface version %u.%u\n",
391
377
output[MSI_PLATFORM_WMI_MAJOR_OFFSET],
392
378
output[MSI_PLATFORM_WMI_MINOR_OFFSET]);
393
379
···
395
381
if (!force)
396
382
return -ENODEV;
397
383
398
-
dev_warn(&wdev->dev, "Loading despite unsupported WMI interface version (%u.%u)\n",
384
+
dev_warn(&data->wdev->dev,
385
+
"Loading despite unsupported WMI interface version (%u.%u)\n",
399
386
output[MSI_PLATFORM_WMI_MAJOR_OFFSET],
400
387
output[MSI_PLATFORM_WMI_MINOR_OFFSET]);
401
388
}
···
406
391
407
392
static int msi_wmi_platform_probe(struct wmi_device *wdev, const void *context)
408
393
{
394
+
struct msi_wmi_platform_data *data;
409
395
int ret;
410
396
411
-
ret = msi_wmi_platform_init(wdev);
397
+
data = devm_kzalloc(&wdev->dev, sizeof(*data), GFP_KERNEL);
398
+
if (!data)
399
+
return -ENOMEM;
400
+
401
+
data->wdev = wdev;
402
+
dev_set_drvdata(&wdev->dev, data);
403
+
404
+
ret = devm_mutex_init(&wdev->dev, &data->wmi_lock);
412
405
if (ret < 0)
413
406
return ret;
414
407
415
-
ret = msi_wmi_platform_ec_init(wdev);
408
+
ret = msi_wmi_platform_init(data);
416
409
if (ret < 0)
417
410
return ret;
418
411
419
-
msi_wmi_platform_debugfs_init(wdev);
412
+
ret = msi_wmi_platform_ec_init(data);
413
+
if (ret < 0)
414
+
return ret;
420
415
421
-
return msi_wmi_platform_hwmon_init(wdev);
416
+
msi_wmi_platform_debugfs_init(data);
417
+
418
+
return msi_wmi_platform_hwmon_init(data);
422
419
}
423
420
424
421
static const struct wmi_device_id msi_wmi_platform_id_table[] = {
+13
-1
drivers/platform/x86/x86-android-tablets/dmi.c
+13
-1
drivers/platform/x86/x86-android-tablets/dmi.c
···
180
180
.driver_data = (void *)&peaq_c1010_info,
181
181
},
182
182
{
183
+
/* Vexia Edu Atla 10 tablet 5V version */
184
+
.matches = {
185
+
/* Having all 3 of these not set is somewhat unique */
186
+
DMI_MATCH(DMI_SYS_VENDOR, "To be filled by O.E.M."),
187
+
DMI_MATCH(DMI_PRODUCT_NAME, "To be filled by O.E.M."),
188
+
DMI_MATCH(DMI_BOARD_NAME, "To be filled by O.E.M."),
189
+
/* Above strings are too generic, also match on BIOS date */
190
+
DMI_MATCH(DMI_BIOS_DATE, "05/14/2015"),
191
+
},
192
+
.driver_data = (void *)&vexia_edu_atla10_5v_info,
193
+
},
194
+
{
183
195
/* Vexia Edu Atla 10 tablet 9V version */
184
196
.matches = {
185
197
DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
···
199
187
/* Above strings are too generic, also match on BIOS date */
200
188
DMI_MATCH(DMI_BIOS_DATE, "08/25/2014"),
201
189
},
202
-
.driver_data = (void *)&vexia_edu_atla10_info,
190
+
.driver_data = (void *)&vexia_edu_atla10_9v_info,
203
191
},
204
192
{
205
193
/* Whitelabel (sold as various brands) TM800A550L */
+110
-50
drivers/platform/x86/x86-android-tablets/other.c
+110
-50
drivers/platform/x86/x86-android-tablets/other.c
···
599
599
};
600
600
601
601
/*
602
-
* Vexia EDU ATLA 10 tablet, Android 4.2 / 4.4 + Guadalinex Ubuntu tablet
602
+
* Vexia EDU ATLA 10 tablet 5V, Android 4.4 + Guadalinex Ubuntu tablet
603
603
* distributed to schools in the Spanish Andalucía region.
604
604
*/
605
-
static const char * const crystal_cove_pwrsrc_psy[] = { "crystal_cove_pwrsrc" };
606
-
607
-
static const struct property_entry vexia_edu_atla10_ulpmc_props[] = {
608
-
PROPERTY_ENTRY_STRING_ARRAY("supplied-from", crystal_cove_pwrsrc_psy),
609
-
{ }
610
-
};
611
-
612
-
static const struct software_node vexia_edu_atla10_ulpmc_node = {
613
-
.properties = vexia_edu_atla10_ulpmc_props,
614
-
};
615
-
616
-
static const char * const vexia_edu_atla10_accel_mount_matrix[] = {
617
-
"0", "-1", "0",
618
-
"1", "0", "0",
619
-
"0", "0", "1"
620
-
};
621
-
622
-
static const struct property_entry vexia_edu_atla10_accel_props[] = {
623
-
PROPERTY_ENTRY_STRING_ARRAY("mount-matrix", vexia_edu_atla10_accel_mount_matrix),
624
-
{ }
625
-
};
626
-
627
-
static const struct software_node vexia_edu_atla10_accel_node = {
628
-
.properties = vexia_edu_atla10_accel_props,
629
-
};
630
-
631
-
static const struct property_entry vexia_edu_atla10_touchscreen_props[] = {
605
+
static const struct property_entry vexia_edu_atla10_5v_touchscreen_props[] = {
632
606
PROPERTY_ENTRY_U32("hid-descr-addr", 0x0000),
633
607
PROPERTY_ENTRY_U32("post-reset-deassert-delay-ms", 120),
634
608
{ }
635
609
};
636
610
637
-
static const struct software_node vexia_edu_atla10_touchscreen_node = {
638
-
.properties = vexia_edu_atla10_touchscreen_props,
611
+
static const struct software_node vexia_edu_atla10_5v_touchscreen_node = {
612
+
.properties = vexia_edu_atla10_5v_touchscreen_props,
639
613
};
640
614
641
-
static const struct property_entry vexia_edu_atla10_pmic_props[] = {
615
+
static const struct x86_i2c_client_info vexia_edu_atla10_5v_i2c_clients[] __initconst = {
616
+
{
617
+
/* kxcjk1013 accelerometer */
618
+
.board_info = {
619
+
.type = "kxcjk1013",
620
+
.addr = 0x0f,
621
+
.dev_name = "kxcjk1013",
622
+
},
623
+
.adapter_path = "\\_SB_.I2C3",
624
+
}, {
625
+
/* touchscreen controller */
626
+
.board_info = {
627
+
.type = "hid-over-i2c",
628
+
.addr = 0x38,
629
+
.dev_name = "FTSC1000",
630
+
.swnode = &vexia_edu_atla10_5v_touchscreen_node,
631
+
},
632
+
.adapter_path = "\\_SB_.I2C4",
633
+
.irq_data = {
634
+
.type = X86_ACPI_IRQ_TYPE_APIC,
635
+
.index = 0x44,
636
+
.trigger = ACPI_LEVEL_SENSITIVE,
637
+
.polarity = ACPI_ACTIVE_HIGH,
638
+
},
639
+
}
640
+
};
641
+
642
+
static struct gpiod_lookup_table vexia_edu_atla10_5v_ft5416_gpios = {
643
+
.dev_id = "i2c-FTSC1000",
644
+
.table = {
645
+
GPIO_LOOKUP("INT33FC:01", 26, "reset", GPIO_ACTIVE_LOW),
646
+
{ }
647
+
},
648
+
};
649
+
650
+
static struct gpiod_lookup_table * const vexia_edu_atla10_5v_gpios[] = {
651
+
&vexia_edu_atla10_5v_ft5416_gpios,
652
+
NULL
653
+
};
654
+
655
+
const struct x86_dev_info vexia_edu_atla10_5v_info __initconst = {
656
+
.i2c_client_info = vexia_edu_atla10_5v_i2c_clients,
657
+
.i2c_client_count = ARRAY_SIZE(vexia_edu_atla10_5v_i2c_clients),
658
+
.gpiod_lookup_tables = vexia_edu_atla10_5v_gpios,
659
+
};
660
+
661
+
/*
662
+
* Vexia EDU ATLA 10 tablet 9V, Android 4.2 + Guadalinex Ubuntu tablet
663
+
* distributed to schools in the Spanish Andalucía region.
664
+
*/
665
+
static const char * const crystal_cove_pwrsrc_psy[] = { "crystal_cove_pwrsrc" };
666
+
667
+
static const struct property_entry vexia_edu_atla10_9v_ulpmc_props[] = {
668
+
PROPERTY_ENTRY_STRING_ARRAY("supplied-from", crystal_cove_pwrsrc_psy),
669
+
{ }
670
+
};
671
+
672
+
static const struct software_node vexia_edu_atla10_9v_ulpmc_node = {
673
+
.properties = vexia_edu_atla10_9v_ulpmc_props,
674
+
};
675
+
676
+
static const char * const vexia_edu_atla10_9v_accel_mount_matrix[] = {
677
+
"0", "-1", "0",
678
+
"1", "0", "0",
679
+
"0", "0", "1"
680
+
};
681
+
682
+
static const struct property_entry vexia_edu_atla10_9v_accel_props[] = {
683
+
PROPERTY_ENTRY_STRING_ARRAY("mount-matrix", vexia_edu_atla10_9v_accel_mount_matrix),
684
+
{ }
685
+
};
686
+
687
+
static const struct software_node vexia_edu_atla10_9v_accel_node = {
688
+
.properties = vexia_edu_atla10_9v_accel_props,
689
+
};
690
+
691
+
static const struct property_entry vexia_edu_atla10_9v_touchscreen_props[] = {
692
+
PROPERTY_ENTRY_U32("hid-descr-addr", 0x0000),
693
+
PROPERTY_ENTRY_U32("post-reset-deassert-delay-ms", 120),
694
+
{ }
695
+
};
696
+
697
+
static const struct software_node vexia_edu_atla10_9v_touchscreen_node = {
698
+
.properties = vexia_edu_atla10_9v_touchscreen_props,
699
+
};
700
+
701
+
static const struct property_entry vexia_edu_atla10_9v_pmic_props[] = {
642
702
PROPERTY_ENTRY_BOOL("linux,register-pwrsrc-power_supply"),
643
703
{ }
644
704
};
645
705
646
-
static const struct software_node vexia_edu_atla10_pmic_node = {
647
-
.properties = vexia_edu_atla10_pmic_props,
706
+
static const struct software_node vexia_edu_atla10_9v_pmic_node = {
707
+
.properties = vexia_edu_atla10_9v_pmic_props,
648
708
};
649
709
650
-
static const struct x86_i2c_client_info vexia_edu_atla10_i2c_clients[] __initconst = {
710
+
static const struct x86_i2c_client_info vexia_edu_atla10_9v_i2c_clients[] __initconst = {
651
711
{
652
712
/* I2C attached embedded controller, used to access fuel-gauge */
653
713
.board_info = {
654
714
.type = "vexia_atla10_ec",
655
715
.addr = 0x76,
656
716
.dev_name = "ulpmc",
657
-
.swnode = &vexia_edu_atla10_ulpmc_node,
717
+
.swnode = &vexia_edu_atla10_9v_ulpmc_node,
658
718
},
659
719
.adapter_path = "0000:00:18.1",
660
720
}, {
···
739
679
.type = "kxtj21009",
740
680
.addr = 0x0f,
741
681
.dev_name = "kxtj21009",
742
-
.swnode = &vexia_edu_atla10_accel_node,
682
+
.swnode = &vexia_edu_atla10_9v_accel_node,
743
683
},
744
684
.adapter_path = "0000:00:18.5",
745
685
}, {
···
748
688
.type = "hid-over-i2c",
749
689
.addr = 0x38,
750
690
.dev_name = "FTSC1000",
751
-
.swnode = &vexia_edu_atla10_touchscreen_node,
691
+
.swnode = &vexia_edu_atla10_9v_touchscreen_node,
752
692
},
753
693
.adapter_path = "0000:00:18.6",
754
694
.irq_data = {
···
763
703
.type = "intel_soc_pmic_crc",
764
704
.addr = 0x6e,
765
705
.dev_name = "intel_soc_pmic_crc",
766
-
.swnode = &vexia_edu_atla10_pmic_node,
706
+
.swnode = &vexia_edu_atla10_9v_pmic_node,
767
707
},
768
708
.adapter_path = "0000:00:18.7",
769
709
.irq_data = {
···
775
715
}
776
716
};
777
717
778
-
static const struct x86_serdev_info vexia_edu_atla10_serdevs[] __initconst = {
718
+
static const struct x86_serdev_info vexia_edu_atla10_9v_serdevs[] __initconst = {
779
719
{
780
720
.ctrl.pci.devfn = PCI_DEVFN(0x1e, 3),
781
721
.ctrl_devname = "serial0",
···
783
723
},
784
724
};
785
725
786
-
static struct gpiod_lookup_table vexia_edu_atla10_ft5416_gpios = {
726
+
static struct gpiod_lookup_table vexia_edu_atla10_9v_ft5416_gpios = {
787
727
.dev_id = "i2c-FTSC1000",
788
728
.table = {
789
729
GPIO_LOOKUP("INT33FC:00", 60, "reset", GPIO_ACTIVE_LOW),
···
791
731
},
792
732
};
793
733
794
-
static struct gpiod_lookup_table * const vexia_edu_atla10_gpios[] = {
795
-
&vexia_edu_atla10_ft5416_gpios,
734
+
static struct gpiod_lookup_table * const vexia_edu_atla10_9v_gpios[] = {
735
+
&vexia_edu_atla10_9v_ft5416_gpios,
796
736
NULL
797
737
};
798
738
799
-
static int __init vexia_edu_atla10_init(struct device *dev)
739
+
static int __init vexia_edu_atla10_9v_init(struct device *dev)
800
740
{
801
741
struct pci_dev *pdev;
802
742
int ret;
···
820
760
return 0;
821
761
}
822
762
823
-
const struct x86_dev_info vexia_edu_atla10_info __initconst = {
824
-
.i2c_client_info = vexia_edu_atla10_i2c_clients,
825
-
.i2c_client_count = ARRAY_SIZE(vexia_edu_atla10_i2c_clients),
826
-
.serdev_info = vexia_edu_atla10_serdevs,
827
-
.serdev_count = ARRAY_SIZE(vexia_edu_atla10_serdevs),
828
-
.gpiod_lookup_tables = vexia_edu_atla10_gpios,
829
-
.init = vexia_edu_atla10_init,
763
+
const struct x86_dev_info vexia_edu_atla10_9v_info __initconst = {
764
+
.i2c_client_info = vexia_edu_atla10_9v_i2c_clients,
765
+
.i2c_client_count = ARRAY_SIZE(vexia_edu_atla10_9v_i2c_clients),
766
+
.serdev_info = vexia_edu_atla10_9v_serdevs,
767
+
.serdev_count = ARRAY_SIZE(vexia_edu_atla10_9v_serdevs),
768
+
.gpiod_lookup_tables = vexia_edu_atla10_9v_gpios,
769
+
.init = vexia_edu_atla10_9v_init,
830
770
.use_pci = true,
831
771
};
832
772
+2
-1
drivers/platform/x86/x86-android-tablets/x86-android-tablets.h
+2
-1
drivers/platform/x86/x86-android-tablets/x86-android-tablets.h
···
127
127
extern const struct x86_dev_info nextbook_ares8a_info;
128
128
extern const struct x86_dev_info peaq_c1010_info;
129
129
extern const struct x86_dev_info whitelabel_tm800a550l_info;
130
-
extern const struct x86_dev_info vexia_edu_atla10_info;
130
+
extern const struct x86_dev_info vexia_edu_atla10_5v_info;
131
+
extern const struct x86_dev_info vexia_edu_atla10_9v_info;
131
132
extern const struct x86_dev_info xiaomi_mipad2_info;
132
133
extern const struct dmi_system_id x86_android_tablet_ids[];
133
134
+1
drivers/ptp/ptp_ocp.c
+1
drivers/ptp/ptp_ocp.c
+7
-6
drivers/pwm/core.c
+7
-6
drivers/pwm/core.c
···
322
322
const struct pwm_ops *ops = chip->ops;
323
323
char wfhw[WFHWSIZE];
324
324
struct pwm_waveform wf_rounded;
325
-
int err;
325
+
int err, ret_tohw;
326
326
327
327
BUG_ON(WFHWSIZE < ops->sizeof_wfhw);
328
328
···
332
332
if (!pwm_wf_valid(wf))
333
333
return -EINVAL;
334
334
335
-
err = __pwm_round_waveform_tohw(chip, pwm, wf, &wfhw);
336
-
if (err)
337
-
return err;
335
+
ret_tohw = __pwm_round_waveform_tohw(chip, pwm, wf, &wfhw);
336
+
if (ret_tohw < 0)
337
+
return ret_tohw;
338
338
339
339
if ((IS_ENABLED(CONFIG_PWM_DEBUG) || exact) && wf->period_length_ns) {
340
340
err = __pwm_round_waveform_fromhw(chip, pwm, &wfhw, &wf_rounded);
341
341
if (err)
342
342
return err;
343
343
344
-
if (IS_ENABLED(CONFIG_PWM_DEBUG) && !pwm_check_rounding(wf, &wf_rounded))
344
+
if (IS_ENABLED(CONFIG_PWM_DEBUG) && ret_tohw == 0 && !pwm_check_rounding(wf, &wf_rounded))
345
345
dev_err(&chip->dev, "Wrong rounding: requested %llu/%llu [+%llu], result %llu/%llu [+%llu]\n",
346
346
wf->duty_length_ns, wf->period_length_ns, wf->duty_offset_ns,
347
347
wf_rounded.duty_length_ns, wf_rounded.period_length_ns, wf_rounded.duty_offset_ns);
···
382
382
wf_rounded.duty_length_ns, wf_rounded.period_length_ns, wf_rounded.duty_offset_ns,
383
383
wf_set.duty_length_ns, wf_set.period_length_ns, wf_set.duty_offset_ns);
384
384
}
385
-
return 0;
385
+
386
+
return ret_tohw;
386
387
}
387
388
388
389
/**
+7
-3
drivers/pwm/pwm-axi-pwmgen.c
+7
-3
drivers/pwm/pwm-axi-pwmgen.c
···
75
75
{
76
76
struct axi_pwmgen_waveform *wfhw = _wfhw;
77
77
struct axi_pwmgen_ddata *ddata = axi_pwmgen_ddata_from_chip(chip);
78
+
int ret = 0;
78
79
79
80
if (wf->period_length_ns == 0) {
80
81
*wfhw = (struct axi_pwmgen_waveform){
···
92
91
if (wfhw->period_cnt == 0) {
93
92
/*
94
93
* The specified period is too short for the hardware.
95
-
* Let's round .duty_cycle down to 0 to get a (somewhat)
96
-
* valid result.
94
+
* So round up .period_cnt to 1 (i.e. the smallest
95
+
* possible period). With .duty_cycle and .duty_offset
96
+
* being less than or equal to .period, their rounded
97
+
* value must be 0.
97
98
*/
98
99
wfhw->period_cnt = 1;
99
100
wfhw->duty_cycle_cnt = 0;
100
101
wfhw->duty_offset_cnt = 0;
102
+
ret = 1;
101
103
} else {
102
104
wfhw->duty_cycle_cnt = min_t(u64,
103
105
mul_u64_u32_div(wf->duty_length_ns, ddata->clk_rate_hz, NSEC_PER_SEC),
···
115
111
pwm->hwpwm, wf->duty_length_ns, wf->period_length_ns, wf->duty_offset_ns,
116
112
ddata->clk_rate_hz, wfhw->period_cnt, wfhw->duty_cycle_cnt, wfhw->duty_offset_cnt);
117
113
118
-
return 0;
114
+
return ret;
119
115
}
120
116
121
117
static int axi_pwmgen_round_waveform_fromhw(struct pwm_chip *chip, struct pwm_device *pwm,
+6
drivers/pwm/pwm-fsl-ftm.c
+6
drivers/pwm/pwm-fsl-ftm.c
···
118
118
unsigned long long exval;
119
119
120
120
rate = clk_get_rate(fpc->clk[fpc->period.clk_select]);
121
+
if (rate >> fpc->period.clk_ps == 0)
122
+
return 0;
123
+
121
124
exval = ticks;
122
125
exval *= 1000000000UL;
123
126
do_div(exval, rate >> fpc->period.clk_ps);
···
192
189
193
190
unsigned int period = fpc->period.mod_period + 1;
194
191
unsigned int period_ns = fsl_pwm_ticks_to_ns(fpc, period);
192
+
193
+
if (!period_ns)
194
+
return 0;
195
195
196
196
duty = (unsigned long long)duty_ns * period;
197
197
do_div(duty, period_ns);
+6
-2
drivers/pwm/pwm-mediatek.c
+6
-2
drivers/pwm/pwm-mediatek.c
···
121
121
struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);
122
122
u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH,
123
123
reg_thres = PWMTHRES;
124
+
unsigned long clk_rate;
124
125
u64 resolution;
125
126
int ret;
126
127
127
128
ret = pwm_mediatek_clk_enable(chip, pwm);
128
-
129
129
if (ret < 0)
130
130
return ret;
131
+
132
+
clk_rate = clk_get_rate(pc->clk_pwms[pwm->hwpwm]);
133
+
if (!clk_rate)
134
+
return -EINVAL;
131
135
132
136
/* Make sure we use the bus clock and not the 26MHz clock */
133
137
if (pc->soc->has_ck_26m_sel)
···
139
135
140
136
/* Using resolution in picosecond gets accuracy higher */
141
137
resolution = (u64)NSEC_PER_SEC * 1000;
142
-
do_div(resolution, clk_get_rate(pc->clk_pwms[pwm->hwpwm]));
138
+
do_div(resolution, clk_rate);
143
139
144
140
cnt_period = DIV_ROUND_CLOSEST_ULL((u64)period_ns * 1000, resolution);
145
141
while (cnt_period > 8191) {
+13
-11
drivers/pwm/pwm-rcar.c
+13
-11
drivers/pwm/pwm-rcar.c
···
8
8
* - The hardware cannot generate a 0% duty cycle.
9
9
*/
10
10
11
+
#include <linux/bitfield.h>
11
12
#include <linux/clk.h>
12
13
#include <linux/err.h>
13
14
#include <linux/io.h>
···
103
102
rcar_pwm_write(rp, value, RCAR_PWMCR);
104
103
}
105
104
106
-
static int rcar_pwm_set_counter(struct rcar_pwm_chip *rp, int div, int duty_ns,
107
-
int period_ns)
105
+
static int rcar_pwm_set_counter(struct rcar_pwm_chip *rp, int div, u64 duty_ns,
106
+
u64 period_ns)
108
107
{
109
-
unsigned long long one_cycle, tmp; /* 0.01 nanoseconds */
108
+
unsigned long long tmp;
110
109
unsigned long clk_rate = clk_get_rate(rp->clk);
111
110
u32 cyc, ph;
112
111
113
-
one_cycle = NSEC_PER_SEC * 100ULL << div;
114
-
do_div(one_cycle, clk_rate);
112
+
/* div <= 24 == RCAR_PWM_MAX_DIVISION, so the shift doesn't overflow. */
113
+
tmp = mul_u64_u64_div_u64(period_ns, clk_rate, (u64)NSEC_PER_SEC << div);
114
+
if (tmp > FIELD_MAX(RCAR_PWMCNT_CYC0_MASK))
115
+
tmp = FIELD_MAX(RCAR_PWMCNT_CYC0_MASK);
115
116
116
-
tmp = period_ns * 100ULL;
117
-
do_div(tmp, one_cycle);
118
-
cyc = (tmp << RCAR_PWMCNT_CYC0_SHIFT) & RCAR_PWMCNT_CYC0_MASK;
117
+
cyc = FIELD_PREP(RCAR_PWMCNT_CYC0_MASK, tmp);
119
118
120
-
tmp = duty_ns * 100ULL;
121
-
do_div(tmp, one_cycle);
122
-
ph = tmp & RCAR_PWMCNT_PH0_MASK;
119
+
tmp = mul_u64_u64_div_u64(duty_ns, clk_rate, (u64)NSEC_PER_SEC << div);
120
+
if (tmp > FIELD_MAX(RCAR_PWMCNT_PH0_MASK))
121
+
tmp = FIELD_MAX(RCAR_PWMCNT_PH0_MASK);
122
+
ph = FIELD_PREP(RCAR_PWMCNT_PH0_MASK, tmp);
123
123
124
124
/* Avoid prohibited setting */
125
125
if (cyc == 0 || ph == 0)
+3
-9
drivers/pwm/pwm-stm32.c
+3
-9
drivers/pwm/pwm-stm32.c
···
103
103
if (ret)
104
104
goto out;
105
105
106
-
/*
107
-
* calculate the best value for ARR for the given PSC, refuse if
108
-
* the resulting period gets bigger than the requested one.
109
-
*/
110
106
arr = mul_u64_u64_div_u64(wf->period_length_ns, rate,
111
107
(u64)NSEC_PER_SEC * (wfhw->psc + 1));
112
108
if (arr <= wfhw->arr) {
113
109
/*
114
-
* requested period is small than the currently
110
+
* requested period is smaller than the currently
115
111
* configured and unchangable period, report back the smallest
116
-
* possible period, i.e. the current state; Initialize
117
-
* ccr to anything valid.
112
+
* possible period, i.e. the current state and return 1
113
+
* to indicate the wrong rounding direction.
118
114
*/
119
-
wfhw->ccr = 0;
120
115
ret = 1;
121
-
goto out;
122
116
}
123
117
124
118
} else {
+3
drivers/ras/amd/atl/internal.h
+3
drivers/ras/amd/atl/internal.h
+17
-2
drivers/ras/amd/atl/umc.c
+17
-2
drivers/ras/amd/atl/umc.c
···
229
229
* Additionally, the PC and Bank bits may be hashed. This must be accounted for before
230
230
* reconstructing the normalized address.
231
231
*/
232
-
#define MI300_UMC_MCA_COL GENMASK(5, 1)
233
232
#define MI300_UMC_MCA_BANK GENMASK(9, 6)
234
233
#define MI300_UMC_MCA_ROW GENMASK(24, 10)
235
234
#define MI300_UMC_MCA_PC BIT(25)
···
319
320
* See amd_atl::convert_dram_to_norm_addr_mi300() for MI300 address formats.
320
321
*/
321
322
#define MI300_NUM_COL BIT(HWEIGHT(MI300_UMC_MCA_COL))
322
-
static void retire_row_mi300(struct atl_err *a_err)
323
+
static void _retire_row_mi300(struct atl_err *a_err)
323
324
{
324
325
unsigned long addr;
325
326
struct page *p;
···
348
349
349
350
memory_failure(addr, 0);
350
351
}
352
+
}
353
+
354
+
/*
355
+
* In addition to the column bits, the row[13] bit should also be included when
356
+
* calculating addresses affected by a physical row.
357
+
*
358
+
* Instead of running through another loop over a single bit, just run through
359
+
* the column bits twice and flip the row[13] bit in-between.
360
+
*
361
+
* See MI300_UMC_MCA_ROW for the row bits in MCA_ADDR_UMC value.
362
+
*/
363
+
static void retire_row_mi300(struct atl_err *a_err)
364
+
{
365
+
_retire_row_mi300(a_err);
366
+
a_err->addr ^= MI300_UMC_MCA_ROW13;
367
+
_retire_row_mi300(a_err);
351
368
}
352
369
353
370
void amd_retire_dram_row(struct atl_err *a_err)
+8
-1
drivers/ras/amd/fmpm.c
+8
-1
drivers/ras/amd/fmpm.c
···
250
250
return true;
251
251
}
252
252
253
+
/*
254
+
* Row retirement is done on MI300 systems, and some bits are 'don't
255
+
* care' for comparing addresses with unique physical rows. This
256
+
* includes all column bits and the row[13] bit.
257
+
*/
258
+
#define MASK_ADDR(addr) ((addr) & ~(MI300_UMC_MCA_ROW13 | MI300_UMC_MCA_COL))
259
+
253
260
static bool fpds_equal(struct cper_fru_poison_desc *old, struct cper_fru_poison_desc *new)
254
261
{
255
262
/*
···
265
258
*
266
259
* Also, order the checks from most->least likely to fail to shortcut the code.
267
260
*/
268
-
if (old->addr != new->addr)
261
+
if (MASK_ADDR(old->addr) != MASK_ADDR(new->addr))
269
262
return false;
270
263
271
264
if (old->hw_id != new->hw_id)
+12
-4
drivers/s390/virtio/virtio_ccw.c
+12
-4
drivers/s390/virtio/virtio_ccw.c
···
302
302
static unsigned long *get_airq_indicator(struct virtqueue *vqs[], int nvqs,
303
303
u64 *first, void **airq_info)
304
304
{
305
-
int i, j;
305
+
int i, j, queue_idx, highest_queue_idx = -1;
306
306
struct airq_info *info;
307
307
unsigned long *indicator_addr = NULL;
308
308
unsigned long bit, flags;
309
+
310
+
/* Array entries without an actual queue pointer must be ignored. */
311
+
for (i = 0; i < nvqs; i++) {
312
+
if (vqs[i])
313
+
highest_queue_idx++;
314
+
}
309
315
310
316
for (i = 0; i < MAX_AIRQ_AREAS && !indicator_addr; i++) {
311
317
mutex_lock(&airq_areas_lock);
···
322
316
if (!info)
323
317
return NULL;
324
318
write_lock_irqsave(&info->lock, flags);
325
-
bit = airq_iv_alloc(info->aiv, nvqs);
319
+
bit = airq_iv_alloc(info->aiv, highest_queue_idx + 1);
326
320
if (bit == -1UL) {
327
321
/* Not enough vacancies. */
328
322
write_unlock_irqrestore(&info->lock, flags);
···
331
325
*first = bit;
332
326
*airq_info = info;
333
327
indicator_addr = info->aiv->vector;
334
-
for (j = 0; j < nvqs; j++) {
335
-
airq_iv_set_ptr(info->aiv, bit + j,
328
+
for (j = 0, queue_idx = 0; j < nvqs; j++) {
329
+
if (!vqs[j])
330
+
continue;
331
+
airq_iv_set_ptr(info->aiv, bit + queue_idx++,
336
332
(unsigned long)vqs[j]);
337
333
}
338
334
write_unlock_irqrestore(&info->lock, flags);
+20
drivers/scsi/hisi_sas/hisi_sas_main.c
+20
drivers/scsi/hisi_sas/hisi_sas_main.c
···
935
935
container_of(work, typeof(*phy), works[event]);
936
936
struct hisi_hba *hisi_hba = phy->hisi_hba;
937
937
struct asd_sas_phy *sas_phy = &phy->sas_phy;
938
+
struct asd_sas_port *sas_port = sas_phy->port;
939
+
struct hisi_sas_port *port = phy->port;
940
+
struct device *dev = hisi_hba->dev;
941
+
struct domain_device *port_dev;
938
942
int phy_no = sas_phy->id;
943
+
944
+
if (!test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags) &&
945
+
sas_port && port && (port->id != phy->port_id)) {
946
+
dev_info(dev, "phy%d's hw port id changed from %d to %llu\n",
947
+
phy_no, port->id, phy->port_id);
948
+
port_dev = sas_port->port_dev;
949
+
if (port_dev && !dev_is_expander(port_dev->dev_type)) {
950
+
/*
951
+
* Set the device state to gone to block
952
+
* sending IO to the device.
953
+
*/
954
+
set_bit(SAS_DEV_GONE, &port_dev->state);
955
+
hisi_sas_notify_phy_event(phy, HISI_PHYE_LINK_RESET);
956
+
return;
957
+
}
958
+
}
939
959
940
960
phy->wait_phyup_cnt = 0;
941
961
if (phy->identify.target_port_protocols == SAS_PROTOCOL_SSP)
+7
-2
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
+7
-2
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
···
2501
2501
struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
2502
2502
struct sas_ata_task *ata_task = &task->ata_task;
2503
2503
struct sas_tmf_task *tmf = slot->tmf;
2504
+
int phy_id;
2504
2505
u8 *buf_cmd;
2505
2506
int has_data = 0, hdr_tag = 0;
2506
2507
u32 dw0, dw1 = 0, dw2 = 0;
···
2509
2508
/* create header */
2510
2509
/* dw0 */
2511
2510
dw0 = port->id << CMD_HDR_PORT_OFF;
2512
-
if (parent_dev && dev_is_expander(parent_dev->dev_type))
2511
+
if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
2513
2512
dw0 |= 3 << CMD_HDR_CMD_OFF;
2514
-
else
2513
+
} else {
2514
+
phy_id = device->phy->identify.phy_identifier;
2515
+
dw0 |= (1U << phy_id) << CMD_HDR_PHY_ID_OFF;
2516
+
dw0 |= CMD_HDR_FORCE_PHY_MSK;
2515
2517
dw0 |= 4 << CMD_HDR_CMD_OFF;
2518
+
}
2516
2519
2517
2520
if (tmf && ata_task->force_phy) {
2518
2521
dw0 |= CMD_HDR_FORCE_PHY_MSK;
+12
-2
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
+12
-2
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
···
359
359
#define CMD_HDR_RESP_REPORT_MSK (0x1 << CMD_HDR_RESP_REPORT_OFF)
360
360
#define CMD_HDR_TLR_CTRL_OFF 6
361
361
#define CMD_HDR_TLR_CTRL_MSK (0x3 << CMD_HDR_TLR_CTRL_OFF)
362
+
#define CMD_HDR_PHY_ID_OFF 8
363
+
#define CMD_HDR_PHY_ID_MSK (0x1ff << CMD_HDR_PHY_ID_OFF)
364
+
#define CMD_HDR_FORCE_PHY_OFF 17
365
+
#define CMD_HDR_FORCE_PHY_MSK (0x1U << CMD_HDR_FORCE_PHY_OFF)
362
366
#define CMD_HDR_PORT_OFF 18
363
367
#define CMD_HDR_PORT_MSK (0xf << CMD_HDR_PORT_OFF)
364
368
#define CMD_HDR_PRIORITY_OFF 27
···
1433
1429
struct hisi_sas_cmd_hdr *hdr = slot->cmd_hdr;
1434
1430
struct asd_sas_port *sas_port = device->port;
1435
1431
struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
1432
+
int phy_id;
1436
1433
u8 *buf_cmd;
1437
1434
int has_data = 0, hdr_tag = 0;
1438
1435
u32 dw1 = 0, dw2 = 0;
1439
1436
1440
1437
hdr->dw0 = cpu_to_le32(port->id << CMD_HDR_PORT_OFF);
1441
-
if (parent_dev && dev_is_expander(parent_dev->dev_type))
1438
+
if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
1442
1439
hdr->dw0 |= cpu_to_le32(3 << CMD_HDR_CMD_OFF);
1443
-
else
1440
+
} else {
1441
+
phy_id = device->phy->identify.phy_identifier;
1442
+
hdr->dw0 |= cpu_to_le32((1U << phy_id)
1443
+
<< CMD_HDR_PHY_ID_OFF);
1444
+
hdr->dw0 |= CMD_HDR_FORCE_PHY_MSK;
1444
1445
hdr->dw0 |= cpu_to_le32(4U << CMD_HDR_CMD_OFF);
1446
+
}
1445
1447
1446
1448
switch (task->data_dir) {
1447
1449
case DMA_TO_DEVICE:
+2
-2
drivers/scsi/megaraid/megaraid_sas.h
+2
-2
drivers/scsi/megaraid/megaraid_sas.h
+7
-2
drivers/scsi/megaraid/megaraid_sas_base.c
+7
-2
drivers/scsi/megaraid/megaraid_sas_base.c
···
2103
2103
/* This sdev property may change post OCR */
2104
2104
megasas_set_dynamic_target_properties(sdev, lim, is_target_prop);
2105
2105
2106
+
if (!MEGASAS_IS_LOGICAL(sdev))
2107
+
sdev->no_vpd_size = 1;
2108
+
2106
2109
mutex_unlock(&instance->reset_mutex);
2107
2110
2108
2111
return 0;
···
3665
3662
3666
3663
case MFI_STAT_SCSI_IO_FAILED:
3667
3664
case MFI_STAT_LD_INIT_IN_PROGRESS:
3668
-
cmd->scmd->result =
3669
-
(DID_ERROR << 16) | hdr->scsi_status;
3665
+
if (hdr->scsi_status == 0xf0)
3666
+
cmd->scmd->result = (DID_ERROR << 16) | SAM_STAT_CHECK_CONDITION;
3667
+
else
3668
+
cmd->scmd->result = (DID_ERROR << 16) | hdr->scsi_status;
3670
3669
break;
3671
3670
3672
3671
case MFI_STAT_SCSI_DONE_WITH_ERROR:
+4
-1
drivers/scsi/megaraid/megaraid_sas_fusion.c
+4
-1
drivers/scsi/megaraid/megaraid_sas_fusion.c
···
2043
2043
2044
2044
case MFI_STAT_SCSI_IO_FAILED:
2045
2045
case MFI_STAT_LD_INIT_IN_PROGRESS:
2046
-
scmd->result = (DID_ERROR << 16) | ext_status;
2046
+
if (ext_status == 0xf0)
2047
+
scmd->result = (DID_ERROR << 16) | SAM_STAT_CHECK_CONDITION;
2048
+
else
2049
+
scmd->result = (DID_ERROR << 16) | ext_status;
2047
2050
break;
2048
2051
2049
2052
case MFI_STAT_SCSI_DONE_WITH_ERROR:
+1
drivers/scsi/pm8001/pm8001_sas.c
+1
drivers/scsi/pm8001/pm8001_sas.c
···
766
766
spin_lock_irqsave(&pm8001_ha->lock, flags);
767
767
}
768
768
PM8001_CHIP_DISP->dereg_dev_req(pm8001_ha, device_id);
769
+
pm8001_ha->phy[pm8001_dev->attached_phy].phy_attached = 0;
769
770
pm8001_free_dev(pm8001_dev);
770
771
} else {
771
772
pm8001_dbg(pm8001_ha, DISC, "Found dev has gone.\n");
+5
-2
drivers/scsi/scsi_transport_iscsi.c
+5
-2
drivers/scsi/scsi_transport_iscsi.c
···
3182
3182
}
3183
3183
3184
3184
/* see similar check in iscsi_if_set_param() */
3185
-
if (strlen(data) > ev->u.set_host_param.len)
3186
-
return -EINVAL;
3185
+
if (strlen(data) > ev->u.set_host_param.len) {
3186
+
err = -EINVAL;
3187
+
goto out;
3188
+
}
3187
3189
3188
3190
err = transport->set_host_param(shost, ev->u.set_host_param.param,
3189
3191
data, ev->u.set_host_param.len);
3192
+
out:
3190
3193
scsi_host_put(shost);
3191
3194
return err;
3192
3195
}
+1
-1
drivers/scsi/scsi_transport_srp.c
+1
-1
drivers/scsi/scsi_transport_srp.c
···
388
388
"reconnect attempt %d failed (%d)\n",
389
389
++rport->failed_reconnects, res);
390
390
delay = rport->reconnect_delay *
391
-
min(100, max(1, rport->failed_reconnects - 10));
391
+
clamp(rport->failed_reconnects - 10, 1, 100);
392
392
if (delay > 0)
393
393
queue_delayed_work(system_long_wq,
394
394
&rport->reconnect_work, delay * HZ);
+7
-6
drivers/scsi/smartpqi/smartpqi_init.c
+7
-6
drivers/scsi/smartpqi/smartpqi_init.c
···
19
19
#include <linux/bcd.h>
20
20
#include <linux/reboot.h>
21
21
#include <linux/cciss_ioctl.h>
22
+
#include <linux/crash_dump.h>
22
23
#include <scsi/scsi_host.h>
23
24
#include <scsi/scsi_cmnd.h>
24
25
#include <scsi/scsi_device.h>
···
5247
5246
ctrl_info->error_buffer_length =
5248
5247
ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH;
5249
5248
5250
-
if (reset_devices)
5249
+
if (is_kdump_kernel())
5251
5250
max_transfer_size = min(ctrl_info->max_transfer_size,
5252
5251
PQI_MAX_TRANSFER_SIZE_KDUMP);
5253
5252
else
···
5276
5275
u16 num_elements_per_iq;
5277
5276
u16 num_elements_per_oq;
5278
5277
5279
-
if (reset_devices) {
5278
+
if (is_kdump_kernel()) {
5280
5279
num_queue_groups = 1;
5281
5280
} else {
5282
5281
int num_cpus;
···
8289
8288
u32 product_id;
8290
8289
8291
8290
if (reset_devices) {
8292
-
if (pqi_is_fw_triage_supported(ctrl_info)) {
8291
+
if (is_kdump_kernel() && pqi_is_fw_triage_supported(ctrl_info)) {
8293
8292
rc = sis_wait_for_fw_triage_completion(ctrl_info);
8294
8293
if (rc)
8295
8294
return rc;
8296
8295
}
8297
-
if (sis_is_ctrl_logging_supported(ctrl_info)) {
8296
+
if (is_kdump_kernel() && sis_is_ctrl_logging_supported(ctrl_info)) {
8298
8297
sis_notify_kdump(ctrl_info);
8299
8298
rc = sis_wait_for_ctrl_logging_completion(ctrl_info);
8300
8299
if (rc)
···
8345
8344
ctrl_info->product_id = (u8)product_id;
8346
8345
ctrl_info->product_revision = (u8)(product_id >> 8);
8347
8346
8348
-
if (reset_devices) {
8347
+
if (is_kdump_kernel()) {
8349
8348
if (ctrl_info->max_outstanding_requests >
8350
8349
PQI_MAX_OUTSTANDING_REQUESTS_KDUMP)
8351
8350
ctrl_info->max_outstanding_requests =
···
8481
8480
if (rc)
8482
8481
return rc;
8483
8482
8484
-
if (ctrl_info->ctrl_logging_supported && !reset_devices) {
8483
+
if (ctrl_info->ctrl_logging_supported && !is_kdump_kernel()) {
8485
8484
pqi_host_setup_buffer(ctrl_info, &ctrl_info->ctrl_log_memory, PQI_CTRL_LOG_TOTAL_SIZE, PQI_CTRL_LOG_MIN_SIZE);
8486
8485
pqi_host_memory_update(ctrl_info, &ctrl_info->ctrl_log_memory, PQI_VENDOR_GENERAL_CTRL_LOG_MEMORY_UPDATE);
8487
8486
}
+2
-6
drivers/spi/spi-fsl-qspi.c
+2
-6
drivers/spi/spi-fsl-qspi.c
···
949
949
950
950
ret = devm_add_action_or_reset(dev, fsl_qspi_cleanup, q);
951
951
if (ret)
952
-
goto err_destroy_mutex;
952
+
goto err_put_ctrl;
953
953
954
954
ret = devm_spi_register_controller(dev, ctlr);
955
955
if (ret)
956
-
goto err_destroy_mutex;
956
+
goto err_put_ctrl;
957
957
958
958
return 0;
959
-
960
-
err_destroy_mutex:
961
-
mutex_destroy(&q->lock);
962
959
963
960
err_disable_clk:
964
961
fsl_qspi_clk_disable_unprep(q);
···
963
966
err_put_ctrl:
964
967
spi_controller_put(ctlr);
965
968
966
-
dev_err(dev, "Freescale QuadSPI probe failed\n");
967
969
return ret;
968
970
}
969
971
+54
drivers/ufs/core/ufs-sysfs.c
+54
drivers/ufs/core/ufs-sysfs.c
···
466
466
return sysfs_emit(buf, "%d\n", hba->critical_health_count);
467
467
}
468
468
469
+
static ssize_t device_lvl_exception_count_show(struct device *dev,
470
+
struct device_attribute *attr,
471
+
char *buf)
472
+
{
473
+
struct ufs_hba *hba = dev_get_drvdata(dev);
474
+
475
+
if (hba->dev_info.wspecversion < 0x410)
476
+
return -EOPNOTSUPP;
477
+
478
+
return sysfs_emit(buf, "%u\n", atomic_read(&hba->dev_lvl_exception_count));
479
+
}
480
+
481
+
static ssize_t device_lvl_exception_count_store(struct device *dev,
482
+
struct device_attribute *attr,
483
+
const char *buf, size_t count)
484
+
{
485
+
struct ufs_hba *hba = dev_get_drvdata(dev);
486
+
unsigned int value;
487
+
488
+
if (kstrtouint(buf, 0, &value))
489
+
return -EINVAL;
490
+
491
+
/* the only supported usecase is to reset the dev_lvl_exception_count */
492
+
if (value)
493
+
return -EINVAL;
494
+
495
+
atomic_set(&hba->dev_lvl_exception_count, 0);
496
+
497
+
return count;
498
+
}
499
+
500
+
static ssize_t device_lvl_exception_id_show(struct device *dev,
501
+
struct device_attribute *attr,
502
+
char *buf)
503
+
{
504
+
struct ufs_hba *hba = dev_get_drvdata(dev);
505
+
u64 exception_id;
506
+
int err;
507
+
508
+
ufshcd_rpm_get_sync(hba);
509
+
err = ufshcd_read_device_lvl_exception_id(hba, &exception_id);
510
+
ufshcd_rpm_put_sync(hba);
511
+
512
+
if (err)
513
+
return err;
514
+
515
+
hba->dev_lvl_exception_id = exception_id;
516
+
return sysfs_emit(buf, "%llu\n", exception_id);
517
+
}
518
+
469
519
static DEVICE_ATTR_RW(rpm_lvl);
470
520
static DEVICE_ATTR_RO(rpm_target_dev_state);
471
521
static DEVICE_ATTR_RO(rpm_target_link_state);
···
529
479
static DEVICE_ATTR_RW(rtc_update_ms);
530
480
static DEVICE_ATTR_RW(pm_qos_enable);
531
481
static DEVICE_ATTR_RO(critical_health);
482
+
static DEVICE_ATTR_RW(device_lvl_exception_count);
483
+
static DEVICE_ATTR_RO(device_lvl_exception_id);
532
484
533
485
static struct attribute *ufs_sysfs_ufshcd_attrs[] = {
534
486
&dev_attr_rpm_lvl.attr,
···
546
494
&dev_attr_rtc_update_ms.attr,
547
495
&dev_attr_pm_qos_enable.attr,
548
496
&dev_attr_critical_health.attr,
497
+
&dev_attr_device_lvl_exception_count.attr,
498
+
&dev_attr_device_lvl_exception_id.attr,
549
499
NULL
550
500
};
551
501
+1
drivers/ufs/core/ufshcd-priv.h
+1
drivers/ufs/core/ufshcd-priv.h
···
94
94
enum query_opcode desc_op);
95
95
96
96
int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable);
97
+
int ufshcd_read_device_lvl_exception_id(struct ufs_hba *hba, u64 *exception_id);
97
98
98
99
/* Wrapper functions for safely calling variant operations */
99
100
static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
+68
-24
drivers/ufs/core/ufshcd.c
+68
-24
drivers/ufs/core/ufshcd.c
···
3176
3176
int err;
3177
3177
3178
3178
retry:
3179
-
time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
3179
+
time_left = wait_for_completion_timeout(&hba->dev_cmd.complete,
3180
3180
time_left);
3181
3181
3182
3182
if (likely(time_left)) {
3183
-
/*
3184
-
* The completion handler called complete() and the caller of
3185
-
* this function still owns the @lrbp tag so the code below does
3186
-
* not trigger any race conditions.
3187
-
*/
3188
-
hba->dev_cmd.complete = NULL;
3189
3183
err = ufshcd_get_tr_ocs(lrbp, NULL);
3190
3184
if (!err)
3191
3185
err = ufshcd_dev_cmd_completion(hba, lrbp);
···
3193
3199
/* successfully cleared the command, retry if needed */
3194
3200
if (ufshcd_clear_cmd(hba, lrbp->task_tag) == 0)
3195
3201
err = -EAGAIN;
3196
-
hba->dev_cmd.complete = NULL;
3197
3202
return err;
3198
3203
}
3199
3204
···
3208
3215
spin_lock_irqsave(&hba->outstanding_lock, flags);
3209
3216
pending = test_bit(lrbp->task_tag,
3210
3217
&hba->outstanding_reqs);
3211
-
if (pending) {
3212
-
hba->dev_cmd.complete = NULL;
3218
+
if (pending)
3213
3219
__clear_bit(lrbp->task_tag,
3214
3220
&hba->outstanding_reqs);
3215
-
}
3216
3221
spin_unlock_irqrestore(&hba->outstanding_lock, flags);
3217
3222
3218
3223
if (!pending) {
···
3228
3237
spin_lock_irqsave(&hba->outstanding_lock, flags);
3229
3238
pending = test_bit(lrbp->task_tag,
3230
3239
&hba->outstanding_reqs);
3231
-
if (pending)
3232
-
hba->dev_cmd.complete = NULL;
3233
3240
spin_unlock_irqrestore(&hba->outstanding_lock, flags);
3234
3241
3235
3242
if (!pending) {
···
3261
3272
static int ufshcd_issue_dev_cmd(struct ufs_hba *hba, struct ufshcd_lrb *lrbp,
3262
3273
const u32 tag, int timeout)
3263
3274
{
3264
-
DECLARE_COMPLETION_ONSTACK(wait);
3265
3275
int err;
3266
3276
3267
-
hba->dev_cmd.complete = &wait;
3268
-
3269
3277
ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
3270
-
3271
3278
ufshcd_send_command(hba, tag, hba->dev_cmd_queue);
3272
3279
err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
3273
3280
···
5570
5585
ufshcd_release_scsi_cmd(hba, lrbp);
5571
5586
/* Do not touch lrbp after scsi done */
5572
5587
scsi_done(cmd);
5573
-
} else if (hba->dev_cmd.complete) {
5588
+
} else {
5574
5589
if (cqe) {
5575
5590
ocs = le32_to_cpu(cqe->status) & MASK_OCS;
5576
5591
lrbp->utr_descriptor_ptr->header.ocs = ocs;
5577
5592
}
5578
-
complete(hba->dev_cmd.complete);
5593
+
complete(&hba->dev_cmd.complete);
5579
5594
}
5580
5595
}
5581
5596
···
5998
6013
__func__, err);
5999
6014
}
6000
6015
6016
+
int ufshcd_read_device_lvl_exception_id(struct ufs_hba *hba, u64 *exception_id)
6017
+
{
6018
+
struct utp_upiu_query_v4_0 *upiu_resp;
6019
+
struct ufs_query_req *request = NULL;
6020
+
struct ufs_query_res *response = NULL;
6021
+
int err;
6022
+
6023
+
if (hba->dev_info.wspecversion < 0x410)
6024
+
return -EOPNOTSUPP;
6025
+
6026
+
ufshcd_hold(hba);
6027
+
mutex_lock(&hba->dev_cmd.lock);
6028
+
6029
+
ufshcd_init_query(hba, &request, &response,
6030
+
UPIU_QUERY_OPCODE_READ_ATTR,
6031
+
QUERY_ATTR_IDN_DEV_LVL_EXCEPTION_ID, 0, 0);
6032
+
6033
+
request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
6034
+
6035
+
err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
6036
+
6037
+
if (err) {
6038
+
dev_err(hba->dev, "%s: failed to read device level exception %d\n",
6039
+
__func__, err);
6040
+
goto out;
6041
+
}
6042
+
6043
+
upiu_resp = (struct utp_upiu_query_v4_0 *)response;
6044
+
*exception_id = get_unaligned_be64(&upiu_resp->osf3);
6045
+
out:
6046
+
mutex_unlock(&hba->dev_cmd.lock);
6047
+
ufshcd_release(hba);
6048
+
6049
+
return err;
6050
+
}
6051
+
6001
6052
static int __ufshcd_wb_toggle(struct ufs_hba *hba, bool set, enum flag_idn idn)
6002
6053
{
6003
6054
u8 index;
···
6104
6083
return ret;
6105
6084
}
6106
6085
6107
-
static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
6086
+
static bool ufshcd_wb_curr_buff_threshold_check(struct ufs_hba *hba,
6108
6087
u32 avail_buf)
6109
6088
{
6110
6089
u32 cur_buf;
···
6186
6165
}
6187
6166
6188
6167
/*
6189
-
* The ufs device needs the vcc to be ON to flush.
6190
6168
* With user-space reduction enabled, it's enough to enable flush
6191
6169
* by checking only the available buffer. The threshold
6192
6170
* defined here is > 90% full.
6193
6171
* With user-space preserved enabled, the current-buffer
6194
6172
* should be checked too because the wb buffer size can reduce
6195
6173
* when disk tends to be full. This info is provided by current
6196
-
* buffer (dCurrentWriteBoosterBufferSize). There's no point in
6197
-
* keeping vcc on when current buffer is empty.
6174
+
* buffer (dCurrentWriteBoosterBufferSize).
6198
6175
*/
6199
6176
index = ufshcd_wb_get_query_index(hba);
6200
6177
ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
···
6207
6188
if (!hba->dev_info.b_presrv_uspc_en)
6208
6189
return avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10);
6209
6190
6210
-
return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
6191
+
return ufshcd_wb_curr_buff_threshold_check(hba, avail_buf);
6211
6192
}
6212
6193
6213
6194
static void ufshcd_rpm_dev_flush_recheck_work(struct work_struct *work)
···
6257
6238
if (status & hba->ee_drv_mask & MASK_EE_HEALTH_CRITICAL) {
6258
6239
hba->critical_health_count++;
6259
6240
sysfs_notify(&hba->dev->kobj, NULL, "critical_health");
6241
+
}
6242
+
6243
+
if (status & hba->ee_drv_mask & MASK_EE_DEV_LVL_EXCEPTION) {
6244
+
atomic_inc(&hba->dev_lvl_exception_count);
6245
+
sysfs_notify(&hba->dev->kobj, NULL, "device_lvl_exception_count");
6260
6246
}
6261
6247
6262
6248
ufs_debugfs_exception_event(hba, status);
···
8163
8139
}
8164
8140
}
8165
8141
8142
+
static void ufshcd_device_lvl_exception_probe(struct ufs_hba *hba, u8 *desc_buf)
8143
+
{
8144
+
u32 ext_ufs_feature;
8145
+
8146
+
if (hba->dev_info.wspecversion < 0x410)
8147
+
return;
8148
+
8149
+
ext_ufs_feature = get_unaligned_be32(desc_buf +
8150
+
DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
8151
+
if (!(ext_ufs_feature & UFS_DEV_LVL_EXCEPTION_SUP))
8152
+
return;
8153
+
8154
+
atomic_set(&hba->dev_lvl_exception_count, 0);
8155
+
ufshcd_enable_ee(hba, MASK_EE_DEV_LVL_EXCEPTION);
8156
+
}
8157
+
8166
8158
static void ufshcd_set_rtt(struct ufs_hba *hba)
8167
8159
{
8168
8160
struct ufs_dev_info *dev_info = &hba->dev_info;
···
8378
8338
}
8379
8339
8380
8340
ufs_init_rtc(hba, desc_buf);
8341
+
8342
+
ufshcd_device_lvl_exception_probe(hba, desc_buf);
8381
8343
8382
8344
/*
8383
8345
* ufshcd_read_string_desc returns size of the string
···
10531
10489
hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
10532
10490
UFS_SLEEP_PWR_MODE,
10533
10491
UIC_LINK_HIBERN8_STATE);
10492
+
10493
+
init_completion(&hba->dev_cmd.complete);
10534
10494
10535
10495
err = ufshcd_hba_init(hba);
10536
10496
if (err)
+63
-22
drivers/ufs/host/ufs-exynos.c
+63
-22
drivers/ufs/host/ufs-exynos.c
···
34
34
* Exynos's Vendor specific registers for UFSHCI
35
35
*/
36
36
#define HCI_TXPRDT_ENTRY_SIZE 0x00
37
-
#define PRDT_PREFECT_EN BIT(31)
37
+
#define PRDT_PREFETCH_EN BIT(31)
38
38
#define HCI_RXPRDT_ENTRY_SIZE 0x04
39
39
#define HCI_1US_TO_CNT_VAL 0x0C
40
40
#define CNT_VAL_1US_MASK 0x3FF
···
92
92
UIC_TRANSPORT_NO_CONNECTION_RX |\
93
93
UIC_TRANSPORT_BAD_TC)
94
94
95
-
/* FSYS UFS Shareability */
96
-
#define UFS_WR_SHARABLE BIT(2)
97
-
#define UFS_RD_SHARABLE BIT(1)
98
-
#define UFS_SHARABLE (UFS_WR_SHARABLE | UFS_RD_SHARABLE)
99
-
#define UFS_SHAREABILITY_OFFSET 0x710
95
+
/* UFS Shareability */
96
+
#define UFS_EXYNOSAUTO_WR_SHARABLE BIT(2)
97
+
#define UFS_EXYNOSAUTO_RD_SHARABLE BIT(1)
98
+
#define UFS_EXYNOSAUTO_SHARABLE (UFS_EXYNOSAUTO_WR_SHARABLE | \
99
+
UFS_EXYNOSAUTO_RD_SHARABLE)
100
+
#define UFS_GS101_WR_SHARABLE BIT(1)
101
+
#define UFS_GS101_RD_SHARABLE BIT(0)
102
+
#define UFS_GS101_SHARABLE (UFS_GS101_WR_SHARABLE | \
103
+
UFS_GS101_RD_SHARABLE)
104
+
#define UFS_SHAREABILITY_OFFSET 0x710
100
105
101
106
/* Multi-host registers */
102
107
#define MHCTRL 0xC4
···
214
209
/* IO Coherency setting */
215
210
if (ufs->sysreg) {
216
211
return regmap_update_bits(ufs->sysreg,
217
-
ufs->shareability_reg_offset,
218
-
UFS_SHARABLE, UFS_SHARABLE);
212
+
ufs->iocc_offset,
213
+
ufs->iocc_mask, ufs->iocc_val);
219
214
}
220
215
221
216
return 0;
···
962
957
}
963
958
964
959
phy_set_bus_width(generic_phy, ufs->avail_ln_rx);
960
+
961
+
if (generic_phy->power_count) {
962
+
phy_power_off(generic_phy);
963
+
phy_exit(generic_phy);
964
+
}
965
+
965
966
ret = phy_init(generic_phy);
966
967
if (ret) {
967
968
dev_err(hba->dev, "%s: phy init failed, ret = %d\n",
···
1060
1049
exynos_ufs_config_intr(ufs, DFES_DEF_L4_ERRS, UNIPRO_L4);
1061
1050
exynos_ufs_set_unipro_pclk_div(ufs);
1062
1051
1052
+
exynos_ufs_setup_clocks(hba, true, PRE_CHANGE);
1053
+
1063
1054
/* unipro */
1064
1055
exynos_ufs_config_unipro(ufs);
1056
+
1057
+
if (ufs->drv_data->pre_link)
1058
+
ufs->drv_data->pre_link(ufs);
1065
1059
1066
1060
/* m-phy */
1067
1061
exynos_ufs_phy_init(ufs);
···
1074
1058
exynos_ufs_config_phy_time_attr(ufs);
1075
1059
exynos_ufs_config_phy_cap_attr(ufs);
1076
1060
}
1077
-
1078
-
exynos_ufs_setup_clocks(hba, true, PRE_CHANGE);
1079
-
1080
-
if (ufs->drv_data->pre_link)
1081
-
ufs->drv_data->pre_link(ufs);
1082
1061
1083
1062
return 0;
1084
1063
}
···
1098
1087
struct exynos_ufs *ufs = ufshcd_get_variant(hba);
1099
1088
struct phy *generic_phy = ufs->phy;
1100
1089
struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr;
1090
+
u32 val = ilog2(DATA_UNIT_SIZE);
1101
1091
1102
1092
exynos_ufs_establish_connt(ufs);
1103
1093
exynos_ufs_fit_aggr_timeout(ufs);
1104
1094
1105
1095
hci_writel(ufs, 0xa, HCI_DATA_REORDER);
1106
-
hci_writel(ufs, ilog2(DATA_UNIT_SIZE), HCI_TXPRDT_ENTRY_SIZE);
1096
+
1097
+
if (hba->caps & UFSHCD_CAP_CRYPTO)
1098
+
val |= PRDT_PREFETCH_EN;
1099
+
hci_writel(ufs, val, HCI_TXPRDT_ENTRY_SIZE);
1100
+
1107
1101
hci_writel(ufs, ilog2(DATA_UNIT_SIZE), HCI_RXPRDT_ENTRY_SIZE);
1108
1102
hci_writel(ufs, (1 << hba->nutrs) - 1, HCI_UTRL_NEXUS_TYPE);
1109
1103
hci_writel(ufs, (1 << hba->nutmrs) - 1, HCI_UTMRL_NEXUS_TYPE);
···
1184
1168
ufs->sysreg = NULL;
1185
1169
else {
1186
1170
if (of_property_read_u32_index(np, "samsung,sysreg", 1,
1187
-
&ufs->shareability_reg_offset)) {
1171
+
&ufs->iocc_offset)) {
1188
1172
dev_warn(dev, "can't get an offset from sysreg. Set to default value\n");
1189
-
ufs->shareability_reg_offset = UFS_SHAREABILITY_OFFSET;
1173
+
ufs->iocc_offset = UFS_SHAREABILITY_OFFSET;
1190
1174
}
1191
1175
}
1176
+
1177
+
ufs->iocc_mask = ufs->drv_data->iocc_mask;
1178
+
/*
1179
+
* no 'dma-coherent' property means the descriptors are
1180
+
* non-cacheable so iocc shareability should be disabled.
1181
+
*/
1182
+
if (of_dma_is_coherent(dev->of_node))
1183
+
ufs->iocc_val = ufs->iocc_mask;
1184
+
else
1185
+
ufs->iocc_val = 0;
1192
1186
1193
1187
ufs->pclk_avail_min = PCLK_AVAIL_MIN;
1194
1188
ufs->pclk_avail_max = PCLK_AVAIL_MAX;
···
1523
1497
return ret;
1524
1498
}
1525
1499
1500
+
static void exynos_ufs_exit(struct ufs_hba *hba)
1501
+
{
1502
+
struct exynos_ufs *ufs = ufshcd_get_variant(hba);
1503
+
1504
+
phy_power_off(ufs->phy);
1505
+
phy_exit(ufs->phy);
1506
+
}
1507
+
1526
1508
static int exynos_ufs_host_reset(struct ufs_hba *hba)
1527
1509
{
1528
1510
struct exynos_ufs *ufs = ufshcd_get_variant(hba);
···
1701
1667
}
1702
1668
}
1703
1669
1670
+
static int gs101_ufs_suspend(struct exynos_ufs *ufs)
1671
+
{
1672
+
hci_writel(ufs, 0 << 0, HCI_GPIO_OUT);
1673
+
return 0;
1674
+
}
1675
+
1704
1676
static int exynos_ufs_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op,
1705
1677
enum ufs_notify_change_status status)
1706
1678
{
···
1714
1674
1715
1675
if (status == PRE_CHANGE)
1716
1676
return 0;
1677
+
1678
+
if (ufs->drv_data->suspend)
1679
+
ufs->drv_data->suspend(ufs);
1717
1680
1718
1681
if (!ufshcd_is_link_active(hba))
1719
1682
phy_power_off(ufs->phy);
···
1995
1952
static const struct ufs_hba_variant_ops ufs_hba_exynos_ops = {
1996
1953
.name = "exynos_ufs",
1997
1954
.init = exynos_ufs_init,
1955
+
.exit = exynos_ufs_exit,
1998
1956
.hce_enable_notify = exynos_ufs_hce_enable_notify,
1999
1957
.link_startup_notify = exynos_ufs_link_startup_notify,
2000
1958
.pwr_change_notify = exynos_ufs_pwr_change_notify,
···
2034
1990
2035
1991
static void exynos_ufs_remove(struct platform_device *pdev)
2036
1992
{
2037
-
struct ufs_hba *hba = platform_get_drvdata(pdev);
2038
-
struct exynos_ufs *ufs = ufshcd_get_variant(hba);
2039
-
2040
1993
ufshcd_pltfrm_remove(pdev);
2041
-
2042
-
phy_power_off(ufs->phy);
2043
-
phy_exit(ufs->phy);
2044
1994
}
2045
1995
2046
1996
static struct exynos_ufs_uic_attr exynos7_uic_attr = {
···
2073
2035
.opts = EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL |
2074
2036
EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR |
2075
2037
EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX,
2038
+
.iocc_mask = UFS_EXYNOSAUTO_SHARABLE,
2076
2039
.drv_init = exynosauto_ufs_drv_init,
2077
2040
.post_hce_enable = exynosauto_ufs_post_hce_enable,
2078
2041
.pre_link = exynosauto_ufs_pre_link,
···
2175
2136
.opts = EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR |
2176
2137
EXYNOS_UFS_OPT_UFSPR_SECURE |
2177
2138
EXYNOS_UFS_OPT_TIMER_TICK_SELECT,
2139
+
.iocc_mask = UFS_GS101_SHARABLE,
2178
2140
.drv_init = gs101_ufs_drv_init,
2179
2141
.pre_link = gs101_ufs_pre_link,
2180
2142
.post_link = gs101_ufs_post_link,
2181
2143
.pre_pwr_change = gs101_ufs_pre_pwr_change,
2144
+
.suspend = gs101_ufs_suspend,
2182
2145
};
2183
2146
2184
2147
static const struct of_device_id exynos_ufs_of_match[] = {
+5
-1
drivers/ufs/host/ufs-exynos.h
+5
-1
drivers/ufs/host/ufs-exynos.h
···
181
181
struct exynos_ufs_uic_attr *uic_attr;
182
182
unsigned int quirks;
183
183
unsigned int opts;
184
+
u32 iocc_mask;
184
185
/* SoC's specific operations */
185
186
int (*drv_init)(struct exynos_ufs *ufs);
186
187
int (*pre_link)(struct exynos_ufs *ufs);
···
192
191
const struct ufs_pa_layer_attr *pwr);
193
192
int (*pre_hce_enable)(struct exynos_ufs *ufs);
194
193
int (*post_hce_enable)(struct exynos_ufs *ufs);
194
+
int (*suspend)(struct exynos_ufs *ufs);
195
195
};
196
196
197
197
struct ufs_phy_time_cfg {
···
232
230
ktime_t entry_hibern8_t;
233
231
const struct exynos_ufs_drv_data *drv_data;
234
232
struct regmap *sysreg;
235
-
u32 shareability_reg_offset;
233
+
u32 iocc_offset;
234
+
u32 iocc_mask;
235
+
u32 iocc_val;
236
236
237
237
u32 opts;
238
238
#define EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL BIT(0)
+2
-2
fs/afs/dynroot.c
+2
-2
fs/afs/dynroot.c
···
348
348
}
349
349
350
350
if ((unsigned long long)ctx->pos <= AFS_MAX_DYNROOT_CELL_INO) {
351
-
rcu_read_lock();
351
+
down_read(&net->cells_lock);
352
352
ret = afs_dynroot_readdir_cells(net, ctx);
353
-
rcu_read_unlock();
353
+
up_read(&net->cells_lock);
354
354
}
355
355
return ret;
356
356
}
+2
-3
fs/bcachefs/Kconfig
+2
-3
fs/bcachefs/Kconfig
···
15
15
select ZLIB_INFLATE
16
16
select ZSTD_COMPRESS
17
17
select ZSTD_DECOMPRESS
18
-
select CRYPTO
19
18
select CRYPTO_LIB_SHA256
20
-
select CRYPTO_CHACHA20
21
-
select CRYPTO_POLY1305
19
+
select CRYPTO_LIB_CHACHA
20
+
select CRYPTO_LIB_POLY1305
22
21
select KEYS
23
22
select RAID6_PQ
24
23
select XOR_BLOCKS
+2
-2
fs/bcachefs/bcachefs.h
+2
-2
fs/bcachefs/bcachefs.h
···
981
981
mempool_t compress_workspace[BCH_COMPRESSION_OPT_NR];
982
982
size_t zstd_workspace_size;
983
983
984
-
struct crypto_sync_skcipher *chacha20;
985
-
struct crypto_shash *poly1305;
984
+
struct bch_key chacha20_key;
985
+
bool chacha20_key_set;
986
986
987
987
atomic64_t key_version;
988
988
+2
-3
fs/bcachefs/btree_journal_iter.c
+2
-3
fs/bcachefs/btree_journal_iter.c
···
644
644
*/
645
645
static int journal_sort_key_cmp(const void *_l, const void *_r)
646
646
{
647
-
cond_resched();
648
-
649
647
const struct journal_key *l = _l;
650
648
const struct journal_key *r = _r;
651
649
···
687
689
688
690
static void __journal_keys_sort(struct journal_keys *keys)
689
691
{
690
-
sort(keys->data, keys->nr, sizeof(keys->data[0]), journal_sort_key_cmp, NULL);
692
+
sort_nonatomic(keys->data, keys->nr, sizeof(keys->data[0]),
693
+
journal_sort_key_cmp, NULL);
691
694
692
695
cond_resched();
693
696
+3
-3
fs/bcachefs/btree_node_scan.c
+3
-3
fs/bcachefs/btree_node_scan.c
···
183
183
return;
184
184
185
185
if (bch2_csum_type_is_encryption(BSET_CSUM_TYPE(&bn->keys))) {
186
-
if (!c->chacha20)
186
+
if (!c->chacha20_key_set)
187
187
return;
188
188
189
189
struct nonce nonce = btree_nonce(&bn->keys, 0);
···
398
398
bch2_print_string_as_lines(KERN_INFO, buf.buf);
399
399
}
400
400
401
-
sort(f->nodes.data, f->nodes.nr, sizeof(f->nodes.data[0]), found_btree_node_cmp_cookie, NULL);
401
+
sort_nonatomic(f->nodes.data, f->nodes.nr, sizeof(f->nodes.data[0]), found_btree_node_cmp_cookie, NULL);
402
402
403
403
dst = 0;
404
404
darray_for_each(f->nodes, i) {
···
418
418
}
419
419
f->nodes.nr = dst;
420
420
421
-
sort(f->nodes.data, f->nodes.nr, sizeof(f->nodes.data[0]), found_btree_node_cmp_pos, NULL);
421
+
sort_nonatomic(f->nodes.data, f->nodes.nr, sizeof(f->nodes.data[0]), found_btree_node_cmp_pos, NULL);
422
422
423
423
if (0 && c->opts.verbose) {
424
424
printbuf_reset(&buf);
+4
-4
fs/bcachefs/btree_write_buffer.c
+4
-4
fs/bcachefs/btree_write_buffer.c
···
428
428
*/
429
429
trace_and_count(c, write_buffer_flush_slowpath, trans, slowpath, wb->flushing.keys.nr);
430
430
431
-
sort(wb->flushing.keys.data,
432
-
wb->flushing.keys.nr,
433
-
sizeof(wb->flushing.keys.data[0]),
434
-
wb_key_seq_cmp, NULL);
431
+
sort_nonatomic(wb->flushing.keys.data,
432
+
wb->flushing.keys.nr,
433
+
sizeof(wb->flushing.keys.data[0]),
434
+
wb_key_seq_cmp, NULL);
435
435
436
436
darray_for_each(wb->flushing.keys, i) {
437
437
if (!i->journal_seq)
+56
-189
fs/bcachefs/checksum.c
+56
-189
fs/bcachefs/checksum.c
···
7
7
#include "super-io.h"
8
8
9
9
#include <linux/crc32c.h>
10
-
#include <linux/crypto.h>
11
10
#include <linux/xxhash.h>
12
11
#include <linux/key.h>
13
12
#include <linux/random.h>
14
13
#include <linux/ratelimit.h>
15
-
#include <linux/scatterlist.h>
16
-
#include <crypto/algapi.h>
17
14
#include <crypto/chacha.h>
18
-
#include <crypto/hash.h>
19
15
#include <crypto/poly1305.h>
20
-
#include <crypto/skcipher.h>
21
16
#include <keys/user-type.h>
22
17
23
18
/*
···
91
96
}
92
97
}
93
98
94
-
static inline int do_encrypt_sg(struct crypto_sync_skcipher *tfm,
95
-
struct nonce nonce,
96
-
struct scatterlist *sg, size_t len)
99
+
static void bch2_chacha20_init(u32 state[CHACHA_STATE_WORDS],
100
+
const struct bch_key *key, struct nonce nonce)
97
101
{
98
-
SYNC_SKCIPHER_REQUEST_ON_STACK(req, tfm);
102
+
u32 key_words[CHACHA_KEY_SIZE / sizeof(u32)];
99
103
100
-
skcipher_request_set_sync_tfm(req, tfm);
101
-
skcipher_request_set_callback(req, 0, NULL, NULL);
102
-
skcipher_request_set_crypt(req, sg, sg, len, nonce.d);
104
+
BUILD_BUG_ON(sizeof(key_words) != sizeof(*key));
105
+
memcpy(key_words, key, sizeof(key_words));
106
+
le32_to_cpu_array(key_words, ARRAY_SIZE(key_words));
103
107
104
-
int ret = crypto_skcipher_encrypt(req);
105
-
if (ret)
106
-
pr_err("got error %i from crypto_skcipher_encrypt()", ret);
108
+
BUILD_BUG_ON(sizeof(nonce) != CHACHA_IV_SIZE);
109
+
chacha_init(state, key_words, (const u8 *)nonce.d);
107
110
108
-
return ret;
111
+
memzero_explicit(key_words, sizeof(key_words));
109
112
}
110
113
111
-
static inline int do_encrypt(struct crypto_sync_skcipher *tfm,
112
-
struct nonce nonce,
113
-
void *buf, size_t len)
114
+
static void bch2_chacha20(const struct bch_key *key, struct nonce nonce,
115
+
void *data, size_t len)
114
116
{
115
-
if (!is_vmalloc_addr(buf)) {
116
-
struct scatterlist sg = {};
117
+
u32 state[CHACHA_STATE_WORDS];
117
118
118
-
sg_mark_end(&sg);
119
-
sg_set_page(&sg, virt_to_page(buf), len, offset_in_page(buf));
120
-
return do_encrypt_sg(tfm, nonce, &sg, len);
121
-
} else {
122
-
DARRAY_PREALLOCATED(struct scatterlist, 4) sgl;
123
-
size_t sgl_len = 0;
124
-
int ret;
125
-
126
-
darray_init(&sgl);
127
-
128
-
while (len) {
129
-
unsigned offset = offset_in_page(buf);
130
-
struct scatterlist sg = {
131
-
.page_link = (unsigned long) vmalloc_to_page(buf),
132
-
.offset = offset,
133
-
.length = min(len, PAGE_SIZE - offset),
134
-
};
135
-
136
-
if (darray_push(&sgl, sg)) {
137
-
sg_mark_end(&darray_last(sgl));
138
-
ret = do_encrypt_sg(tfm, nonce, sgl.data, sgl_len);
139
-
if (ret)
140
-
goto err;
141
-
142
-
nonce = nonce_add(nonce, sgl_len);
143
-
sgl_len = 0;
144
-
sgl.nr = 0;
145
-
BUG_ON(darray_push(&sgl, sg));
146
-
}
147
-
148
-
buf += sg.length;
149
-
len -= sg.length;
150
-
sgl_len += sg.length;
151
-
}
152
-
153
-
sg_mark_end(&darray_last(sgl));
154
-
ret = do_encrypt_sg(tfm, nonce, sgl.data, sgl_len);
155
-
err:
156
-
darray_exit(&sgl);
157
-
return ret;
158
-
}
119
+
bch2_chacha20_init(state, key, nonce);
120
+
chacha20_crypt(state, data, data, len);
121
+
memzero_explicit(state, sizeof(state));
159
122
}
160
123
161
-
int bch2_chacha_encrypt_key(struct bch_key *key, struct nonce nonce,
162
-
void *buf, size_t len)
124
+
static void bch2_poly1305_init(struct poly1305_desc_ctx *desc,
125
+
struct bch_fs *c, struct nonce nonce)
163
126
{
164
-
struct crypto_sync_skcipher *chacha20 =
165
-
crypto_alloc_sync_skcipher("chacha20", 0, 0);
166
-
int ret;
167
-
168
-
ret = PTR_ERR_OR_ZERO(chacha20);
169
-
if (ret) {
170
-
pr_err("error requesting chacha20 cipher: %s", bch2_err_str(ret));
171
-
return ret;
172
-
}
173
-
174
-
ret = crypto_skcipher_setkey(&chacha20->base,
175
-
(void *) key, sizeof(*key));
176
-
if (ret) {
177
-
pr_err("error from crypto_skcipher_setkey(): %s", bch2_err_str(ret));
178
-
goto err;
179
-
}
180
-
181
-
ret = do_encrypt(chacha20, nonce, buf, len);
182
-
err:
183
-
crypto_free_sync_skcipher(chacha20);
184
-
return ret;
185
-
}
186
-
187
-
static int gen_poly_key(struct bch_fs *c, struct shash_desc *desc,
188
-
struct nonce nonce)
189
-
{
190
-
u8 key[POLY1305_KEY_SIZE];
191
-
int ret;
127
+
u8 key[POLY1305_KEY_SIZE] = { 0 };
192
128
193
129
nonce.d[3] ^= BCH_NONCE_POLY;
194
130
195
-
memset(key, 0, sizeof(key));
196
-
ret = do_encrypt(c->chacha20, nonce, key, sizeof(key));
197
-
if (ret)
198
-
return ret;
199
-
200
-
desc->tfm = c->poly1305;
201
-
crypto_shash_init(desc);
202
-
crypto_shash_update(desc, key, sizeof(key));
203
-
return 0;
131
+
bch2_chacha20(&c->chacha20_key, nonce, key, sizeof(key));
132
+
poly1305_init(desc, key);
204
133
}
205
134
206
135
struct bch_csum bch2_checksum(struct bch_fs *c, unsigned type,
···
149
230
150
231
case BCH_CSUM_chacha20_poly1305_80:
151
232
case BCH_CSUM_chacha20_poly1305_128: {
152
-
SHASH_DESC_ON_STACK(desc, c->poly1305);
233
+
struct poly1305_desc_ctx dctx;
153
234
u8 digest[POLY1305_DIGEST_SIZE];
154
235
struct bch_csum ret = { 0 };
155
236
156
-
gen_poly_key(c, desc, nonce);
157
-
158
-
crypto_shash_update(desc, data, len);
159
-
crypto_shash_final(desc, digest);
237
+
bch2_poly1305_init(&dctx, c, nonce);
238
+
poly1305_update(&dctx, data, len);
239
+
poly1305_final(&dctx, digest);
160
240
161
241
memcpy(&ret, digest, bch_crc_bytes[type]);
162
242
return ret;
···
171
253
if (!bch2_csum_type_is_encryption(type))
172
254
return 0;
173
255
174
-
if (bch2_fs_inconsistent_on(!c->chacha20,
256
+
if (bch2_fs_inconsistent_on(!c->chacha20_key_set,
175
257
c, "attempting to encrypt without encryption key"))
176
258
return -BCH_ERR_no_encryption_key;
177
259
178
-
return do_encrypt(c->chacha20, nonce, data, len);
260
+
bch2_chacha20(&c->chacha20_key, nonce, data, len);
261
+
return 0;
179
262
}
180
263
181
264
static struct bch_csum __bch2_checksum_bio(struct bch_fs *c, unsigned type,
···
215
296
216
297
case BCH_CSUM_chacha20_poly1305_80:
217
298
case BCH_CSUM_chacha20_poly1305_128: {
218
-
SHASH_DESC_ON_STACK(desc, c->poly1305);
299
+
struct poly1305_desc_ctx dctx;
219
300
u8 digest[POLY1305_DIGEST_SIZE];
220
301
struct bch_csum ret = { 0 };
221
302
222
-
gen_poly_key(c, desc, nonce);
303
+
bch2_poly1305_init(&dctx, c, nonce);
223
304
224
305
#ifdef CONFIG_HIGHMEM
225
306
__bio_for_each_segment(bv, bio, *iter, *iter) {
226
307
void *p = kmap_local_page(bv.bv_page) + bv.bv_offset;
227
308
228
-
crypto_shash_update(desc, p, bv.bv_len);
309
+
poly1305_update(&dctx, p, bv.bv_len);
229
310
kunmap_local(p);
230
311
}
231
312
#else
232
313
__bio_for_each_bvec(bv, bio, *iter, *iter)
233
-
crypto_shash_update(desc,
314
+
poly1305_update(&dctx,
234
315
page_address(bv.bv_page) + bv.bv_offset,
235
316
bv.bv_len);
236
317
#endif
237
-
crypto_shash_final(desc, digest);
318
+
poly1305_final(&dctx, digest);
238
319
239
320
memcpy(&ret, digest, bch_crc_bytes[type]);
240
321
return ret;
···
257
338
{
258
339
struct bio_vec bv;
259
340
struct bvec_iter iter;
260
-
DARRAY_PREALLOCATED(struct scatterlist, 4) sgl;
261
-
size_t sgl_len = 0;
341
+
u32 chacha_state[CHACHA_STATE_WORDS];
262
342
int ret = 0;
263
343
264
-
if (bch2_fs_inconsistent_on(!c->chacha20,
344
+
if (bch2_fs_inconsistent_on(!c->chacha20_key_set,
265
345
c, "attempting to encrypt without encryption key"))
266
346
return -BCH_ERR_no_encryption_key;
267
347
268
-
darray_init(&sgl);
348
+
bch2_chacha20_init(chacha_state, &c->chacha20_key, nonce);
269
349
270
350
bio_for_each_segment(bv, bio, iter) {
271
-
struct scatterlist sg = {
272
-
.page_link = (unsigned long) bv.bv_page,
273
-
.offset = bv.bv_offset,
274
-
.length = bv.bv_len,
275
-
};
351
+
void *p;
276
352
277
-
if (darray_push(&sgl, sg)) {
278
-
sg_mark_end(&darray_last(sgl));
279
-
ret = do_encrypt_sg(c->chacha20, nonce, sgl.data, sgl_len);
280
-
if (ret)
281
-
goto err;
282
-
283
-
nonce = nonce_add(nonce, sgl_len);
284
-
sgl_len = 0;
285
-
sgl.nr = 0;
286
-
287
-
BUG_ON(darray_push(&sgl, sg));
353
+
/*
354
+
* chacha_crypt() assumes that the length is a multiple of
355
+
* CHACHA_BLOCK_SIZE on any non-final call.
356
+
*/
357
+
if (!IS_ALIGNED(bv.bv_len, CHACHA_BLOCK_SIZE)) {
358
+
bch_err_ratelimited(c, "bio not aligned for encryption");
359
+
ret = -EIO;
360
+
break;
288
361
}
289
362
290
-
sgl_len += sg.length;
363
+
p = bvec_kmap_local(&bv);
364
+
chacha20_crypt(chacha_state, p, p, bv.bv_len);
365
+
kunmap_local(p);
291
366
}
292
-
293
-
sg_mark_end(&darray_last(sgl));
294
-
ret = do_encrypt_sg(c->chacha20, nonce, sgl.data, sgl_len);
295
-
err:
296
-
darray_exit(&sgl);
367
+
memzero_explicit(chacha_state, sizeof(chacha_state));
297
368
return ret;
298
369
}
299
370
···
559
650
}
560
651
561
652
/* decrypt real key: */
562
-
ret = bch2_chacha_encrypt_key(&user_key, bch2_sb_key_nonce(c),
563
-
&sb_key, sizeof(sb_key));
564
-
if (ret)
565
-
goto err;
653
+
bch2_chacha20(&user_key, bch2_sb_key_nonce(c), &sb_key, sizeof(sb_key));
566
654
567
655
if (bch2_key_is_encrypted(&sb_key)) {
568
656
bch_err(c, "incorrect encryption key");
···
572
666
memzero_explicit(&sb_key, sizeof(sb_key));
573
667
memzero_explicit(&user_key, sizeof(user_key));
574
668
return ret;
575
-
}
576
-
577
-
static int bch2_alloc_ciphers(struct bch_fs *c)
578
-
{
579
-
if (c->chacha20)
580
-
return 0;
581
-
582
-
struct crypto_sync_skcipher *chacha20 = crypto_alloc_sync_skcipher("chacha20", 0, 0);
583
-
int ret = PTR_ERR_OR_ZERO(chacha20);
584
-
if (ret) {
585
-
bch_err(c, "error requesting chacha20 module: %s", bch2_err_str(ret));
586
-
return ret;
587
-
}
588
-
589
-
struct crypto_shash *poly1305 = crypto_alloc_shash("poly1305", 0, 0);
590
-
ret = PTR_ERR_OR_ZERO(poly1305);
591
-
if (ret) {
592
-
bch_err(c, "error requesting poly1305 module: %s", bch2_err_str(ret));
593
-
crypto_free_sync_skcipher(chacha20);
594
-
return ret;
595
-
}
596
-
597
-
c->chacha20 = chacha20;
598
-
c->poly1305 = poly1305;
599
-
return 0;
600
669
}
601
670
602
671
#if 0
···
678
797
679
798
void bch2_fs_encryption_exit(struct bch_fs *c)
680
799
{
681
-
if (c->poly1305)
682
-
crypto_free_shash(c->poly1305);
683
-
if (c->chacha20)
684
-
crypto_free_sync_skcipher(c->chacha20);
800
+
memzero_explicit(&c->chacha20_key, sizeof(c->chacha20_key));
685
801
}
686
802
687
803
int bch2_fs_encryption_init(struct bch_fs *c)
688
804
{
689
805
struct bch_sb_field_crypt *crypt;
690
-
struct bch_key key;
691
-
int ret = 0;
806
+
int ret;
692
807
693
808
crypt = bch2_sb_field_get(c->disk_sb.sb, crypt);
694
809
if (!crypt)
695
-
goto out;
810
+
return 0;
696
811
697
-
ret = bch2_alloc_ciphers(c);
812
+
ret = bch2_decrypt_sb_key(c, crypt, &c->chacha20_key);
698
813
if (ret)
699
-
goto out;
700
-
701
-
ret = bch2_decrypt_sb_key(c, crypt, &key);
702
-
if (ret)
703
-
goto out;
704
-
705
-
ret = crypto_skcipher_setkey(&c->chacha20->base,
706
-
(void *) &key.key, sizeof(key.key));
707
-
if (ret)
708
-
goto out;
709
-
out:
710
-
memzero_explicit(&key, sizeof(key));
711
-
return ret;
814
+
return ret;
815
+
c->chacha20_key_set = true;
816
+
return 0;
712
817
}
+1
-2
fs/bcachefs/checksum.h
+1
-2
fs/bcachefs/checksum.h
···
69
69
bch2_csum_to_text(out, type, expected);
70
70
}
71
71
72
-
int bch2_chacha_encrypt_key(struct bch_key *, struct nonce, void *, size_t);
73
72
int bch2_request_key(struct bch_sb *, struct bch_key *);
74
73
#ifndef __KERNEL__
75
74
int bch2_revoke_key(struct bch_sb *);
···
155
156
if (type >= BCH_CSUM_NR)
156
157
return false;
157
158
158
-
if (bch2_csum_type_is_encryption(type) && !c->chacha20)
159
+
if (bch2_csum_type_is_encryption(type) && !c->chacha20_key_set)
159
160
return false;
160
161
161
162
return true;
+1
-1
fs/bcachefs/data_update.c
+1
-1
fs/bcachefs/data_update.c
···
607
607
prt_newline(out);
608
608
printbuf_indent_add(out, 2);
609
609
bch2_data_update_opts_to_text(out, m->op.c, &m->op.opts, &m->data_opts);
610
-
prt_printf(out, "read_done:\t\%u\n", m->read_done);
610
+
prt_printf(out, "read_done:\t%u\n", m->read_done);
611
611
bch2_write_op_to_text(out, &m->op);
612
612
printbuf_indent_sub(out, 2);
613
613
}
+2
-2
fs/bcachefs/dirent.c
+2
-2
fs/bcachefs/dirent.c
···
287
287
EBUG_ON(!dirent->v.d_casefold);
288
288
EBUG_ON(!cf_name->len);
289
289
290
-
dirent->v.d_cf_name_block.d_name_len = name->len;
291
-
dirent->v.d_cf_name_block.d_cf_name_len = cf_name->len;
290
+
dirent->v.d_cf_name_block.d_name_len = cpu_to_le16(name->len);
291
+
dirent->v.d_cf_name_block.d_cf_name_len = cpu_to_le16(cf_name->len);
292
292
memcpy(&dirent->v.d_cf_name_block.d_names[0], name->name, name->len);
293
293
memcpy(&dirent->v.d_cf_name_block.d_names[name->len], cf_name->name, cf_name->len);
294
294
memset(&dirent->v.d_cf_name_block.d_names[name->len + cf_name->len], 0,
+16
-1
fs/bcachefs/fs-io-buffered.c
+16
-1
fs/bcachefs/fs-io-buffered.c
···
225
225
226
226
bch2_read_extent(trans, rbio, iter.pos,
227
227
data_btree, k, offset_into_extent, flags);
228
-
swap(rbio->bio.bi_iter.bi_size, bytes);
228
+
/*
229
+
* Careful there's a landmine here if bch2_read_extent() ever
230
+
* starts returning transaction restarts here.
231
+
*
232
+
* We've changed rbio->bi_iter.bi_size to be "bytes we can read
233
+
* from this extent" with the swap call, and we restore it
234
+
* below. That restore needs to come before checking for
235
+
* errors.
236
+
*
237
+
* But unlike __bch2_read(), we use the rbio bvec iter, not one
238
+
* on the stack, so we can't do the restore right after the
239
+
* bch2_read_extent() call: we don't own that iterator anymore
240
+
* if BCH_READ_last_fragment is set, since we may have submitted
241
+
* that rbio instead of cloning it.
242
+
*/
229
243
230
244
if (flags & BCH_READ_last_fragment)
231
245
break;
232
246
247
+
swap(rbio->bio.bi_iter.bi_size, bytes);
233
248
bio_advance(&rbio->bio, bytes);
234
249
err:
235
250
if (ret &&
+2
-1
fs/bcachefs/io_read.c
+2
-1
fs/bcachefs/io_read.c
···
977
977
goto err;
978
978
}
979
979
980
-
if (unlikely(bch2_csum_type_is_encryption(pick.crc.csum_type)) && !c->chacha20) {
980
+
if (unlikely(bch2_csum_type_is_encryption(pick.crc.csum_type)) &&
981
+
!c->chacha20_key_set) {
981
982
struct printbuf buf = PRINTBUF;
982
983
bch2_read_err_msg_trans(trans, &buf, orig, read_pos);
983
984
prt_printf(&buf, "attempting to read encrypted data without encryption key\n ");
+1
-1
fs/bcachefs/journal_io.c
+1
-1
fs/bcachefs/journal_io.c
+3
-3
fs/bcachefs/recovery.c
+3
-3
fs/bcachefs/recovery.c
···
389
389
* Now, replay any remaining keys in the order in which they appear in
390
390
* the journal, unpinning those journal entries as we go:
391
391
*/
392
-
sort(keys_sorted.data, keys_sorted.nr,
393
-
sizeof(keys_sorted.data[0]),
394
-
journal_sort_seq_cmp, NULL);
392
+
sort_nonatomic(keys_sorted.data, keys_sorted.nr,
393
+
sizeof(keys_sorted.data[0]),
394
+
journal_sort_seq_cmp, NULL);
395
395
396
396
darray_for_each(keys_sorted, kp) {
397
397
cond_resched();
-10
fs/bcachefs/super.c
-10
fs/bcachefs/super.c
···
70
70
#include <linux/percpu.h>
71
71
#include <linux/random.h>
72
72
#include <linux/sysfs.h>
73
-
#include <crypto/hash.h>
74
73
75
74
MODULE_LICENSE("GPL");
76
75
MODULE_AUTHOR("Kent Overstreet <kent.overstreet@gmail.com>");
77
76
MODULE_DESCRIPTION("bcachefs filesystem");
78
-
MODULE_SOFTDEP("pre: chacha20");
79
-
MODULE_SOFTDEP("pre: poly1305");
80
-
MODULE_SOFTDEP("pre: xxhash");
81
77
82
78
const char * const bch2_fs_flag_strs[] = {
83
79
#define x(n) #n,
···
997
1001
998
1002
prt_str(&p, "starting version ");
999
1003
bch2_version_to_text(&p, c->sb.version);
1000
-
1001
-
if (c->opts.read_only) {
1002
-
prt_str(&p, " opts=");
1003
-
first = false;
1004
-
prt_printf(&p, "ro");
1005
-
}
1006
1004
1007
1005
for (i = 0; i < bch2_opts_nr; i++) {
1008
1006
const struct bch_option *opt = &bch2_opt_table[i];
-2
fs/btrfs/disk-io.c
-2
fs/btrfs/disk-io.c
···
3853
3853
atomic_inc(&device->sb_write_errors);
3854
3854
continue;
3855
3855
}
3856
-
ASSERT(folio_order(folio) == 0);
3857
3856
3858
3857
offset = offset_in_folio(folio, bytenr);
3859
3858
disk_super = folio_address(folio) + offset;
···
3925
3926
/* If the folio has been removed, then we know it completed. */
3926
3927
if (IS_ERR(folio))
3927
3928
continue;
3928
-
ASSERT(folio_order(folio) == 0);
3929
3929
3930
3930
/* Folio will be unlocked once the write completes. */
3931
3931
folio_wait_locked(folio);
+2
fs/btrfs/ioctl.c
+2
fs/btrfs/ioctl.c
+1
-2
fs/btrfs/super.c
+1
-2
fs/btrfs/super.c
···
1139
1139
subvol_name = btrfs_get_subvol_name_from_objectid(info,
1140
1140
btrfs_root_id(BTRFS_I(d_inode(dentry))->root));
1141
1141
if (!IS_ERR(subvol_name)) {
1142
-
seq_puts(seq, ",subvol=");
1143
-
seq_escape(seq, subvol_name, " \t\n\\");
1142
+
seq_show_option(seq, "subvol", subvol_name);
1144
1143
kfree(subvol_name);
1145
1144
}
1146
1145
return 0;
+2
-2
fs/devpts/inode.c
+2
-2
fs/devpts/inode.c
···
89
89
};
90
90
91
91
static const struct fs_parameter_spec devpts_param_specs[] = {
92
-
fsparam_u32 ("gid", Opt_gid),
92
+
fsparam_gid ("gid", Opt_gid),
93
93
fsparam_s32 ("max", Opt_max),
94
94
fsparam_u32oct ("mode", Opt_mode),
95
95
fsparam_flag ("newinstance", Opt_newinstance),
96
96
fsparam_u32oct ("ptmxmode", Opt_ptmxmode),
97
-
fsparam_u32 ("uid", Opt_uid),
97
+
fsparam_uid ("uid", Opt_uid),
98
98
{}
99
99
};
100
100
+4
-4
fs/erofs/erofs_fs.h
+4
-4
fs/erofs/erofs_fs.h
···
56
56
union {
57
57
__le16 rootnid_2b; /* nid of root directory */
58
58
__le16 blocks_hi; /* (48BIT on) blocks count MSB */
59
-
} rb;
59
+
} __packed rb;
60
60
__le64 inos; /* total valid ino # (== f_files - f_favail) */
61
61
__le64 epoch; /* base seconds used for compact inodes */
62
62
__le32 fixed_nsec; /* fixed nanoseconds for compact inodes */
···
148
148
__le16 nlink; /* if EROFS_I_NLINK_1_BIT is unset */
149
149
__le16 blocks_hi; /* total blocks count MSB */
150
150
__le16 startblk_hi; /* starting block number MSB */
151
-
};
151
+
} __packed;
152
152
153
153
/* 32-byte reduced form of an ondisk inode */
154
154
struct erofs_inode_compact {
···
369
369
* bit 7 : pack the whole file into packed inode
370
370
*/
371
371
__u8 h_clusterbits;
372
-
};
372
+
} __packed;
373
373
__le16 h_extents_hi; /* extent count MSB */
374
-
};
374
+
} __packed;
375
375
};
376
376
377
377
enum {
+2
fs/erofs/fileio.c
+2
fs/erofs/fileio.c
-1
fs/erofs/zdata.c
-1
fs/erofs/zdata.c
+3
-2
fs/erofs/zmap.c
+3
-2
fs/erofs/zmap.c
···
559
559
pos += sizeof(__le64);
560
560
lstart = 0;
561
561
} else {
562
-
lstart = map->m_la >> vi->z_lclusterbits;
562
+
lstart = round_down(map->m_la, 1 << vi->z_lclusterbits);
563
+
pos += (lstart >> vi->z_lclusterbits) * recsz;
563
564
pa = EROFS_NULL_ADDR;
564
565
}
565
566
···
615
614
if (last && (vi->z_advise & Z_EROFS_ADVISE_FRAGMENT_PCLUSTER)) {
616
615
map->m_flags |= EROFS_MAP_MAPPED | EROFS_MAP_FRAGMENT;
617
616
vi->z_fragmentoff = map->m_plen;
618
-
if (recsz >= offsetof(struct z_erofs_extent, pstart_lo))
617
+
if (recsz > offsetof(struct z_erofs_extent, pstart_lo))
619
618
vi->z_fragmentoff |= map->m_pa << 32;
620
619
} else if (map->m_plen) {
621
620
map->m_flags |= EROFS_MAP_MAPPED |
+2
-3
fs/ext4/block_validity.c
+2
-3
fs/ext4/block_validity.c
···
351
351
{
352
352
__le32 *bref = p;
353
353
unsigned int blk;
354
+
journal_t *journal = EXT4_SB(inode->i_sb)->s_journal;
354
355
355
-
if (ext4_has_feature_journal(inode->i_sb) &&
356
-
(inode->i_ino ==
357
-
le32_to_cpu(EXT4_SB(inode->i_sb)->s_es->s_journal_inum)))
356
+
if (journal && inode == journal->j_inode)
358
357
return 0;
359
358
360
359
while (bref < p+max) {
+52
-23
fs/ext4/inode.c
+52
-23
fs/ext4/inode.c
···
386
386
unsigned int line,
387
387
struct ext4_map_blocks *map)
388
388
{
389
-
if (ext4_has_feature_journal(inode->i_sb) &&
390
-
(inode->i_ino ==
391
-
le32_to_cpu(EXT4_SB(inode->i_sb)->s_es->s_journal_inum)))
389
+
journal_t *journal = EXT4_SB(inode->i_sb)->s_journal;
390
+
391
+
if (journal && inode == journal->j_inode)
392
392
return 0;
393
+
393
394
if (!ext4_inode_block_valid(inode, map->m_pblk, map->m_len)) {
394
395
ext4_error_inode(inode, func, line, map->m_pblk,
395
396
"lblock %lu mapped to illegal pblock %llu "
···
4725
4724
inode_set_iversion_queried(inode, val);
4726
4725
}
4727
4726
4728
-
static const char *check_igot_inode(struct inode *inode, ext4_iget_flags flags)
4729
-
4727
+
static int check_igot_inode(struct inode *inode, ext4_iget_flags flags,
4728
+
const char *function, unsigned int line)
4730
4729
{
4730
+
const char *err_str;
4731
+
4731
4732
if (flags & EXT4_IGET_EA_INODE) {
4732
-
if (!(EXT4_I(inode)->i_flags & EXT4_EA_INODE_FL))
4733
-
return "missing EA_INODE flag";
4733
+
if (!(EXT4_I(inode)->i_flags & EXT4_EA_INODE_FL)) {
4734
+
err_str = "missing EA_INODE flag";
4735
+
goto error;
4736
+
}
4734
4737
if (ext4_test_inode_state(inode, EXT4_STATE_XATTR) ||
4735
-
EXT4_I(inode)->i_file_acl)
4736
-
return "ea_inode with extended attributes";
4738
+
EXT4_I(inode)->i_file_acl) {
4739
+
err_str = "ea_inode with extended attributes";
4740
+
goto error;
4741
+
}
4737
4742
} else {
4738
-
if ((EXT4_I(inode)->i_flags & EXT4_EA_INODE_FL))
4739
-
return "unexpected EA_INODE flag";
4743
+
if ((EXT4_I(inode)->i_flags & EXT4_EA_INODE_FL)) {
4744
+
/*
4745
+
* open_by_handle_at() could provide an old inode number
4746
+
* that has since been reused for an ea_inode; this does
4747
+
* not indicate filesystem corruption
4748
+
*/
4749
+
if (flags & EXT4_IGET_HANDLE)
4750
+
return -ESTALE;
4751
+
err_str = "unexpected EA_INODE flag";
4752
+
goto error;
4753
+
}
4740
4754
}
4741
-
if (is_bad_inode(inode) && !(flags & EXT4_IGET_BAD))
4742
-
return "unexpected bad inode w/o EXT4_IGET_BAD";
4743
-
return NULL;
4755
+
if (is_bad_inode(inode) && !(flags & EXT4_IGET_BAD)) {
4756
+
err_str = "unexpected bad inode w/o EXT4_IGET_BAD";
4757
+
goto error;
4758
+
}
4759
+
return 0;
4760
+
4761
+
error:
4762
+
ext4_error_inode(inode, function, line, 0, err_str);
4763
+
return -EFSCORRUPTED;
4744
4764
}
4745
4765
4746
4766
struct inode *__ext4_iget(struct super_block *sb, unsigned long ino,
···
4773
4751
struct ext4_inode_info *ei;
4774
4752
struct ext4_super_block *es = EXT4_SB(sb)->s_es;
4775
4753
struct inode *inode;
4776
-
const char *err_str;
4777
4754
journal_t *journal = EXT4_SB(sb)->s_journal;
4778
4755
long ret;
4779
4756
loff_t size;
···
4801
4780
if (!inode)
4802
4781
return ERR_PTR(-ENOMEM);
4803
4782
if (!(inode->i_state & I_NEW)) {
4804
-
if ((err_str = check_igot_inode(inode, flags)) != NULL) {
4805
-
ext4_error_inode(inode, function, line, 0, err_str);
4783
+
ret = check_igot_inode(inode, flags, function, line);
4784
+
if (ret) {
4806
4785
iput(inode);
4807
-
return ERR_PTR(-EFSCORRUPTED);
4786
+
return ERR_PTR(ret);
4808
4787
}
4809
4788
return inode;
4810
4789
}
···
5086
5065
ret = -EFSCORRUPTED;
5087
5066
goto bad_inode;
5088
5067
}
5089
-
if ((err_str = check_igot_inode(inode, flags)) != NULL) {
5090
-
ext4_error_inode(inode, function, line, 0, err_str);
5091
-
ret = -EFSCORRUPTED;
5092
-
goto bad_inode;
5068
+
ret = check_igot_inode(inode, flags, function, line);
5069
+
/*
5070
+
* -ESTALE here means there is nothing inherently wrong with the inode,
5071
+
* it's just not an inode we can return for an fhandle lookup.
5072
+
*/
5073
+
if (ret == -ESTALE) {
5074
+
brelse(iloc.bh);
5075
+
unlock_new_inode(inode);
5076
+
iput(inode);
5077
+
return ERR_PTR(-ESTALE);
5093
5078
}
5094
-
5079
+
if (ret)
5080
+
goto bad_inode;
5095
5081
brelse(iloc.bh);
5082
+
5096
5083
unlock_new_inode(inode);
5097
5084
return inode;
5098
5085
+8
-10
fs/ext4/mballoc.c
+8
-10
fs/ext4/mballoc.c
···
3037
3037
unsigned char blocksize_bits = min_t(unsigned char,
3038
3038
sb->s_blocksize_bits,
3039
3039
EXT4_MAX_BLOCK_LOG_SIZE);
3040
-
struct sg {
3041
-
struct ext4_group_info info;
3042
-
ext4_grpblk_t counters[EXT4_MAX_BLOCK_LOG_SIZE + 2];
3043
-
} sg;
3040
+
DEFINE_RAW_FLEX(struct ext4_group_info, sg, bb_counters,
3041
+
EXT4_MAX_BLOCK_LOG_SIZE + 2);
3044
3042
3045
3043
group--;
3046
3044
if (group == 0)
···
3046
3048
" 2^0 2^1 2^2 2^3 2^4 2^5 2^6 "
3047
3049
" 2^7 2^8 2^9 2^10 2^11 2^12 2^13 ]\n");
3048
3050
3049
-
i = (blocksize_bits + 2) * sizeof(sg.info.bb_counters[0]) +
3051
+
i = (blocksize_bits + 2) * sizeof(sg->bb_counters[0]) +
3050
3052
sizeof(struct ext4_group_info);
3051
3053
3052
3054
grinfo = ext4_get_group_info(sb, group);
···
3066
3068
* We care only about free space counters in the group info and
3067
3069
* these are safe to access even after the buddy has been unloaded
3068
3070
*/
3069
-
memcpy(&sg, grinfo, i);
3070
-
seq_printf(seq, "#%-5u: %-5u %-5u %-5u [", group, sg.info.bb_free,
3071
-
sg.info.bb_fragments, sg.info.bb_first_free);
3071
+
memcpy(sg, grinfo, i);
3072
+
seq_printf(seq, "#%-5u: %-5u %-5u %-5u [", group, sg->bb_free,
3073
+
sg->bb_fragments, sg->bb_first_free);
3072
3074
for (i = 0; i <= 13; i++)
3073
3075
seq_printf(seq, " %-5u", i <= blocksize_bits + 1 ?
3074
-
sg.info.bb_counters[i] : 0);
3076
+
sg->bb_counters[i] : 0);
3075
3077
seq_puts(seq, " ]");
3076
-
if (EXT4_MB_GRP_BBITMAP_CORRUPT(&sg.info))
3078
+
if (EXT4_MB_GRP_BBITMAP_CORRUPT(sg))
3077
3079
seq_puts(seq, " Block bitmap corrupted!");
3078
3080
seq_putc(seq, '\n');
3079
3081
return 0;
+1
-1
fs/ext4/namei.c
+1
-1
fs/ext4/namei.c
+3
fs/fuse/virtio_fs.c
+3
fs/fuse/virtio_fs.c
···
1669
1669
unsigned int virtqueue_size;
1670
1670
int err = -EIO;
1671
1671
1672
+
if (!fsc->source)
1673
+
return invalf(fsc, "No source specified");
1674
+
1672
1675
/* This gets a reference on virtio_fs object. This ptr gets installed
1673
1676
* in fc->iq->priv. Once fuse_conn is going away, it calls ->put()
1674
1677
* to drop the reference to this object.
+6
fs/hfs/bnode.c
+6
fs/hfs/bnode.c
···
67
67
else
68
68
key_len = tree->max_key_len + 1;
69
69
70
+
if (key_len > sizeof(hfs_btree_key) || key_len < 1) {
71
+
memset(key, 0, sizeof(hfs_btree_key));
72
+
pr_err("hfs: Invalid key length: %d\n", key_len);
73
+
return;
74
+
}
75
+
70
76
hfs_bnode_read(node, key, off, key_len);
71
77
}
72
78
+6
fs/hfsplus/bnode.c
+6
fs/hfsplus/bnode.c
···
67
67
else
68
68
key_len = tree->max_key_len + 2;
69
69
70
+
if (key_len > sizeof(hfsplus_btree_key) || key_len < 1) {
71
+
memset(key, 0, sizeof(hfsplus_btree_key));
72
+
pr_err("hfsplus: Invalid key length: %d\n", key_len);
73
+
return;
74
+
}
75
+
70
76
hfs_bnode_read(node, key, off, key_len);
71
77
}
72
78
+1
-1
fs/iomap/buffered-io.c
+1
-1
fs/iomap/buffered-io.c
+1
-1
fs/isofs/export.c
+1
-1
fs/isofs/export.c
+4
-4
fs/namei.c
+4
-4
fs/namei.c
···
125
125
126
126
#define EMBEDDED_NAME_MAX (PATH_MAX - offsetof(struct filename, iname))
127
127
128
-
static inline void initname(struct filename *name)
128
+
static inline void initname(struct filename *name, const char __user *uptr)
129
129
{
130
-
name->uptr = NULL;
130
+
name->uptr = uptr;
131
131
name->aname = NULL;
132
132
atomic_set(&name->refcnt, 1);
133
133
}
···
210
210
return ERR_PTR(-ENAMETOOLONG);
211
211
}
212
212
}
213
-
initname(result);
213
+
initname(result, filename);
214
214
audit_getname(result);
215
215
return result;
216
216
}
···
268
268
return ERR_PTR(-ENAMETOOLONG);
269
269
}
270
270
memcpy((char *)result->name, filename, len);
271
-
initname(result);
271
+
initname(result, NULL);
272
272
audit_getname(result);
273
273
return result;
274
274
}
+21
-13
fs/namespace.c
+21
-13
fs/namespace.c
···
1830
1830
down_write(&namespace_sem);
1831
1831
}
1832
1832
1833
+
DEFINE_GUARD(namespace_lock, struct rw_semaphore *, namespace_lock(), namespace_unlock())
1834
+
1833
1835
enum umount_tree_flags {
1834
1836
UMOUNT_SYNC = 1,
1835
1837
UMOUNT_PROPAGATE = 2,
···
2385
2383
return;
2386
2384
}
2387
2385
2388
-
scoped_guard(rwsem_write, &namespace_sem) {
2386
+
scoped_guard(namespace_lock, &namespace_sem) {
2389
2387
ns = m->mnt_ns;
2390
2388
if (!must_dissolve(ns))
2391
2389
return;
···
5191
5189
mnt_idmap_put(kattr->mnt_idmap);
5192
5190
}
5193
5191
5194
-
static int copy_mount_setattr(struct mount_attr __user *uattr, size_t usize,
5195
-
struct mount_kattr *kattr)
5192
+
static int wants_mount_setattr(struct mount_attr __user *uattr, size_t usize,
5193
+
struct mount_kattr *kattr)
5196
5194
{
5197
5195
int ret;
5198
5196
struct mount_attr attr;
···
5215
5213
if (attr.attr_set == 0 &&
5216
5214
attr.attr_clr == 0 &&
5217
5215
attr.propagation == 0)
5218
-
return 0;
5216
+
return 0; /* Tell caller to not bother. */
5219
5217
5220
-
return build_mount_kattr(&attr, usize, kattr);
5218
+
ret = build_mount_kattr(&attr, usize, kattr);
5219
+
if (ret < 0)
5220
+
return ret;
5221
+
5222
+
return 1;
5221
5223
}
5222
5224
5223
5225
SYSCALL_DEFINE5(mount_setattr, int, dfd, const char __user *, path,
···
5253
5247
if (flags & AT_RECURSIVE)
5254
5248
kattr.kflags |= MOUNT_KATTR_RECURSE;
5255
5249
5256
-
err = copy_mount_setattr(uattr, usize, &kattr);
5257
-
if (err)
5250
+
err = wants_mount_setattr(uattr, usize, &kattr);
5251
+
if (err <= 0)
5258
5252
return err;
5259
5253
5260
5254
err = user_path_at(dfd, path, kattr.lookup_flags, &target);
···
5288
5282
if (flags & AT_RECURSIVE)
5289
5283
kattr.kflags |= MOUNT_KATTR_RECURSE;
5290
5284
5291
-
ret = copy_mount_setattr(uattr, usize, &kattr);
5292
-
if (ret)
5285
+
ret = wants_mount_setattr(uattr, usize, &kattr);
5286
+
if (ret < 0)
5293
5287
return ret;
5294
5288
5295
-
ret = do_mount_setattr(&file->f_path, &kattr);
5296
-
if (ret)
5297
-
return ret;
5289
+
if (ret) {
5290
+
ret = do_mount_setattr(&file->f_path, &kattr);
5291
+
if (ret)
5292
+
return ret;
5298
5293
5299
-
finish_mount_kattr(&kattr);
5294
+
finish_mount_kattr(&kattr);
5295
+
}
5300
5296
}
5301
5297
5302
5298
fd = get_unused_fd_flags(flags & O_CLOEXEC);
+4
fs/netfs/main.c
+4
fs/netfs/main.c
···
127
127
if (mempool_init_slab_pool(&netfs_subrequest_pool, 100, netfs_subrequest_slab) < 0)
128
128
goto error_subreqpool;
129
129
130
+
#ifdef CONFIG_PROC_FS
130
131
if (!proc_mkdir("fs/netfs", NULL))
131
132
goto error_proc;
132
133
if (!proc_create_seq("fs/netfs/requests", S_IFREG | 0444, NULL,
133
134
&netfs_requests_seq_ops))
134
135
goto error_procfile;
136
+
#endif
135
137
#ifdef CONFIG_FSCACHE_STATS
136
138
if (!proc_create_single("fs/netfs/stats", S_IFREG | 0444, NULL,
137
139
netfs_stats_show))
···
146
144
return 0;
147
145
148
146
error_fscache:
147
+
#ifdef CONFIG_PROC_FS
149
148
error_procfile:
150
149
remove_proc_subtree("fs/netfs", NULL);
151
150
error_proc:
151
+
#endif
152
152
mempool_exit(&netfs_subrequest_pool);
153
153
error_subreqpool:
154
154
kmem_cache_destroy(netfs_subrequest_slab);
-2
fs/overlayfs/overlayfs.h
-2
fs/overlayfs/overlayfs.h
···
541
541
bool ovl_is_metacopy_dentry(struct dentry *dentry);
542
542
char *ovl_get_redirect_xattr(struct ovl_fs *ofs, const struct path *path, int padding);
543
543
int ovl_ensure_verity_loaded(struct path *path);
544
-
int ovl_get_verity_xattr(struct ovl_fs *ofs, const struct path *path,
545
-
u8 *digest_buf, int *buf_length);
546
544
int ovl_validate_verity(struct ovl_fs *ofs,
547
545
struct path *metapath,
548
546
struct path *datapath);
+5
fs/overlayfs/super.c
+5
fs/overlayfs/super.c
···
1138
1138
return ERR_PTR(-EINVAL);
1139
1139
}
1140
1140
1141
+
if (ctx->nr == ctx->nr_data) {
1142
+
pr_err("at least one non-data lowerdir is required\n");
1143
+
return ERR_PTR(-EINVAL);
1144
+
}
1145
+
1141
1146
err = -EINVAL;
1142
1147
for (i = 0; i < ctx->nr; i++) {
1143
1148
l = &ctx->lower[i];
+5
-11
fs/smb/client/cifsencrypt.c
+5
-11
fs/smb/client/cifsencrypt.c
···
704
704
cifs_free_hash(&server->secmech.md5);
705
705
cifs_free_hash(&server->secmech.sha512);
706
706
707
-
if (!SERVER_IS_CHAN(server)) {
708
-
if (server->secmech.enc) {
709
-
crypto_free_aead(server->secmech.enc);
710
-
server->secmech.enc = NULL;
711
-
}
712
-
713
-
if (server->secmech.dec) {
714
-
crypto_free_aead(server->secmech.dec);
715
-
server->secmech.dec = NULL;
716
-
}
717
-
} else {
707
+
if (server->secmech.enc) {
708
+
crypto_free_aead(server->secmech.enc);
718
709
server->secmech.enc = NULL;
710
+
}
711
+
if (server->secmech.dec) {
712
+
crypto_free_aead(server->secmech.dec);
719
713
server->secmech.dec = NULL;
720
714
}
721
715
}
+2
-4
fs/smb/client/cifsglob.h
+2
-4
fs/smb/client/cifsglob.h
···
625
625
bool (*is_status_io_timeout)(char *buf);
626
626
/* Check for STATUS_NETWORK_NAME_DELETED */
627
627
bool (*is_network_name_deleted)(char *buf, struct TCP_Server_Info *srv);
628
-
int (*parse_reparse_point)(struct cifs_sb_info *cifs_sb,
629
-
const char *full_path,
630
-
struct kvec *rsp_iov,
631
-
struct cifs_open_info_data *data);
628
+
struct reparse_data_buffer * (*get_reparse_point_buffer)(const struct kvec *rsp_iov,
629
+
u32 *plen);
632
630
int (*create_reparse_symlink)(const unsigned int xid,
633
631
struct inode *inode,
634
632
struct dentry *dentry,
+2
fs/smb/client/cifspdu.h
+2
fs/smb/client/cifspdu.h
···
2256
2256
#define FILE_SUPPORTS_ENCRYPTION 0x00020000
2257
2257
#define FILE_SUPPORTS_OBJECT_IDS 0x00010000
2258
2258
#define FILE_VOLUME_IS_COMPRESSED 0x00008000
2259
+
#define FILE_SUPPORTS_POSIX_UNLINK_RENAME 0x00000400
2260
+
#define FILE_RETURNS_CLEANUP_RESULT_INFO 0x00000200
2259
2261
#define FILE_SUPPORTS_REMOTE_STORAGE 0x00000100
2260
2262
#define FILE_SUPPORTS_REPARSE_POINTS 0x00000080
2261
2263
#define FILE_SUPPORTS_SPARSE_FILES 0x00000040
+2
fs/smb/client/connect.c
+2
fs/smb/client/connect.c
+17
-8
fs/smb/client/inode.c
+17
-8
fs/smb/client/inode.c
···
1203
1203
goto out;
1204
1204
}
1205
1205
break;
1206
-
case IO_REPARSE_TAG_MOUNT_POINT:
1207
-
cifs_create_junction_fattr(fattr, sb);
1208
-
rc = 0;
1209
-
goto out;
1210
1206
default:
1211
1207
/* Check for cached reparse point data */
1212
1208
if (data->symlink_target || data->reparse.buf) {
1213
1209
rc = 0;
1214
-
} else if (iov && server->ops->parse_reparse_point) {
1215
-
rc = server->ops->parse_reparse_point(cifs_sb,
1216
-
full_path,
1217
-
iov, data);
1210
+
} else if (iov && server->ops->get_reparse_point_buffer) {
1211
+
struct reparse_data_buffer *reparse_buf;
1212
+
u32 reparse_len;
1213
+
1214
+
reparse_buf = server->ops->get_reparse_point_buffer(iov, &reparse_len);
1215
+
rc = parse_reparse_point(reparse_buf, reparse_len,
1216
+
cifs_sb, full_path, data);
1218
1217
/*
1219
1218
* If the reparse point was not handled but it is the
1220
1219
* name surrogate which points to directory, then treat
···
1227
1228
cifs_create_junction_fattr(fattr, sb);
1228
1229
goto out;
1229
1230
}
1231
+
/*
1232
+
* If the reparse point is unsupported by the Linux SMB
1233
+
* client then let it process by the SMB server. So mask
1234
+
* the -EOPNOTSUPP error code. This will allow Linux SMB
1235
+
* client to send SMB OPEN request to server. If server
1236
+
* does not support this reparse point too then server
1237
+
* will return error during open the path.
1238
+
*/
1239
+
if (rc == -EOPNOTSUPP)
1240
+
rc = 0;
1230
1241
}
1231
1242
1232
1243
if (data->reparse.tag == IO_REPARSE_TAG_SYMLINK && !rc) {
+29
-34
fs/smb/client/reparse.c
+29
-34
fs/smb/client/reparse.c
···
542
542
kfree(symname_utf16);
543
543
return -ENOMEM;
544
544
}
545
-
/* Flag 0x02000000 is unknown, but all wsl symlinks have this value */
546
-
symlink_buf->Flags = cpu_to_le32(0x02000000);
547
-
/* PathBuffer is in UTF-8 but without trailing null-term byte */
545
+
/* Version field must be set to 2 (MS-FSCC 2.1.2.7) */
546
+
symlink_buf->Version = cpu_to_le32(2);
547
+
/* Target for Version 2 is in UTF-8 but without trailing null-term byte */
548
548
symname_utf8_len = utf16s_to_utf8s((wchar_t *)symname_utf16, symname_utf16_len/2,
549
549
UTF16_LITTLE_ENDIAN,
550
-
symlink_buf->PathBuffer,
550
+
symlink_buf->Target,
551
551
symname_utf8_maxlen);
552
552
*buf = (struct reparse_data_buffer *)symlink_buf;
553
553
buf_len = sizeof(struct reparse_wsl_symlink_data_buffer) + symname_utf8_len;
···
1016
1016
struct cifs_open_info_data *data)
1017
1017
{
1018
1018
int len = le16_to_cpu(buf->ReparseDataLength);
1019
+
int data_offset = offsetof(typeof(*buf), Target) - offsetof(typeof(*buf), Version);
1019
1020
int symname_utf8_len;
1020
1021
__le16 *symname_utf16;
1021
1022
int symname_utf16_len;
1022
1023
1023
-
if (len <= sizeof(buf->Flags)) {
1024
+
if (len <= data_offset) {
1024
1025
cifs_dbg(VFS, "srv returned malformed wsl symlink buffer\n");
1025
1026
return -EIO;
1026
1027
}
1027
1028
1028
-
/* PathBuffer is in UTF-8 but without trailing null-term byte */
1029
-
symname_utf8_len = len - sizeof(buf->Flags);
1029
+
/* MS-FSCC 2.1.2.7 defines layout of the Target field only for Version 2. */
1030
+
if (le32_to_cpu(buf->Version) != 2) {
1031
+
cifs_dbg(VFS, "srv returned unsupported wsl symlink version %u\n", le32_to_cpu(buf->Version));
1032
+
return -EIO;
1033
+
}
1034
+
1035
+
/* Target for Version 2 is in UTF-8 but without trailing null-term byte */
1036
+
symname_utf8_len = len - data_offset;
1030
1037
/*
1031
1038
* Check that buffer does not contain null byte
1032
1039
* because Linux cannot process symlink with null byte.
1033
1040
*/
1034
-
if (strnlen(buf->PathBuffer, symname_utf8_len) != symname_utf8_len) {
1041
+
if (strnlen(buf->Target, symname_utf8_len) != symname_utf8_len) {
1035
1042
cifs_dbg(VFS, "srv returned null byte in wsl symlink target location\n");
1036
1043
return -EIO;
1037
1044
}
1038
1045
symname_utf16 = kzalloc(symname_utf8_len * 2, GFP_KERNEL);
1039
1046
if (!symname_utf16)
1040
1047
return -ENOMEM;
1041
-
symname_utf16_len = utf8s_to_utf16s(buf->PathBuffer, symname_utf8_len,
1048
+
symname_utf16_len = utf8s_to_utf16s(buf->Target, symname_utf8_len,
1042
1049
UTF16_LITTLE_ENDIAN,
1043
1050
(wchar_t *) symname_utf16, symname_utf8_len * 2);
1044
1051
if (symname_utf16_len < 0) {
···
1069
1062
const char *full_path,
1070
1063
struct cifs_open_info_data *data)
1071
1064
{
1072
-
struct cifs_tcon *tcon = cifs_sb_master_tcon(cifs_sb);
1073
-
1074
1065
data->reparse.buf = buf;
1075
1066
1076
1067
/* See MS-FSCC 2.1.2 */
···
1095
1090
}
1096
1091
return 0;
1097
1092
default:
1098
-
cifs_tcon_dbg(VFS | ONCE, "unhandled reparse tag: 0x%08x\n",
1099
-
le32_to_cpu(buf->ReparseTag));
1100
1093
return -EOPNOTSUPP;
1101
1094
}
1102
1095
}
1103
1096
1104
-
int smb2_parse_reparse_point(struct cifs_sb_info *cifs_sb,
1105
-
const char *full_path,
1106
-
struct kvec *rsp_iov,
1107
-
struct cifs_open_info_data *data)
1097
+
struct reparse_data_buffer *smb2_get_reparse_point_buffer(const struct kvec *rsp_iov,
1098
+
u32 *plen)
1108
1099
{
1109
-
struct reparse_data_buffer *buf;
1110
1100
struct smb2_ioctl_rsp *io = rsp_iov->iov_base;
1111
-
u32 plen = le32_to_cpu(io->OutputCount);
1112
-
1113
-
buf = (struct reparse_data_buffer *)((u8 *)io +
1114
-
le32_to_cpu(io->OutputOffset));
1115
-
return parse_reparse_point(buf, plen, cifs_sb, full_path, data);
1101
+
*plen = le32_to_cpu(io->OutputCount);
1102
+
return (struct reparse_data_buffer *)((u8 *)io +
1103
+
le32_to_cpu(io->OutputOffset));
1116
1104
}
1117
1105
1118
1106
static bool wsl_to_fattr(struct cifs_open_info_data *data,
···
1231
1233
bool ok;
1232
1234
1233
1235
switch (tag) {
1234
-
case IO_REPARSE_TAG_INTERNAL:
1235
-
if (!(fattr->cf_cifsattrs & ATTR_DIRECTORY))
1236
-
return false;
1237
-
fallthrough;
1238
-
case IO_REPARSE_TAG_DFS:
1239
-
case IO_REPARSE_TAG_DFSR:
1240
-
case IO_REPARSE_TAG_MOUNT_POINT:
1241
-
/* See cifs_create_junction_fattr() */
1242
-
fattr->cf_mode = S_IFDIR | 0711;
1243
-
break;
1244
1236
case IO_REPARSE_TAG_LX_SYMLINK:
1245
1237
case IO_REPARSE_TAG_LX_FIFO:
1246
1238
case IO_REPARSE_TAG_AF_UNIX:
···
1250
1262
fattr->cf_mode |= S_IFLNK;
1251
1263
break;
1252
1264
default:
1253
-
return false;
1265
+
if (!(fattr->cf_cifsattrs & ATTR_DIRECTORY))
1266
+
return false;
1267
+
if (!IS_REPARSE_TAG_NAME_SURROGATE(tag) &&
1268
+
tag != IO_REPARSE_TAG_INTERNAL)
1269
+
return false;
1270
+
/* See cifs_create_junction_fattr() */
1271
+
fattr->cf_mode = S_IFDIR | 0711;
1272
+
break;
1254
1273
}
1255
1274
1256
1275
fattr->cf_dtype = S_DT(fattr->cf_mode);
+1
-4
fs/smb/client/reparse.h
+1
-4
fs/smb/client/reparse.h
···
135
135
int smb2_mknod_reparse(unsigned int xid, struct inode *inode,
136
136
struct dentry *dentry, struct cifs_tcon *tcon,
137
137
const char *full_path, umode_t mode, dev_t dev);
138
-
int smb2_parse_reparse_point(struct cifs_sb_info *cifs_sb,
139
-
const char *full_path,
140
-
struct kvec *rsp_iov,
141
-
struct cifs_open_info_data *data);
138
+
struct reparse_data_buffer *smb2_get_reparse_point_buffer(const struct kvec *rsp_iov, u32 *len);
142
139
143
140
#endif /* _CIFS_REPARSE_H */
+40
-20
fs/smb/client/sess.c
+40
-20
fs/smb/client/sess.c
···
680
680
*pbcc_area = bcc_ptr;
681
681
}
682
682
683
+
static void
684
+
ascii_oslm_strings(char **pbcc_area, const struct nls_table *nls_cp)
685
+
{
686
+
char *bcc_ptr = *pbcc_area;
687
+
688
+
strcpy(bcc_ptr, "Linux version ");
689
+
bcc_ptr += strlen("Linux version ");
690
+
strcpy(bcc_ptr, init_utsname()->release);
691
+
bcc_ptr += strlen(init_utsname()->release) + 1;
692
+
693
+
strcpy(bcc_ptr, CIFS_NETWORK_OPSYS);
694
+
bcc_ptr += strlen(CIFS_NETWORK_OPSYS) + 1;
695
+
696
+
*pbcc_area = bcc_ptr;
697
+
}
698
+
683
699
static void unicode_domain_string(char **pbcc_area, struct cifs_ses *ses,
684
700
const struct nls_table *nls_cp)
685
701
{
···
716
700
CIFS_MAX_DOMAINNAME_LEN, nls_cp);
717
701
bcc_ptr += 2 * bytes_ret;
718
702
bcc_ptr += 2; /* account for null terminator */
703
+
704
+
*pbcc_area = bcc_ptr;
705
+
}
706
+
707
+
static void ascii_domain_string(char **pbcc_area, struct cifs_ses *ses,
708
+
const struct nls_table *nls_cp)
709
+
{
710
+
char *bcc_ptr = *pbcc_area;
711
+
int len;
712
+
713
+
/* copy domain */
714
+
if (ses->domainName != NULL) {
715
+
len = strscpy(bcc_ptr, ses->domainName, CIFS_MAX_DOMAINNAME_LEN);
716
+
if (WARN_ON_ONCE(len < 0))
717
+
len = CIFS_MAX_DOMAINNAME_LEN - 1;
718
+
bcc_ptr += len;
719
+
} /* else we send a null domain name so server will default to its own domain */
720
+
*bcc_ptr = 0;
721
+
bcc_ptr++;
719
722
720
723
*pbcc_area = bcc_ptr;
721
724
}
···
784
749
*bcc_ptr = 0;
785
750
bcc_ptr++; /* account for null termination */
786
751
787
-
/* copy domain */
788
-
if (ses->domainName != NULL) {
789
-
len = strscpy(bcc_ptr, ses->domainName, CIFS_MAX_DOMAINNAME_LEN);
790
-
if (WARN_ON_ONCE(len < 0))
791
-
len = CIFS_MAX_DOMAINNAME_LEN - 1;
792
-
bcc_ptr += len;
793
-
} /* else we send a null domain name so server will default to its own domain */
794
-
*bcc_ptr = 0;
795
-
bcc_ptr++;
796
-
797
752
/* BB check for overflow here */
798
753
799
-
strcpy(bcc_ptr, "Linux version ");
800
-
bcc_ptr += strlen("Linux version ");
801
-
strcpy(bcc_ptr, init_utsname()->release);
802
-
bcc_ptr += strlen(init_utsname()->release) + 1;
803
-
804
-
strcpy(bcc_ptr, CIFS_NETWORK_OPSYS);
805
-
bcc_ptr += strlen(CIFS_NETWORK_OPSYS) + 1;
754
+
ascii_domain_string(&bcc_ptr, ses, nls_cp);
755
+
ascii_oslm_strings(&bcc_ptr, nls_cp);
806
756
807
757
*pbcc_area = bcc_ptr;
808
758
}
···
1590
1570
sess_data->iov[1].iov_len = msg->secblob_len;
1591
1571
pSMB->req.SecurityBlobLength = cpu_to_le16(sess_data->iov[1].iov_len);
1592
1572
1593
-
if (ses->capabilities & CAP_UNICODE) {
1573
+
if (pSMB->req.hdr.Flags2 & SMBFLG2_UNICODE) {
1594
1574
/* unicode strings must be word aligned */
1595
1575
if (!IS_ALIGNED(sess_data->iov[0].iov_len + sess_data->iov[1].iov_len, 2)) {
1596
1576
*bcc_ptr = 0;
···
1599
1579
unicode_oslm_strings(&bcc_ptr, sess_data->nls_cp);
1600
1580
unicode_domain_string(&bcc_ptr, ses, sess_data->nls_cp);
1601
1581
} else {
1602
-
/* BB: is this right? */
1603
-
ascii_ssetup_strings(&bcc_ptr, ses, sess_data->nls_cp);
1582
+
ascii_oslm_strings(&bcc_ptr, sess_data->nls_cp);
1583
+
ascii_domain_string(&bcc_ptr, ses, sess_data->nls_cp);
1604
1584
}
1605
1585
1606
1586
sess_data->iov[2].iov_len = (long) bcc_ptr -
+42
-11
fs/smb/client/smb1ops.c
+42
-11
fs/smb/client/smb1ops.c
···
568
568
data->reparse_point = le32_to_cpu(fi.Attributes) & ATTR_REPARSE;
569
569
}
570
570
571
+
#ifdef CONFIG_CIFS_XATTR
572
+
/*
573
+
* For WSL CHR and BLK reparse points it is required to fetch
574
+
* EA $LXDEV which contains major and minor device numbers.
575
+
*/
576
+
if (!rc && data->reparse_point) {
577
+
struct smb2_file_full_ea_info *ea;
578
+
579
+
ea = (struct smb2_file_full_ea_info *)data->wsl.eas;
580
+
rc = CIFSSMBQAllEAs(xid, tcon, full_path, SMB2_WSL_XATTR_DEV,
581
+
&ea->ea_data[SMB2_WSL_XATTR_NAME_LEN + 1],
582
+
SMB2_WSL_XATTR_DEV_SIZE, cifs_sb);
583
+
if (rc == SMB2_WSL_XATTR_DEV_SIZE) {
584
+
ea->next_entry_offset = cpu_to_le32(0);
585
+
ea->flags = 0;
586
+
ea->ea_name_length = SMB2_WSL_XATTR_NAME_LEN;
587
+
ea->ea_value_length = cpu_to_le16(SMB2_WSL_XATTR_DEV_SIZE);
588
+
memcpy(&ea->ea_data[0], SMB2_WSL_XATTR_DEV, SMB2_WSL_XATTR_NAME_LEN + 1);
589
+
data->wsl.eas_len = sizeof(*ea) + SMB2_WSL_XATTR_NAME_LEN + 1 +
590
+
SMB2_WSL_XATTR_DEV_SIZE;
591
+
rc = 0;
592
+
} else if (rc >= 0) {
593
+
/* It is an error if EA $LXDEV has wrong size. */
594
+
rc = -EINVAL;
595
+
} else {
596
+
/*
597
+
* In all other cases ignore error if fetching
598
+
* of EA $LXDEV failed. It is needed only for
599
+
* WSL CHR and BLK reparse points and wsl_to_fattr()
600
+
* handle the case when EA is missing.
601
+
*/
602
+
rc = 0;
603
+
}
604
+
}
605
+
#endif
606
+
571
607
return rc;
572
608
}
573
609
···
1006
970
return rc;
1007
971
}
1008
972
1009
-
static int cifs_parse_reparse_point(struct cifs_sb_info *cifs_sb,
1010
-
const char *full_path,
1011
-
struct kvec *rsp_iov,
1012
-
struct cifs_open_info_data *data)
973
+
static struct reparse_data_buffer *cifs_get_reparse_point_buffer(const struct kvec *rsp_iov,
974
+
u32 *plen)
1013
975
{
1014
-
struct reparse_data_buffer *buf;
1015
976
TRANSACT_IOCTL_RSP *io = rsp_iov->iov_base;
1016
-
u32 plen = le16_to_cpu(io->ByteCount);
1017
-
1018
-
buf = (struct reparse_data_buffer *)((__u8 *)&io->hdr.Protocol +
1019
-
le32_to_cpu(io->DataOffset));
1020
-
return parse_reparse_point(buf, plen, cifs_sb, full_path, data);
977
+
*plen = le16_to_cpu(io->ByteCount);
978
+
return (struct reparse_data_buffer *)((__u8 *)&io->hdr.Protocol +
979
+
le32_to_cpu(io->DataOffset));
1021
980
}
1022
981
1023
982
static bool
···
1188
1157
.rename = CIFSSMBRename,
1189
1158
.create_hardlink = CIFSCreateHardLink,
1190
1159
.query_symlink = cifs_query_symlink,
1191
-
.parse_reparse_point = cifs_parse_reparse_point,
1160
+
.get_reparse_point_buffer = cifs_get_reparse_point_buffer,
1192
1161
.open = cifs_open_file,
1193
1162
.set_fid = cifs_set_fid,
1194
1163
.close = cifs_close_file,
+7
-7
fs/smb/client/smb2ops.c
+7
-7
fs/smb/client/smb2ops.c
···
4555
4555
return rc;
4556
4556
}
4557
4557
} else {
4558
-
if (unlikely(!server->secmech.dec))
4559
-
return -EIO;
4560
-
4558
+
rc = smb3_crypto_aead_allocate(server);
4559
+
if (unlikely(rc))
4560
+
return rc;
4561
4561
tfm = server->secmech.dec;
4562
4562
}
4563
4563
···
5303
5303
.unlink = smb2_unlink,
5304
5304
.rename = smb2_rename_path,
5305
5305
.create_hardlink = smb2_create_hardlink,
5306
-
.parse_reparse_point = smb2_parse_reparse_point,
5306
+
.get_reparse_point_buffer = smb2_get_reparse_point_buffer,
5307
5307
.query_mf_symlink = smb3_query_mf_symlink,
5308
5308
.create_mf_symlink = smb3_create_mf_symlink,
5309
5309
.create_reparse_symlink = smb2_create_reparse_symlink,
···
5406
5406
.unlink = smb2_unlink,
5407
5407
.rename = smb2_rename_path,
5408
5408
.create_hardlink = smb2_create_hardlink,
5409
-
.parse_reparse_point = smb2_parse_reparse_point,
5409
+
.get_reparse_point_buffer = smb2_get_reparse_point_buffer,
5410
5410
.query_mf_symlink = smb3_query_mf_symlink,
5411
5411
.create_mf_symlink = smb3_create_mf_symlink,
5412
5412
.create_reparse_symlink = smb2_create_reparse_symlink,
···
5513
5513
.unlink = smb2_unlink,
5514
5514
.rename = smb2_rename_path,
5515
5515
.create_hardlink = smb2_create_hardlink,
5516
-
.parse_reparse_point = smb2_parse_reparse_point,
5516
+
.get_reparse_point_buffer = smb2_get_reparse_point_buffer,
5517
5517
.query_mf_symlink = smb3_query_mf_symlink,
5518
5518
.create_mf_symlink = smb3_create_mf_symlink,
5519
5519
.create_reparse_symlink = smb2_create_reparse_symlink,
···
5629
5629
.unlink = smb2_unlink,
5630
5630
.rename = smb2_rename_path,
5631
5631
.create_hardlink = smb2_create_hardlink,
5632
-
.parse_reparse_point = smb2_parse_reparse_point,
5632
+
.get_reparse_point_buffer = smb2_get_reparse_point_buffer,
5633
5633
.query_mf_symlink = smb3_query_mf_symlink,
5634
5634
.create_mf_symlink = smb3_create_mf_symlink,
5635
5635
.create_reparse_symlink = smb2_create_reparse_symlink,
+2
-9
fs/smb/client/smb2pdu.c
+2
-9
fs/smb/client/smb2pdu.c
···
1252
1252
cifs_server_dbg(VFS, "Missing expected negotiate contexts\n");
1253
1253
}
1254
1254
1255
-
if (server->cipher_type && !rc) {
1256
-
if (!SERVER_IS_CHAN(server)) {
1257
-
rc = smb3_crypto_aead_allocate(server);
1258
-
} else {
1259
-
/* For channels, just reuse the primary server crypto secmech. */
1260
-
server->secmech.enc = server->primary_server->secmech.enc;
1261
-
server->secmech.dec = server->primary_server->secmech.dec;
1262
-
}
1263
-
}
1255
+
if (server->cipher_type && !rc)
1256
+
rc = smb3_crypto_aead_allocate(server);
1264
1257
neg_exit:
1265
1258
free_rsp_buf(resp_buftype, rsp);
1266
1259
return rc;
+3
-3
fs/smb/common/smb2pdu.h
+3
-3
fs/smb/common/smb2pdu.h
···
1567
1567
__u8 DataBuffer[];
1568
1568
} __packed;
1569
1569
1570
-
/* For IO_REPARSE_TAG_LX_SYMLINK */
1570
+
/* For IO_REPARSE_TAG_LX_SYMLINK - see MS-FSCC 2.1.2.7 */
1571
1571
struct reparse_wsl_symlink_data_buffer {
1572
1572
__le32 ReparseTag;
1573
1573
__le16 ReparseDataLength;
1574
1574
__u16 Reserved;
1575
-
__le32 Flags;
1576
-
__u8 PathBuffer[]; /* Variable Length UTF-8 string without nul-term */
1575
+
__le32 Version; /* Always 2 */
1576
+
__u8 Target[]; /* Variable Length UTF-8 string without nul-term */
1577
1577
} __packed;
1578
1578
1579
1579
struct validate_negotiate_info_req {
+2
fs/smb/server/smb_common.h
+2
fs/smb/server/smb_common.h
···
72
72
#define FILE_SUPPORTS_ENCRYPTION 0x00020000
73
73
#define FILE_SUPPORTS_OBJECT_IDS 0x00010000
74
74
#define FILE_VOLUME_IS_COMPRESSED 0x00008000
75
+
#define FILE_SUPPORTS_POSIX_UNLINK_RENAME 0x00000400
76
+
#define FILE_RETURNS_CLEANUP_RESULT_INFO 0x00000200
75
77
#define FILE_SUPPORTS_REMOTE_STORAGE 0x00000100
76
78
#define FILE_SUPPORTS_REPARSE_POINTS 0x00000080
77
79
#define FILE_SUPPORTS_SPARSE_FILES 0x00000040
+1
fs/xfs/xfs_buf.c
+1
fs/xfs/xfs_buf.c
+1
-1
fs/xfs/xfs_buf_mem.c
+1
-1
fs/xfs/xfs_buf_mem.c
+1
-2
fs/xfs/xfs_dquot.c
+1
-2
fs/xfs/xfs_dquot.c
···
1186
1186
if (test_bit(XFS_LI_IN_AIL, &lip->li_flags) &&
1187
1187
(lip->li_lsn == qlip->qli_flush_lsn ||
1188
1188
test_bit(XFS_LI_FAILED, &lip->li_flags))) {
1189
-
1190
1189
spin_lock(&ailp->ail_lock);
1191
-
xfs_clear_li_failed(lip);
1190
+
clear_bit(XFS_LI_FAILED, &lip->li_flags);
1192
1191
if (lip->li_lsn == qlip->qli_flush_lsn) {
1193
1192
/* xfs_ail_update_finish() drops the AIL lock */
1194
1193
tail_lsn = xfs_ail_delete_one(ailp, lip);
+33
-18
fs/xfs/xfs_fsmap.c
+33
-18
fs/xfs/xfs_fsmap.c
···
876
876
const struct xfs_fsmap *keys,
877
877
struct xfs_getfsmap_info *info)
878
878
{
879
+
struct xfs_fsmap key0 = *keys; /* struct copy */
879
880
struct xfs_mount *mp = tp->t_mountp;
880
881
struct xfs_rtgroup *rtg = NULL;
881
882
struct xfs_btree_cur *bt_cur = NULL;
···
888
887
int error = 0;
889
888
890
889
eofs = XFS_FSB_TO_BB(mp, mp->m_sb.sb_rtstart + mp->m_sb.sb_rblocks);
891
-
if (keys[0].fmr_physical >= eofs)
890
+
if (key0.fmr_physical >= eofs)
892
891
return 0;
893
892
893
+
/*
894
+
* On zoned filesystems with an internal rt volume, the volume comes
895
+
* immediately after the end of the data volume. However, the
896
+
* xfs_rtblock_t address space is relative to the start of the data
897
+
* device, which means that the first @rtstart fsblocks do not actually
898
+
* point anywhere. If a fsmap query comes in with the low key starting
899
+
* below @rtstart, report it as "owned by filesystem".
900
+
*/
894
901
rtstart_daddr = XFS_FSB_TO_BB(mp, mp->m_sb.sb_rtstart);
895
-
if (keys[0].fmr_physical < rtstart_daddr) {
902
+
if (xfs_has_zoned(mp) && key0.fmr_physical < rtstart_daddr) {
896
903
struct xfs_fsmap_irec frec = {
897
904
.owner = XFS_RMAP_OWN_FS,
898
905
.len_daddr = rtstart_daddr,
899
906
};
900
907
901
-
/* Adjust the low key if we are continuing from where we left off. */
902
-
if (keys[0].fmr_length > 0) {
903
-
info->low_daddr = keys[0].fmr_physical + keys[0].fmr_length;
904
-
return 0;
908
+
/*
909
+
* Adjust the start of the query range if we're picking up from
910
+
* a previous round, and only emit the record if we haven't
911
+
* already gone past.
912
+
*/
913
+
key0.fmr_physical += key0.fmr_length;
914
+
if (key0.fmr_physical < rtstart_daddr) {
915
+
error = xfs_getfsmap_helper(tp, info, &frec);
916
+
if (error)
917
+
return error;
918
+
919
+
key0.fmr_physical = rtstart_daddr;
905
920
}
906
921
907
-
/* Fabricate an rmap entry for space occupied by the data dev */
908
-
error = xfs_getfsmap_helper(tp, info, &frec);
909
-
if (error)
910
-
return error;
922
+
/* Zero the other fields to avoid further adjustments. */
923
+
key0.fmr_owner = 0;
924
+
key0.fmr_offset = 0;
925
+
key0.fmr_length = 0;
911
926
}
912
927
913
-
start_rtb = xfs_daddr_to_rtb(mp, rtstart_daddr + keys[0].fmr_physical);
914
-
end_rtb = xfs_daddr_to_rtb(mp, rtstart_daddr +
915
-
min(eofs - 1, keys[1].fmr_physical));
916
-
928
+
start_rtb = xfs_daddr_to_rtb(mp, key0.fmr_physical);
929
+
end_rtb = xfs_daddr_to_rtb(mp, min(eofs - 1, keys[1].fmr_physical));
917
930
info->missing_owner = XFS_FMR_OWN_FREE;
918
931
919
932
/*
···
935
920
* low to the fsmap low key and max out the high key to the end
936
921
* of the rtgroup.
937
922
*/
938
-
info->low.rm_offset = XFS_BB_TO_FSBT(mp, keys[0].fmr_offset);
939
-
error = xfs_fsmap_owner_to_rmap(&info->low, &keys[0]);
923
+
info->low.rm_offset = XFS_BB_TO_FSBT(mp, key0.fmr_offset);
924
+
error = xfs_fsmap_owner_to_rmap(&info->low, &key0);
940
925
if (error)
941
926
return error;
942
-
info->low.rm_blockcount = XFS_BB_TO_FSBT(mp, keys[0].fmr_length);
943
-
xfs_getfsmap_set_irec_flags(&info->low, &keys[0]);
927
+
info->low.rm_blockcount = XFS_BB_TO_FSBT(mp, key0.fmr_length);
928
+
xfs_getfsmap_set_irec_flags(&info->low, &key0);
944
929
945
930
/* Adjust the low key if we are continuing from where we left off. */
946
931
if (info->low.rm_blockcount == 0) {
-6
fs/xfs/xfs_inode_item.c
-6
fs/xfs/xfs_inode_item.c
···
1089
1089
* state. Whilst the inode is in the AIL, it should have a valid buffer
1090
1090
* pointer for push operations to access - it is only safe to remove the
1091
1091
* inode from the buffer once it has been removed from the AIL.
1092
-
*
1093
-
* We also clear the failed bit before removing the item from the AIL
1094
-
* as xfs_trans_ail_delete()->xfs_clear_li_failed() will release buffer
1095
-
* references the inode item owns and needs to hold until we've fully
1096
-
* aborted the inode log item and detached it from the buffer.
1097
1092
*/
1098
-
clear_bit(XFS_LI_FAILED, &iip->ili_item.li_flags);
1099
1093
xfs_trans_ail_delete(&iip->ili_item, 0);
1100
1094
1101
1095
/*
+1
-1
fs/xfs/xfs_log.c
+1
-1
fs/xfs/xfs_log.c
···
2888
2888
*
2889
2889
* 1. the current iclog is active and has no data; the previous iclog
2890
2890
* is in the active or dirty state.
2891
-
* 2. the current iclog is drity, and the previous iclog is in the
2891
+
* 2. the current iclog is dirty, and the previous iclog is in the
2892
2892
* active or dirty state.
2893
2893
*
2894
2894
* We may sleep if:
+1
fs/xfs/xfs_mount.h
+1
fs/xfs/xfs_mount.h
+32
fs/xfs/xfs_sysfs.c
+32
fs/xfs/xfs_sysfs.c
···
718
718
}
719
719
XFS_SYSFS_ATTR_RO(max_open_zones);
720
720
721
+
static ssize_t
722
+
zonegc_low_space_store(
723
+
struct kobject *kobj,
724
+
const char *buf,
725
+
size_t count)
726
+
{
727
+
int ret;
728
+
unsigned int val;
729
+
730
+
ret = kstrtouint(buf, 0, &val);
731
+
if (ret)
732
+
return ret;
733
+
734
+
if (val > 100)
735
+
return -EINVAL;
736
+
737
+
zoned_to_mp(kobj)->m_zonegc_low_space = val;
738
+
739
+
return count;
740
+
}
741
+
742
+
static ssize_t
743
+
zonegc_low_space_show(
744
+
struct kobject *kobj,
745
+
char *buf)
746
+
{
747
+
return sysfs_emit(buf, "%u\n",
748
+
zoned_to_mp(kobj)->m_zonegc_low_space);
749
+
}
750
+
XFS_SYSFS_ATTR_RW(zonegc_low_space);
751
+
721
752
static struct attribute *xfs_zoned_attrs[] = {
722
753
ATTR_LIST(max_open_zones),
754
+
ATTR_LIST(zonegc_low_space),
723
755
NULL,
724
756
};
725
757
ATTRIBUTE_GROUPS(xfs_zoned);
+2
-3
fs/xfs/xfs_trans_ail.c
+2
-3
fs/xfs/xfs_trans_ail.c
···
909
909
return;
910
910
}
911
911
912
-
/* xfs_ail_update_finish() drops the AIL lock */
913
-
xfs_clear_li_failed(lip);
912
+
clear_bit(XFS_LI_FAILED, &lip->li_flags);
914
913
tail_lsn = xfs_ail_delete_one(ailp, lip);
915
-
xfs_ail_update_finish(ailp, tail_lsn);
914
+
xfs_ail_update_finish(ailp, tail_lsn); /* drops the AIL lock */
916
915
}
917
916
918
917
int
-28
fs/xfs/xfs_trans_priv.h
-28
fs/xfs/xfs_trans_priv.h
···
167
167
}
168
168
#endif
169
169
170
-
static inline void
171
-
xfs_clear_li_failed(
172
-
struct xfs_log_item *lip)
173
-
{
174
-
struct xfs_buf *bp = lip->li_buf;
175
-
176
-
ASSERT(test_bit(XFS_LI_IN_AIL, &lip->li_flags));
177
-
lockdep_assert_held(&lip->li_ailp->ail_lock);
178
-
179
-
if (test_and_clear_bit(XFS_LI_FAILED, &lip->li_flags)) {
180
-
lip->li_buf = NULL;
181
-
xfs_buf_rele(bp);
182
-
}
183
-
}
184
-
185
-
static inline void
186
-
xfs_set_li_failed(
187
-
struct xfs_log_item *lip,
188
-
struct xfs_buf *bp)
189
-
{
190
-
lockdep_assert_held(&lip->li_ailp->ail_lock);
191
-
192
-
if (!test_and_set_bit(XFS_LI_FAILED, &lip->li_flags)) {
193
-
xfs_buf_hold(bp);
194
-
lip->li_buf = bp;
195
-
}
196
-
}
197
-
198
170
#endif /* __XFS_TRANS_PRIV_H__ */
+7
fs/xfs/xfs_zone_alloc.c
+7
fs/xfs/xfs_zone_alloc.c
···
1201
1201
xfs_set_freecounter(mp, XC_FREE_RTEXTENTS,
1202
1202
iz.available + iz.reclaimable);
1203
1203
1204
+
/*
1205
+
* The user may configure GC to free up a percentage of unused blocks.
1206
+
* By default this is 0. GC will always trigger at the minimum level
1207
+
* for keeping max_open_zones available for data placement.
1208
+
*/
1209
+
mp->m_zonegc_low_space = 0;
1210
+
1204
1211
error = xfs_zone_gc_mount(mp);
1205
1212
if (error)
1206
1213
goto out_free_zone_info;
+14
-2
fs/xfs/xfs_zone_gc.c
+14
-2
fs/xfs/xfs_zone_gc.c
···
162
162
163
163
/*
164
164
* We aim to keep enough zones free in stock to fully use the open zone limit
165
-
* for data placement purposes.
165
+
* for data placement purposes. Additionally, the m_zonegc_low_space tunable
166
+
* can be set to make sure a fraction of the unused blocks are available for
167
+
* writing.
166
168
*/
167
169
bool
168
170
xfs_zoned_need_gc(
169
171
struct xfs_mount *mp)
170
172
{
173
+
s64 available, free;
174
+
171
175
if (!xfs_group_marked(mp, XG_TYPE_RTG, XFS_RTG_RECLAIMABLE))
172
176
return false;
173
-
if (xfs_estimate_freecounter(mp, XC_FREE_RTAVAILABLE) <
177
+
178
+
available = xfs_estimate_freecounter(mp, XC_FREE_RTAVAILABLE);
179
+
180
+
if (available <
174
181
mp->m_groups[XG_TYPE_RTG].blocks *
175
182
(mp->m_max_open_zones - XFS_OPEN_GC_ZONES))
176
183
return true;
184
+
185
+
free = xfs_estimate_freecounter(mp, XC_FREE_RTEXTENTS);
186
+
if (available < mult_frac(free, mp->m_zonegc_low_space, 100))
187
+
return true;
188
+
177
189
return false;
178
190
}
179
191
+5
-1
include/crypto/hash.h
+5
-1
include/crypto/hash.h
···
10
10
11
11
#include <linux/atomic.h>
12
12
#include <linux/crypto.h>
13
+
#include <linux/slab.h>
13
14
#include <linux/string.h>
14
15
15
16
/* Set this bit for virtual address instead of SG list. */
···
582
581
* ahash_request_free() - zeroize and free the request data structure
583
582
* @req: request data structure cipher handle to be freed
584
583
*/
585
-
void ahash_request_free(struct ahash_request *req);
584
+
static inline void ahash_request_free(struct ahash_request *req)
585
+
{
586
+
kfree_sensitive(req);
587
+
}
586
588
587
589
static inline struct ahash_request *ahash_request_cast(
588
590
struct crypto_async_request *req)
+1
-1
include/crypto/internal/hash.h
+1
-1
include/crypto/internal/hash.h
+3
include/drm/drm_kunit_helpers.h
+3
include/drm/drm_kunit_helpers.h
···
118
118
const struct drm_crtc_funcs *funcs,
119
119
const struct drm_crtc_helper_funcs *helper_funcs);
120
120
121
+
int drm_kunit_add_mode_destroy_action(struct kunit *test,
122
+
struct drm_display_mode *mode);
123
+
121
124
struct drm_display_mode *
122
125
drm_kunit_display_mode_from_cea_vic(struct kunit *test, struct drm_device *dev,
123
126
u8 video_code);
+1
include/drm/intel/pciids.h
+1
include/drm/intel/pciids.h
+49
-55
include/linux/dcache.h
+49
-55
include/linux/dcache.h
···
173
173
*/
174
174
175
175
/* d_flags entries */
176
-
#define DCACHE_OP_HASH BIT(0)
177
-
#define DCACHE_OP_COMPARE BIT(1)
178
-
#define DCACHE_OP_REVALIDATE BIT(2)
179
-
#define DCACHE_OP_DELETE BIT(3)
180
-
#define DCACHE_OP_PRUNE BIT(4)
176
+
enum dentry_flags {
177
+
DCACHE_OP_HASH = BIT(0),
178
+
DCACHE_OP_COMPARE = BIT(1),
179
+
DCACHE_OP_REVALIDATE = BIT(2),
180
+
DCACHE_OP_DELETE = BIT(3),
181
+
DCACHE_OP_PRUNE = BIT(4),
182
+
/*
183
+
* This dentry is possibly not currently connected to the dcache tree,
184
+
* in which case its parent will either be itself, or will have this
185
+
* flag as well. nfsd will not use a dentry with this bit set, but will
186
+
* first endeavour to clear the bit either by discovering that it is
187
+
* connected, or by performing lookup operations. Any filesystem which
188
+
* supports nfsd_operations MUST have a lookup function which, if it
189
+
* finds a directory inode with a DCACHE_DISCONNECTED dentry, will
190
+
* d_move that dentry into place and return that dentry rather than the
191
+
* passed one, typically using d_splice_alias.
192
+
*/
193
+
DCACHE_DISCONNECTED = BIT(5),
194
+
DCACHE_REFERENCED = BIT(6), /* Recently used, don't discard. */
195
+
DCACHE_DONTCACHE = BIT(7), /* Purge from memory on final dput() */
196
+
DCACHE_CANT_MOUNT = BIT(8),
197
+
DCACHE_GENOCIDE = BIT(9),
198
+
DCACHE_SHRINK_LIST = BIT(10),
199
+
DCACHE_OP_WEAK_REVALIDATE = BIT(11),
200
+
/*
201
+
* this dentry has been "silly renamed" and has to be deleted on the
202
+
* last dput()
203
+
*/
204
+
DCACHE_NFSFS_RENAMED = BIT(12),
205
+
DCACHE_FSNOTIFY_PARENT_WATCHED = BIT(13), /* Parent inode is watched by some fsnotify listener */
206
+
DCACHE_DENTRY_KILLED = BIT(14),
207
+
DCACHE_MOUNTED = BIT(15), /* is a mountpoint */
208
+
DCACHE_NEED_AUTOMOUNT = BIT(16), /* handle automount on this dir */
209
+
DCACHE_MANAGE_TRANSIT = BIT(17), /* manage transit from this dirent */
210
+
DCACHE_LRU_LIST = BIT(18),
211
+
DCACHE_ENTRY_TYPE = (7 << 19), /* bits 19..21 are for storing type: */
212
+
DCACHE_MISS_TYPE = (0 << 19), /* Negative dentry */
213
+
DCACHE_WHITEOUT_TYPE = (1 << 19), /* Whiteout dentry (stop pathwalk) */
214
+
DCACHE_DIRECTORY_TYPE = (2 << 19), /* Normal directory */
215
+
DCACHE_AUTODIR_TYPE = (3 << 19), /* Lookupless directory (presumed automount) */
216
+
DCACHE_REGULAR_TYPE = (4 << 19), /* Regular file type */
217
+
DCACHE_SPECIAL_TYPE = (5 << 19), /* Other file type */
218
+
DCACHE_SYMLINK_TYPE = (6 << 19), /* Symlink */
219
+
DCACHE_NOKEY_NAME = BIT(22), /* Encrypted name encoded without key */
220
+
DCACHE_OP_REAL = BIT(23),
221
+
DCACHE_PAR_LOOKUP = BIT(24), /* being looked up (with parent locked shared) */
222
+
DCACHE_DENTRY_CURSOR = BIT(25),
223
+
DCACHE_NORCU = BIT(26), /* No RCU delay for freeing */
224
+
};
181
225
182
-
#define DCACHE_DISCONNECTED BIT(5)
183
-
/* This dentry is possibly not currently connected to the dcache tree, in
184
-
* which case its parent will either be itself, or will have this flag as
185
-
* well. nfsd will not use a dentry with this bit set, but will first
186
-
* endeavour to clear the bit either by discovering that it is connected,
187
-
* or by performing lookup operations. Any filesystem which supports
188
-
* nfsd_operations MUST have a lookup function which, if it finds a
189
-
* directory inode with a DCACHE_DISCONNECTED dentry, will d_move that
190
-
* dentry into place and return that dentry rather than the passed one,
191
-
* typically using d_splice_alias. */
192
-
193
-
#define DCACHE_REFERENCED BIT(6) /* Recently used, don't discard. */
194
-
195
-
#define DCACHE_DONTCACHE BIT(7) /* Purge from memory on final dput() */
196
-
197
-
#define DCACHE_CANT_MOUNT BIT(8)
198
-
#define DCACHE_GENOCIDE BIT(9)
199
-
#define DCACHE_SHRINK_LIST BIT(10)
200
-
201
-
#define DCACHE_OP_WEAK_REVALIDATE BIT(11)
202
-
203
-
#define DCACHE_NFSFS_RENAMED BIT(12)
204
-
/* this dentry has been "silly renamed" and has to be deleted on the last
205
-
* dput() */
206
-
#define DCACHE_FSNOTIFY_PARENT_WATCHED BIT(13)
207
-
/* Parent inode is watched by some fsnotify listener */
208
-
209
-
#define DCACHE_DENTRY_KILLED BIT(14)
210
-
211
-
#define DCACHE_MOUNTED BIT(15) /* is a mountpoint */
212
-
#define DCACHE_NEED_AUTOMOUNT BIT(16) /* handle automount on this dir */
213
-
#define DCACHE_MANAGE_TRANSIT BIT(17) /* manage transit from this dirent */
214
226
#define DCACHE_MANAGED_DENTRY \
215
227
(DCACHE_MOUNTED|DCACHE_NEED_AUTOMOUNT|DCACHE_MANAGE_TRANSIT)
216
-
217
-
#define DCACHE_LRU_LIST BIT(18)
218
-
219
-
#define DCACHE_ENTRY_TYPE (7 << 19) /* bits 19..21 are for storing type: */
220
-
#define DCACHE_MISS_TYPE (0 << 19) /* Negative dentry */
221
-
#define DCACHE_WHITEOUT_TYPE (1 << 19) /* Whiteout dentry (stop pathwalk) */
222
-
#define DCACHE_DIRECTORY_TYPE (2 << 19) /* Normal directory */
223
-
#define DCACHE_AUTODIR_TYPE (3 << 19) /* Lookupless directory (presumed automount) */
224
-
#define DCACHE_REGULAR_TYPE (4 << 19) /* Regular file type */
225
-
#define DCACHE_SPECIAL_TYPE (5 << 19) /* Other file type */
226
-
#define DCACHE_SYMLINK_TYPE (6 << 19) /* Symlink */
227
-
228
-
#define DCACHE_NOKEY_NAME BIT(22) /* Encrypted name encoded without key */
229
-
#define DCACHE_OP_REAL BIT(23)
230
-
231
-
#define DCACHE_PAR_LOOKUP BIT(24) /* being looked up (with parent locked shared) */
232
-
#define DCACHE_DENTRY_CURSOR BIT(25)
233
-
#define DCACHE_NORCU BIT(26) /* No RCU delay for freeing */
234
228
235
229
extern seqlock_t rename_lock;
236
230
-1
include/linux/firmware/cirrus/cs_dsp_test_utils.h
-1
include/linux/firmware/cirrus/cs_dsp_test_utils.h
···
104
104
unsigned int cs_dsp_mock_xm_header_get_alg_base_in_words(struct cs_dsp_test *priv,
105
105
unsigned int alg_id,
106
106
int mem_type);
107
-
unsigned int cs_dsp_mock_xm_header_get_fw_version_from_regmap(struct cs_dsp_test *priv);
108
107
unsigned int cs_dsp_mock_xm_header_get_fw_version(struct cs_dsp_mock_xm_header *header);
109
108
void cs_dsp_mock_xm_header_drop_from_regmap_cache(struct cs_dsp_test *priv);
110
109
int cs_dsp_mock_xm_header_write_to_regmap(struct cs_dsp_mock_xm_header *header);
+1
-1
include/linux/hrtimer.h
+1
-1
include/linux/hrtimer.h
-27
include/linux/irqchip/irq-davinci-aintc.h
-27
include/linux/irqchip/irq-davinci-aintc.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
-
/*
3
-
* Copyright (C) 2019 Texas Instruments
4
-
*/
5
-
6
-
#ifndef _LINUX_IRQ_DAVINCI_AINTC_
7
-
#define _LINUX_IRQ_DAVINCI_AINTC_
8
-
9
-
#include <linux/ioport.h>
10
-
11
-
/**
12
-
* struct davinci_aintc_config - configuration data for davinci-aintc driver.
13
-
*
14
-
* @reg: register range to map
15
-
* @num_irqs: number of HW interrupts supported by the controller
16
-
* @prios: an array of size num_irqs containing priority settings for
17
-
* each interrupt
18
-
*/
19
-
struct davinci_aintc_config {
20
-
struct resource reg;
21
-
unsigned int num_irqs;
22
-
u8 *prios;
23
-
};
24
-
25
-
void davinci_aintc_init(const struct davinci_aintc_config *config);
26
-
27
-
#endif /* _LINUX_IRQ_DAVINCI_AINTC_ */
+8
-50
include/linux/local_lock.h
+8
-50
include/linux/local_lock.h
···
52
52
__local_unlock_irqrestore(lock, flags)
53
53
54
54
/**
55
-
* localtry_lock_init - Runtime initialize a lock instance
55
+
* local_lock_init - Runtime initialize a lock instance
56
56
*/
57
-
#define localtry_lock_init(lock) __localtry_lock_init(lock)
57
+
#define local_trylock_init(lock) __local_trylock_init(lock)
58
58
59
59
/**
60
-
* localtry_lock - Acquire a per CPU local lock
61
-
* @lock: The lock variable
62
-
*/
63
-
#define localtry_lock(lock) __localtry_lock(lock)
64
-
65
-
/**
66
-
* localtry_lock_irq - Acquire a per CPU local lock and disable interrupts
67
-
* @lock: The lock variable
68
-
*/
69
-
#define localtry_lock_irq(lock) __localtry_lock_irq(lock)
70
-
71
-
/**
72
-
* localtry_lock_irqsave - Acquire a per CPU local lock, save and disable
73
-
* interrupts
74
-
* @lock: The lock variable
75
-
* @flags: Storage for interrupt flags
76
-
*/
77
-
#define localtry_lock_irqsave(lock, flags) \
78
-
__localtry_lock_irqsave(lock, flags)
79
-
80
-
/**
81
-
* localtry_trylock - Try to acquire a per CPU local lock.
60
+
* local_trylock - Try to acquire a per CPU local lock
82
61
* @lock: The lock variable
83
62
*
84
63
* The function can be used in any context such as NMI or HARDIRQ. Due to
85
64
* locking constrains it will _always_ fail to acquire the lock in NMI or
86
65
* HARDIRQ context on PREEMPT_RT.
87
66
*/
88
-
#define localtry_trylock(lock) __localtry_trylock(lock)
67
+
#define local_trylock(lock) __local_trylock(lock)
89
68
90
69
/**
91
-
* localtry_trylock_irqsave - Try to acquire a per CPU local lock, save and disable
92
-
* interrupts if acquired
70
+
* local_trylock_irqsave - Try to acquire a per CPU local lock, save and disable
71
+
* interrupts if acquired
93
72
* @lock: The lock variable
94
73
* @flags: Storage for interrupt flags
95
74
*
···
76
97
* locking constrains it will _always_ fail to acquire the lock in NMI or
77
98
* HARDIRQ context on PREEMPT_RT.
78
99
*/
79
-
#define localtry_trylock_irqsave(lock, flags) \
80
-
__localtry_trylock_irqsave(lock, flags)
81
-
82
-
/**
83
-
* local_unlock - Release a per CPU local lock
84
-
* @lock: The lock variable
85
-
*/
86
-
#define localtry_unlock(lock) __localtry_unlock(lock)
87
-
88
-
/**
89
-
* local_unlock_irq - Release a per CPU local lock and enable interrupts
90
-
* @lock: The lock variable
91
-
*/
92
-
#define localtry_unlock_irq(lock) __localtry_unlock_irq(lock)
93
-
94
-
/**
95
-
* localtry_unlock_irqrestore - Release a per CPU local lock and restore
96
-
* interrupt flags
97
-
* @lock: The lock variable
98
-
* @flags: Interrupt flags to restore
99
-
*/
100
-
#define localtry_unlock_irqrestore(lock, flags) \
101
-
__localtry_unlock_irqrestore(lock, flags)
100
+
#define local_trylock_irqsave(lock, flags) \
101
+
__local_trylock_irqsave(lock, flags)
102
102
103
103
DEFINE_GUARD(local_lock, local_lock_t __percpu*,
104
104
local_lock(_T),
+89
-122
include/linux/local_lock_internal.h
+89
-122
include/linux/local_lock_internal.h
···
15
15
#endif
16
16
} local_lock_t;
17
17
18
+
/* local_trylock() and local_trylock_irqsave() only work with local_trylock_t */
18
19
typedef struct {
19
20
local_lock_t llock;
20
-
unsigned int acquired;
21
-
} localtry_lock_t;
21
+
u8 acquired;
22
+
} local_trylock_t;
22
23
23
24
#ifdef CONFIG_DEBUG_LOCK_ALLOC
24
25
# define LOCAL_LOCK_DEBUG_INIT(lockname) \
···
29
28
.lock_type = LD_LOCK_PERCPU, \
30
29
}, \
31
30
.owner = NULL,
31
+
32
+
# define LOCAL_TRYLOCK_DEBUG_INIT(lockname) \
33
+
.llock = { LOCAL_LOCK_DEBUG_INIT((lockname).llock) },
32
34
33
35
static inline void local_lock_acquire(local_lock_t *l)
34
36
{
···
60
56
}
61
57
#else /* CONFIG_DEBUG_LOCK_ALLOC */
62
58
# define LOCAL_LOCK_DEBUG_INIT(lockname)
59
+
# define LOCAL_TRYLOCK_DEBUG_INIT(lockname)
63
60
static inline void local_lock_acquire(local_lock_t *l) { }
64
61
static inline void local_trylock_acquire(local_lock_t *l) { }
65
62
static inline void local_lock_release(local_lock_t *l) { }
···
68
63
#endif /* !CONFIG_DEBUG_LOCK_ALLOC */
69
64
70
65
#define INIT_LOCAL_LOCK(lockname) { LOCAL_LOCK_DEBUG_INIT(lockname) }
71
-
#define INIT_LOCALTRY_LOCK(lockname) { .llock = { LOCAL_LOCK_DEBUG_INIT(lockname.llock) }}
66
+
#define INIT_LOCAL_TRYLOCK(lockname) { LOCAL_TRYLOCK_DEBUG_INIT(lockname) }
72
67
73
68
#define __local_lock_init(lock) \
74
69
do { \
···
81
76
local_lock_debug_init(lock); \
82
77
} while (0)
83
78
79
+
#define __local_trylock_init(lock) __local_lock_init(lock.llock)
80
+
84
81
#define __spinlock_nested_bh_init(lock) \
85
82
do { \
86
83
static struct lock_class_key __key; \
···
94
87
local_lock_debug_init(lock); \
95
88
} while (0)
96
89
90
+
#define __local_lock_acquire(lock) \
91
+
do { \
92
+
local_trylock_t *tl; \
93
+
local_lock_t *l; \
94
+
\
95
+
l = (local_lock_t *)this_cpu_ptr(lock); \
96
+
tl = (local_trylock_t *)l; \
97
+
_Generic((lock), \
98
+
local_trylock_t *: ({ \
99
+
lockdep_assert(tl->acquired == 0); \
100
+
WRITE_ONCE(tl->acquired, 1); \
101
+
}), \
102
+
default:(void)0); \
103
+
local_lock_acquire(l); \
104
+
} while (0)
105
+
97
106
#define __local_lock(lock) \
98
107
do { \
99
108
preempt_disable(); \
100
-
local_lock_acquire(this_cpu_ptr(lock)); \
109
+
__local_lock_acquire(lock); \
101
110
} while (0)
102
111
103
112
#define __local_lock_irq(lock) \
104
113
do { \
105
114
local_irq_disable(); \
106
-
local_lock_acquire(this_cpu_ptr(lock)); \
115
+
__local_lock_acquire(lock); \
107
116
} while (0)
108
117
109
118
#define __local_lock_irqsave(lock, flags) \
110
119
do { \
111
120
local_irq_save(flags); \
112
-
local_lock_acquire(this_cpu_ptr(lock)); \
121
+
__local_lock_acquire(lock); \
122
+
} while (0)
123
+
124
+
#define __local_trylock(lock) \
125
+
({ \
126
+
local_trylock_t *tl; \
127
+
\
128
+
preempt_disable(); \
129
+
tl = this_cpu_ptr(lock); \
130
+
if (READ_ONCE(tl->acquired)) { \
131
+
preempt_enable(); \
132
+
tl = NULL; \
133
+
} else { \
134
+
WRITE_ONCE(tl->acquired, 1); \
135
+
local_trylock_acquire( \
136
+
(local_lock_t *)tl); \
137
+
} \
138
+
!!tl; \
139
+
})
140
+
141
+
#define __local_trylock_irqsave(lock, flags) \
142
+
({ \
143
+
local_trylock_t *tl; \
144
+
\
145
+
local_irq_save(flags); \
146
+
tl = this_cpu_ptr(lock); \
147
+
if (READ_ONCE(tl->acquired)) { \
148
+
local_irq_restore(flags); \
149
+
tl = NULL; \
150
+
} else { \
151
+
WRITE_ONCE(tl->acquired, 1); \
152
+
local_trylock_acquire( \
153
+
(local_lock_t *)tl); \
154
+
} \
155
+
!!tl; \
156
+
})
157
+
158
+
#define __local_lock_release(lock) \
159
+
do { \
160
+
local_trylock_t *tl; \
161
+
local_lock_t *l; \
162
+
\
163
+
l = (local_lock_t *)this_cpu_ptr(lock); \
164
+
tl = (local_trylock_t *)l; \
165
+
local_lock_release(l); \
166
+
_Generic((lock), \
167
+
local_trylock_t *: ({ \
168
+
lockdep_assert(tl->acquired == 1); \
169
+
WRITE_ONCE(tl->acquired, 0); \
170
+
}), \
171
+
default:(void)0); \
113
172
} while (0)
114
173
115
174
#define __local_unlock(lock) \
116
175
do { \
117
-
local_lock_release(this_cpu_ptr(lock)); \
176
+
__local_lock_release(lock); \
118
177
preempt_enable(); \
119
178
} while (0)
120
179
121
180
#define __local_unlock_irq(lock) \
122
181
do { \
123
-
local_lock_release(this_cpu_ptr(lock)); \
182
+
__local_lock_release(lock); \
124
183
local_irq_enable(); \
125
184
} while (0)
126
185
127
186
#define __local_unlock_irqrestore(lock, flags) \
128
187
do { \
129
-
local_lock_release(this_cpu_ptr(lock)); \
188
+
__local_lock_release(lock); \
130
189
local_irq_restore(flags); \
131
190
} while (0)
132
191
···
205
132
#define __local_unlock_nested_bh(lock) \
206
133
local_lock_release(this_cpu_ptr(lock))
207
134
208
-
/* localtry_lock_t variants */
209
-
210
-
#define __localtry_lock_init(lock) \
211
-
do { \
212
-
__local_lock_init(&(lock)->llock); \
213
-
WRITE_ONCE((lock)->acquired, 0); \
214
-
} while (0)
215
-
216
-
#define __localtry_lock(lock) \
217
-
do { \
218
-
localtry_lock_t *lt; \
219
-
preempt_disable(); \
220
-
lt = this_cpu_ptr(lock); \
221
-
local_lock_acquire(<->llock); \
222
-
WRITE_ONCE(lt->acquired, 1); \
223
-
} while (0)
224
-
225
-
#define __localtry_lock_irq(lock) \
226
-
do { \
227
-
localtry_lock_t *lt; \
228
-
local_irq_disable(); \
229
-
lt = this_cpu_ptr(lock); \
230
-
local_lock_acquire(<->llock); \
231
-
WRITE_ONCE(lt->acquired, 1); \
232
-
} while (0)
233
-
234
-
#define __localtry_lock_irqsave(lock, flags) \
235
-
do { \
236
-
localtry_lock_t *lt; \
237
-
local_irq_save(flags); \
238
-
lt = this_cpu_ptr(lock); \
239
-
local_lock_acquire(<->llock); \
240
-
WRITE_ONCE(lt->acquired, 1); \
241
-
} while (0)
242
-
243
-
#define __localtry_trylock(lock) \
244
-
({ \
245
-
localtry_lock_t *lt; \
246
-
bool _ret; \
247
-
\
248
-
preempt_disable(); \
249
-
lt = this_cpu_ptr(lock); \
250
-
if (!READ_ONCE(lt->acquired)) { \
251
-
WRITE_ONCE(lt->acquired, 1); \
252
-
local_trylock_acquire(<->llock); \
253
-
_ret = true; \
254
-
} else { \
255
-
_ret = false; \
256
-
preempt_enable(); \
257
-
} \
258
-
_ret; \
259
-
})
260
-
261
-
#define __localtry_trylock_irqsave(lock, flags) \
262
-
({ \
263
-
localtry_lock_t *lt; \
264
-
bool _ret; \
265
-
\
266
-
local_irq_save(flags); \
267
-
lt = this_cpu_ptr(lock); \
268
-
if (!READ_ONCE(lt->acquired)) { \
269
-
WRITE_ONCE(lt->acquired, 1); \
270
-
local_trylock_acquire(<->llock); \
271
-
_ret = true; \
272
-
} else { \
273
-
_ret = false; \
274
-
local_irq_restore(flags); \
275
-
} \
276
-
_ret; \
277
-
})
278
-
279
-
#define __localtry_unlock(lock) \
280
-
do { \
281
-
localtry_lock_t *lt; \
282
-
lt = this_cpu_ptr(lock); \
283
-
WRITE_ONCE(lt->acquired, 0); \
284
-
local_lock_release(<->llock); \
285
-
preempt_enable(); \
286
-
} while (0)
287
-
288
-
#define __localtry_unlock_irq(lock) \
289
-
do { \
290
-
localtry_lock_t *lt; \
291
-
lt = this_cpu_ptr(lock); \
292
-
WRITE_ONCE(lt->acquired, 0); \
293
-
local_lock_release(<->llock); \
294
-
local_irq_enable(); \
295
-
} while (0)
296
-
297
-
#define __localtry_unlock_irqrestore(lock, flags) \
298
-
do { \
299
-
localtry_lock_t *lt; \
300
-
lt = this_cpu_ptr(lock); \
301
-
WRITE_ONCE(lt->acquired, 0); \
302
-
local_lock_release(<->llock); \
303
-
local_irq_restore(flags); \
304
-
} while (0)
305
-
306
135
#else /* !CONFIG_PREEMPT_RT */
307
136
308
137
/*
···
212
237
* critical section while staying preemptible.
213
238
*/
214
239
typedef spinlock_t local_lock_t;
215
-
typedef spinlock_t localtry_lock_t;
240
+
typedef spinlock_t local_trylock_t;
216
241
217
242
#define INIT_LOCAL_LOCK(lockname) __LOCAL_SPIN_LOCK_UNLOCKED((lockname))
218
-
#define INIT_LOCALTRY_LOCK(lockname) INIT_LOCAL_LOCK(lockname)
243
+
#define INIT_LOCAL_TRYLOCK(lockname) __LOCAL_SPIN_LOCK_UNLOCKED((lockname))
219
244
220
245
#define __local_lock_init(l) \
221
246
do { \
222
247
local_spin_lock_init((l)); \
223
248
} while (0)
249
+
250
+
#define __local_trylock_init(l) __local_lock_init(l)
224
251
225
252
#define __local_lock(__lock) \
226
253
do { \
···
260
283
spin_unlock(this_cpu_ptr((lock))); \
261
284
} while (0)
262
285
263
-
/* localtry_lock_t variants */
264
-
265
-
#define __localtry_lock_init(lock) __local_lock_init(lock)
266
-
#define __localtry_lock(lock) __local_lock(lock)
267
-
#define __localtry_lock_irq(lock) __local_lock(lock)
268
-
#define __localtry_lock_irqsave(lock, flags) __local_lock_irqsave(lock, flags)
269
-
#define __localtry_unlock(lock) __local_unlock(lock)
270
-
#define __localtry_unlock_irq(lock) __local_unlock(lock)
271
-
#define __localtry_unlock_irqrestore(lock, flags) __local_unlock_irqrestore(lock, flags)
272
-
273
-
#define __localtry_trylock(lock) \
286
+
#define __local_trylock(lock) \
274
287
({ \
275
288
int __locked; \
276
289
\
···
275
308
__locked; \
276
309
})
277
310
278
-
#define __localtry_trylock_irqsave(lock, flags) \
311
+
#define __local_trylock_irqsave(lock, flags) \
279
312
({ \
280
313
typecheck(unsigned long, flags); \
281
314
flags = 0; \
282
-
__localtry_trylock(lock); \
315
+
__local_trylock(lock); \
283
316
})
284
317
285
318
#endif /* CONFIG_PREEMPT_RT */
-1
include/linux/perf_event.h
-1
include/linux/perf_event.h
+6
-3
include/linux/pgtable.h
+6
-3
include/linux/pgtable.h
···
1511
1511
1512
1512
/*
1513
1513
* track_pfn_copy is called when a VM_PFNMAP VMA is about to get the page
1514
-
* tables copied during copy_page_range(). On success, stores the pfn to be
1515
-
* passed to untrack_pfn_copy().
1514
+
* tables copied during copy_page_range(). Will store the pfn to be
1515
+
* passed to untrack_pfn_copy() only if there is something to be untracked.
1516
+
* Callers should initialize the pfn to 0.
1516
1517
*/
1517
1518
static inline int track_pfn_copy(struct vm_area_struct *dst_vma,
1518
1519
struct vm_area_struct *src_vma, unsigned long *pfn)
···
1523
1522
1524
1523
/*
1525
1524
* untrack_pfn_copy is called when a VM_PFNMAP VMA failed to copy during
1526
-
* copy_page_range(), but after track_pfn_copy() was already called.
1525
+
* copy_page_range(), but after track_pfn_copy() was already called. Can
1526
+
* be called even if track_pfn_copy() did not actually track anything:
1527
+
* handled internally.
1527
1528
*/
1528
1529
static inline void untrack_pfn_copy(struct vm_area_struct *dst_vma,
1529
1530
unsigned long pfn)
+4
include/linux/platform_data/x86/intel_pmc_ipc.h
+4
include/linux/platform_data/x86/intel_pmc_ipc.h
···
36
36
*/
37
37
static inline int intel_pmc_ipc(struct pmc_ipc_cmd *ipc_cmd, struct pmc_ipc_rbuf *rbuf)
38
38
{
39
+
#ifdef CONFIG_ACPI
39
40
struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
40
41
union acpi_object params[PMC_IPCS_PARAM_COUNT] = {
41
42
{.type = ACPI_TYPE_INTEGER,},
···
90
89
}
91
90
92
91
return 0;
92
+
#else
93
+
return -ENODEV;
94
+
#endif /* CONFIG_ACPI */
93
95
}
94
96
95
97
#endif /* INTEL_PMC_IPC_H */
+2
include/net/fib_rules.h
+2
include/net/fib_rules.h
+1
include/net/flow.h
+1
include/net/flow.h
+27
include/net/l3mdev.h
+27
include/net/l3mdev.h
···
59
59
int l3mdev_fib_rule_match(struct net *net, struct flowi *fl,
60
60
struct fib_lookup_arg *arg);
61
61
62
+
static inline
63
+
bool l3mdev_fib_rule_iif_match(const struct flowi *fl, int iifindex)
64
+
{
65
+
return !(fl->flowi_flags & FLOWI_FLAG_L3MDEV_OIF) &&
66
+
fl->flowi_l3mdev == iifindex;
67
+
}
68
+
69
+
static inline
70
+
bool l3mdev_fib_rule_oif_match(const struct flowi *fl, int oifindex)
71
+
{
72
+
return fl->flowi_flags & FLOWI_FLAG_L3MDEV_OIF &&
73
+
fl->flowi_l3mdev == oifindex;
74
+
}
75
+
62
76
void l3mdev_update_flow(struct net *net, struct flowi *fl);
63
77
64
78
int l3mdev_master_ifindex_rcu(const struct net_device *dev);
···
341
327
{
342
328
return 1;
343
329
}
330
+
331
+
static inline
332
+
bool l3mdev_fib_rule_iif_match(const struct flowi *fl, int iifindex)
333
+
{
334
+
return false;
335
+
}
336
+
337
+
static inline
338
+
bool l3mdev_fib_rule_oif_match(const struct flowi *fl, int oifindex)
339
+
{
340
+
return false;
341
+
}
342
+
344
343
static inline
345
344
void l3mdev_update_flow(struct net *net, struct flowi *fl)
346
345
{
+7
include/rdma/ib_verbs.h
+7
include/rdma/ib_verbs.h
···
4790
4790
4791
4791
struct ib_ucontext *ib_uverbs_get_ucontext_file(struct ib_uverbs_file *ufile);
4792
4792
4793
+
#if IS_ENABLED(CONFIG_INFINIBAND_USER_ACCESS)
4793
4794
int uverbs_destroy_def_handler(struct uverbs_attr_bundle *attrs);
4795
+
#else
4796
+
static inline int uverbs_destroy_def_handler(struct uverbs_attr_bundle *attrs)
4797
+
{
4798
+
return 0;
4799
+
}
4800
+
#endif
4794
4801
4795
4802
struct net_device *rdma_alloc_netdev(struct ib_device *device, u32 port_num,
4796
4803
enum rdma_netdev_t type, const char *name,
+15
-6
include/uapi/cxl/features.h
+15
-6
include/uapi/cxl/features.h
···
8
8
#define _UAPI_CXL_FEATURES_H_
9
9
10
10
#include <linux/types.h>
11
-
#ifndef __KERNEL__
12
-
#include <uuid/uuid.h>
13
-
#else
11
+
12
+
typedef unsigned char __uapi_uuid_t[16];
13
+
14
+
#ifdef __KERNEL__
14
15
#include <linux/uuid.h>
16
+
/*
17
+
* Note, __uapi_uuid_t is 1-byte aligned on modern compilers and 4-byte
18
+
* aligned on others. Ensure that __uapi_uuid_t in a struct is placed at
19
+
* a 4-byte aligned offset, or the structure is packed, to ensure
20
+
* consistent padding.
21
+
*/
22
+
static_assert(sizeof(__uapi_uuid_t) == sizeof(uuid_t));
23
+
#define __uapi_uuid_t uuid_t
15
24
#endif
16
25
17
26
/*
···
69
60
* Get Supported Features Supported Feature Entry
70
61
*/
71
62
struct cxl_feat_entry {
72
-
uuid_t uuid;
63
+
__uapi_uuid_t uuid;
73
64
__le16 id;
74
65
__le16 get_feat_size;
75
66
__le16 set_feat_size;
···
119
110
* CXL spec r3.2 section 8.2.9.6.2 Table 8-99
120
111
*/
121
112
struct cxl_mbox_get_feat_in {
122
-
uuid_t uuid;
113
+
__uapi_uuid_t uuid;
123
114
__le16 offset;
124
115
__le16 count;
125
116
__u8 selection;
···
152
143
*/
153
144
struct cxl_mbox_set_feat_in {
154
145
__struct_group(cxl_mbox_set_feat_hdr, hdr, /* no attrs */,
155
-
uuid_t uuid;
146
+
__uapi_uuid_t uuid;
156
147
__le32 flags;
157
148
__le16 offset;
158
149
__u8 version;
+4
-1
include/ufs/ufs.h
+4
-1
include/ufs/ufs.h
···
180
180
QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D,
181
181
QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E,
182
182
QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F,
183
-
QUERY_ATTR_IDN_TIMESTAMP = 0x30
183
+
QUERY_ATTR_IDN_TIMESTAMP = 0x30,
184
+
QUERY_ATTR_IDN_DEV_LVL_EXCEPTION_ID = 0x34,
184
185
};
185
186
186
187
/* Descriptor idn for Query requests */
···
391
390
UFS_DEV_EXT_TEMP_NOTIF = BIT(6),
392
391
UFS_DEV_HPB_SUPPORT = BIT(7),
393
392
UFS_DEV_WRITE_BOOSTER_SUP = BIT(8),
393
+
UFS_DEV_LVL_EXCEPTION_SUP = BIT(12),
394
394
};
395
395
#define UFS_DEV_HPB_SUPPORT_VERSION 0x310
396
396
···
421
419
MASK_EE_TOO_LOW_TEMP = BIT(4),
422
420
MASK_EE_WRITEBOOSTER_EVENT = BIT(5),
423
421
MASK_EE_PERFORMANCE_THROTTLING = BIT(6),
422
+
MASK_EE_DEV_LVL_EXCEPTION = BIT(7),
424
423
MASK_EE_HEALTH_CRITICAL = BIT(9),
425
424
};
426
425
#define MASK_EE_URGENT_TEMP (MASK_EE_TOO_HIGH_TEMP | MASK_EE_TOO_LOW_TEMP)
+6
-1
include/ufs/ufshcd.h
+6
-1
include/ufs/ufshcd.h
···
246
246
struct ufs_dev_cmd {
247
247
enum dev_cmd_type type;
248
248
struct mutex lock;
249
-
struct completion *complete;
249
+
struct completion complete;
250
250
struct ufs_query query;
251
251
};
252
252
···
968
968
* @pm_qos_req: PM QoS request handle
969
969
* @pm_qos_enabled: flag to check if pm qos is enabled
970
970
* @critical_health_count: count of critical health exceptions
971
+
* @dev_lvl_exception_count: count of device level exceptions since last reset
972
+
* @dev_lvl_exception_id: vendor specific information about the
973
+
* device level exception event.
971
974
*/
972
975
struct ufs_hba {
973
976
void __iomem *mmio_base;
···
1141
1138
bool pm_qos_enabled;
1142
1139
1143
1140
int critical_health_count;
1141
+
atomic_t dev_lvl_exception_count;
1142
+
u64 dev_lvl_exception_id;
1144
1143
};
1145
1144
1146
1145
/**
+6
-6
include/vdso/unaligned.h
+6
-6
include/vdso/unaligned.h
···
2
2
#ifndef __VDSO_UNALIGNED_H
3
3
#define __VDSO_UNALIGNED_H
4
4
5
-
#define __get_unaligned_t(type, ptr) ({ \
6
-
const struct { type x; } __packed *__pptr = (typeof(__pptr))(ptr); \
7
-
__pptr->x; \
5
+
#define __get_unaligned_t(type, ptr) ({ \
6
+
const struct { type x; } __packed * __get_pptr = (typeof(__get_pptr))(ptr); \
7
+
__get_pptr->x; \
8
8
})
9
9
10
-
#define __put_unaligned_t(type, val, ptr) do { \
11
-
struct { type x; } __packed *__pptr = (typeof(__pptr))(ptr); \
12
-
__pptr->x = (val); \
10
+
#define __put_unaligned_t(type, val, ptr) do { \
11
+
struct { type x; } __packed * __put_pptr = (typeof(__put_pptr))(ptr); \
12
+
__put_pptr->x = (val); \
13
13
} while (0)
14
14
15
15
#endif /* __VDSO_UNALIGNED_H */
+12
-23
kernel/bpf/queue_stack_maps.c
+12
-23
kernel/bpf/queue_stack_maps.c
···
9
9
#include <linux/slab.h>
10
10
#include <linux/btf_ids.h>
11
11
#include "percpu_freelist.h"
12
+
#include <asm/rqspinlock.h>
12
13
13
14
#define QUEUE_STACK_CREATE_FLAG_MASK \
14
15
(BPF_F_NUMA_NODE | BPF_F_ACCESS_MASK)
15
16
16
17
struct bpf_queue_stack {
17
18
struct bpf_map map;
18
-
raw_spinlock_t lock;
19
+
rqspinlock_t lock;
19
20
u32 head, tail;
20
21
u32 size; /* max_entries + 1 */
21
22
···
79
78
80
79
qs->size = size;
81
80
82
-
raw_spin_lock_init(&qs->lock);
81
+
raw_res_spin_lock_init(&qs->lock);
83
82
84
83
return &qs->map;
85
84
}
···
99
98
int err = 0;
100
99
void *ptr;
101
100
102
-
if (in_nmi()) {
103
-
if (!raw_spin_trylock_irqsave(&qs->lock, flags))
104
-
return -EBUSY;
105
-
} else {
106
-
raw_spin_lock_irqsave(&qs->lock, flags);
107
-
}
101
+
if (raw_res_spin_lock_irqsave(&qs->lock, flags))
102
+
return -EBUSY;
108
103
109
104
if (queue_stack_map_is_empty(qs)) {
110
105
memset(value, 0, qs->map.value_size);
···
117
120
}
118
121
119
122
out:
120
-
raw_spin_unlock_irqrestore(&qs->lock, flags);
123
+
raw_res_spin_unlock_irqrestore(&qs->lock, flags);
121
124
return err;
122
125
}
123
126
···
130
133
void *ptr;
131
134
u32 index;
132
135
133
-
if (in_nmi()) {
134
-
if (!raw_spin_trylock_irqsave(&qs->lock, flags))
135
-
return -EBUSY;
136
-
} else {
137
-
raw_spin_lock_irqsave(&qs->lock, flags);
138
-
}
136
+
if (raw_res_spin_lock_irqsave(&qs->lock, flags))
137
+
return -EBUSY;
139
138
140
139
if (queue_stack_map_is_empty(qs)) {
141
140
memset(value, 0, qs->map.value_size);
···
150
157
qs->head = index;
151
158
152
159
out:
153
-
raw_spin_unlock_irqrestore(&qs->lock, flags);
160
+
raw_res_spin_unlock_irqrestore(&qs->lock, flags);
154
161
return err;
155
162
}
156
163
···
196
203
if (flags & BPF_NOEXIST || flags > BPF_EXIST)
197
204
return -EINVAL;
198
205
199
-
if (in_nmi()) {
200
-
if (!raw_spin_trylock_irqsave(&qs->lock, irq_flags))
201
-
return -EBUSY;
202
-
} else {
203
-
raw_spin_lock_irqsave(&qs->lock, irq_flags);
204
-
}
206
+
if (raw_res_spin_lock_irqsave(&qs->lock, irq_flags))
207
+
return -EBUSY;
205
208
206
209
if (queue_stack_map_is_full(qs)) {
207
210
if (!replace) {
···
216
227
qs->head = 0;
217
228
218
229
out:
219
-
raw_spin_unlock_irqrestore(&qs->lock, irq_flags);
230
+
raw_res_spin_unlock_irqrestore(&qs->lock, irq_flags);
220
231
return err;
221
232
}
222
233
+7
-10
kernel/bpf/ringbuf.c
+7
-10
kernel/bpf/ringbuf.c
···
11
11
#include <linux/kmemleak.h>
12
12
#include <uapi/linux/btf.h>
13
13
#include <linux/btf_ids.h>
14
+
#include <asm/rqspinlock.h>
14
15
15
16
#define RINGBUF_CREATE_FLAG_MASK (BPF_F_NUMA_NODE)
16
17
···
30
29
u64 mask;
31
30
struct page **pages;
32
31
int nr_pages;
33
-
raw_spinlock_t spinlock ____cacheline_aligned_in_smp;
32
+
rqspinlock_t spinlock ____cacheline_aligned_in_smp;
34
33
/* For user-space producer ring buffers, an atomic_t busy bit is used
35
34
* to synchronize access to the ring buffers in the kernel, rather than
36
35
* the spinlock that is used for kernel-producer ring buffers. This is
···
174
173
if (!rb)
175
174
return NULL;
176
175
177
-
raw_spin_lock_init(&rb->spinlock);
176
+
raw_res_spin_lock_init(&rb->spinlock);
178
177
atomic_set(&rb->busy, 0);
179
178
init_waitqueue_head(&rb->waitq);
180
179
init_irq_work(&rb->work, bpf_ringbuf_notify);
···
417
416
418
417
cons_pos = smp_load_acquire(&rb->consumer_pos);
419
418
420
-
if (in_nmi()) {
421
-
if (!raw_spin_trylock_irqsave(&rb->spinlock, flags))
422
-
return NULL;
423
-
} else {
424
-
raw_spin_lock_irqsave(&rb->spinlock, flags);
425
-
}
419
+
if (raw_res_spin_lock_irqsave(&rb->spinlock, flags))
420
+
return NULL;
426
421
427
422
pend_pos = rb->pending_pos;
428
423
prod_pos = rb->producer_pos;
···
443
446
*/
444
447
if (new_prod_pos - cons_pos > rb->mask ||
445
448
new_prod_pos - pend_pos > rb->mask) {
446
-
raw_spin_unlock_irqrestore(&rb->spinlock, flags);
449
+
raw_res_spin_unlock_irqrestore(&rb->spinlock, flags);
447
450
return NULL;
448
451
}
449
452
···
455
458
/* pairs with consumer's smp_load_acquire() */
456
459
smp_store_release(&rb->producer_pos, new_prod_pos);
457
460
458
-
raw_spin_unlock_irqrestore(&rb->spinlock, flags);
461
+
raw_res_spin_unlock_irqrestore(&rb->spinlock, flags);
459
462
460
463
return (void *)hdr + BPF_RINGBUF_HDR_SZ;
461
464
}
+1
-1
kernel/bpf/rqspinlock.c
+1
-1
kernel/bpf/rqspinlock.c
+21
-49
kernel/events/core.c
+21
-49
kernel/events/core.c
···
5518
5518
5519
5519
static void perf_free_addr_filters(struct perf_event *event);
5520
5520
5521
-
static void perf_pending_task_sync(struct perf_event *event)
5522
-
{
5523
-
struct callback_head *head = &event->pending_task;
5524
-
5525
-
if (!event->pending_work)
5526
-
return;
5527
-
/*
5528
-
* If the task is queued to the current task's queue, we
5529
-
* obviously can't wait for it to complete. Simply cancel it.
5530
-
*/
5531
-
if (task_work_cancel(current, head)) {
5532
-
event->pending_work = 0;
5533
-
local_dec(&event->ctx->nr_no_switch_fast);
5534
-
return;
5535
-
}
5536
-
5537
-
/*
5538
-
* All accesses related to the event are within the same RCU section in
5539
-
* perf_pending_task(). The RCU grace period before the event is freed
5540
-
* will make sure all those accesses are complete by then.
5541
-
*/
5542
-
rcuwait_wait_event(&event->pending_work_wait, !event->pending_work, TASK_UNINTERRUPTIBLE);
5543
-
}
5544
-
5545
5521
/* vs perf_event_alloc() error */
5546
5522
static void __free_event(struct perf_event *event)
5547
5523
{
···
5575
5599
{
5576
5600
irq_work_sync(&event->pending_irq);
5577
5601
irq_work_sync(&event->pending_disable_irq);
5578
-
perf_pending_task_sync(event);
5579
5602
5580
5603
unaccount_event(event);
5581
5604
···
5667
5692
5668
5693
static void put_event(struct perf_event *event)
5669
5694
{
5695
+
struct perf_event *parent;
5696
+
5670
5697
if (!atomic_long_dec_and_test(&event->refcount))
5671
5698
return;
5672
5699
5700
+
parent = event->parent;
5673
5701
_free_event(event);
5702
+
5703
+
/* Matches the refcount bump in inherit_event() */
5704
+
if (parent)
5705
+
put_event(parent);
5674
5706
}
5675
5707
5676
5708
/*
···
5761
5779
if (tmp == child) {
5762
5780
perf_remove_from_context(child, DETACH_GROUP);
5763
5781
list_move(&child->child_list, &free_list);
5764
-
/*
5765
-
* This matches the refcount bump in inherit_event();
5766
-
* this can't be the last reference.
5767
-
*/
5768
-
put_event(event);
5769
5782
} else {
5770
5783
var = &ctx->refcount;
5771
5784
}
···
5786
5809
void *var = &child->ctx->refcount;
5787
5810
5788
5811
list_del(&child->child_list);
5789
-
free_event(child);
5812
+
/* Last reference unless ->pending_task work is pending */
5813
+
put_event(child);
5790
5814
5791
5815
/*
5792
5816
* Wake any perf_event_free_task() waiting for this event to be
···
5798
5820
}
5799
5821
5800
5822
no_ctx:
5801
-
put_event(event); /* Must be the 'last' reference */
5823
+
/*
5824
+
* Last reference unless ->pending_task work is pending on this event
5825
+
* or any of its children.
5826
+
*/
5827
+
put_event(event);
5802
5828
return 0;
5803
5829
}
5804
5830
EXPORT_SYMBOL_GPL(perf_event_release_kernel);
···
7218
7236
int rctx;
7219
7237
7220
7238
/*
7221
-
* All accesses to the event must belong to the same implicit RCU read-side
7222
-
* critical section as the ->pending_work reset. See comment in
7223
-
* perf_pending_task_sync().
7224
-
*/
7225
-
rcu_read_lock();
7226
-
/*
7227
7239
* If we 'fail' here, that's OK, it means recursion is already disabled
7228
7240
* and we won't recurse 'further'.
7229
7241
*/
···
7227
7251
event->pending_work = 0;
7228
7252
perf_sigtrap(event);
7229
7253
local_dec(&event->ctx->nr_no_switch_fast);
7230
-
rcuwait_wake_up(&event->pending_work_wait);
7231
7254
}
7232
-
rcu_read_unlock();
7255
+
put_event(event);
7233
7256
7234
7257
if (rctx >= 0)
7235
7258
perf_swevent_put_recursion_context(rctx);
···
10223
10248
!task_work_add(current, &event->pending_task, notify_mode)) {
10224
10249
event->pending_work = pending_id;
10225
10250
local_inc(&event->ctx->nr_no_switch_fast);
10251
+
WARN_ON_ONCE(!atomic_long_inc_not_zero(&event->refcount));
10226
10252
10227
10253
event->pending_addr = 0;
10228
10254
if (valid_sample && (data->sample_flags & PERF_SAMPLE_ADDR))
···
12586
12610
init_irq_work(&event->pending_irq, perf_pending_irq);
12587
12611
event->pending_disable_irq = IRQ_WORK_INIT_HARD(perf_pending_disable);
12588
12612
init_task_work(&event->pending_task, perf_pending_task);
12589
-
rcuwait_init(&event->pending_work_wait);
12590
12613
12591
12614
mutex_init(&event->mmap_mutex);
12592
12615
raw_spin_lock_init(&event->addr_filters.lock);
···
13722
13747
* Kick perf_poll() for is_event_hup();
13723
13748
*/
13724
13749
perf_event_wakeup(parent_event);
13725
-
free_event(event);
13726
-
put_event(parent_event);
13750
+
put_event(event);
13727
13751
return;
13728
13752
}
13729
13753
···
13846
13872
list_del_init(&event->child_list);
13847
13873
mutex_unlock(&parent->child_mutex);
13848
13874
13849
-
put_event(parent);
13850
-
13851
13875
raw_spin_lock_irq(&ctx->lock);
13852
13876
perf_group_detach(event);
13853
13877
list_del_event(event, ctx);
13854
13878
raw_spin_unlock_irq(&ctx->lock);
13855
-
free_event(event);
13879
+
put_event(event);
13856
13880
}
13857
13881
13858
13882
/*
···
13988
14016
if (IS_ERR(child_event))
13989
14017
return child_event;
13990
14018
14019
+
get_ctx(child_ctx);
14020
+
child_event->ctx = child_ctx;
14021
+
13991
14022
pmu_ctx = find_get_pmu_context(child_event->pmu, child_ctx, child_event);
13992
14023
if (IS_ERR(pmu_ctx)) {
13993
14024
free_event(child_event);
···
14012
14037
return NULL;
14013
14038
}
14014
14039
14015
-
get_ctx(child_ctx);
14016
-
14017
14040
/*
14018
14041
* Make the child state follow the state of the parent event,
14019
14042
* not its attr.disabled bit. We hold the parent's mutex,
···
14032
14059
local64_set(&hwc->period_left, sample_period);
14033
14060
}
14034
14061
14035
-
child_event->ctx = child_ctx;
14036
14062
child_event->overflow_handler = parent_event->overflow_handler;
14037
14063
child_event->overflow_handler_context
14038
14064
= parent_event->overflow_handler_context;
+13
-2
kernel/events/uprobes.c
+13
-2
kernel/events/uprobes.c
···
1956
1956
* to-be-reused return instances for future uretprobes. If ri_timer()
1957
1957
* happens to be running right now, though, we fallback to safety and
1958
1958
* just perform RCU-delated freeing of ri.
1959
+
* Admittedly, this is a rather simple use of seqcount, but it nicely
1960
+
* abstracts away all the necessary memory barriers, so we use
1961
+
* a well-supported kernel primitive here.
1959
1962
*/
1960
1963
if (raw_seqcount_try_begin(&utask->ri_seqcount, seq)) {
1961
1964
/* immediate reuse of ri without RCU GP is OK */
···
2019
2016
/* RCU protects return_instance from freeing. */
2020
2017
guard(rcu)();
2021
2018
2022
-
write_seqcount_begin(&utask->ri_seqcount);
2019
+
/*
2020
+
* See free_ret_instance() for notes on seqcount use.
2021
+
* We also employ raw API variants to avoid lockdep false-positive
2022
+
* warning complaining about enabled preemption. The timer can only be
2023
+
* invoked once for a uprobe_task. Therefore there can only be one
2024
+
* writer. The reader does not require an even sequence count to make
2025
+
* progress, so it is OK to remain preemptible on PREEMPT_RT.
2026
+
*/
2027
+
raw_write_seqcount_begin(&utask->ri_seqcount);
2023
2028
2024
2029
for_each_ret_instance_rcu(ri, utask->return_instances)
2025
2030
hprobe_expire(&ri->hprobe, false);
2026
2031
2027
-
write_seqcount_end(&utask->ri_seqcount);
2032
+
raw_write_seqcount_end(&utask->ri_seqcount);
2028
2033
}
2029
2034
2030
2035
static struct uprobe_task *alloc_utask(void)
+1
-1
kernel/time/hrtimer.c
+1
-1
kernel/time/hrtimer.c
+22
kernel/time/tick-common.c
+22
kernel/time/tick-common.c
···
509
509
510
510
#ifdef CONFIG_SUSPEND
511
511
static DEFINE_RAW_SPINLOCK(tick_freeze_lock);
512
+
static DEFINE_WAIT_OVERRIDE_MAP(tick_freeze_map, LD_WAIT_SLEEP);
512
513
static unsigned int tick_freeze_depth;
513
514
514
515
/**
···
529
528
if (tick_freeze_depth == num_online_cpus()) {
530
529
trace_suspend_resume(TPS("timekeeping_freeze"),
531
530
smp_processor_id(), true);
531
+
/*
532
+
* All other CPUs have their interrupts disabled and are
533
+
* suspended to idle. Other tasks have been frozen so there
534
+
* is no scheduling happening. This means that there is no
535
+
* concurrency in the system at this point. Therefore it is
536
+
* okay to acquire a sleeping lock on PREEMPT_RT, such as a
537
+
* spinlock, because the lock cannot be held by other CPUs
538
+
* or threads and acquiring it cannot block.
539
+
*
540
+
* Inform lockdep about the situation.
541
+
*/
542
+
lock_map_acquire_try(&tick_freeze_map);
532
543
system_state = SYSTEM_SUSPEND;
533
544
sched_clock_suspend();
534
545
timekeeping_suspend();
546
+
lock_map_release(&tick_freeze_map);
535
547
} else {
536
548
tick_suspend_local();
537
549
}
···
566
552
raw_spin_lock(&tick_freeze_lock);
567
553
568
554
if (tick_freeze_depth == num_online_cpus()) {
555
+
/*
556
+
* Similar to tick_freeze(). On resumption the first CPU may
557
+
* acquire uncontended sleeping locks while other CPUs block on
558
+
* tick_freeze_lock.
559
+
*/
560
+
lock_map_acquire_try(&tick_freeze_map);
569
561
timekeeping_resume();
570
562
sched_clock_resume();
563
+
lock_map_release(&tick_freeze_map);
564
+
571
565
system_state = SYSTEM_RUNNING;
572
566
trace_suspend_resume(TPS("timekeeping_freeze"),
573
567
smp_processor_id(), false);
+177
-137
kernel/trace/ftrace.c
+177
-137
kernel/trace/ftrace.c
···
3256
3256
}
3257
3257
3258
3258
/*
3259
+
* Remove functions from @hash that are in @notrace_hash
3260
+
*/
3261
+
static void remove_hash(struct ftrace_hash *hash, struct ftrace_hash *notrace_hash)
3262
+
{
3263
+
struct ftrace_func_entry *entry;
3264
+
struct hlist_node *tmp;
3265
+
int size;
3266
+
int i;
3267
+
3268
+
/* If the notrace hash is empty, there's nothing to do */
3269
+
if (ftrace_hash_empty(notrace_hash))
3270
+
return;
3271
+
3272
+
size = 1 << hash->size_bits;
3273
+
for (i = 0; i < size; i++) {
3274
+
hlist_for_each_entry_safe(entry, tmp, &hash->buckets[i], hlist) {
3275
+
if (!__ftrace_lookup_ip(notrace_hash, entry->ip))
3276
+
continue;
3277
+
remove_hash_entry(hash, entry);
3278
+
kfree(entry);
3279
+
}
3280
+
}
3281
+
}
3282
+
3283
+
/*
3259
3284
* Add to @hash only those that are in both @new_hash1 and @new_hash2
3260
3285
*
3261
3286
* The notrace_hash updates uses just the intersect_hash() function
···
3318
3293
*hash = EMPTY_HASH;
3319
3294
}
3320
3295
return 0;
3321
-
}
3322
-
3323
-
/* Return a new hash that has a union of all @ops->filter_hash entries */
3324
-
static struct ftrace_hash *append_hashes(struct ftrace_ops *ops)
3325
-
{
3326
-
struct ftrace_hash *new_hash = NULL;
3327
-
struct ftrace_ops *subops;
3328
-
int size_bits;
3329
-
int ret;
3330
-
3331
-
if (ops->func_hash->filter_hash)
3332
-
size_bits = ops->func_hash->filter_hash->size_bits;
3333
-
else
3334
-
size_bits = FTRACE_HASH_DEFAULT_BITS;
3335
-
3336
-
list_for_each_entry(subops, &ops->subop_list, list) {
3337
-
ret = append_hash(&new_hash, subops->func_hash->filter_hash, size_bits);
3338
-
if (ret < 0) {
3339
-
free_ftrace_hash(new_hash);
3340
-
return NULL;
3341
-
}
3342
-
/* Nothing more to do if new_hash is empty */
3343
-
if (ftrace_hash_empty(new_hash))
3344
-
break;
3345
-
}
3346
-
/* Can't return NULL as that means this failed */
3347
-
return new_hash ? : EMPTY_HASH;
3348
-
}
3349
-
3350
-
/* Make @ops trace evenything except what all its subops do not trace */
3351
-
static struct ftrace_hash *intersect_hashes(struct ftrace_ops *ops)
3352
-
{
3353
-
struct ftrace_hash *new_hash = NULL;
3354
-
struct ftrace_ops *subops;
3355
-
int size_bits;
3356
-
int ret;
3357
-
3358
-
list_for_each_entry(subops, &ops->subop_list, list) {
3359
-
struct ftrace_hash *next_hash;
3360
-
3361
-
if (!new_hash) {
3362
-
size_bits = subops->func_hash->notrace_hash->size_bits;
3363
-
new_hash = alloc_and_copy_ftrace_hash(size_bits, ops->func_hash->notrace_hash);
3364
-
if (!new_hash)
3365
-
return NULL;
3366
-
continue;
3367
-
}
3368
-
size_bits = new_hash->size_bits;
3369
-
next_hash = new_hash;
3370
-
new_hash = alloc_ftrace_hash(size_bits);
3371
-
ret = intersect_hash(&new_hash, next_hash, subops->func_hash->notrace_hash);
3372
-
free_ftrace_hash(next_hash);
3373
-
if (ret < 0) {
3374
-
free_ftrace_hash(new_hash);
3375
-
return NULL;
3376
-
}
3377
-
/* Nothing more to do if new_hash is empty */
3378
-
if (ftrace_hash_empty(new_hash))
3379
-
break;
3380
-
}
3381
-
return new_hash;
3382
3296
}
3383
3297
3384
3298
static bool ops_equal(struct ftrace_hash *A, struct ftrace_hash *B)
···
3391
3427
return 0;
3392
3428
}
3393
3429
3430
+
static int add_first_hash(struct ftrace_hash **filter_hash, struct ftrace_hash **notrace_hash,
3431
+
struct ftrace_ops_hash *func_hash)
3432
+
{
3433
+
/* If the filter hash is not empty, simply remove the nohash from it */
3434
+
if (!ftrace_hash_empty(func_hash->filter_hash)) {
3435
+
*filter_hash = copy_hash(func_hash->filter_hash);
3436
+
if (!*filter_hash)
3437
+
return -ENOMEM;
3438
+
remove_hash(*filter_hash, func_hash->notrace_hash);
3439
+
*notrace_hash = EMPTY_HASH;
3440
+
3441
+
} else {
3442
+
*notrace_hash = copy_hash(func_hash->notrace_hash);
3443
+
if (!*notrace_hash)
3444
+
return -ENOMEM;
3445
+
*filter_hash = EMPTY_HASH;
3446
+
}
3447
+
return 0;
3448
+
}
3449
+
3450
+
static int add_next_hash(struct ftrace_hash **filter_hash, struct ftrace_hash **notrace_hash,
3451
+
struct ftrace_ops_hash *ops_hash, struct ftrace_ops_hash *subops_hash)
3452
+
{
3453
+
int size_bits;
3454
+
int ret;
3455
+
3456
+
/* If the subops trace all functions so must the main ops */
3457
+
if (ftrace_hash_empty(ops_hash->filter_hash) ||
3458
+
ftrace_hash_empty(subops_hash->filter_hash)) {
3459
+
*filter_hash = EMPTY_HASH;
3460
+
} else {
3461
+
/*
3462
+
* The main ops filter hash is not empty, so its
3463
+
* notrace_hash had better be, as the notrace hash
3464
+
* is only used for empty main filter hashes.
3465
+
*/
3466
+
WARN_ON_ONCE(!ftrace_hash_empty(ops_hash->notrace_hash));
3467
+
3468
+
size_bits = max(ops_hash->filter_hash->size_bits,
3469
+
subops_hash->filter_hash->size_bits);
3470
+
3471
+
/* Copy the subops hash */
3472
+
*filter_hash = alloc_and_copy_ftrace_hash(size_bits, subops_hash->filter_hash);
3473
+
if (!filter_hash)
3474
+
return -ENOMEM;
3475
+
/* Remove any notrace functions from the copy */
3476
+
remove_hash(*filter_hash, subops_hash->notrace_hash);
3477
+
3478
+
ret = append_hash(filter_hash, ops_hash->filter_hash,
3479
+
size_bits);
3480
+
if (ret < 0) {
3481
+
free_ftrace_hash(*filter_hash);
3482
+
return ret;
3483
+
}
3484
+
}
3485
+
3486
+
/*
3487
+
* Only process notrace hashes if the main filter hash is empty
3488
+
* (tracing all functions), otherwise the filter hash will just
3489
+
* remove the notrace hash functions, and the notrace hash is
3490
+
* not needed.
3491
+
*/
3492
+
if (ftrace_hash_empty(*filter_hash)) {
3493
+
/*
3494
+
* Intersect the notrace functions. That is, if two
3495
+
* subops are not tracing a set of functions, the
3496
+
* main ops will only not trace the functions that are
3497
+
* in both subops, but has to trace the functions that
3498
+
* are only notrace in one of the subops, for the other
3499
+
* subops to be able to trace them.
3500
+
*/
3501
+
size_bits = max(ops_hash->notrace_hash->size_bits,
3502
+
subops_hash->notrace_hash->size_bits);
3503
+
*notrace_hash = alloc_ftrace_hash(size_bits);
3504
+
if (!*notrace_hash)
3505
+
return -ENOMEM;
3506
+
3507
+
ret = intersect_hash(notrace_hash, ops_hash->notrace_hash,
3508
+
subops_hash->notrace_hash);
3509
+
if (ret < 0) {
3510
+
free_ftrace_hash(*notrace_hash);
3511
+
return ret;
3512
+
}
3513
+
}
3514
+
return 0;
3515
+
}
3516
+
3394
3517
/**
3395
3518
* ftrace_startup_subops - enable tracing for subops of an ops
3396
3519
* @ops: Manager ops (used to pick all the functions of its subops)
···
3494
3443
struct ftrace_hash *notrace_hash;
3495
3444
struct ftrace_hash *save_filter_hash;
3496
3445
struct ftrace_hash *save_notrace_hash;
3497
-
int size_bits;
3498
3446
int ret;
3499
3447
3500
3448
if (unlikely(ftrace_disabled))
···
3517
3467
3518
3468
/* For the first subops to ops just enable it normally */
3519
3469
if (list_empty(&ops->subop_list)) {
3520
-
/* Just use the subops hashes */
3521
-
filter_hash = copy_hash(subops->func_hash->filter_hash);
3522
-
notrace_hash = copy_hash(subops->func_hash->notrace_hash);
3523
-
if (!filter_hash || !notrace_hash) {
3524
-
free_ftrace_hash(filter_hash);
3525
-
free_ftrace_hash(notrace_hash);
3526
-
return -ENOMEM;
3527
-
}
3470
+
3471
+
/* The ops was empty, should have empty hashes */
3472
+
WARN_ON_ONCE(!ftrace_hash_empty(ops->func_hash->filter_hash));
3473
+
WARN_ON_ONCE(!ftrace_hash_empty(ops->func_hash->notrace_hash));
3474
+
3475
+
ret = add_first_hash(&filter_hash, ¬race_hash, subops->func_hash);
3476
+
if (ret < 0)
3477
+
return ret;
3528
3478
3529
3479
save_filter_hash = ops->func_hash->filter_hash;
3530
3480
save_notrace_hash = ops->func_hash->notrace_hash;
···
3550
3500
3551
3501
/*
3552
3502
* Here there's already something attached. Here are the rules:
3553
-
* o If either filter_hash is empty then the final stays empty
3554
-
* o Otherwise, the final is a superset of both hashes
3555
-
* o If either notrace_hash is empty then the final stays empty
3556
-
* o Otherwise, the final is an intersection between the hashes
3503
+
* If the new subops and main ops filter hashes are not empty:
3504
+
* o Make a copy of the subops filter hash
3505
+
* o Remove all functions in the nohash from it.
3506
+
* o Add in the main hash filter functions
3507
+
* o Remove any of these functions from the main notrace hash
3557
3508
*/
3558
-
if (ftrace_hash_empty(ops->func_hash->filter_hash) ||
3559
-
ftrace_hash_empty(subops->func_hash->filter_hash)) {
3560
-
filter_hash = EMPTY_HASH;
3561
-
} else {
3562
-
size_bits = max(ops->func_hash->filter_hash->size_bits,
3563
-
subops->func_hash->filter_hash->size_bits);
3564
-
filter_hash = alloc_and_copy_ftrace_hash(size_bits, ops->func_hash->filter_hash);
3565
-
if (!filter_hash)
3566
-
return -ENOMEM;
3567
-
ret = append_hash(&filter_hash, subops->func_hash->filter_hash,
3568
-
size_bits);
3569
-
if (ret < 0) {
3570
-
free_ftrace_hash(filter_hash);
3571
-
return ret;
3572
-
}
3573
-
}
3574
3509
3575
-
if (ftrace_hash_empty(ops->func_hash->notrace_hash) ||
3576
-
ftrace_hash_empty(subops->func_hash->notrace_hash)) {
3577
-
notrace_hash = EMPTY_HASH;
3578
-
} else {
3579
-
size_bits = max(ops->func_hash->filter_hash->size_bits,
3580
-
subops->func_hash->filter_hash->size_bits);
3581
-
notrace_hash = alloc_ftrace_hash(size_bits);
3582
-
if (!notrace_hash) {
3583
-
free_ftrace_hash(filter_hash);
3584
-
return -ENOMEM;
3585
-
}
3586
-
3587
-
ret = intersect_hash(¬race_hash, ops->func_hash->filter_hash,
3588
-
subops->func_hash->filter_hash);
3589
-
if (ret < 0) {
3590
-
free_ftrace_hash(filter_hash);
3591
-
free_ftrace_hash(notrace_hash);
3592
-
return ret;
3593
-
}
3594
-
}
3510
+
ret = add_next_hash(&filter_hash, ¬race_hash, ops->func_hash, subops->func_hash);
3511
+
if (ret < 0)
3512
+
return ret;
3595
3513
3596
3514
list_add(&subops->list, &ops->subop_list);
3597
3515
···
3573
3555
subops->managed = ops;
3574
3556
}
3575
3557
return ret;
3558
+
}
3559
+
3560
+
static int rebuild_hashes(struct ftrace_hash **filter_hash, struct ftrace_hash **notrace_hash,
3561
+
struct ftrace_ops *ops)
3562
+
{
3563
+
struct ftrace_ops_hash temp_hash;
3564
+
struct ftrace_ops *subops;
3565
+
bool first = true;
3566
+
int ret;
3567
+
3568
+
temp_hash.filter_hash = EMPTY_HASH;
3569
+
temp_hash.notrace_hash = EMPTY_HASH;
3570
+
3571
+
list_for_each_entry(subops, &ops->subop_list, list) {
3572
+
*filter_hash = EMPTY_HASH;
3573
+
*notrace_hash = EMPTY_HASH;
3574
+
3575
+
if (first) {
3576
+
ret = add_first_hash(filter_hash, notrace_hash, subops->func_hash);
3577
+
if (ret < 0)
3578
+
return ret;
3579
+
first = false;
3580
+
} else {
3581
+
ret = add_next_hash(filter_hash, notrace_hash,
3582
+
&temp_hash, subops->func_hash);
3583
+
if (ret < 0) {
3584
+
free_ftrace_hash(temp_hash.filter_hash);
3585
+
free_ftrace_hash(temp_hash.notrace_hash);
3586
+
return ret;
3587
+
}
3588
+
}
3589
+
3590
+
temp_hash.filter_hash = *filter_hash;
3591
+
temp_hash.notrace_hash = *notrace_hash;
3592
+
}
3593
+
return 0;
3576
3594
}
3577
3595
3578
3596
/**
···
3659
3605
}
3660
3606
3661
3607
/* Rebuild the hashes without subops */
3662
-
filter_hash = append_hashes(ops);
3663
-
notrace_hash = intersect_hashes(ops);
3664
-
if (!filter_hash || !notrace_hash) {
3665
-
free_ftrace_hash(filter_hash);
3666
-
free_ftrace_hash(notrace_hash);
3667
-
list_add(&subops->list, &ops->subop_list);
3668
-
return -ENOMEM;
3669
-
}
3608
+
ret = rebuild_hashes(&filter_hash, ¬race_hash, ops);
3609
+
if (ret < 0)
3610
+
return ret;
3670
3611
3671
3612
ret = ftrace_update_ops(ops, filter_hash, notrace_hash);
3672
3613
if (ret < 0) {
···
3677
3628
3678
3629
static int ftrace_hash_move_and_update_subops(struct ftrace_ops *subops,
3679
3630
struct ftrace_hash **orig_subhash,
3680
-
struct ftrace_hash *hash,
3681
-
int enable)
3631
+
struct ftrace_hash *hash)
3682
3632
{
3683
3633
struct ftrace_ops *ops = subops->managed;
3684
-
struct ftrace_hash **orig_hash;
3634
+
struct ftrace_hash *notrace_hash;
3635
+
struct ftrace_hash *filter_hash;
3685
3636
struct ftrace_hash *save_hash;
3686
3637
struct ftrace_hash *new_hash;
3687
3638
int ret;
···
3698
3649
return -ENOMEM;
3699
3650
}
3700
3651
3701
-
/* Create a new_hash to hold the ops new functions */
3702
-
if (enable) {
3703
-
orig_hash = &ops->func_hash->filter_hash;
3704
-
new_hash = append_hashes(ops);
3705
-
} else {
3706
-
orig_hash = &ops->func_hash->notrace_hash;
3707
-
new_hash = intersect_hashes(ops);
3708
-
}
3709
-
3710
-
/* Move the hash over to the new hash */
3711
-
ret = __ftrace_hash_move_and_update_ops(ops, orig_hash, new_hash, enable);
3712
-
3713
-
free_ftrace_hash(new_hash);
3652
+
ret = rebuild_hashes(&filter_hash, ¬race_hash, ops);
3653
+
if (!ret)
3654
+
ret = ftrace_update_ops(ops, filter_hash, notrace_hash);
3714
3655
3715
3656
if (ret) {
3716
3657
/* Put back the original hash */
3717
-
free_ftrace_hash_rcu(*orig_subhash);
3658
+
new_hash = *orig_subhash;
3718
3659
*orig_subhash = save_hash;
3660
+
free_ftrace_hash_rcu(new_hash);
3719
3661
} else {
3720
3662
free_ftrace_hash_rcu(save_hash);
3721
3663
}
···
4930
4890
int enable)
4931
4891
{
4932
4892
if (ops->flags & FTRACE_OPS_FL_SUBOP)
4933
-
return ftrace_hash_move_and_update_subops(ops, orig_hash, hash, enable);
4893
+
return ftrace_hash_move_and_update_subops(ops, orig_hash, hash);
4934
4894
4935
4895
/*
4936
4896
* If this ops is not enabled, it could be sharing its filters
···
4949
4909
list_for_each_entry(subops, &op->subop_list, list) {
4950
4910
if ((subops->flags & FTRACE_OPS_FL_ENABLED) &&
4951
4911
subops->func_hash == ops->func_hash) {
4952
-
return ftrace_hash_move_and_update_subops(subops, orig_hash, hash, enable);
4912
+
return ftrace_hash_move_and_update_subops(subops, orig_hash, hash);
4953
4913
}
4954
4914
}
4955
4915
} while_for_each_ftrace_op(op);
+6
-1
kernel/trace/rv/rv.c
+6
-1
kernel/trace/rv/rv.c
···
225
225
*/
226
226
bool rv_is_container_monitor(struct rv_monitor_def *mdef)
227
227
{
228
-
struct rv_monitor_def *next = list_next_entry(mdef, list);
228
+
struct rv_monitor_def *next;
229
+
230
+
if (list_is_last(&mdef->list, &rv_monitors_list))
231
+
return false;
232
+
233
+
next = list_next_entry(mdef, list);
229
234
230
235
return next->parent == mdef->monitor || !mdef->monitor->enable;
231
236
}
+7
kernel/trace/trace.c
+7
kernel/trace/trace.c
···
9806
9806
return ret;
9807
9807
}
9808
9808
9809
+
#ifdef CONFIG_MMU
9809
9810
static u64 map_pages(unsigned long start, unsigned long size)
9810
9811
{
9811
9812
unsigned long vmap_start, vmap_end;
···
9829
9828
9830
9829
return (u64)vmap_start;
9831
9830
}
9831
+
#else
9832
+
static inline u64 map_pages(unsigned long start, unsigned long size)
9833
+
{
9834
+
return 0;
9835
+
}
9836
+
#endif
9832
9837
9833
9838
/**
9834
9839
* trace_array_get_by_name - Create/Lookup a trace array, given its name.
-1
kernel/trace/trace_events_synth.c
-1
kernel/trace/trace_events_synth.c
+5
-6
kernel/trace/trace_functions_graph.c
+5
-6
kernel/trace/trace_functions_graph.c
···
880
880
881
881
if (print_retval || print_retaddr)
882
882
trace_seq_puts(s, " /*");
883
-
else
884
-
trace_seq_putc(s, '\n');
885
883
} else {
886
884
print_retaddr = false;
887
885
trace_seq_printf(s, "} /* %ps", func);
···
897
899
}
898
900
899
901
if (!entry || print_retval || print_retaddr)
900
-
trace_seq_puts(s, " */\n");
902
+
trace_seq_puts(s, " */");
901
903
}
902
904
903
905
#else
···
973
975
} else
974
976
trace_seq_puts(s, "();");
975
977
}
976
-
trace_seq_printf(s, "\n");
978
+
trace_seq_putc(s, '\n');
977
979
978
980
print_graph_irq(iter, graph_ret->func, TRACE_GRAPH_RET,
979
981
cpu, iter->ent->pid, flags);
···
1311
1313
* that if the funcgraph-tail option is enabled.
1312
1314
*/
1313
1315
if (func_match && !(flags & TRACE_GRAPH_PRINT_TAIL))
1314
-
trace_seq_puts(s, "}\n");
1316
+
trace_seq_puts(s, "}");
1315
1317
else
1316
-
trace_seq_printf(s, "} /* %ps */\n", (void *)func);
1318
+
trace_seq_printf(s, "} /* %ps */", (void *)func);
1317
1319
}
1320
+
trace_seq_putc(s, '\n');
1318
1321
1319
1322
/* Overrun */
1320
1323
if (flags & TRACE_GRAPH_PRINT_OVERRUN)
+12
-3
lib/alloc_tag.c
+12
-3
lib/alloc_tag.c
···
422
422
unsigned long old_shadow_end = ALIGN(phys_end, MODULE_ALIGN);
423
423
unsigned long new_shadow_end = ALIGN(new_end, MODULE_ALIGN);
424
424
unsigned long more_pages;
425
-
unsigned long nr;
425
+
unsigned long nr = 0;
426
426
427
427
more_pages = ALIGN(new_end - phys_end, PAGE_SIZE) >> PAGE_SHIFT;
428
-
nr = alloc_pages_bulk_node(GFP_KERNEL | __GFP_NOWARN,
429
-
NUMA_NO_NODE, more_pages, next_page);
428
+
while (nr < more_pages) {
429
+
unsigned long allocated;
430
+
431
+
allocated = alloc_pages_bulk_node(GFP_KERNEL | __GFP_NOWARN,
432
+
NUMA_NO_NODE, more_pages - nr, next_page + nr);
433
+
434
+
if (!allocated)
435
+
break;
436
+
nr += allocated;
437
+
}
438
+
430
439
if (nr < more_pages ||
431
440
vmap_pages_range(phys_end, phys_end + (nr << PAGE_SHIFT), PAGE_KERNEL,
432
441
next_page, PAGE_SHIFT) < 0) {
+1
lib/asn1_decoder.c
+1
lib/asn1_decoder.c
+1
-1
lib/iov_iter.c
+1
-1
lib/iov_iter.c
+1
lib/tests/slub_kunit.c
+1
lib/tests/slub_kunit.c
+1
lib/ucs2_string.c
+1
lib/ucs2_string.c
+1
lib/zlib_inflate/inflate_syms.c
+1
lib/zlib_inflate/inflate_syms.c
+11
-8
mm/cma.c
+11
-8
mm/cma.c
···
35
35
struct cma cma_areas[MAX_CMA_AREAS];
36
36
unsigned int cma_area_count;
37
37
38
-
static int __init __cma_declare_contiguous_nid(phys_addr_t base,
38
+
static int __init __cma_declare_contiguous_nid(phys_addr_t *basep,
39
39
phys_addr_t size, phys_addr_t limit,
40
40
phys_addr_t alignment, unsigned int order_per_bit,
41
41
bool fixed, const char *name, struct cma **res_cma,
···
370
370
phys_addr_t align, unsigned int order_per_bit,
371
371
const char *name, struct cma **res_cma, int nid)
372
372
{
373
-
phys_addr_t start, end;
373
+
phys_addr_t start = 0, end;
374
374
phys_addr_t size, sizesum, sizeleft;
375
375
struct cma_init_memrange *mrp, *mlp, *failed;
376
376
struct cma_memrange *cmrp;
···
384
384
/*
385
385
* First, try it the normal way, producing just one range.
386
386
*/
387
-
ret = __cma_declare_contiguous_nid(0, total_size, 0, align,
387
+
ret = __cma_declare_contiguous_nid(&start, total_size, 0, align,
388
388
order_per_bit, false, name, res_cma, nid);
389
389
if (ret != -ENOMEM)
390
390
goto out;
···
580
580
{
581
581
int ret;
582
582
583
-
ret = __cma_declare_contiguous_nid(base, size, limit, alignment,
583
+
ret = __cma_declare_contiguous_nid(&base, size, limit, alignment,
584
584
order_per_bit, fixed, name, res_cma, nid);
585
585
if (ret != 0)
586
586
pr_err("Failed to reserve %ld MiB\n",
···
592
592
return ret;
593
593
}
594
594
595
-
static int __init __cma_declare_contiguous_nid(phys_addr_t base,
595
+
static int __init __cma_declare_contiguous_nid(phys_addr_t *basep,
596
596
phys_addr_t size, phys_addr_t limit,
597
597
phys_addr_t alignment, unsigned int order_per_bit,
598
598
bool fixed, const char *name, struct cma **res_cma,
599
599
int nid)
600
600
{
601
601
phys_addr_t memblock_end = memblock_end_of_DRAM();
602
-
phys_addr_t highmem_start;
602
+
phys_addr_t highmem_start, base = *basep;
603
603
int ret;
604
604
605
605
/*
···
722
722
}
723
723
724
724
ret = cma_init_reserved_mem(base, size, order_per_bit, name, res_cma);
725
-
if (ret)
725
+
if (ret) {
726
726
memblock_phys_free(base, size);
727
+
return ret;
728
+
}
727
729
728
730
(*res_cma)->nid = nid;
731
+
*basep = base;
729
732
730
-
return ret;
733
+
return 0;
731
734
}
732
735
733
736
static void cma_debug_show_areas(struct cma *cma)
+3
-3
mm/compaction.c
+3
-3
mm/compaction.c
···
981
981
}
982
982
983
983
if (PageHuge(page)) {
984
+
const unsigned int order = compound_order(page);
984
985
/*
985
986
* skip hugetlbfs if we are not compacting for pages
986
987
* bigger than its order. THPs and other compound pages
987
988
* are handled below.
988
989
*/
989
990
if (!cc->alloc_contig) {
990
-
const unsigned int order = compound_order(page);
991
991
992
992
if (order <= MAX_PAGE_ORDER) {
993
993
low_pfn += (1UL << order) - 1;
···
1011
1011
/* Do not report -EBUSY down the chain */
1012
1012
if (ret == -EBUSY)
1013
1013
ret = 0;
1014
-
low_pfn += compound_nr(page) - 1;
1015
-
nr_scanned += compound_nr(page) - 1;
1014
+
low_pfn += (1UL << order) - 1;
1015
+
nr_scanned += (1UL << order) - 1;
1016
1016
goto isolate_fail;
1017
1017
}
1018
1018
+1
mm/filemap.c
+1
mm/filemap.c
+20
-3
mm/hugetlb.c
+20
-3
mm/hugetlb.c
···
2271
2271
* as surplus_pages, otherwise it might confuse
2272
2272
* persistent_huge_pages() momentarily.
2273
2273
*/
2274
-
__prep_account_new_huge_page(h, nid);
2274
+
__prep_account_new_huge_page(h, folio_nid(folio));
2275
2275
2276
2276
/*
2277
2277
* We could have raced with the pool size change.
···
3825
3825
static int set_max_huge_pages(struct hstate *h, unsigned long count, int nid,
3826
3826
nodemask_t *nodes_allowed)
3827
3827
{
3828
+
unsigned long persistent_free_count;
3828
3829
unsigned long min_count;
3829
3830
unsigned long allocated;
3830
3831
struct folio *folio;
···
3960
3959
* though, we'll note that we're not allowed to exceed surplus
3961
3960
* and won't grow the pool anywhere else. Not until one of the
3962
3961
* sysctls are changed, or the surplus pages go out of use.
3962
+
*
3963
+
* min_count is the expected number of persistent pages, we
3964
+
* shouldn't calculate min_count by using
3965
+
* resv_huge_pages + persistent_huge_pages() - free_huge_pages,
3966
+
* because there may exist free surplus huge pages, and this will
3967
+
* lead to subtracting twice. Free surplus huge pages come from HVO
3968
+
* failing to restore vmemmap, see comments in the callers of
3969
+
* hugetlb_vmemmap_restore_folio(). Thus, we should calculate
3970
+
* persistent free count first.
3963
3971
*/
3964
-
min_count = h->resv_huge_pages + h->nr_huge_pages - h->free_huge_pages;
3972
+
persistent_free_count = h->free_huge_pages;
3973
+
if (h->free_huge_pages > persistent_huge_pages(h)) {
3974
+
if (h->free_huge_pages > h->surplus_huge_pages)
3975
+
persistent_free_count -= h->surplus_huge_pages;
3976
+
else
3977
+
persistent_free_count = 0;
3978
+
}
3979
+
min_count = h->resv_huge_pages + persistent_huge_pages(h) - persistent_free_count;
3965
3980
min_count = max(count, min_count);
3966
3981
try_to_free_low(h, min_count, nodes_allowed);
3967
3982
···
4647
4630
err = hugetlb_sysfs_add_hstate(h, hugepages_kobj,
4648
4631
hstate_kobjs, &hstate_attr_group);
4649
4632
if (err)
4650
-
pr_err("HugeTLB: Unable to add hstate %s", h->name);
4633
+
pr_err("HugeTLB: Unable to add hstate %s\n", h->name);
4651
4634
}
4652
4635
4653
4636
#ifdef CONFIG_NUMA
+1
mm/kasan/kasan_test_c.c
+1
mm/kasan/kasan_test_c.c
+19
-20
mm/memcontrol.c
+19
-20
mm/memcontrol.c
···
1759
1759
}
1760
1760
1761
1761
struct memcg_stock_pcp {
1762
-
localtry_lock_t stock_lock;
1762
+
local_trylock_t stock_lock;
1763
1763
struct mem_cgroup *cached; /* this never be root cgroup */
1764
1764
unsigned int nr_pages;
1765
1765
···
1774
1774
#define FLUSHING_CACHED_CHARGE 0
1775
1775
};
1776
1776
static DEFINE_PER_CPU(struct memcg_stock_pcp, memcg_stock) = {
1777
-
.stock_lock = INIT_LOCALTRY_LOCK(stock_lock),
1777
+
.stock_lock = INIT_LOCAL_TRYLOCK(stock_lock),
1778
1778
};
1779
1779
static DEFINE_MUTEX(percpu_charge_mutex);
1780
1780
···
1805
1805
if (nr_pages > MEMCG_CHARGE_BATCH)
1806
1806
return ret;
1807
1807
1808
-
if (!localtry_trylock_irqsave(&memcg_stock.stock_lock, flags)) {
1809
-
if (!gfpflags_allow_spinning(gfp_mask))
1810
-
return ret;
1811
-
localtry_lock_irqsave(&memcg_stock.stock_lock, flags);
1812
-
}
1808
+
if (gfpflags_allow_spinning(gfp_mask))
1809
+
local_lock_irqsave(&memcg_stock.stock_lock, flags);
1810
+
else if (!local_trylock_irqsave(&memcg_stock.stock_lock, flags))
1811
+
return ret;
1813
1812
1814
1813
stock = this_cpu_ptr(&memcg_stock);
1815
1814
stock_pages = READ_ONCE(stock->nr_pages);
···
1817
1818
ret = true;
1818
1819
}
1819
1820
1820
-
localtry_unlock_irqrestore(&memcg_stock.stock_lock, flags);
1821
+
local_unlock_irqrestore(&memcg_stock.stock_lock, flags);
1821
1822
1822
1823
return ret;
1823
1824
}
···
1856
1857
* drain_stock races is that we always operate on local CPU stock
1857
1858
* here with IRQ disabled
1858
1859
*/
1859
-
localtry_lock_irqsave(&memcg_stock.stock_lock, flags);
1860
+
local_lock_irqsave(&memcg_stock.stock_lock, flags);
1860
1861
1861
1862
stock = this_cpu_ptr(&memcg_stock);
1862
1863
old = drain_obj_stock(stock);
1863
1864
drain_stock(stock);
1864
1865
clear_bit(FLUSHING_CACHED_CHARGE, &stock->flags);
1865
1866
1866
-
localtry_unlock_irqrestore(&memcg_stock.stock_lock, flags);
1867
+
local_unlock_irqrestore(&memcg_stock.stock_lock, flags);
1867
1868
obj_cgroup_put(old);
1868
1869
}
1869
1870
···
1893
1894
{
1894
1895
unsigned long flags;
1895
1896
1896
-
if (!localtry_trylock_irqsave(&memcg_stock.stock_lock, flags)) {
1897
+
if (!local_trylock_irqsave(&memcg_stock.stock_lock, flags)) {
1897
1898
/*
1898
1899
* In case of unlikely failure to lock percpu stock_lock
1899
1900
* uncharge memcg directly.
···
1906
1907
return;
1907
1908
}
1908
1909
__refill_stock(memcg, nr_pages);
1909
-
localtry_unlock_irqrestore(&memcg_stock.stock_lock, flags);
1910
+
local_unlock_irqrestore(&memcg_stock.stock_lock, flags);
1910
1911
}
1911
1912
1912
1913
/*
···
1963
1964
stock = &per_cpu(memcg_stock, cpu);
1964
1965
1965
1966
/* drain_obj_stock requires stock_lock */
1966
-
localtry_lock_irqsave(&memcg_stock.stock_lock, flags);
1967
+
local_lock_irqsave(&memcg_stock.stock_lock, flags);
1967
1968
old = drain_obj_stock(stock);
1968
-
localtry_unlock_irqrestore(&memcg_stock.stock_lock, flags);
1969
+
local_unlock_irqrestore(&memcg_stock.stock_lock, flags);
1969
1970
1970
1971
drain_stock(stock);
1971
1972
obj_cgroup_put(old);
···
2786
2787
unsigned long flags;
2787
2788
int *bytes;
2788
2789
2789
-
localtry_lock_irqsave(&memcg_stock.stock_lock, flags);
2790
+
local_lock_irqsave(&memcg_stock.stock_lock, flags);
2790
2791
stock = this_cpu_ptr(&memcg_stock);
2791
2792
2792
2793
/*
···
2835
2836
if (nr)
2836
2837
__mod_objcg_mlstate(objcg, pgdat, idx, nr);
2837
2838
2838
-
localtry_unlock_irqrestore(&memcg_stock.stock_lock, flags);
2839
+
local_unlock_irqrestore(&memcg_stock.stock_lock, flags);
2839
2840
obj_cgroup_put(old);
2840
2841
}
2841
2842
···
2845
2846
unsigned long flags;
2846
2847
bool ret = false;
2847
2848
2848
-
localtry_lock_irqsave(&memcg_stock.stock_lock, flags);
2849
+
local_lock_irqsave(&memcg_stock.stock_lock, flags);
2849
2850
2850
2851
stock = this_cpu_ptr(&memcg_stock);
2851
2852
if (objcg == READ_ONCE(stock->cached_objcg) && stock->nr_bytes >= nr_bytes) {
···
2853
2854
ret = true;
2854
2855
}
2855
2856
2856
-
localtry_unlock_irqrestore(&memcg_stock.stock_lock, flags);
2857
+
local_unlock_irqrestore(&memcg_stock.stock_lock, flags);
2857
2858
2858
2859
return ret;
2859
2860
}
···
2945
2946
unsigned long flags;
2946
2947
unsigned int nr_pages = 0;
2947
2948
2948
-
localtry_lock_irqsave(&memcg_stock.stock_lock, flags);
2949
+
local_lock_irqsave(&memcg_stock.stock_lock, flags);
2949
2950
2950
2951
stock = this_cpu_ptr(&memcg_stock);
2951
2952
if (READ_ONCE(stock->cached_objcg) != objcg) { /* reset if necessary */
···
2959
2960
stock->nr_bytes &= (PAGE_SIZE - 1);
2960
2961
}
2961
2962
2962
-
localtry_unlock_irqrestore(&memcg_stock.stock_lock, flags);
2963
+
local_unlock_irqrestore(&memcg_stock.stock_lock, flags);
2963
2964
obj_cgroup_put(old);
2964
2965
2965
2966
if (nr_pages)
+3
-3
mm/memory.c
+3
-3
mm/memory.c
···
1361
1361
struct mm_struct *dst_mm = dst_vma->vm_mm;
1362
1362
struct mm_struct *src_mm = src_vma->vm_mm;
1363
1363
struct mmu_notifier_range range;
1364
-
unsigned long next, pfn;
1364
+
unsigned long next, pfn = 0;
1365
1365
bool is_cow;
1366
1366
int ret;
1367
1367
···
2938
2938
if (fn) {
2939
2939
do {
2940
2940
if (create || !pte_none(ptep_get(pte))) {
2941
-
err = fn(pte++, addr, data);
2941
+
err = fn(pte, addr, data);
2942
2942
if (err)
2943
2943
break;
2944
2944
}
2945
-
} while (addr += PAGE_SIZE, addr != end);
2945
+
} while (pte++, addr += PAGE_SIZE, addr != end);
2946
2946
}
2947
2947
*mask |= PGTBL_PTE_MODIFIED;
2948
2948
+88
-40
mm/page_alloc.c
+88
-40
mm/page_alloc.c
···
1396
1396
struct llist_head *llhead;
1397
1397
unsigned long flags;
1398
1398
1399
-
if (!spin_trylock_irqsave(&zone->lock, flags)) {
1400
-
if (unlikely(fpi_flags & FPI_TRYLOCK)) {
1399
+
if (unlikely(fpi_flags & FPI_TRYLOCK)) {
1400
+
if (!spin_trylock_irqsave(&zone->lock, flags)) {
1401
1401
add_page_to_zone_llist(zone, page, order);
1402
1402
return;
1403
1403
}
1404
+
} else {
1404
1405
spin_lock_irqsave(&zone->lock, flags);
1405
1406
}
1406
1407
···
2179
2178
}
2180
2179
2181
2180
/*
2182
-
* Try finding a free buddy page on the fallback list.
2183
-
*
2184
-
* This will attempt to claim a whole pageblock for the requested type
2185
-
* to ensure grouping of such requests in the future.
2186
-
*
2187
-
* If a whole block cannot be claimed, steal an individual page, regressing to
2188
-
* __rmqueue_smallest() logic to at least break up as little contiguity as
2189
-
* possible.
2181
+
* Try to allocate from some fallback migratetype by claiming the entire block,
2182
+
* i.e. converting it to the allocation's start migratetype.
2190
2183
*
2191
2184
* The use of signed ints for order and current_order is a deliberate
2192
2185
* deviation from the rest of this file, to make the for loop
2193
2186
* condition simpler.
2194
-
*
2195
-
* Return the stolen page, or NULL if none can be found.
2196
2187
*/
2197
2188
static __always_inline struct page *
2198
-
__rmqueue_fallback(struct zone *zone, int order, int start_migratetype,
2189
+
__rmqueue_claim(struct zone *zone, int order, int start_migratetype,
2199
2190
unsigned int alloc_flags)
2200
2191
{
2201
2192
struct free_area *area;
···
2225
2232
page = try_to_claim_block(zone, page, current_order, order,
2226
2233
start_migratetype, fallback_mt,
2227
2234
alloc_flags);
2228
-
if (page)
2229
-
goto got_one;
2235
+
if (page) {
2236
+
trace_mm_page_alloc_extfrag(page, order, current_order,
2237
+
start_migratetype, fallback_mt);
2238
+
return page;
2239
+
}
2230
2240
}
2231
2241
2232
-
if (alloc_flags & ALLOC_NOFRAGMENT)
2233
-
return NULL;
2242
+
return NULL;
2243
+
}
2234
2244
2235
-
/* No luck claiming pageblock. Find the smallest fallback page */
2245
+
/*
2246
+
* Try to steal a single page from some fallback migratetype. Leave the rest of
2247
+
* the block as its current migratetype, potentially causing fragmentation.
2248
+
*/
2249
+
static __always_inline struct page *
2250
+
__rmqueue_steal(struct zone *zone, int order, int start_migratetype)
2251
+
{
2252
+
struct free_area *area;
2253
+
int current_order;
2254
+
struct page *page;
2255
+
int fallback_mt;
2256
+
bool claim_block;
2257
+
2236
2258
for (current_order = order; current_order < NR_PAGE_ORDERS; current_order++) {
2237
2259
area = &(zone->free_area[current_order]);
2238
2260
fallback_mt = find_suitable_fallback(area, current_order,
···
2257
2249
2258
2250
page = get_page_from_free_area(area, fallback_mt);
2259
2251
page_del_and_expand(zone, page, order, current_order, fallback_mt);
2260
-
goto got_one;
2252
+
trace_mm_page_alloc_extfrag(page, order, current_order,
2253
+
start_migratetype, fallback_mt);
2254
+
return page;
2261
2255
}
2262
2256
2263
2257
return NULL;
2264
-
2265
-
got_one:
2266
-
trace_mm_page_alloc_extfrag(page, order, current_order,
2267
-
start_migratetype, fallback_mt);
2268
-
2269
-
return page;
2270
2258
}
2259
+
2260
+
enum rmqueue_mode {
2261
+
RMQUEUE_NORMAL,
2262
+
RMQUEUE_CMA,
2263
+
RMQUEUE_CLAIM,
2264
+
RMQUEUE_STEAL,
2265
+
};
2271
2266
2272
2267
/*
2273
2268
* Do the hard work of removing an element from the buddy allocator.
···
2278
2267
*/
2279
2268
static __always_inline struct page *
2280
2269
__rmqueue(struct zone *zone, unsigned int order, int migratetype,
2281
-
unsigned int alloc_flags)
2270
+
unsigned int alloc_flags, enum rmqueue_mode *mode)
2282
2271
{
2283
2272
struct page *page;
2284
2273
···
2297
2286
}
2298
2287
}
2299
2288
2300
-
page = __rmqueue_smallest(zone, order, migratetype);
2301
-
if (unlikely(!page)) {
2302
-
if (alloc_flags & ALLOC_CMA)
2289
+
/*
2290
+
* First try the freelists of the requested migratetype, then try
2291
+
* fallbacks modes with increasing levels of fragmentation risk.
2292
+
*
2293
+
* The fallback logic is expensive and rmqueue_bulk() calls in
2294
+
* a loop with the zone->lock held, meaning the freelists are
2295
+
* not subject to any outside changes. Remember in *mode where
2296
+
* we found pay dirt, to save us the search on the next call.
2297
+
*/
2298
+
switch (*mode) {
2299
+
case RMQUEUE_NORMAL:
2300
+
page = __rmqueue_smallest(zone, order, migratetype);
2301
+
if (page)
2302
+
return page;
2303
+
fallthrough;
2304
+
case RMQUEUE_CMA:
2305
+
if (alloc_flags & ALLOC_CMA) {
2303
2306
page = __rmqueue_cma_fallback(zone, order);
2304
-
2305
-
if (!page)
2306
-
page = __rmqueue_fallback(zone, order, migratetype,
2307
-
alloc_flags);
2307
+
if (page) {
2308
+
*mode = RMQUEUE_CMA;
2309
+
return page;
2310
+
}
2311
+
}
2312
+
fallthrough;
2313
+
case RMQUEUE_CLAIM:
2314
+
page = __rmqueue_claim(zone, order, migratetype, alloc_flags);
2315
+
if (page) {
2316
+
/* Replenished preferred freelist, back to normal mode. */
2317
+
*mode = RMQUEUE_NORMAL;
2318
+
return page;
2319
+
}
2320
+
fallthrough;
2321
+
case RMQUEUE_STEAL:
2322
+
if (!(alloc_flags & ALLOC_NOFRAGMENT)) {
2323
+
page = __rmqueue_steal(zone, order, migratetype);
2324
+
if (page) {
2325
+
*mode = RMQUEUE_STEAL;
2326
+
return page;
2327
+
}
2328
+
}
2308
2329
}
2309
-
return page;
2330
+
return NULL;
2310
2331
}
2311
2332
2312
2333
/*
···
2350
2307
unsigned long count, struct list_head *list,
2351
2308
int migratetype, unsigned int alloc_flags)
2352
2309
{
2310
+
enum rmqueue_mode rmqm = RMQUEUE_NORMAL;
2353
2311
unsigned long flags;
2354
2312
int i;
2355
2313
2356
-
if (!spin_trylock_irqsave(&zone->lock, flags)) {
2357
-
if (unlikely(alloc_flags & ALLOC_TRYLOCK))
2314
+
if (unlikely(alloc_flags & ALLOC_TRYLOCK)) {
2315
+
if (!spin_trylock_irqsave(&zone->lock, flags))
2358
2316
return 0;
2317
+
} else {
2359
2318
spin_lock_irqsave(&zone->lock, flags);
2360
2319
}
2361
2320
for (i = 0; i < count; ++i) {
2362
2321
struct page *page = __rmqueue(zone, order, migratetype,
2363
-
alloc_flags);
2322
+
alloc_flags, &rmqm);
2364
2323
if (unlikely(page == NULL))
2365
2324
break;
2366
2325
···
2978
2933
2979
2934
do {
2980
2935
page = NULL;
2981
-
if (!spin_trylock_irqsave(&zone->lock, flags)) {
2982
-
if (unlikely(alloc_flags & ALLOC_TRYLOCK))
2936
+
if (unlikely(alloc_flags & ALLOC_TRYLOCK)) {
2937
+
if (!spin_trylock_irqsave(&zone->lock, flags))
2983
2938
return NULL;
2939
+
} else {
2984
2940
spin_lock_irqsave(&zone->lock, flags);
2985
2941
}
2986
2942
if (alloc_flags & ALLOC_HIGHATOMIC)
2987
2943
page = __rmqueue_smallest(zone, order, MIGRATE_HIGHATOMIC);
2988
2944
if (!page) {
2989
-
page = __rmqueue(zone, order, migratetype, alloc_flags);
2945
+
enum rmqueue_mode rmqm = RMQUEUE_NORMAL;
2946
+
2947
+
page = __rmqueue(zone, order, migratetype, alloc_flags, &rmqm);
2990
2948
2991
2949
/*
2992
2950
* If the allocation fails, allow OOM handling and
+10
mm/slub.c
+10
mm/slub.c
···
1973
1973
#define OBJCGS_CLEAR_MASK (__GFP_DMA | __GFP_RECLAIMABLE | \
1974
1974
__GFP_ACCOUNT | __GFP_NOFAIL)
1975
1975
1976
+
static inline void init_slab_obj_exts(struct slab *slab)
1977
+
{
1978
+
slab->obj_exts = 0;
1979
+
}
1980
+
1976
1981
int alloc_slab_obj_exts(struct slab *slab, struct kmem_cache *s,
1977
1982
gfp_t gfp, bool new_slab)
1978
1983
{
···
2062
2057
}
2063
2058
2064
2059
#else /* CONFIG_SLAB_OBJ_EXT */
2060
+
2061
+
static inline void init_slab_obj_exts(struct slab *slab)
2062
+
{
2063
+
}
2065
2064
2066
2065
static int alloc_slab_obj_exts(struct slab *slab, struct kmem_cache *s,
2067
2066
gfp_t gfp, bool new_slab)
···
2646
2637
slab->objects = oo_objects(oo);
2647
2638
slab->inuse = 0;
2648
2639
slab->frozen = 0;
2640
+
init_slab_obj_exts(slab);
2649
2641
2650
2642
account_slab(slab, oo_order(oo), s, flags);
2651
2643
+11
-2
mm/userfaultfd.c
+11
-2
mm/userfaultfd.c
···
1902
1902
unsigned long end)
1903
1903
{
1904
1904
struct vm_area_struct *ret;
1905
+
bool give_up_on_oom = false;
1906
+
1907
+
/*
1908
+
* If we are modifying only and not splitting, just give up on the merge
1909
+
* if OOM prevents us from merging successfully.
1910
+
*/
1911
+
if (start == vma->vm_start && end == vma->vm_end)
1912
+
give_up_on_oom = true;
1905
1913
1906
1914
/* Reset ptes for the whole vma range if wr-protected */
1907
1915
if (userfaultfd_wp(vma))
···
1917
1909
1918
1910
ret = vma_modify_flags_uffd(vmi, prev, vma, start, end,
1919
1911
vma->vm_flags & ~__VM_UFFD_FLAGS,
1920
-
NULL_VM_UFFD_CTX);
1912
+
NULL_VM_UFFD_CTX, give_up_on_oom);
1921
1913
1922
1914
/*
1923
1915
* In the vma_merge() successful mprotect-like case 8:
···
1968
1960
new_flags = (vma->vm_flags & ~__VM_UFFD_FLAGS) | vm_flags;
1969
1961
vma = vma_modify_flags_uffd(&vmi, prev, vma, start, vma_end,
1970
1962
new_flags,
1971
-
(struct vm_userfaultfd_ctx){ctx});
1963
+
(struct vm_userfaultfd_ctx){ctx},
1964
+
/* give_up_on_oom = */false);
1972
1965
if (IS_ERR(vma))
1973
1966
return PTR_ERR(vma);
1974
1967
+47
-4
mm/vma.c
+47
-4
mm/vma.c
···
666
666
/*
667
667
* Actually perform the VMA merge operation.
668
668
*
669
+
* IMPORTANT: We guarantee that, should vmg->give_up_on_oom is set, to not
670
+
* modify any VMAs or cause inconsistent state should an OOM condition arise.
671
+
*
669
672
* Returns 0 on success, or an error value on failure.
670
673
*/
671
674
static int commit_merge(struct vma_merge_struct *vmg)
···
688
685
689
686
init_multi_vma_prep(&vp, vma, vmg);
690
687
688
+
/*
689
+
* If vmg->give_up_on_oom is set, we're safe, because we don't actually
690
+
* manipulate any VMAs until we succeed at preallocation.
691
+
*
692
+
* Past this point, we will not return an error.
693
+
*/
691
694
if (vma_iter_prealloc(vmg->vmi, vma))
692
695
return -ENOMEM;
693
696
···
924
915
if (anon_dup)
925
916
unlink_anon_vmas(anon_dup);
926
917
927
-
vmg->state = VMA_MERGE_ERROR_NOMEM;
918
+
/*
919
+
* We've cleaned up any cloned anon_vma's, no VMAs have been
920
+
* modified, no harm no foul if the user requests that we not
921
+
* report this and just give up, leaving the VMAs unmerged.
922
+
*/
923
+
if (!vmg->give_up_on_oom)
924
+
vmg->state = VMA_MERGE_ERROR_NOMEM;
928
925
return NULL;
929
926
}
930
927
···
941
926
abort:
942
927
vma_iter_set(vmg->vmi, start);
943
928
vma_iter_load(vmg->vmi);
944
-
vmg->state = VMA_MERGE_ERROR_NOMEM;
929
+
930
+
/*
931
+
* This means we have failed to clone anon_vma's correctly, but no
932
+
* actual changes to VMAs have occurred, so no harm no foul - if the
933
+
* user doesn't want this reported and instead just wants to give up on
934
+
* the merge, allow it.
935
+
*/
936
+
if (!vmg->give_up_on_oom)
937
+
vmg->state = VMA_MERGE_ERROR_NOMEM;
945
938
return NULL;
946
939
}
947
940
···
1091
1068
/* This should already have been checked by this point. */
1092
1069
VM_WARN_ON_VMG(!can_merge_remove_vma(next), vmg);
1093
1070
vma_start_write(next);
1071
+
/*
1072
+
* In this case we don't report OOM, so vmg->give_up_on_mm is
1073
+
* safe.
1074
+
*/
1094
1075
ret = dup_anon_vma(middle, next, &anon_dup);
1095
1076
if (ret)
1096
1077
return ret;
···
1117
1090
return 0;
1118
1091
1119
1092
nomem:
1120
-
vmg->state = VMA_MERGE_ERROR_NOMEM;
1121
1093
if (anon_dup)
1122
1094
unlink_anon_vmas(anon_dup);
1095
+
/*
1096
+
* If the user requests that we just give upon OOM, we are safe to do so
1097
+
* here, as commit merge provides this contract to us. Nothing has been
1098
+
* changed - no harm no foul, just don't report it.
1099
+
*/
1100
+
if (!vmg->give_up_on_oom)
1101
+
vmg->state = VMA_MERGE_ERROR_NOMEM;
1123
1102
return -ENOMEM;
1124
1103
}
1125
1104
···
1567
1534
if (vmg_nomem(vmg))
1568
1535
return ERR_PTR(-ENOMEM);
1569
1536
1537
+
/*
1538
+
* Split can fail for reasons other than OOM, so if the user requests
1539
+
* this it's probably a mistake.
1540
+
*/
1541
+
VM_WARN_ON(vmg->give_up_on_oom &&
1542
+
(vma->vm_start != start || vma->vm_end != end));
1543
+
1570
1544
/* Split any preceding portion of the VMA. */
1571
1545
if (vma->vm_start < start) {
1572
1546
int err = split_vma(vmg->vmi, vma, start, 1);
···
1642
1602
struct vm_area_struct *vma,
1643
1603
unsigned long start, unsigned long end,
1644
1604
unsigned long new_flags,
1645
-
struct vm_userfaultfd_ctx new_ctx)
1605
+
struct vm_userfaultfd_ctx new_ctx,
1606
+
bool give_up_on_oom)
1646
1607
{
1647
1608
VMG_VMA_STATE(vmg, vmi, prev, vma, start, end);
1648
1609
1649
1610
vmg.flags = new_flags;
1650
1611
vmg.uffd_ctx = new_ctx;
1612
+
if (give_up_on_oom)
1613
+
vmg.give_up_on_oom = true;
1651
1614
1652
1615
return vma_modify(&vmg);
1653
1616
}
+8
-1
mm/vma.h
+8
-1
mm/vma.h
···
114
114
*/
115
115
bool just_expand :1;
116
116
117
+
/*
118
+
* If a merge is possible, but an OOM error occurs, give up and don't
119
+
* execute the merge, returning NULL.
120
+
*/
121
+
bool give_up_on_oom :1;
122
+
117
123
/* Internal flags set during merge process: */
118
124
119
125
/*
···
261
255
struct vm_area_struct *vma,
262
256
unsigned long start, unsigned long end,
263
257
unsigned long new_flags,
264
-
struct vm_userfaultfd_ctx new_ctx);
258
+
struct vm_userfaultfd_ctx new_ctx,
259
+
bool give_up_on_oom);
265
260
266
261
__must_check struct vm_area_struct
267
262
*vma_merge_new_range(struct vma_merge_struct *vmg);
-1
net/batman-adv/hard-interface.c
-1
net/batman-adv/hard-interface.c
+6
-2
net/bluetooth/hci_conn.c
+6
-2
net/bluetooth/hci_conn.c
···
3072
3072
const struct sockcm_cookie *sockc)
3073
3073
{
3074
3074
struct sock *sk = skb ? skb->sk : NULL;
3075
+
int key;
3075
3076
3076
3077
/* This shall be called on a single skb of those generated by user
3077
3078
* sendmsg(), and only when the sendmsg() does not return error to
···
3088
3087
3089
3088
sock_tx_timestamp(sk, sockc, &skb_shinfo(skb)->tx_flags);
3090
3089
3090
+
if (sk->sk_type == SOCK_STREAM)
3091
+
key = atomic_add_return(key_offset, &sk->sk_tskey);
3092
+
3091
3093
if (sockc->tsflags & SOF_TIMESTAMPING_OPT_ID &&
3092
3094
sockc->tsflags & SOF_TIMESTAMPING_TX_RECORD_MASK) {
3093
3095
if (sockc->tsflags & SOCKCM_FLAG_TS_OPT_ID) {
3094
3096
skb_shinfo(skb)->tskey = sockc->ts_opt_id;
3095
3097
} else {
3096
-
int key = atomic_add_return(key_offset, &sk->sk_tskey);
3097
-
3098
+
if (sk->sk_type != SOCK_STREAM)
3099
+
key = atomic_inc_return(&sk->sk_tskey);
3098
3100
skb_shinfo(skb)->tskey = key - 1;
3099
3101
}
3100
3102
}
+3
-2
net/bluetooth/hci_event.c
+3
-2
net/bluetooth/hci_event.c
···
6160
6160
* event or send an immediate device found event if the data
6161
6161
* should not be stored for later.
6162
6162
*/
6163
-
if (!ext_adv && !has_pending_adv_report(hdev)) {
6163
+
if (!has_pending_adv_report(hdev)) {
6164
6164
/* If the report will trigger a SCAN_REQ store it for
6165
6165
* later merging.
6166
6166
*/
6167
-
if (type == LE_ADV_IND || type == LE_ADV_SCAN_IND) {
6167
+
if (!ext_adv && (type == LE_ADV_IND ||
6168
+
type == LE_ADV_SCAN_IND)) {
6168
6169
store_pending_adv_report(hdev, bdaddr, bdaddr_type,
6169
6170
rssi, flags, data, len);
6170
6171
return;
+19
-2
net/bluetooth/l2cap_core.c
+19
-2
net/bluetooth/l2cap_core.c
···
3991
3991
3992
3992
/* Check if the ACL is secure enough (if not SDP) */
3993
3993
if (psm != cpu_to_le16(L2CAP_PSM_SDP) &&
3994
-
!hci_conn_check_link_mode(conn->hcon)) {
3994
+
(!hci_conn_check_link_mode(conn->hcon) ||
3995
+
!l2cap_check_enc_key_size(conn->hcon))) {
3995
3996
conn->disc_reason = HCI_ERROR_AUTH_FAILURE;
3996
3997
result = L2CAP_CR_SEC_BLOCK;
3997
3998
goto response;
···
7539
7538
if (skb->len > len) {
7540
7539
BT_ERR("Frame is too long (len %u, expected len %d)",
7541
7540
skb->len, len);
7541
+
/* PTS test cases L2CAP/COS/CED/BI-14-C and BI-15-C
7542
+
* (Multiple Signaling Command in one PDU, Data
7543
+
* Truncated, BR/EDR) send a C-frame to the IUT with
7544
+
* PDU Length set to 8 and Channel ID set to the
7545
+
* correct signaling channel for the logical link.
7546
+
* The Information payload contains one L2CAP_ECHO_REQ
7547
+
* packet with Data Length set to 0 with 0 octets of
7548
+
* echo data and one invalid command packet due to
7549
+
* data truncated in PDU but present in HCI packet.
7550
+
*
7551
+
* Shorter the socket buffer to the PDU length to
7552
+
* allow to process valid commands from the PDU before
7553
+
* setting the socket unreliable.
7554
+
*/
7555
+
skb->len = len;
7556
+
l2cap_recv_frame(conn, skb);
7542
7557
l2cap_conn_unreliable(conn, ECOMM);
7543
-
goto drop;
7558
+
goto unlock;
7544
7559
}
7545
7560
7546
7561
/* Append fragment into frame (with header) */
+3
-1
net/bridge/br_vlan.c
+3
-1
net/bridge/br_vlan.c
···
715
715
u16 flags, bool *changed,
716
716
struct netlink_ext_ack *extack)
717
717
{
718
-
bool would_change = __vlan_flags_would_change(vlan, flags);
719
718
bool becomes_brentry = false;
719
+
bool would_change = false;
720
720
int err;
721
721
722
722
if (!br_vlan_is_brentry(vlan)) {
···
725
725
return -EINVAL;
726
726
727
727
becomes_brentry = true;
728
+
} else {
729
+
would_change = __vlan_flags_would_change(vlan, flags);
728
730
}
729
731
730
732
/* Master VLANs that aren't brentries weren't notified before,
+1
net/can/j1939/socket.c
+1
net/can/j1939/socket.c
+15
-4
net/core/dev.c
+15
-4
net/core/dev.c
···
1572
1572
1573
1573
void netif_state_change(struct net_device *dev)
1574
1574
{
1575
+
netdev_ops_assert_locked_or_invisible(dev);
1576
+
1575
1577
if (dev->flags & IFF_UP) {
1576
1578
struct netdev_notifier_change_info change_info = {
1577
1579
.info.dev = dev,
···
11988
11986
BUG_ON(dev->reg_state != NETREG_REGISTERED);
11989
11987
}
11990
11988
11991
-
/* If device is running, close it first. */
11989
+
/* If device is running, close it first. Start with ops locked... */
11992
11990
list_for_each_entry(dev, head, unreg_list) {
11993
-
list_add_tail(&dev->close_list, &close_head);
11994
-
netdev_lock_ops(dev);
11991
+
if (netdev_need_ops_lock(dev)) {
11992
+
list_add_tail(&dev->close_list, &close_head);
11993
+
netdev_lock(dev);
11994
+
}
11995
+
}
11996
+
dev_close_many(&close_head, true);
11997
+
/* ... now unlock them and go over the rest. */
11998
+
list_for_each_entry(dev, head, unreg_list) {
11999
+
if (netdev_need_ops_lock(dev))
12000
+
netdev_unlock(dev);
12001
+
else
12002
+
list_add_tail(&dev->close_list, &close_head);
11995
12003
}
11996
12004
dev_close_many(&close_head, true);
11997
12005
11998
12006
list_for_each_entry(dev, head, unreg_list) {
11999
-
netdev_unlock_ops(dev);
12000
12007
/* And unlink it from device chain. */
12001
12008
unlist_netdevice(dev);
12002
12009
netdev_lock(dev);
+40
-8
net/core/fib_rules.c
+40
-8
net/core/fib_rules.c
···
257
257
return nla_put(skb, attrtype, sizeof(*range), range);
258
258
}
259
259
260
+
static bool fib_rule_iif_match(const struct fib_rule *rule, int iifindex,
261
+
const struct flowi *fl)
262
+
{
263
+
u8 iif_is_l3_master = READ_ONCE(rule->iif_is_l3_master);
264
+
265
+
return iif_is_l3_master ? l3mdev_fib_rule_iif_match(fl, iifindex) :
266
+
fl->flowi_iif == iifindex;
267
+
}
268
+
269
+
static bool fib_rule_oif_match(const struct fib_rule *rule, int oifindex,
270
+
const struct flowi *fl)
271
+
{
272
+
u8 oif_is_l3_master = READ_ONCE(rule->oif_is_l3_master);
273
+
274
+
return oif_is_l3_master ? l3mdev_fib_rule_oif_match(fl, oifindex) :
275
+
fl->flowi_oif == oifindex;
276
+
}
277
+
260
278
static int fib_rule_match(struct fib_rule *rule, struct fib_rules_ops *ops,
261
279
struct flowi *fl, int flags,
262
280
struct fib_lookup_arg *arg)
···
282
264
int iifindex, oifindex, ret = 0;
283
265
284
266
iifindex = READ_ONCE(rule->iifindex);
285
-
if (iifindex && (iifindex != fl->flowi_iif))
267
+
if (iifindex && !fib_rule_iif_match(rule, iifindex, fl))
286
268
goto out;
287
269
288
270
oifindex = READ_ONCE(rule->oifindex);
289
-
if (oifindex && (oifindex != fl->flowi_oif))
271
+
if (oifindex && !fib_rule_oif_match(rule, oifindex, fl))
290
272
goto out;
291
273
292
274
if ((rule->mark ^ fl->flowi_mark) & rule->mark_mask)
···
754
736
struct net_device *dev;
755
737
756
738
dev = __dev_get_by_name(nlrule->fr_net, nlrule->iifname);
757
-
if (dev)
739
+
if (dev) {
758
740
nlrule->iifindex = dev->ifindex;
741
+
nlrule->iif_is_l3_master = netif_is_l3_master(dev);
742
+
}
759
743
}
760
744
761
745
if (tb[FRA_OIFNAME]) {
762
746
struct net_device *dev;
763
747
764
748
dev = __dev_get_by_name(nlrule->fr_net, nlrule->oifname);
765
-
if (dev)
749
+
if (dev) {
766
750
nlrule->oifindex = dev->ifindex;
751
+
nlrule->oif_is_l3_master = netif_is_l3_master(dev);
752
+
}
767
753
}
768
754
769
755
return 0;
···
1360
1338
1361
1339
list_for_each_entry(rule, rules, list) {
1362
1340
if (rule->iifindex == -1 &&
1363
-
strcmp(dev->name, rule->iifname) == 0)
1341
+
strcmp(dev->name, rule->iifname) == 0) {
1364
1342
WRITE_ONCE(rule->iifindex, dev->ifindex);
1343
+
WRITE_ONCE(rule->iif_is_l3_master,
1344
+
netif_is_l3_master(dev));
1345
+
}
1365
1346
if (rule->oifindex == -1 &&
1366
-
strcmp(dev->name, rule->oifname) == 0)
1347
+
strcmp(dev->name, rule->oifname) == 0) {
1367
1348
WRITE_ONCE(rule->oifindex, dev->ifindex);
1349
+
WRITE_ONCE(rule->oif_is_l3_master,
1350
+
netif_is_l3_master(dev));
1351
+
}
1368
1352
}
1369
1353
}
1370
1354
···
1379
1351
struct fib_rule *rule;
1380
1352
1381
1353
list_for_each_entry(rule, rules, list) {
1382
-
if (rule->iifindex == dev->ifindex)
1354
+
if (rule->iifindex == dev->ifindex) {
1383
1355
WRITE_ONCE(rule->iifindex, -1);
1384
-
if (rule->oifindex == dev->ifindex)
1356
+
WRITE_ONCE(rule->iif_is_l3_master, false);
1357
+
}
1358
+
if (rule->oifindex == dev->ifindex) {
1385
1359
WRITE_ONCE(rule->oifindex, -1);
1360
+
WRITE_ONCE(rule->oif_is_l3_master, false);
1361
+
}
1386
1362
}
1387
1363
}
1388
1364
+44
-36
net/core/filter.c
+44
-36
net/core/filter.c
···
218
218
return 0;
219
219
}
220
220
221
+
static int bpf_skb_load_helper_convert_offset(const struct sk_buff *skb, int offset)
222
+
{
223
+
if (likely(offset >= 0))
224
+
return offset;
225
+
226
+
if (offset >= SKF_NET_OFF)
227
+
return offset - SKF_NET_OFF + skb_network_offset(skb);
228
+
229
+
if (offset >= SKF_LL_OFF && skb_mac_header_was_set(skb))
230
+
return offset - SKF_LL_OFF + skb_mac_offset(skb);
231
+
232
+
return INT_MIN;
233
+
}
234
+
221
235
BPF_CALL_4(bpf_skb_load_helper_8, const struct sk_buff *, skb, const void *,
222
236
data, int, headlen, int, offset)
223
237
{
224
-
u8 tmp, *ptr;
238
+
u8 tmp;
225
239
const int len = sizeof(tmp);
226
240
227
-
if (offset >= 0) {
228
-
if (headlen - offset >= len)
229
-
return *(u8 *)(data + offset);
230
-
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
231
-
return tmp;
232
-
} else {
233
-
ptr = bpf_internal_load_pointer_neg_helper(skb, offset, len);
234
-
if (likely(ptr))
235
-
return *(u8 *)ptr;
236
-
}
241
+
offset = bpf_skb_load_helper_convert_offset(skb, offset);
242
+
if (offset == INT_MIN)
243
+
return -EFAULT;
237
244
238
-
return -EFAULT;
245
+
if (headlen - offset >= len)
246
+
return *(u8 *)(data + offset);
247
+
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
248
+
return tmp;
249
+
else
250
+
return -EFAULT;
239
251
}
240
252
241
253
BPF_CALL_2(bpf_skb_load_helper_8_no_cache, const struct sk_buff *, skb,
···
260
248
BPF_CALL_4(bpf_skb_load_helper_16, const struct sk_buff *, skb, const void *,
261
249
data, int, headlen, int, offset)
262
250
{
263
-
__be16 tmp, *ptr;
251
+
__be16 tmp;
264
252
const int len = sizeof(tmp);
265
253
266
-
if (offset >= 0) {
267
-
if (headlen - offset >= len)
268
-
return get_unaligned_be16(data + offset);
269
-
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
270
-
return be16_to_cpu(tmp);
271
-
} else {
272
-
ptr = bpf_internal_load_pointer_neg_helper(skb, offset, len);
273
-
if (likely(ptr))
274
-
return get_unaligned_be16(ptr);
275
-
}
254
+
offset = bpf_skb_load_helper_convert_offset(skb, offset);
255
+
if (offset == INT_MIN)
256
+
return -EFAULT;
276
257
277
-
return -EFAULT;
258
+
if (headlen - offset >= len)
259
+
return get_unaligned_be16(data + offset);
260
+
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
261
+
return be16_to_cpu(tmp);
262
+
else
263
+
return -EFAULT;
278
264
}
279
265
280
266
BPF_CALL_2(bpf_skb_load_helper_16_no_cache, const struct sk_buff *, skb,
···
285
275
BPF_CALL_4(bpf_skb_load_helper_32, const struct sk_buff *, skb, const void *,
286
276
data, int, headlen, int, offset)
287
277
{
288
-
__be32 tmp, *ptr;
278
+
__be32 tmp;
289
279
const int len = sizeof(tmp);
290
280
291
-
if (likely(offset >= 0)) {
292
-
if (headlen - offset >= len)
293
-
return get_unaligned_be32(data + offset);
294
-
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
295
-
return be32_to_cpu(tmp);
296
-
} else {
297
-
ptr = bpf_internal_load_pointer_neg_helper(skb, offset, len);
298
-
if (likely(ptr))
299
-
return get_unaligned_be32(ptr);
300
-
}
281
+
offset = bpf_skb_load_helper_convert_offset(skb, offset);
282
+
if (offset == INT_MIN)
283
+
return -EFAULT;
301
284
302
-
return -EFAULT;
285
+
if (headlen - offset >= len)
286
+
return get_unaligned_be32(data + offset);
287
+
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
288
+
return be32_to_cpu(tmp);
289
+
else
290
+
return -EFAULT;
303
291
}
304
292
305
293
BPF_CALL_2(bpf_skb_load_helper_32_no_cache, const struct sk_buff *, skb,
+1
-4
net/core/rtnetlink.c
+1
-4
net/core/rtnetlink.c
···
3677
3677
nla_len(tb[IFLA_BROADCAST]));
3678
3678
if (tb[IFLA_TXQLEN])
3679
3679
dev->tx_queue_len = nla_get_u32(tb[IFLA_TXQLEN]);
3680
-
if (tb[IFLA_OPERSTATE]) {
3681
-
netdev_lock_ops(dev);
3680
+
if (tb[IFLA_OPERSTATE])
3682
3681
set_operstate(dev, nla_get_u8(tb[IFLA_OPERSTATE]));
3683
-
netdev_unlock_ops(dev);
3684
-
}
3685
3682
if (tb[IFLA_LINKMODE])
3686
3683
dev->link_mode = nla_get_u8(tb[IFLA_LINKMODE]);
3687
3684
if (tb[IFLA_GROUP])
+49
-10
net/dsa/dsa.c
+49
-10
net/dsa/dsa.c
···
862
862
kfree(dst->lags);
863
863
}
864
864
865
+
static void dsa_tree_teardown_routing_table(struct dsa_switch_tree *dst)
866
+
{
867
+
struct dsa_link *dl, *next;
868
+
869
+
list_for_each_entry_safe(dl, next, &dst->rtable, list) {
870
+
list_del(&dl->list);
871
+
kfree(dl);
872
+
}
873
+
}
874
+
865
875
static int dsa_tree_setup(struct dsa_switch_tree *dst)
866
876
{
867
877
bool complete;
···
889
879
890
880
err = dsa_tree_setup_cpu_ports(dst);
891
881
if (err)
892
-
return err;
882
+
goto teardown_rtable;
893
883
894
884
err = dsa_tree_setup_switches(dst);
895
885
if (err)
···
921
911
dsa_tree_teardown_switches(dst);
922
912
teardown_cpu_ports:
923
913
dsa_tree_teardown_cpu_ports(dst);
914
+
teardown_rtable:
915
+
dsa_tree_teardown_routing_table(dst);
924
916
925
917
return err;
926
918
}
927
919
928
920
static void dsa_tree_teardown(struct dsa_switch_tree *dst)
929
921
{
930
-
struct dsa_link *dl, *next;
931
-
932
922
if (!dst->setup)
933
923
return;
934
924
···
942
932
943
933
dsa_tree_teardown_cpu_ports(dst);
944
934
945
-
list_for_each_entry_safe(dl, next, &dst->rtable, list) {
946
-
list_del(&dl->list);
947
-
kfree(dl);
948
-
}
935
+
dsa_tree_teardown_routing_table(dst);
949
936
950
937
pr_info("DSA: tree %d torn down\n", dst->index);
951
938
···
1485
1478
1486
1479
static void dsa_switch_release_ports(struct dsa_switch *ds)
1487
1480
{
1481
+
struct dsa_mac_addr *a, *tmp;
1488
1482
struct dsa_port *dp, *next;
1483
+
struct dsa_vlan *v, *n;
1489
1484
1490
1485
dsa_switch_for_each_port_safe(dp, next, ds) {
1491
-
WARN_ON(!list_empty(&dp->fdbs));
1492
-
WARN_ON(!list_empty(&dp->mdbs));
1493
-
WARN_ON(!list_empty(&dp->vlans));
1486
+
/* These are either entries that upper layers lost track of
1487
+
* (probably due to bugs), or installed through interfaces
1488
+
* where one does not necessarily have to remove them, like
1489
+
* ndo_dflt_fdb_add().
1490
+
*/
1491
+
list_for_each_entry_safe(a, tmp, &dp->fdbs, list) {
1492
+
dev_info(ds->dev,
1493
+
"Cleaning up unicast address %pM vid %u from port %d\n",
1494
+
a->addr, a->vid, dp->index);
1495
+
list_del(&a->list);
1496
+
kfree(a);
1497
+
}
1498
+
1499
+
list_for_each_entry_safe(a, tmp, &dp->mdbs, list) {
1500
+
dev_info(ds->dev,
1501
+
"Cleaning up multicast address %pM vid %u from port %d\n",
1502
+
a->addr, a->vid, dp->index);
1503
+
list_del(&a->list);
1504
+
kfree(a);
1505
+
}
1506
+
1507
+
/* These are entries that upper layers have lost track of,
1508
+
* probably due to bugs, but also due to dsa_port_do_vlan_del()
1509
+
* having failed and the VLAN entry still lingering on.
1510
+
*/
1511
+
list_for_each_entry_safe(v, n, &dp->vlans, list) {
1512
+
dev_info(ds->dev,
1513
+
"Cleaning up vid %u from port %d\n",
1514
+
v->vid, dp->index);
1515
+
list_del(&v->list);
1516
+
kfree(v);
1517
+
}
1518
+
1494
1519
list_del(&dp->list);
1495
1520
kfree(dp);
1496
1521
}
+1
-1
net/dsa/tag_8021q.c
+1
-1
net/dsa/tag_8021q.c
+1
-1
net/ethtool/cmis_cdb.c
+1
-1
net/ethtool/cmis_cdb.c
···
351
351
struct netlink_ext_ack extack = {};
352
352
int err;
353
353
354
-
ethtool_cmis_page_init(&page_data, 0, offset, sizeof(rpl));
354
+
ethtool_cmis_page_init(&page_data, 0, offset, sizeof(*rpl));
355
355
page_data.data = (u8 *)rpl;
356
356
357
357
err = ops->get_module_eeprom_by_page(dev, &page_data, &extack);
+1
net/ipv6/route.c
+1
net/ipv6/route.c
+3
-1
net/l3mdev/l3mdev.c
+3
-1
net/l3mdev/l3mdev.c
···
277
277
if (fl->flowi_oif) {
278
278
dev = dev_get_by_index_rcu(net, fl->flowi_oif);
279
279
if (dev) {
280
-
if (!fl->flowi_l3mdev)
280
+
if (!fl->flowi_l3mdev) {
281
281
fl->flowi_l3mdev = l3mdev_master_ifindex_rcu(dev);
282
+
fl->flowi_flags |= FLOWI_FLAG_L3MDEV_OIF;
283
+
}
282
284
283
285
/* oif set to L3mdev directs lookup to its table;
284
286
* reset to avoid oif match in fib_lookup
+3
net/mac80211/iface.c
+3
net/mac80211/iface.c
+3
net/mctp/af_mctp.c
+3
net/mctp/af_mctp.c
···
630
630
{
631
631
struct net *net = sock_net(sk);
632
632
633
+
/* Bind lookup runs under RCU, remain live during that. */
634
+
sock_set_flag(sk, SOCK_RCU_FREE);
635
+
633
636
mutex_lock(&net->mctp.bind_lock);
634
637
sk_add_node_rcu(sk, &net->mctp.binds);
635
638
mutex_unlock(&net->mctp.bind_lock);
+6
-4
net/netfilter/nf_flow_table_core.c
+6
-4
net/netfilter/nf_flow_table_core.c
···
383
383
void flow_offload_teardown(struct flow_offload *flow)
384
384
{
385
385
clear_bit(IPS_OFFLOAD_BIT, &flow->ct->status);
386
-
set_bit(NF_FLOW_TEARDOWN, &flow->flags);
387
-
flow_offload_fixup_ct(flow);
386
+
if (!test_and_set_bit(NF_FLOW_TEARDOWN, &flow->flags))
387
+
flow_offload_fixup_ct(flow);
388
388
}
389
389
EXPORT_SYMBOL_GPL(flow_offload_teardown);
390
390
···
558
558
559
559
if (nf_flow_has_expired(flow) ||
560
560
nf_ct_is_dying(flow->ct) ||
561
-
nf_flow_custom_gc(flow_table, flow))
561
+
nf_flow_custom_gc(flow_table, flow)) {
562
562
flow_offload_teardown(flow);
563
-
else if (!teardown)
563
+
teardown = true;
564
+
} else if (!teardown) {
564
565
nf_flow_table_extend_ct_timeout(flow->ct);
566
+
}
565
567
566
568
if (teardown) {
567
569
if (test_bit(NF_FLOW_HW, &flow->flags)) {
+2
-1
net/openvswitch/flow_netlink.c
+2
-1
net/openvswitch/flow_netlink.c
···
2876
2876
size_t key_len;
2877
2877
2878
2878
/* There can be only one key in a action */
2879
-
if (nla_total_size(nla_len(ovs_key)) != nla_len(a))
2879
+
if (!nla_ok(ovs_key, nla_len(a)) ||
2880
+
nla_total_size(nla_len(ovs_key)) != nla_len(a))
2880
2881
return -EINVAL;
2881
2882
2882
2883
key_len = nla_len(ovs_key);
+5
net/smc/af_smc.c
+5
net/smc/af_smc.c
···
362
362
return;
363
363
}
364
364
365
+
static struct lock_class_key smc_key;
366
+
static struct lock_class_key smc_slock_key;
367
+
365
368
void smc_sk_init(struct net *net, struct sock *sk, int protocol)
366
369
{
367
370
struct smc_sock *smc = smc_sk(sk);
···
378
375
INIT_WORK(&smc->connect_work, smc_connect_work);
379
376
INIT_DELAYED_WORK(&smc->conn.tx_work, smc_tx_work);
380
377
INIT_LIST_HEAD(&smc->accept_q);
378
+
sock_lock_init_class_and_name(sk, "slock-AF_SMC", &smc_slock_key,
379
+
"sk_lock-AF_SMC", &smc_key);
381
380
spin_lock_init(&smc->accept_q_lock);
382
381
spin_lock_init(&smc->conn.send_lock);
383
382
sk->sk_prot->hash(sk);
+1
samples/livepatch/livepatch-callbacks-busymod.c
+1
samples/livepatch/livepatch-callbacks-busymod.c
+1
samples/livepatch/livepatch-callbacks-demo.c
+1
samples/livepatch/livepatch-callbacks-demo.c
+1
samples/livepatch/livepatch-callbacks-mod.c
+1
samples/livepatch/livepatch-callbacks-mod.c
+1
samples/livepatch/livepatch-sample.c
+1
samples/livepatch/livepatch-sample.c
+1
samples/livepatch/livepatch-shadow-fix1.c
+1
samples/livepatch/livepatch-shadow-fix1.c
+1
samples/livepatch/livepatch-shadow-fix2.c
+1
samples/livepatch/livepatch-shadow-fix2.c
+2
-2
sound/isa/azt2320.c
+2
-2
sound/isa/azt2320.c
···
189
189
if (error < 0)
190
190
return error;
191
191
192
-
strcpy(card->driver, "AZT2320");
193
-
strcpy(card->shortname, "Aztech AZT2320");
192
+
strscpy(card->driver, "AZT2320");
193
+
strscpy(card->shortname, "Aztech AZT2320");
194
194
sprintf(card->longname, "%s, WSS at 0x%lx, irq %i, dma %i&%i",
195
195
card->shortname, chip->port, irq[dev], dma1[dev], dma2[dev]);
196
196
+1
-3
sound/pci/hda/Kconfig
+1
-3
sound/pci/hda/Kconfig
···
96
96
97
97
config SND_HDA_CIRRUS_SCODEC_KUNIT_TEST
98
98
tristate "KUnit test for Cirrus side-codec library" if !KUNIT_ALL_TESTS
99
-
select SND_HDA_CIRRUS_SCODEC
100
-
select GPIOLIB
101
-
depends on KUNIT
99
+
depends on SND_HDA_CIRRUS_SCODEC && GPIOLIB && KUNIT
102
100
default KUNIT_ALL_TESTS
103
101
help
104
102
This builds KUnit tests for the cirrus side-codec library.
+15
-8
sound/pci/hda/patch_realtek.c
+15
-8
sound/pci/hda/patch_realtek.c
···
7969
7969
ALC233_FIXUP_MEDION_MTL_SPK,
7970
7970
ALC294_FIXUP_BASS_SPEAKER_15,
7971
7971
ALC283_FIXUP_DELL_HP_RESUME,
7972
+
ALC294_FIXUP_ASUS_CS35L41_SPI_2,
7972
7973
};
7973
7974
7974
7975
/* A special fixup for Lenovo C940 and Yoga Duet 7;
···
10334
10333
.type = HDA_FIXUP_FUNC,
10335
10334
.v.func = alc283_fixup_dell_hp_resume,
10336
10335
},
10336
+
[ALC294_FIXUP_ASUS_CS35L41_SPI_2] = {
10337
+
.type = HDA_FIXUP_FUNC,
10338
+
.v.func = cs35l41_fixup_spi_two,
10339
+
.chained = true,
10340
+
.chain_id = ALC294_FIXUP_ASUS_HEADSET_MIC,
10341
+
},
10337
10342
};
10338
10343
10339
10344
static const struct hda_quirk alc269_fixup_tbl[] = {
···
10842
10835
SND_PCI_QUIRK(0x1043, 0x12a0, "ASUS X441UV", ALC233_FIXUP_EAPD_COEF_AND_MIC_NO_PRESENCE),
10843
10836
SND_PCI_QUIRK(0x1043, 0x12a3, "Asus N7691ZM", ALC269_FIXUP_ASUS_N7601ZM),
10844
10837
SND_PCI_QUIRK(0x1043, 0x12af, "ASUS UX582ZS", ALC245_FIXUP_CS35L41_SPI_2),
10845
-
SND_PCI_QUIRK(0x1043, 0x12b4, "ASUS B3405CCA / P3405CCA", ALC245_FIXUP_CS35L41_SPI_2),
10838
+
SND_PCI_QUIRK(0x1043, 0x12b4, "ASUS B3405CCA / P3405CCA", ALC294_FIXUP_ASUS_CS35L41_SPI_2),
10846
10839
SND_PCI_QUIRK(0x1043, 0x12e0, "ASUS X541SA", ALC256_FIXUP_ASUS_MIC),
10847
10840
SND_PCI_QUIRK(0x1043, 0x12f0, "ASUS X541UV", ALC256_FIXUP_ASUS_MIC),
10848
10841
SND_PCI_QUIRK(0x1043, 0x1313, "Asus K42JZ", ALC269VB_FIXUP_ASUS_MIC_NO_PRESENCE),
···
10932
10925
SND_PCI_QUIRK(0x1043, 0x1fb3, "ASUS ROG Flow Z13 GZ302EA", ALC287_FIXUP_CS35L41_I2C_2),
10933
10926
SND_PCI_QUIRK(0x1043, 0x3011, "ASUS B5605CVA", ALC245_FIXUP_CS35L41_SPI_2),
10934
10927
SND_PCI_QUIRK(0x1043, 0x3030, "ASUS ZN270IE", ALC256_FIXUP_ASUS_AIO_GPIO2),
10935
-
SND_PCI_QUIRK(0x1043, 0x3061, "ASUS B3405CCA", ALC245_FIXUP_CS35L41_SPI_2),
10936
-
SND_PCI_QUIRK(0x1043, 0x3071, "ASUS B5405CCA", ALC245_FIXUP_CS35L41_SPI_2),
10937
-
SND_PCI_QUIRK(0x1043, 0x30c1, "ASUS B3605CCA / P3605CCA", ALC245_FIXUP_CS35L41_SPI_2),
10938
-
SND_PCI_QUIRK(0x1043, 0x30d1, "ASUS B5405CCA", ALC245_FIXUP_CS35L41_SPI_2),
10939
-
SND_PCI_QUIRK(0x1043, 0x30e1, "ASUS B5605CCA", ALC245_FIXUP_CS35L41_SPI_2),
10928
+
SND_PCI_QUIRK(0x1043, 0x3061, "ASUS B3405CCA", ALC294_FIXUP_ASUS_CS35L41_SPI_2),
10929
+
SND_PCI_QUIRK(0x1043, 0x3071, "ASUS B5405CCA", ALC294_FIXUP_ASUS_CS35L41_SPI_2),
10930
+
SND_PCI_QUIRK(0x1043, 0x30c1, "ASUS B3605CCA / P3605CCA", ALC294_FIXUP_ASUS_CS35L41_SPI_2),
10931
+
SND_PCI_QUIRK(0x1043, 0x30d1, "ASUS B5405CCA", ALC294_FIXUP_ASUS_CS35L41_SPI_2),
10932
+
SND_PCI_QUIRK(0x1043, 0x30e1, "ASUS B5605CCA", ALC294_FIXUP_ASUS_CS35L41_SPI_2),
10940
10933
SND_PCI_QUIRK(0x1043, 0x31d0, "ASUS Zen AIO 27 Z272SD_A272SD", ALC274_FIXUP_ASUS_ZEN_AIO_27),
10941
-
SND_PCI_QUIRK(0x1043, 0x31e1, "ASUS B5605CCA", ALC245_FIXUP_CS35L41_SPI_2),
10942
-
SND_PCI_QUIRK(0x1043, 0x31f1, "ASUS B3605CCA", ALC245_FIXUP_CS35L41_SPI_2),
10934
+
SND_PCI_QUIRK(0x1043, 0x31e1, "ASUS B5605CCA", ALC294_FIXUP_ASUS_CS35L41_SPI_2),
10935
+
SND_PCI_QUIRK(0x1043, 0x31f1, "ASUS B3605CCA", ALC294_FIXUP_ASUS_CS35L41_SPI_2),
10943
10936
SND_PCI_QUIRK(0x1043, 0x3a20, "ASUS G614JZR", ALC285_FIXUP_ASUS_SPI_REAR_SPEAKERS),
10944
10937
SND_PCI_QUIRK(0x1043, 0x3a30, "ASUS G814JVR/JIR", ALC285_FIXUP_ASUS_SPI_REAR_SPEAKERS),
10945
10938
SND_PCI_QUIRK(0x1043, 0x3a40, "ASUS G814JZR", ALC285_FIXUP_ASUS_SPI_REAR_SPEAKERS),
+1
-2
sound/pci/hda/tas2781_hda_spi.c
+1
-2
sound/pci/hda/tas2781_hda_spi.c
+10
sound/soc/codecs/aw88081.c
+10
sound/soc/codecs/aw88081.c
···
1295
1295
aw88081_dai, ARRAY_SIZE(aw88081_dai));
1296
1296
}
1297
1297
1298
+
#if defined(CONFIG_OF)
1299
+
static const struct of_device_id aw88081_of_match[] = {
1300
+
{ .compatible = "awinic,aw88081" },
1301
+
{ .compatible = "awinic,aw88083" },
1302
+
{ }
1303
+
};
1304
+
MODULE_DEVICE_TABLE(of, aw88081_of_match);
1305
+
#endif
1306
+
1298
1307
static struct i2c_driver aw88081_i2c_driver = {
1299
1308
.driver = {
1300
1309
.name = AW88081_I2C_NAME,
1310
+
.of_match_table = of_match_ptr(aw88081_of_match),
1301
1311
},
1302
1312
.probe = aw88081_i2c_probe,
1303
1313
.id_table = aw88081_i2c_id,
+3
sound/soc/codecs/cs42l43-jack.c
+3
sound/soc/codecs/cs42l43-jack.c
···
702
702
CS42L43_PGA_WIDESWING_MODE_EN_MASK, 0);
703
703
regmap_update_bits(cs42l43->regmap, CS42L43_STEREO_MIC_CTRL,
704
704
CS42L43_JACK_STEREO_CONFIG_MASK, 0);
705
+
regmap_update_bits(cs42l43->regmap, CS42L43_STEREO_MIC_CLAMP_CTRL,
706
+
CS42L43_SMIC_HPAMP_CLAMP_DIS_FRC_MASK,
707
+
CS42L43_SMIC_HPAMP_CLAMP_DIS_FRC_MASK);
705
708
regmap_update_bits(cs42l43->regmap, CS42L43_HS2,
706
709
CS42L43_HSDET_MODE_MASK | CS42L43_HSDET_MANUAL_MODE_MASK,
707
710
0x2 << CS42L43_HSDET_MODE_SHIFT);
+19
-3
sound/soc/codecs/hdmi-codec.c
+19
-3
sound/soc/codecs/hdmi-codec.c
···
842
842
static int hdmi_dai_proc_new(struct hdmi_codec_priv *hcp,
843
843
struct snd_soc_dai *dai)
844
844
{
845
+
struct snd_soc_component *component = dai->component;
846
+
struct snd_soc_card *card = component->card;
847
+
struct snd_soc_dai *d;
848
+
struct snd_soc_pcm_runtime *rtd;
845
849
struct snd_info_entry *entry;
846
850
char name[32];
847
-
int err;
851
+
int err, i, id = 0;
848
852
849
-
snprintf(name, sizeof(name), "eld#%d", dai->id);
850
-
err = snd_card_proc_new(dai->component->card->snd_card, name, &entry);
853
+
/*
854
+
* To avoid duplicate proc entry, find its rtd and use rtd->id
855
+
* instead of dai->id
856
+
*/
857
+
for_each_card_rtds(card, rtd) {
858
+
for_each_rtd_dais(rtd, i, d)
859
+
if (d == dai) {
860
+
id = rtd->id;
861
+
goto found;
862
+
}
863
+
}
864
+
found:
865
+
snprintf(name, sizeof(name), "eld#%d", id);
866
+
err = snd_card_proc_new(card->snd_card, name, &entry);
851
867
if (err < 0)
852
868
return err;
853
869
+95
-44
sound/soc/codecs/lpass-wsa-macro.c
+95
-44
sound/soc/codecs/lpass-wsa-macro.c
···
63
63
#define CDC_WSA_TX_SPKR_PROT_CLK_DISABLE 0
64
64
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK GENMASK(3, 0)
65
65
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K 0
66
+
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_16K 1
67
+
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_24K 2
68
+
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_32K 3
69
+
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_48K 4
66
70
#define CDC_WSA_TX0_SPKR_PROT_PATH_CFG0 (0x0248)
67
71
#define CDC_WSA_TX1_SPKR_PROT_PATH_CTL (0x0264)
68
72
#define CDC_WSA_TX1_SPKR_PROT_PATH_CFG0 (0x0268)
···
411
407
int ear_spkr_gain;
412
408
int spkr_gain_offset;
413
409
int spkr_mode;
410
+
u32 pcm_rate_vi;
414
411
int is_softclip_on[WSA_MACRO_SOFTCLIP_MAX];
415
412
int softclip_clk_users[WSA_MACRO_SOFTCLIP_MAX];
416
413
struct regmap *regmap;
···
1285
1280
struct snd_soc_dai *dai)
1286
1281
{
1287
1282
struct snd_soc_component *component = dai->component;
1283
+
struct wsa_macro *wsa = snd_soc_component_get_drvdata(component);
1288
1284
int ret;
1289
1285
1290
1286
switch (substream->stream) {
···
1297
1291
__func__, params_rate(params));
1298
1292
return ret;
1299
1293
}
1294
+
break;
1295
+
case SNDRV_PCM_STREAM_CAPTURE:
1296
+
if (dai->id == WSA_MACRO_AIF_VI)
1297
+
wsa->pcm_rate_vi = params_rate(params);
1298
+
1300
1299
break;
1301
1300
default:
1302
1301
break;
···
1459
1448
}
1460
1449
}
1461
1450
1451
+
static void wsa_macro_enable_disable_vi_sense(struct snd_soc_component *component, bool enable,
1452
+
u32 tx_reg0, u32 tx_reg1, u32 val)
1453
+
{
1454
+
if (enable) {
1455
+
/* Enable V&I sensing */
1456
+
snd_soc_component_update_bits(component, tx_reg0,
1457
+
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1458
+
CDC_WSA_TX_SPKR_PROT_RESET);
1459
+
snd_soc_component_update_bits(component, tx_reg1,
1460
+
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1461
+
CDC_WSA_TX_SPKR_PROT_RESET);
1462
+
snd_soc_component_update_bits(component, tx_reg0,
1463
+
CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK,
1464
+
val);
1465
+
snd_soc_component_update_bits(component, tx_reg1,
1466
+
CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK,
1467
+
val);
1468
+
snd_soc_component_update_bits(component, tx_reg0,
1469
+
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
1470
+
CDC_WSA_TX_SPKR_PROT_CLK_ENABLE);
1471
+
snd_soc_component_update_bits(component, tx_reg1,
1472
+
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
1473
+
CDC_WSA_TX_SPKR_PROT_CLK_ENABLE);
1474
+
snd_soc_component_update_bits(component, tx_reg0,
1475
+
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1476
+
CDC_WSA_TX_SPKR_PROT_NO_RESET);
1477
+
snd_soc_component_update_bits(component, tx_reg1,
1478
+
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1479
+
CDC_WSA_TX_SPKR_PROT_NO_RESET);
1480
+
} else {
1481
+
snd_soc_component_update_bits(component, tx_reg0,
1482
+
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1483
+
CDC_WSA_TX_SPKR_PROT_RESET);
1484
+
snd_soc_component_update_bits(component, tx_reg1,
1485
+
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1486
+
CDC_WSA_TX_SPKR_PROT_RESET);
1487
+
snd_soc_component_update_bits(component, tx_reg0,
1488
+
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
1489
+
CDC_WSA_TX_SPKR_PROT_CLK_DISABLE);
1490
+
snd_soc_component_update_bits(component, tx_reg1,
1491
+
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
1492
+
CDC_WSA_TX_SPKR_PROT_CLK_DISABLE);
1493
+
}
1494
+
}
1495
+
1496
+
static void wsa_macro_enable_disable_vi_feedback(struct snd_soc_component *component,
1497
+
bool enable, u32 rate)
1498
+
{
1499
+
struct wsa_macro *wsa = snd_soc_component_get_drvdata(component);
1500
+
1501
+
if (test_bit(WSA_MACRO_TX0, &wsa->active_ch_mask[WSA_MACRO_AIF_VI]))
1502
+
wsa_macro_enable_disable_vi_sense(component, enable,
1503
+
CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
1504
+
CDC_WSA_TX1_SPKR_PROT_PATH_CTL, rate);
1505
+
1506
+
if (test_bit(WSA_MACRO_TX1, &wsa->active_ch_mask[WSA_MACRO_AIF_VI]))
1507
+
wsa_macro_enable_disable_vi_sense(component, enable,
1508
+
CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
1509
+
CDC_WSA_TX3_SPKR_PROT_PATH_CTL, rate);
1510
+
}
1511
+
1462
1512
static int wsa_macro_mclk_event(struct snd_soc_dapm_widget *w,
1463
1513
struct snd_kcontrol *kcontrol, int event)
1464
1514
{
···
1536
1464
{
1537
1465
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1538
1466
struct wsa_macro *wsa = snd_soc_component_get_drvdata(component);
1539
-
u32 tx_reg0, tx_reg1;
1467
+
u32 rate_val;
1540
1468
1541
-
if (test_bit(WSA_MACRO_TX0, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) {
1542
-
tx_reg0 = CDC_WSA_TX0_SPKR_PROT_PATH_CTL;
1543
-
tx_reg1 = CDC_WSA_TX1_SPKR_PROT_PATH_CTL;
1544
-
} else if (test_bit(WSA_MACRO_TX1, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) {
1545
-
tx_reg0 = CDC_WSA_TX2_SPKR_PROT_PATH_CTL;
1546
-
tx_reg1 = CDC_WSA_TX3_SPKR_PROT_PATH_CTL;
1469
+
switch (wsa->pcm_rate_vi) {
1470
+
case 8000:
1471
+
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K;
1472
+
break;
1473
+
case 16000:
1474
+
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_16K;
1475
+
break;
1476
+
case 24000:
1477
+
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_24K;
1478
+
break;
1479
+
case 32000:
1480
+
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_32K;
1481
+
break;
1482
+
case 48000:
1483
+
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_48K;
1484
+
break;
1485
+
default:
1486
+
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K;
1487
+
break;
1547
1488
}
1548
1489
1549
1490
switch (event) {
1550
1491
case SND_SOC_DAPM_POST_PMU:
1551
-
/* Enable V&I sensing */
1552
-
snd_soc_component_update_bits(component, tx_reg0,
1553
-
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1554
-
CDC_WSA_TX_SPKR_PROT_RESET);
1555
-
snd_soc_component_update_bits(component, tx_reg1,
1556
-
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1557
-
CDC_WSA_TX_SPKR_PROT_RESET);
1558
-
snd_soc_component_update_bits(component, tx_reg0,
1559
-
CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK,
1560
-
CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K);
1561
-
snd_soc_component_update_bits(component, tx_reg1,
1562
-
CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK,
1563
-
CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K);
1564
-
snd_soc_component_update_bits(component, tx_reg0,
1565
-
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
1566
-
CDC_WSA_TX_SPKR_PROT_CLK_ENABLE);
1567
-
snd_soc_component_update_bits(component, tx_reg1,
1568
-
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
1569
-
CDC_WSA_TX_SPKR_PROT_CLK_ENABLE);
1570
-
snd_soc_component_update_bits(component, tx_reg0,
1571
-
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1572
-
CDC_WSA_TX_SPKR_PROT_NO_RESET);
1573
-
snd_soc_component_update_bits(component, tx_reg1,
1574
-
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1575
-
CDC_WSA_TX_SPKR_PROT_NO_RESET);
1492
+
/* Enable V&I sensing */
1493
+
wsa_macro_enable_disable_vi_feedback(component, true, rate_val);
1576
1494
break;
1577
1495
case SND_SOC_DAPM_POST_PMD:
1578
1496
/* Disable V&I sensing */
1579
-
snd_soc_component_update_bits(component, tx_reg0,
1580
-
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1581
-
CDC_WSA_TX_SPKR_PROT_RESET);
1582
-
snd_soc_component_update_bits(component, tx_reg1,
1583
-
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
1584
-
CDC_WSA_TX_SPKR_PROT_RESET);
1585
-
snd_soc_component_update_bits(component, tx_reg0,
1586
-
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
1587
-
CDC_WSA_TX_SPKR_PROT_CLK_DISABLE);
1588
-
snd_soc_component_update_bits(component, tx_reg1,
1589
-
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
1590
-
CDC_WSA_TX_SPKR_PROT_CLK_DISABLE);
1497
+
wsa_macro_enable_disable_vi_feedback(component, false, rate_val);
1591
1498
break;
1592
1499
}
1593
1500
+6
-7
sound/soc/dwc/dwc-i2s.c
+6
-7
sound/soc/dwc/dwc-i2s.c
···
199
199
else
200
200
i2s_write_reg(dev->i2s_base, IRER, 1);
201
201
202
-
/* I2S needs to enable IRQ to make a handshake with DMAC on the JH7110 SoC */
203
-
if (dev->use_pio || dev->is_jh7110)
204
-
i2s_enable_irqs(dev, substream->stream, config->chan_nr);
205
-
else
202
+
if (!(dev->use_pio || dev->is_jh7110))
206
203
i2s_enable_dma(dev, substream->stream);
207
204
205
+
i2s_enable_irqs(dev, substream->stream, config->chan_nr);
208
206
i2s_write_reg(dev->i2s_base, CER, 1);
209
207
}
210
208
···
216
218
else
217
219
i2s_write_reg(dev->i2s_base, IRER, 0);
218
220
219
-
if (dev->use_pio || dev->is_jh7110)
220
-
i2s_disable_irqs(dev, substream->stream, 8);
221
-
else
221
+
if (!(dev->use_pio || dev->is_jh7110))
222
222
i2s_disable_dma(dev, substream->stream);
223
+
224
+
i2s_disable_irqs(dev, substream->stream, 8);
225
+
223
226
224
227
if (!dev->active) {
225
228
i2s_write_reg(dev->i2s_base, CER, 0);
+14
-1
sound/soc/fsl/fsl_asrc_dma.c
+14
-1
sound/soc/fsl/fsl_asrc_dma.c
···
156
156
for_each_dpcm_be(rtd, stream, dpcm) {
157
157
struct snd_soc_pcm_runtime *be = dpcm->be;
158
158
struct snd_pcm_substream *substream_be;
159
-
struct snd_soc_dai *dai = snd_soc_rtd_to_cpu(be, 0);
159
+
struct snd_soc_dai *dai_cpu = snd_soc_rtd_to_cpu(be, 0);
160
+
struct snd_soc_dai *dai_codec = snd_soc_rtd_to_codec(be, 0);
161
+
struct snd_soc_dai *dai;
160
162
161
163
if (dpcm->fe != rtd)
162
164
continue;
165
+
166
+
/*
167
+
* With audio graph card, original cpu dai is changed to codec
168
+
* device in backend, so if cpu dai is dummy device in backend,
169
+
* get the codec dai device, which is the real hardware device
170
+
* connected.
171
+
*/
172
+
if (!snd_soc_dai_is_dummy(dai_cpu))
173
+
dai = dai_cpu;
174
+
else
175
+
dai = dai_codec;
163
176
164
177
substream_be = snd_soc_dpcm_get_substream(be, stream);
165
178
dma_params_be = snd_soc_dai_get_dma_data(dai, substream_be);
+3
sound/soc/fsl/fsl_qmc_audio.c
+3
sound/soc/fsl/fsl_qmc_audio.c
···
250
250
switch (cmd) {
251
251
case SNDRV_PCM_TRIGGER_START:
252
252
bitmap_zero(prtd->chans_pending, 64);
253
+
prtd->buffer_ended = 0;
254
+
prtd->ch_dma_addr_current = prtd->ch_dma_addr_start;
255
+
253
256
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
254
257
for (i = 0; i < prtd->channels; i++)
255
258
prtd->qmc_dai->chans[i].prtd_tx = prtd;
+72
sound/soc/intel/avs/path.c
+72
sound/soc/intel/avs/path.c
···
115
115
return NULL;
116
116
}
117
117
118
+
static struct acpi_nhlt_config *
119
+
avs_nhlt_config_or_default(struct avs_dev *adev, struct avs_tplg_module *t);
120
+
121
+
int avs_path_set_constraint(struct avs_dev *adev, struct avs_tplg_path_template *template,
122
+
struct snd_pcm_hw_constraint_list *rate_list,
123
+
struct snd_pcm_hw_constraint_list *channels_list,
124
+
struct snd_pcm_hw_constraint_list *sample_bits_list)
125
+
{
126
+
struct avs_tplg_path *path_template;
127
+
unsigned int *rlist, *clist, *slist;
128
+
size_t i;
129
+
130
+
i = 0;
131
+
list_for_each_entry(path_template, &template->path_list, node)
132
+
i++;
133
+
134
+
rlist = kcalloc(i, sizeof(rlist), GFP_KERNEL);
135
+
clist = kcalloc(i, sizeof(clist), GFP_KERNEL);
136
+
slist = kcalloc(i, sizeof(slist), GFP_KERNEL);
137
+
138
+
i = 0;
139
+
list_for_each_entry(path_template, &template->path_list, node) {
140
+
struct avs_tplg_pipeline *pipeline_template;
141
+
142
+
list_for_each_entry(pipeline_template, &path_template->ppl_list, node) {
143
+
struct avs_tplg_module *module_template;
144
+
145
+
list_for_each_entry(module_template, &pipeline_template->mod_list, node) {
146
+
const guid_t *type = &module_template->cfg_ext->type;
147
+
struct acpi_nhlt_config *blob;
148
+
149
+
if (!guid_equal(type, &AVS_COPIER_MOD_UUID) &&
150
+
!guid_equal(type, &AVS_WOVHOSTM_MOD_UUID))
151
+
continue;
152
+
153
+
switch (module_template->cfg_ext->copier.dma_type) {
154
+
case AVS_DMA_DMIC_LINK_INPUT:
155
+
case AVS_DMA_I2S_LINK_OUTPUT:
156
+
case AVS_DMA_I2S_LINK_INPUT:
157
+
break;
158
+
default:
159
+
continue;
160
+
}
161
+
162
+
blob = avs_nhlt_config_or_default(adev, module_template);
163
+
if (IS_ERR(blob))
164
+
continue;
165
+
166
+
rlist[i] = path_template->fe_fmt->sampling_freq;
167
+
clist[i] = path_template->fe_fmt->num_channels;
168
+
slist[i] = path_template->fe_fmt->bit_depth;
169
+
i++;
170
+
}
171
+
}
172
+
}
173
+
174
+
if (i) {
175
+
rate_list->count = i;
176
+
rate_list->list = rlist;
177
+
channels_list->count = i;
178
+
channels_list->list = clist;
179
+
sample_bits_list->count = i;
180
+
sample_bits_list->list = slist;
181
+
} else {
182
+
kfree(rlist);
183
+
kfree(clist);
184
+
kfree(slist);
185
+
}
186
+
187
+
return i;
188
+
}
189
+
118
190
static void avs_init_node_id(union avs_connector_node_id *node_id,
119
191
struct avs_tplg_modcfg_ext *te, u32 dma_id)
120
192
{
+5
sound/soc/intel/avs/path.h
+5
sound/soc/intel/avs/path.h
···
69
69
int avs_path_pause(struct avs_path *path);
70
70
int avs_path_run(struct avs_path *path, int trigger);
71
71
72
+
int avs_path_set_constraint(struct avs_dev *adev, struct avs_tplg_path_template *template,
73
+
struct snd_pcm_hw_constraint_list *rate_list,
74
+
struct snd_pcm_hw_constraint_list *channels_list,
75
+
struct snd_pcm_hw_constraint_list *sample_bits_list);
76
+
72
77
int avs_peakvol_set_volume(struct avs_dev *adev, struct avs_path_module *mod,
73
78
struct soc_mixer_control *mc, long *input);
74
79
int avs_peakvol_set_mute(struct avs_dev *adev, struct avs_path_module *mod,
+50
-2
sound/soc/intel/avs/pcm.c
+50
-2
sound/soc/intel/avs/pcm.c
···
31
31
struct hdac_ext_stream *host_stream;
32
32
};
33
33
34
+
struct snd_pcm_hw_constraint_list rate_list;
35
+
struct snd_pcm_hw_constraint_list channels_list;
36
+
struct snd_pcm_hw_constraint_list sample_bits_list;
37
+
34
38
struct work_struct period_elapsed_work;
35
39
struct snd_pcm_substream *substream;
36
40
};
···
78
74
schedule_work(&data->period_elapsed_work);
79
75
}
80
76
77
+
static int hw_rule_param_size(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule);
78
+
static int avs_hw_constraints_init(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
79
+
{
80
+
struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
81
+
struct snd_pcm_runtime *runtime = substream->runtime;
82
+
struct snd_pcm_hw_constraint_list *r, *c, *s;
83
+
struct avs_tplg_path_template *template;
84
+
struct avs_dma_data *data;
85
+
int ret;
86
+
87
+
ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
88
+
if (ret < 0)
89
+
return ret;
90
+
91
+
data = snd_soc_dai_get_dma_data(dai, substream);
92
+
r = &(data->rate_list);
93
+
c = &(data->channels_list);
94
+
s = &(data->sample_bits_list);
95
+
96
+
template = avs_dai_find_path_template(dai, !rtd->dai_link->no_pcm, substream->stream);
97
+
ret = avs_path_set_constraint(data->adev, template, r, c, s);
98
+
if (ret <= 0)
99
+
return ret;
100
+
101
+
ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, r);
102
+
if (ret < 0)
103
+
return ret;
104
+
105
+
ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, c);
106
+
if (ret < 0)
107
+
return ret;
108
+
109
+
ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_SAMPLE_BITS, s);
110
+
if (ret < 0)
111
+
return ret;
112
+
113
+
return 0;
114
+
}
115
+
81
116
static int avs_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
82
117
{
83
118
struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
···
144
101
if (rtd->dai_link->ignore_suspend)
145
102
adev->num_lp_paths++;
146
103
147
-
return 0;
104
+
return avs_hw_constraints_init(substream, dai);
148
105
}
149
106
150
107
static void avs_dai_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
···
156
113
157
114
if (rtd->dai_link->ignore_suspend)
158
115
data->adev->num_lp_paths--;
116
+
117
+
kfree(data->rate_list.list);
118
+
kfree(data->channels_list.list);
119
+
kfree(data->sample_bits_list.list);
159
120
160
121
snd_soc_dai_set_dma_data(dai, substream, NULL);
161
122
kfree(data);
···
974
927
else
975
928
mach->tplg_filename = devm_kasprintf(adev->dev, GFP_KERNEL,
976
929
"hda-generic-tplg.bin");
977
-
930
+
if (!mach->tplg_filename)
931
+
return -ENOMEM;
978
932
filename = kasprintf(GFP_KERNEL, "%s/%s", component->driver->topology_name_prefix,
979
933
mach->tplg_filename);
980
934
if (!filename)
+1
sound/soc/intel/boards/sof_sdw.c
+1
sound/soc/intel/boards/sof_sdw.c
+2
-1
sound/soc/qcom/lpass.h
+2
-1
sound/soc/qcom/lpass.h
···
13
13
#include <linux/platform_device.h>
14
14
#include <linux/regmap.h>
15
15
#include <dt-bindings/sound/qcom,lpass.h>
16
+
#include <dt-bindings/sound/qcom,q6afe.h>
16
17
#include "lpass-hdmi.h"
17
18
18
19
#define LPASS_AHBIX_CLOCK_FREQUENCY 131072000
19
-
#define LPASS_MAX_PORTS (LPASS_CDC_DMA_VA_TX8 + 1)
20
+
#define LPASS_MAX_PORTS (DISPLAY_PORT_RX_7 + 1)
20
21
#define LPASS_MAX_MI2S_PORTS (8)
21
22
#define LPASS_MAX_DMA_CHANNELS (8)
22
23
#define LPASS_MAX_HDMI_DMA_CHANNELS (4)
+2
-3
tools/arch/arm64/include/uapi/asm/kvm.h
+2
-3
tools/arch/arm64/include/uapi/asm/kvm.h
···
43
43
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
44
44
#define KVM_DIRTY_LOG_PAGE_OFFSET 64
45
45
46
-
#define KVM_REG_SIZE(id) \
47
-
(1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
48
-
49
46
struct kvm_regs {
50
47
struct user_pt_regs regs; /* sp = sp_el0 */
51
48
···
105
108
#define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 /* VCPU uses address authentication */
106
109
#define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 /* VCPU uses generic authentication */
107
110
#define KVM_ARM_VCPU_HAS_EL2 7 /* Support nested virtualization */
111
+
#define KVM_ARM_VCPU_HAS_EL2_E2H0 8 /* Limit NV support to E2H RES0 */
108
112
109
113
struct kvm_vcpu_init {
110
114
__u32 target;
···
416
418
#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6
417
419
#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7
418
420
#define KVM_DEV_ARM_VGIC_GRP_ITS_REGS 8
421
+
#define KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ 9
419
422
#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10
420
423
#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \
421
424
(0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)
+1
-23
tools/arch/arm64/include/uapi/asm/unistd.h
+1
-23
tools/arch/arm64/include/uapi/asm/unistd.h
···
1
1
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2
-
/*
3
-
* Copyright (C) 2012 ARM Ltd.
4
-
*
5
-
* This program is free software; you can redistribute it and/or modify
6
-
* it under the terms of the GNU General Public License version 2 as
7
-
* published by the Free Software Foundation.
8
-
*
9
-
* This program is distributed in the hope that it will be useful,
10
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
-
* GNU General Public License for more details.
13
-
*
14
-
* You should have received a copy of the GNU General Public License
15
-
* along with this program. If not, see <http://www.gnu.org/licenses/>.
16
-
*/
17
-
18
-
#define __ARCH_WANT_RENAMEAT
19
-
#define __ARCH_WANT_NEW_STAT
20
-
#define __ARCH_WANT_SET_GET_RLIMIT
21
-
#define __ARCH_WANT_TIME32_SYSCALLS
22
-
#define __ARCH_WANT_MEMFD_SECRET
23
-
24
-
#include <asm-generic/unistd.h>
2
+
#include <asm/unistd_64.h>
+20
-8
tools/arch/x86/include/asm/cpufeatures.h
+20
-8
tools/arch/x86/include/asm/cpufeatures.h
···
75
75
#define X86_FEATURE_CENTAUR_MCR ( 3*32+ 3) /* "centaur_mcr" Centaur MCRs (= MTRRs) */
76
76
#define X86_FEATURE_K8 ( 3*32+ 4) /* Opteron, Athlon64 */
77
77
#define X86_FEATURE_ZEN5 ( 3*32+ 5) /* CPU based on Zen5 microarchitecture */
78
-
#define X86_FEATURE_P3 ( 3*32+ 6) /* P3 */
79
-
#define X86_FEATURE_P4 ( 3*32+ 7) /* P4 */
78
+
/* Free ( 3*32+ 6) */
79
+
/* Free ( 3*32+ 7) */
80
80
#define X86_FEATURE_CONSTANT_TSC ( 3*32+ 8) /* "constant_tsc" TSC ticks at a constant rate */
81
81
#define X86_FEATURE_UP ( 3*32+ 9) /* "up" SMP kernel running on UP */
82
82
#define X86_FEATURE_ART ( 3*32+10) /* "art" Always running timer (ART) */
···
329
329
#define X86_FEATURE_CLZERO (13*32+ 0) /* "clzero" CLZERO instruction */
330
330
#define X86_FEATURE_IRPERF (13*32+ 1) /* "irperf" Instructions Retired Count */
331
331
#define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* "xsaveerptr" Always save/restore FP error pointers */
332
+
#define X86_FEATURE_INVLPGB (13*32+ 3) /* INVLPGB and TLBSYNC instructions supported */
332
333
#define X86_FEATURE_RDPRU (13*32+ 4) /* "rdpru" Read processor register at user level */
333
334
#define X86_FEATURE_WBNOINVD (13*32+ 9) /* "wbnoinvd" WBNOINVD instruction */
334
335
#define X86_FEATURE_AMD_IBPB (13*32+12) /* Indirect Branch Prediction Barrier */
···
378
377
#define X86_FEATURE_V_SPEC_CTRL (15*32+20) /* "v_spec_ctrl" Virtual SPEC_CTRL */
379
378
#define X86_FEATURE_VNMI (15*32+25) /* "vnmi" Virtual NMI */
380
379
#define X86_FEATURE_SVME_ADDR_CHK (15*32+28) /* SVME addr check */
380
+
#define X86_FEATURE_IDLE_HLT (15*32+30) /* IDLE HLT intercept */
381
381
382
382
/* Intel-defined CPU features, CPUID level 0x00000007:0 (ECX), word 16 */
383
383
#define X86_FEATURE_AVX512VBMI (16*32+ 1) /* "avx512vbmi" AVX512 Vector Bit Manipulation instructions*/
···
436
434
#define X86_FEATURE_SPEC_CTRL_SSBD (18*32+31) /* Speculative Store Bypass Disable */
437
435
438
436
/* AMD-defined memory encryption features, CPUID level 0x8000001f (EAX), word 19 */
439
-
#define X86_FEATURE_SME (19*32+ 0) /* "sme" AMD Secure Memory Encryption */
440
-
#define X86_FEATURE_SEV (19*32+ 1) /* "sev" AMD Secure Encrypted Virtualization */
437
+
#define X86_FEATURE_SME (19*32+ 0) /* "sme" Secure Memory Encryption */
438
+
#define X86_FEATURE_SEV (19*32+ 1) /* "sev" Secure Encrypted Virtualization */
441
439
#define X86_FEATURE_VM_PAGE_FLUSH (19*32+ 2) /* VM Page Flush MSR is supported */
442
-
#define X86_FEATURE_SEV_ES (19*32+ 3) /* "sev_es" AMD Secure Encrypted Virtualization - Encrypted State */
443
-
#define X86_FEATURE_SEV_SNP (19*32+ 4) /* "sev_snp" AMD Secure Encrypted Virtualization - Secure Nested Paging */
440
+
#define X86_FEATURE_SEV_ES (19*32+ 3) /* "sev_es" Secure Encrypted Virtualization - Encrypted State */
441
+
#define X86_FEATURE_SEV_SNP (19*32+ 4) /* "sev_snp" Secure Encrypted Virtualization - Secure Nested Paging */
444
442
#define X86_FEATURE_V_TSC_AUX (19*32+ 9) /* Virtual TSC_AUX */
445
-
#define X86_FEATURE_SME_COHERENT (19*32+10) /* AMD hardware-enforced cache coherency */
446
-
#define X86_FEATURE_DEBUG_SWAP (19*32+14) /* "debug_swap" AMD SEV-ES full debug state swap support */
443
+
#define X86_FEATURE_SME_COHERENT (19*32+10) /* hardware-enforced cache coherency */
444
+
#define X86_FEATURE_DEBUG_SWAP (19*32+14) /* "debug_swap" SEV-ES full debug state swap support */
445
+
#define X86_FEATURE_RMPREAD (19*32+21) /* RMPREAD instruction */
446
+
#define X86_FEATURE_SEGMENTED_RMP (19*32+23) /* Segmented RMP support */
447
447
#define X86_FEATURE_SVSM (19*32+28) /* "svsm" SVSM present */
448
+
#define X86_FEATURE_HV_INUSE_WR_ALLOWED (19*32+30) /* Allow Write to in-use hypervisor-owned pages */
448
449
449
450
/* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */
450
451
#define X86_FEATURE_NO_NESTED_DATA_BP (20*32+ 0) /* No Nested Data Breakpoints */
···
460
455
#define X86_FEATURE_SBPB (20*32+27) /* Selective Branch Prediction Barrier */
461
456
#define X86_FEATURE_IBPB_BRTYPE (20*32+28) /* MSR_PRED_CMD[IBPB] flushes all branch type predictions */
462
457
#define X86_FEATURE_SRSO_NO (20*32+29) /* CPU is not affected by SRSO */
458
+
#define X86_FEATURE_SRSO_USER_KERNEL_NO (20*32+30) /* CPU is not affected by SRSO across user/kernel boundaries */
459
+
#define X86_FEATURE_SRSO_BP_SPEC_REDUCE (20*32+31) /*
460
+
* BP_CFG[BpSpecReduce] can be used to mitigate SRSO for VMs.
461
+
* (SRSO_MSR_FIX in the official doc).
462
+
*/
463
463
464
464
/*
465
465
* Extended auxiliary flags: Linux defined - for features scattered in various
···
480
470
#define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* Fast CPPC */
481
471
#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
482
472
#define X86_FEATURE_AMD_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */
473
+
#define X86_FEATURE_PREFER_YMM (21*32 + 8) /* Avoid ZMM registers due to downclocking */
483
474
484
475
/*
485
476
* BUG word(s)
···
532
521
#define X86_BUG_RFDS X86_BUG(1*32 + 2) /* "rfds" CPU is vulnerable to Register File Data Sampling */
533
522
#define X86_BUG_BHI X86_BUG(1*32 + 3) /* "bhi" CPU is affected by Branch History Injection */
534
523
#define X86_BUG_IBPB_NO_RET X86_BUG(1*32 + 4) /* "ibpb_no_ret" IBPB omits return target predictions */
524
+
#define X86_BUG_SPECTRE_V2_USER X86_BUG(1*32 + 5) /* "spectre_v2_user" CPU is affected by Spectre variant 2 attack between user processes */
535
525
#endif /* _ASM_X86_CPUFEATURES_H */
+19
-12
tools/arch/x86/include/asm/msr-index.h
+19
-12
tools/arch/x86/include/asm/msr-index.h
···
397
397
#define MSR_IA32_PASID_VALID BIT_ULL(31)
398
398
399
399
/* DEBUGCTLMSR bits (others vary by model): */
400
-
#define DEBUGCTLMSR_LBR (1UL << 0) /* last branch recording */
400
+
#define DEBUGCTLMSR_LBR_BIT 0 /* last branch recording */
401
+
#define DEBUGCTLMSR_LBR (1UL << DEBUGCTLMSR_LBR_BIT)
401
402
#define DEBUGCTLMSR_BTF_SHIFT 1
402
403
#define DEBUGCTLMSR_BTF (1UL << 1) /* single-step on branches */
403
404
#define DEBUGCTLMSR_BUS_LOCK_DETECT (1UL << 2)
···
611
610
#define MSR_AMD_PERF_CTL 0xc0010062
612
611
#define MSR_AMD_PERF_STATUS 0xc0010063
613
612
#define MSR_AMD_PSTATE_DEF_BASE 0xc0010064
613
+
#define MSR_AMD64_GUEST_TSC_FREQ 0xc0010134
614
614
#define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140
615
615
#define MSR_AMD64_OSVW_STATUS 0xc0010141
616
616
#define MSR_AMD_PPIN_CTL 0xc00102f0
···
648
646
#define MSR_AMD64_IBS_REG_COUNT_MAX 8 /* includes MSR_AMD64_IBSBRTARGET */
649
647
#define MSR_AMD64_SVM_AVIC_DOORBELL 0xc001011b
650
648
#define MSR_AMD64_VM_PAGE_FLUSH 0xc001011e
649
+
#define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f
651
650
#define MSR_AMD64_SEV_ES_GHCB 0xc0010130
652
651
#define MSR_AMD64_SEV 0xc0010131
653
652
#define MSR_AMD64_SEV_ENABLED_BIT 0
···
687
684
#define MSR_AMD64_SNP_SMT_PROT BIT_ULL(MSR_AMD64_SNP_SMT_PROT_BIT)
688
685
#define MSR_AMD64_SNP_RESV_BIT 18
689
686
#define MSR_AMD64_SNP_RESERVED_MASK GENMASK_ULL(63, MSR_AMD64_SNP_RESV_BIT)
690
-
691
-
#define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f
692
-
693
687
#define MSR_AMD64_RMP_BASE 0xc0010132
694
688
#define MSR_AMD64_RMP_END 0xc0010133
689
+
#define MSR_AMD64_RMP_CFG 0xc0010136
690
+
#define MSR_AMD64_SEG_RMP_ENABLED_BIT 0
691
+
#define MSR_AMD64_SEG_RMP_ENABLED BIT_ULL(MSR_AMD64_SEG_RMP_ENABLED_BIT)
692
+
#define MSR_AMD64_RMP_SEGMENT_SHIFT(x) (((x) & GENMASK_ULL(13, 8)) >> 8)
695
693
696
694
#define MSR_SVSM_CAA 0xc001f000
697
695
···
703
699
#define MSR_AMD_CPPC_REQ 0xc00102b3
704
700
#define MSR_AMD_CPPC_STATUS 0xc00102b4
705
701
706
-
#define AMD_CPPC_LOWEST_PERF(x) (((x) >> 0) & 0xff)
707
-
#define AMD_CPPC_LOWNONLIN_PERF(x) (((x) >> 8) & 0xff)
708
-
#define AMD_CPPC_NOMINAL_PERF(x) (((x) >> 16) & 0xff)
709
-
#define AMD_CPPC_HIGHEST_PERF(x) (((x) >> 24) & 0xff)
702
+
/* Masks for use with MSR_AMD_CPPC_CAP1 */
703
+
#define AMD_CPPC_LOWEST_PERF_MASK GENMASK(7, 0)
704
+
#define AMD_CPPC_LOWNONLIN_PERF_MASK GENMASK(15, 8)
705
+
#define AMD_CPPC_NOMINAL_PERF_MASK GENMASK(23, 16)
706
+
#define AMD_CPPC_HIGHEST_PERF_MASK GENMASK(31, 24)
710
707
711
-
#define AMD_CPPC_MAX_PERF(x) (((x) & 0xff) << 0)
712
-
#define AMD_CPPC_MIN_PERF(x) (((x) & 0xff) << 8)
713
-
#define AMD_CPPC_DES_PERF(x) (((x) & 0xff) << 16)
714
-
#define AMD_CPPC_ENERGY_PERF_PREF(x) (((x) & 0xff) << 24)
708
+
/* Masks for use with MSR_AMD_CPPC_REQ */
709
+
#define AMD_CPPC_MAX_PERF_MASK GENMASK(7, 0)
710
+
#define AMD_CPPC_MIN_PERF_MASK GENMASK(15, 8)
711
+
#define AMD_CPPC_DES_PERF_MASK GENMASK(23, 16)
712
+
#define AMD_CPPC_EPP_PERF_MASK GENMASK(31, 24)
715
713
716
714
/* AMD Performance Counter Global Status and Control MSRs */
717
715
#define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS 0xc0000300
···
725
719
726
720
/* Zen4 */
727
721
#define MSR_ZEN4_BP_CFG 0xc001102e
722
+
#define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4
728
723
#define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
729
724
730
725
/* Fam 19h MSRs */
+4
tools/arch/x86/include/uapi/asm/kvm.h
+4
tools/arch/x86/include/uapi/asm/kvm.h
···
559
559
#define KVM_XEN_HVM_CONFIG_PVCLOCK_TSC_UNSTABLE (1 << 7)
560
560
#define KVM_XEN_HVM_CONFIG_SHARED_INFO_HVA (1 << 8)
561
561
562
+
#define KVM_XEN_MSR_MIN_INDEX 0x40000000u
563
+
#define KVM_XEN_MSR_MAX_INDEX 0x4fffffffu
564
+
562
565
struct kvm_xen_hvm_config {
563
566
__u32 flags;
564
567
__u32 msr;
···
928
925
#define KVM_X86_SEV_VM 2
929
926
#define KVM_X86_SEV_ES_VM 3
930
927
#define KVM_X86_SNP_VM 4
928
+
#define KVM_X86_TDX_VM 5
931
929
932
930
#endif /* _ASM_X86_KVM_H */
+2
tools/arch/x86/include/uapi/asm/svm.h
+2
tools/arch/x86/include/uapi/asm/svm.h
···
95
95
#define SVM_EXIT_CR14_WRITE_TRAP 0x09e
96
96
#define SVM_EXIT_CR15_WRITE_TRAP 0x09f
97
97
#define SVM_EXIT_INVPCID 0x0a2
98
+
#define SVM_EXIT_IDLE_HLT 0x0a6
98
99
#define SVM_EXIT_NPF 0x400
99
100
#define SVM_EXIT_AVIC_INCOMPLETE_IPI 0x401
100
101
#define SVM_EXIT_AVIC_UNACCELERATED_ACCESS 0x402
···
225
224
{ SVM_EXIT_CR4_WRITE_TRAP, "write_cr4_trap" }, \
226
225
{ SVM_EXIT_CR8_WRITE_TRAP, "write_cr8_trap" }, \
227
226
{ SVM_EXIT_INVPCID, "invpcid" }, \
227
+
{ SVM_EXIT_IDLE_HLT, "idle-halt" }, \
228
228
{ SVM_EXIT_NPF, "npf" }, \
229
229
{ SVM_EXIT_AVIC_INCOMPLETE_IPI, "avic_incomplete_ipi" }, \
230
230
{ SVM_EXIT_AVIC_UNACCELERATED_ACCESS, "avic_unaccelerated_access" }, \
+2
-1
tools/arch/x86/lib/memset_64.S
+2
-1
tools/arch/x86/lib/memset_64.S
···
3
3
4
4
#include <linux/export.h>
5
5
#include <linux/linkage.h>
6
+
#include <linux/cfi_types.h>
6
7
#include <asm/cpufeatures.h>
7
8
#include <asm/alternative.h>
8
9
···
29
28
* only for the return value that is the same as the source input,
30
29
* which the compiler could/should do much better anyway.
31
30
*/
32
-
SYM_FUNC_START(__memset)
31
+
SYM_TYPED_FUNC_START(__memset)
33
32
ALTERNATIVE "jmp memset_orig", "", X86_FEATURE_FSRS
34
33
35
34
movq %rdi,%r9
+45
tools/include/linux/cfi_types.h
+45
tools/include/linux/cfi_types.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/*
3
+
* Clang Control Flow Integrity (CFI) type definitions.
4
+
*/
5
+
#ifndef _LINUX_CFI_TYPES_H
6
+
#define _LINUX_CFI_TYPES_H
7
+
8
+
#ifdef __ASSEMBLY__
9
+
#include <linux/linkage.h>
10
+
11
+
#ifdef CONFIG_CFI_CLANG
12
+
/*
13
+
* Use the __kcfi_typeid_<function> type identifier symbol to
14
+
* annotate indirectly called assembly functions. The compiler emits
15
+
* these symbols for all address-taken function declarations in C
16
+
* code.
17
+
*/
18
+
#ifndef __CFI_TYPE
19
+
#define __CFI_TYPE(name) \
20
+
.4byte __kcfi_typeid_##name
21
+
#endif
22
+
23
+
#define SYM_TYPED_ENTRY(name, linkage, align...) \
24
+
linkage(name) ASM_NL \
25
+
align ASM_NL \
26
+
__CFI_TYPE(name) ASM_NL \
27
+
name:
28
+
29
+
#define SYM_TYPED_START(name, linkage, align...) \
30
+
SYM_TYPED_ENTRY(name, linkage, align)
31
+
32
+
#else /* CONFIG_CFI_CLANG */
33
+
34
+
#define SYM_TYPED_START(name, linkage, align...) \
35
+
SYM_START(name, linkage, align)
36
+
37
+
#endif /* CONFIG_CFI_CLANG */
38
+
39
+
#ifndef SYM_TYPED_FUNC_START
40
+
#define SYM_TYPED_FUNC_START(name) \
41
+
SYM_TYPED_START(name, SYM_L_GLOBAL, SYM_A_ALIGN)
42
+
#endif
43
+
44
+
#endif /* __ASSEMBLY__ */
45
+
#endif /* _LINUX_CFI_TYPES_H */
+1
tools/include/uapi/asm-generic/mman-common.h
+1
tools/include/uapi/asm-generic/mman-common.h
+3
-1
tools/include/uapi/asm-generic/unistd.h
+3
-1
tools/include/uapi/asm-generic/unistd.h
···
849
849
__SYSCALL(__NR_listxattrat, sys_listxattrat)
850
850
#define __NR_removexattrat 466
851
851
__SYSCALL(__NR_removexattrat, sys_removexattrat)
852
+
#define __NR_open_tree_attr 467
853
+
__SYSCALL(__NR_open_tree_attr, sys_open_tree_attr)
852
854
853
855
#undef __NR_syscalls
854
-
#define __NR_syscalls 467
856
+
#define __NR_syscalls 468
855
857
856
858
/*
857
859
* 32 bit systems traditionally used different
+2
tools/include/uapi/linux/in.h
+2
tools/include/uapi/linux/in.h
···
79
79
#define IPPROTO_MPLS IPPROTO_MPLS
80
80
IPPROTO_ETHERNET = 143, /* Ethernet-within-IPv6 Encapsulation */
81
81
#define IPPROTO_ETHERNET IPPROTO_ETHERNET
82
+
IPPROTO_AGGFRAG = 144, /* AGGFRAG in ESP (RFC 9347) */
83
+
#define IPPROTO_AGGFRAG IPPROTO_AGGFRAG
82
84
IPPROTO_RAW = 255, /* Raw IP packets */
83
85
#define IPPROTO_RAW IPPROTO_RAW
84
86
IPPROTO_SMC = 256, /* Shared Memory Communications */
+5
-4
tools/include/uapi/linux/kvm.h
+5
-4
tools/include/uapi/linux/kvm.h
···
617
617
#define KVM_X86_DISABLE_EXITS_HLT (1 << 1)
618
618
#define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2)
619
619
#define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3)
620
-
#define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \
621
-
KVM_X86_DISABLE_EXITS_HLT | \
622
-
KVM_X86_DISABLE_EXITS_PAUSE | \
623
-
KVM_X86_DISABLE_EXITS_CSTATE)
624
620
625
621
/* for KVM_ENABLE_CAP */
626
622
struct kvm_enable_cap {
···
929
933
#define KVM_CAP_PRE_FAULT_MEMORY 236
930
934
#define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237
931
935
#define KVM_CAP_X86_GUEST_MODE 238
936
+
#define KVM_CAP_ARM_WRITABLE_IMP_ID_REGS 239
932
937
933
938
struct kvm_irq_routing_irqchip {
934
939
__u32 irqchip;
···
1067
1070
1068
1071
#define KVM_REG_SIZE_SHIFT 52
1069
1072
#define KVM_REG_SIZE_MASK 0x00f0000000000000ULL
1073
+
1074
+
#define KVM_REG_SIZE(id) \
1075
+
(1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
1076
+
1070
1077
#define KVM_REG_SIZE_U8 0x0000000000000000ULL
1071
1078
#define KVM_REG_SIZE_U16 0x0010000000000000ULL
1072
1079
#define KVM_REG_SIZE_U32 0x0020000000000000ULL
+2
tools/include/uapi/linux/perf_event.h
+2
tools/include/uapi/linux/perf_event.h
+75
-24
tools/include/uapi/linux/stat.h
+75
-24
tools/include/uapi/linux/stat.h
···
98
98
*/
99
99
struct statx {
100
100
/* 0x00 */
101
-
__u32 stx_mask; /* What results were written [uncond] */
102
-
__u32 stx_blksize; /* Preferred general I/O size [uncond] */
103
-
__u64 stx_attributes; /* Flags conveying information about the file [uncond] */
101
+
/* What results were written [uncond] */
102
+
__u32 stx_mask;
103
+
104
+
/* Preferred general I/O size [uncond] */
105
+
__u32 stx_blksize;
106
+
107
+
/* Flags conveying information about the file [uncond] */
108
+
__u64 stx_attributes;
109
+
104
110
/* 0x10 */
105
-
__u32 stx_nlink; /* Number of hard links */
106
-
__u32 stx_uid; /* User ID of owner */
107
-
__u32 stx_gid; /* Group ID of owner */
108
-
__u16 stx_mode; /* File mode */
111
+
/* Number of hard links */
112
+
__u32 stx_nlink;
113
+
114
+
/* User ID of owner */
115
+
__u32 stx_uid;
116
+
117
+
/* Group ID of owner */
118
+
__u32 stx_gid;
119
+
120
+
/* File mode */
121
+
__u16 stx_mode;
109
122
__u16 __spare0[1];
123
+
110
124
/* 0x20 */
111
-
__u64 stx_ino; /* Inode number */
112
-
__u64 stx_size; /* File size */
113
-
__u64 stx_blocks; /* Number of 512-byte blocks allocated */
114
-
__u64 stx_attributes_mask; /* Mask to show what's supported in stx_attributes */
125
+
/* Inode number */
126
+
__u64 stx_ino;
127
+
128
+
/* File size */
129
+
__u64 stx_size;
130
+
131
+
/* Number of 512-byte blocks allocated */
132
+
__u64 stx_blocks;
133
+
134
+
/* Mask to show what's supported in stx_attributes */
135
+
__u64 stx_attributes_mask;
136
+
115
137
/* 0x40 */
116
-
struct statx_timestamp stx_atime; /* Last access time */
117
-
struct statx_timestamp stx_btime; /* File creation time */
118
-
struct statx_timestamp stx_ctime; /* Last attribute change time */
119
-
struct statx_timestamp stx_mtime; /* Last data modification time */
138
+
/* Last access time */
139
+
struct statx_timestamp stx_atime;
140
+
141
+
/* File creation time */
142
+
struct statx_timestamp stx_btime;
143
+
144
+
/* Last attribute change time */
145
+
struct statx_timestamp stx_ctime;
146
+
147
+
/* Last data modification time */
148
+
struct statx_timestamp stx_mtime;
149
+
120
150
/* 0x80 */
121
-
__u32 stx_rdev_major; /* Device ID of special file [if bdev/cdev] */
151
+
/* Device ID of special file [if bdev/cdev] */
152
+
__u32 stx_rdev_major;
122
153
__u32 stx_rdev_minor;
123
-
__u32 stx_dev_major; /* ID of device containing file [uncond] */
154
+
155
+
/* ID of device containing file [uncond] */
156
+
__u32 stx_dev_major;
124
157
__u32 stx_dev_minor;
158
+
125
159
/* 0x90 */
126
160
__u64 stx_mnt_id;
127
-
__u32 stx_dio_mem_align; /* Memory buffer alignment for direct I/O */
128
-
__u32 stx_dio_offset_align; /* File offset alignment for direct I/O */
161
+
162
+
/* Memory buffer alignment for direct I/O */
163
+
__u32 stx_dio_mem_align;
164
+
165
+
/* File offset alignment for direct I/O */
166
+
__u32 stx_dio_offset_align;
167
+
129
168
/* 0xa0 */
130
-
__u64 stx_subvol; /* Subvolume identifier */
131
-
__u32 stx_atomic_write_unit_min; /* Min atomic write unit in bytes */
132
-
__u32 stx_atomic_write_unit_max; /* Max atomic write unit in bytes */
169
+
/* Subvolume identifier */
170
+
__u64 stx_subvol;
171
+
172
+
/* Min atomic write unit in bytes */
173
+
__u32 stx_atomic_write_unit_min;
174
+
175
+
/* Max atomic write unit in bytes */
176
+
__u32 stx_atomic_write_unit_max;
177
+
133
178
/* 0xb0 */
134
-
__u32 stx_atomic_write_segments_max; /* Max atomic write segment count */
135
-
__u32 __spare1[1];
179
+
/* Max atomic write segment count */
180
+
__u32 stx_atomic_write_segments_max;
181
+
182
+
/* File offset alignment for direct I/O reads */
183
+
__u32 stx_dio_read_offset_align;
184
+
136
185
/* 0xb8 */
137
186
__u64 __spare3[9]; /* Spare space for future expansion */
187
+
138
188
/* 0x100 */
139
189
};
140
190
···
214
164
#define STATX_MNT_ID_UNIQUE 0x00004000U /* Want/got extended stx_mount_id */
215
165
#define STATX_SUBVOL 0x00008000U /* Want/got stx_subvol */
216
166
#define STATX_WRITE_ATOMIC 0x00010000U /* Want/got atomic_write_* fields */
167
+
#define STATX_DIO_READ_ALIGN 0x00020000U /* Want/got dio read alignment info */
217
168
218
169
#define STATX__RESERVED 0x80000000U /* Reserved for future struct statx expansion */
219
170
+72
-24
tools/net/ynl/pyynl/ynl_gen_c.py
+72
-24
tools/net/ynl/pyynl/ynl_gen_c.py
···
162
162
def free_needs_iter(self):
163
163
return False
164
164
165
-
def free(self, ri, var, ref):
165
+
def _free_lines(self, ri, var, ref):
166
166
if self.is_multi_val() or self.presence_type() == 'len':
167
-
ri.cw.p(f'free({var}->{ref}{self.c_name});')
167
+
return [f'free({var}->{ref}{self.c_name});']
168
+
return []
169
+
170
+
def free(self, ri, var, ref):
171
+
lines = self._free_lines(ri, var, ref)
172
+
for line in lines:
173
+
ri.cw.p(line)
168
174
169
175
def arg_member(self, ri):
170
176
member = self._complex_member_type(ri)
···
269
263
var = "req"
270
264
member = f"{var}->{'.'.join(ref)}"
271
265
266
+
local_vars = []
267
+
if self.free_needs_iter():
268
+
local_vars += ['unsigned int i;']
269
+
272
270
code = []
273
271
presence = ''
274
272
for i in range(0, len(ref)):
···
282
272
if i == len(ref) - 1 and self.presence_type() != 'bit':
283
273
continue
284
274
code.append(presence + ' = 1;')
275
+
ref_path = '.'.join(ref[:-1])
276
+
if ref_path:
277
+
ref_path += '.'
278
+
code += self._free_lines(ri, var, ref_path)
285
279
code += self._setter_lines(ri, member, presence)
286
280
287
281
func_name = f"{op_prefix(ri, direction, deref=deref)}_set_{'_'.join(ref)}"
···
293
279
alloc = bool([x for x in code if 'alloc(' in x])
294
280
if free and not alloc:
295
281
func_name = '__' + func_name
296
-
ri.cw.write_func('static inline void', func_name, body=code,
282
+
ri.cw.write_func('static inline void', func_name, local_vars=local_vars,
283
+
body=code,
297
284
args=[f'{type_name(ri, direction, deref=deref)} *{var}'] + self.arg_member(ri))
298
285
299
286
···
497
482
['unsigned int len;']
498
483
499
484
def _setter_lines(self, ri, member, presence):
500
-
return [f"free({member});",
501
-
f"{presence}_len = strlen({self.c_name});",
485
+
return [f"{presence}_len = strlen({self.c_name});",
502
486
f"{member} = malloc({presence}_len + 1);",
503
487
f'memcpy({member}, {self.c_name}, {presence}_len);',
504
488
f'{member}[{presence}_len] = 0;']
···
550
536
['unsigned int len;']
551
537
552
538
def _setter_lines(self, ri, member, presence):
553
-
return [f"free({member});",
554
-
f"{presence}_len = len;",
539
+
return [f"{presence}_len = len;",
555
540
f"{member} = malloc({presence}_len);",
556
541
f'memcpy({member}, {self.c_name}, {presence}_len);']
557
542
···
587
574
def _complex_member_type(self, ri):
588
575
return self.nested_struct_type
589
576
590
-
def free(self, ri, var, ref):
577
+
def _free_lines(self, ri, var, ref):
578
+
lines = []
591
579
at = '&'
592
580
if self.is_recursive_for_op(ri):
593
581
at = ''
594
-
ri.cw.p(f'if ({var}->{ref}{self.c_name})')
595
-
ri.cw.p(f'{self.nested_render_name}_free({at}{var}->{ref}{self.c_name});')
582
+
lines += [f'if ({var}->{ref}{self.c_name})']
583
+
lines += [f'{self.nested_render_name}_free({at}{var}->{ref}{self.c_name});']
584
+
return lines
596
585
597
586
def _attr_typol(self):
598
587
return f'.type = YNL_PT_NEST, .nest = &{self.nested_render_name}_nest, '
···
647
632
def free_needs_iter(self):
648
633
return 'type' not in self.attr or self.attr['type'] == 'nest'
649
634
650
-
def free(self, ri, var, ref):
635
+
def _free_lines(self, ri, var, ref):
636
+
lines = []
651
637
if self.attr['type'] in scalars:
652
-
ri.cw.p(f"free({var}->{ref}{self.c_name});")
638
+
lines += [f"free({var}->{ref}{self.c_name});"]
653
639
elif 'type' not in self.attr or self.attr['type'] == 'nest':
654
-
ri.cw.p(f"for (i = 0; i < {var}->{ref}n_{self.c_name}; i++)")
655
-
ri.cw.p(f'{self.nested_render_name}_free(&{var}->{ref}{self.c_name}[i]);')
656
-
ri.cw.p(f"free({var}->{ref}{self.c_name});")
640
+
lines += [
641
+
f"for (i = 0; i < {var}->{ref}n_{self.c_name}; i++)",
642
+
f'{self.nested_render_name}_free(&{var}->{ref}{self.c_name}[i]);',
643
+
f"free({var}->{ref}{self.c_name});",
644
+
]
657
645
else:
658
646
raise Exception(f"Free of MultiAttr sub-type {self.attr['type']} not supported yet")
647
+
return lines
659
648
660
649
def _attr_policy(self, policy):
661
650
return self.base_type._attr_policy(policy)
···
673
654
def attr_put(self, ri, var):
674
655
if self.attr['type'] in scalars:
675
656
put_type = self.type
676
-
ri.cw.p(f"for (unsigned int i = 0; i < {var}->n_{self.c_name}; i++)")
657
+
ri.cw.p(f"for (i = 0; i < {var}->n_{self.c_name}; i++)")
677
658
ri.cw.p(f"ynl_attr_put_{put_type}(nlh, {self.enum_name}, {var}->{self.c_name}[i]);")
678
659
elif 'type' not in self.attr or self.attr['type'] == 'nest':
679
-
ri.cw.p(f"for (unsigned int i = 0; i < {var}->n_{self.c_name}; i++)")
660
+
ri.cw.p(f"for (i = 0; i < {var}->n_{self.c_name}; i++)")
680
661
self._attr_put_line(ri, var, f"{self.nested_render_name}_put(nlh, " +
681
662
f"{self.enum_name}, &{var}->{self.c_name}[i])")
682
663
else:
···
685
666
def _setter_lines(self, ri, member, presence):
686
667
# For multi-attr we have a count, not presence, hack up the presence
687
668
presence = presence[:-(len('_present.') + len(self.c_name))] + "n_" + self.c_name
688
-
return [f"free({member});",
689
-
f"{member} = {self.c_name};",
669
+
return [f"{member} = {self.c_name};",
690
670
f"{presence} = n_{self.c_name};"]
691
671
692
672
···
714
696
def _attr_get(self, ri, var):
715
697
local_vars = ['const struct nlattr *attr2;']
716
698
get_lines = [f'attr_{self.c_name} = attr;',
717
-
'ynl_attr_for_each_nested(attr2, attr)',
718
-
f'\t{var}->n_{self.c_name}++;']
699
+
'ynl_attr_for_each_nested(attr2, attr) {',
700
+
'\tif (ynl_attr_validate(yarg, attr2))',
701
+
'\t\treturn YNL_PARSE_CB_ERROR;',
702
+
f'\t{var}->n_{self.c_name}++;',
703
+
'}']
719
704
return get_lines, None, local_vars
720
705
721
706
···
776
755
self.request = False
777
756
self.reply = False
778
757
self.recursive = False
758
+
self.in_multi_val = False # used by a MultiAttr or and legacy arrays
779
759
780
760
self.attr_list = []
781
761
self.attrs = dict()
···
1144
1122
if attr in rs_members['reply']:
1145
1123
self.pure_nested_structs[nested].reply = True
1146
1124
1125
+
if spec.is_multi_val():
1126
+
child = self.pure_nested_structs.get(nested)
1127
+
child.in_multi_val = True
1128
+
1147
1129
self._sort_pure_types()
1148
1130
1149
1131
# Propagate the request / reply / recursive
···
1162
1136
struct.child_nests.update(child.child_nests)
1163
1137
child.request |= struct.request
1164
1138
child.reply |= struct.reply
1139
+
if spec.is_multi_val():
1140
+
child.in_multi_val = True
1165
1141
if attr_set in struct.child_nests:
1166
1142
struct.recursive = True
1167
1143
···
1432
1404
1433
1405
def write_func(self, qual_ret, name, body, args=None, local_vars=None):
1434
1406
self.write_func_prot(qual_ret=qual_ret, name=name, args=args)
1407
+
self.block_start()
1435
1408
self.write_func_lvar(local_vars=local_vars)
1436
1409
1437
-
self.block_start()
1438
1410
for line in body:
1439
1411
self.p(line)
1440
1412
self.block_end()
···
1679
1651
1680
1652
1681
1653
def put_req_nested(ri, struct):
1654
+
local_vars = []
1655
+
init_lines = []
1656
+
1657
+
local_vars.append('struct nlattr *nest;')
1658
+
init_lines.append("nest = ynl_attr_nest_start(nlh, attr_type);")
1659
+
1660
+
for _, arg in struct.member_list():
1661
+
if arg.presence_type() == 'count':
1662
+
local_vars.append('unsigned int i;')
1663
+
break
1664
+
1682
1665
put_req_nested_prototype(ri, struct, suffix='')
1683
1666
ri.cw.block_start()
1684
-
ri.cw.write_func_lvar('struct nlattr *nest;')
1667
+
ri.cw.write_func_lvar(local_vars)
1685
1668
1686
-
ri.cw.p("nest = ynl_attr_nest_start(nlh, attr_type);")
1669
+
for line in init_lines:
1670
+
ri.cw.p(line)
1687
1671
1688
1672
for _, arg in struct.member_list():
1689
1673
arg.attr_put(ri, "obj")
···
1899
1859
if ri.fixed_hdr:
1900
1860
local_vars += ['size_t hdr_len;',
1901
1861
'void *hdr;']
1862
+
1863
+
for _, attr in ri.struct["request"].member_list():
1864
+
if attr.presence_type() == 'count':
1865
+
local_vars += ['unsigned int i;']
1866
+
break
1902
1867
1903
1868
print_prototype(ri, direction, terminate=False)
1904
1869
ri.cw.block_start()
···
3007
2962
for attr_set, struct in parsed.pure_nested_structs.items():
3008
2963
ri = RenderInfo(cw, parsed, args.mode, "", "", attr_set)
3009
2964
print_type_full(ri, struct)
2965
+
if struct.request and struct.in_multi_val:
2966
+
free_rsp_nested_prototype(ri)
2967
+
cw.nl()
3010
2968
3011
2969
for op_name, op in parsed.ops.items():
3012
2970
cw.p(f"/* ============== {op.enum_name} ============== */")
+11
-7
tools/objtool/arch/x86/decode.c
+11
-7
tools/objtool/arch/x86/decode.c
···
522
522
case INAT_PFX_REPNE:
523
523
if (modrm == 0xca)
524
524
/* eretu/erets */
525
-
insn->type = INSN_CONTEXT_SWITCH;
525
+
insn->type = INSN_SYSRET;
526
526
break;
527
527
default:
528
528
if (modrm == 0xca)
···
535
535
536
536
insn->type = INSN_JUMP_CONDITIONAL;
537
537
538
-
} else if (op2 == 0x05 || op2 == 0x07 || op2 == 0x34 ||
539
-
op2 == 0x35) {
538
+
} else if (op2 == 0x05 || op2 == 0x34) {
540
539
541
-
/* sysenter, sysret */
542
-
insn->type = INSN_CONTEXT_SWITCH;
540
+
/* syscall, sysenter */
541
+
insn->type = INSN_SYSCALL;
542
+
543
+
} else if (op2 == 0x07 || op2 == 0x35) {
544
+
545
+
/* sysret, sysexit */
546
+
insn->type = INSN_SYSRET;
543
547
544
548
} else if (op2 == 0x0b || op2 == 0xb9) {
545
549
···
680
676
681
677
case 0xca: /* retf */
682
678
case 0xcb: /* retf */
683
-
insn->type = INSN_CONTEXT_SWITCH;
679
+
insn->type = INSN_SYSRET;
684
680
break;
685
681
686
682
case 0xe0: /* loopne */
···
725
721
} else if (modrm_reg == 5) {
726
722
727
723
/* jmpf */
728
-
insn->type = INSN_CONTEXT_SWITCH;
724
+
insn->type = INSN_SYSRET;
729
725
730
726
} else if (modrm_reg == 6) {
731
727
+1
-1
tools/objtool/arch/x86/special.c
+1
-1
tools/objtool/arch/x86/special.c
···
126
126
* indicates a rare GCC quirk/bug which can leave dead
127
127
* code behind.
128
128
*/
129
-
if (reloc_type(text_reloc) == R_X86_64_PC32) {
129
+
if (!file->ignore_unreachables && reloc_type(text_reloc) == R_X86_64_PC32) {
130
130
WARN_INSN(insn, "ignoring unreachables due to jump table quirk");
131
131
file->ignore_unreachables = true;
132
132
}
+51
-8
tools/objtool/check.c
+51
-8
tools/objtool/check.c
···
3505
3505
return next_insn_same_sec(file, alt_group->orig_group->last_insn);
3506
3506
}
3507
3507
3508
+
static bool skip_alt_group(struct instruction *insn)
3509
+
{
3510
+
struct instruction *alt_insn = insn->alts ? insn->alts->insn : NULL;
3511
+
3512
+
/* ANNOTATE_IGNORE_ALTERNATIVE */
3513
+
if (insn->alt_group && insn->alt_group->ignore)
3514
+
return true;
3515
+
3516
+
/*
3517
+
* For NOP patched with CLAC/STAC, only follow the latter to avoid
3518
+
* impossible code paths combining patched CLAC with unpatched STAC
3519
+
* or vice versa.
3520
+
*
3521
+
* ANNOTATE_IGNORE_ALTERNATIVE could have been used here, but Linus
3522
+
* requested not to do that to avoid hurting .s file readability
3523
+
* around CLAC/STAC alternative sites.
3524
+
*/
3525
+
3526
+
if (!alt_insn)
3527
+
return false;
3528
+
3529
+
/* Don't override ASM_{CLAC,STAC}_UNSAFE */
3530
+
if (alt_insn->alt_group && alt_insn->alt_group->ignore)
3531
+
return false;
3532
+
3533
+
return alt_insn->type == INSN_CLAC || alt_insn->type == INSN_STAC;
3534
+
}
3535
+
3508
3536
/*
3509
3537
* Follow the branch starting at the given instruction, and recursively follow
3510
3538
* any other branches (jumps). Meanwhile, track the frame pointer state at
···
3653
3625
}
3654
3626
}
3655
3627
3656
-
if (insn->alt_group && insn->alt_group->ignore)
3628
+
if (skip_alt_group(insn))
3657
3629
return 0;
3658
3630
3659
3631
if (handle_insn_ops(insn, next_insn, &state))
···
3712
3684
3713
3685
break;
3714
3686
3715
-
case INSN_CONTEXT_SWITCH:
3716
-
if (func) {
3717
-
if (!next_insn || !next_insn->hint) {
3718
-
WARN_INSN(insn, "unsupported instruction in callable function");
3719
-
return 1;
3720
-
}
3721
-
break;
3687
+
case INSN_SYSCALL:
3688
+
if (func && (!next_insn || !next_insn->hint)) {
3689
+
WARN_INSN(insn, "unsupported instruction in callable function");
3690
+
return 1;
3722
3691
}
3692
+
3693
+
break;
3694
+
3695
+
case INSN_SYSRET:
3696
+
if (func && (!next_insn || !next_insn->hint)) {
3697
+
WARN_INSN(insn, "unsupported instruction in callable function");
3698
+
return 1;
3699
+
}
3700
+
3723
3701
return 0;
3724
3702
3725
3703
case INSN_STAC:
···
3920
3886
WARN_INSN(insn, "RET before UNTRAIN");
3921
3887
return 1;
3922
3888
3889
+
case INSN_SYSCALL:
3890
+
break;
3891
+
3892
+
case INSN_SYSRET:
3893
+
return 0;
3894
+
3923
3895
case INSN_NOP:
3924
3896
if (insn->retpoline_safe)
3925
3897
return 0;
···
3934
3894
default:
3935
3895
break;
3936
3896
}
3897
+
3898
+
if (insn->dead_end)
3899
+
return 0;
3937
3900
3938
3901
if (!next) {
3939
3902
WARN_INSN(insn, "teh end!");
+2
-1
tools/objtool/include/objtool/arch.h
+2
-1
tools/objtool/include/objtool/arch.h
+1
tools/perf/arch/arm/entry/syscalls/syscall.tbl
+1
tools/perf/arch/arm/entry/syscalls/syscall.tbl
+1
tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl
+1
tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl
+1
tools/perf/arch/powerpc/entry/syscalls/syscall.tbl
+1
tools/perf/arch/powerpc/entry/syscalls/syscall.tbl
+1
tools/perf/arch/s390/entry/syscalls/syscall.tbl
+1
tools/perf/arch/s390/entry/syscalls/syscall.tbl
+1
tools/perf/arch/sh/entry/syscalls/syscall.tbl
+1
tools/perf/arch/sh/entry/syscalls/syscall.tbl
+1
tools/perf/arch/sparc/entry/syscalls/syscall.tbl
+1
tools/perf/arch/sparc/entry/syscalls/syscall.tbl
+2
-1
tools/perf/arch/x86/entry/syscalls/syscall_32.tbl
+2
-1
tools/perf/arch/x86/entry/syscalls/syscall_32.tbl
···
396
396
381 i386 pkey_alloc sys_pkey_alloc
397
397
382 i386 pkey_free sys_pkey_free
398
398
383 i386 statx sys_statx
399
-
384 i386 arch_prctl sys_arch_prctl compat_sys_arch_prctl
399
+
384 i386 arch_prctl sys_arch_prctl
400
400
385 i386 io_pgetevents sys_io_pgetevents_time32 compat_sys_io_pgetevents
401
401
386 i386 rseq sys_rseq
402
402
393 i386 semget sys_semget
···
472
472
464 i386 getxattrat sys_getxattrat
473
473
465 i386 listxattrat sys_listxattrat
474
474
466 i386 removexattrat sys_removexattrat
475
+
467 i386 open_tree_attr sys_open_tree_attr
+1
tools/perf/arch/x86/entry/syscalls/syscall_64.tbl
+1
tools/perf/arch/x86/entry/syscalls/syscall_64.tbl
···
390
390
464 common getxattrat sys_getxattrat
391
391
465 common listxattrat sys_listxattrat
392
392
466 common removexattrat sys_removexattrat
393
+
467 common open_tree_attr sys_open_tree_attr
393
394
394
395
#
395
396
# Due to a historical design error, certain syscalls are numbered differently
+1
tools/perf/arch/xtensa/entry/syscalls/syscall.tbl
+1
tools/perf/arch/xtensa/entry/syscalls/syscall.tbl
+1
tools/perf/check-headers.sh
+1
tools/perf/check-headers.sh
+2
tools/perf/trace/beauty/include/linux/socket.h
+2
tools/perf/trace/beauty/include/linux/socket.h
···
392
392
393
393
extern int move_addr_to_kernel(void __user *uaddr, int ulen, struct sockaddr_storage *kaddr);
394
394
extern int put_cmsg(struct msghdr*, int level, int type, int len, void *data);
395
+
extern int put_cmsg_notrunc(struct msghdr *msg, int level, int type, int len,
396
+
void *data);
395
397
396
398
struct timespec64;
397
399
struct __kernel_timespec;
+4
tools/perf/trace/beauty/include/uapi/linux/fcntl.h
+4
tools/perf/trace/beauty/include/uapi/linux/fcntl.h
···
155
155
#define AT_HANDLE_MNT_ID_UNIQUE 0x001 /* Return the u64 unique mount ID. */
156
156
#define AT_HANDLE_CONNECTABLE 0x002 /* Request a connectable file handle */
157
157
158
+
/* Flags for execveat2(2). */
159
+
#define AT_EXECVE_CHECK 0x10000 /* Only perform a check if execution
160
+
would be allowed. */
161
+
158
162
#endif /* _UAPI_LINUX_FCNTL_H */
+16
-5
tools/perf/trace/beauty/include/uapi/linux/fs.h
+16
-5
tools/perf/trace/beauty/include/uapi/linux/fs.h
···
40
40
#define BLOCK_SIZE_BITS 10
41
41
#define BLOCK_SIZE (1<<BLOCK_SIZE_BITS)
42
42
43
+
/* flags for integrity meta */
44
+
#define IO_INTEGRITY_CHK_GUARD (1U << 0) /* enforce guard check */
45
+
#define IO_INTEGRITY_CHK_REFTAG (1U << 1) /* enforce ref check */
46
+
#define IO_INTEGRITY_CHK_APPTAG (1U << 2) /* enforce app check */
47
+
48
+
#define IO_INTEGRITY_VALID_FLAGS (IO_INTEGRITY_CHK_GUARD | \
49
+
IO_INTEGRITY_CHK_REFTAG | \
50
+
IO_INTEGRITY_CHK_APPTAG)
51
+
43
52
#define SEEK_SET 0 /* seek relative to beginning of file */
44
53
#define SEEK_CUR 1 /* seek relative to current file position */
45
54
#define SEEK_END 2 /* seek relative to end of file */
···
212
203
#define BLKROTATIONAL _IO(0x12,126)
213
204
#define BLKZEROOUT _IO(0x12,127)
214
205
#define BLKGETDISKSEQ _IOR(0x12,128,__u64)
215
-
/*
216
-
* A jump here: 130-136 are reserved for zoned block devices
217
-
* (see uapi/linux/blkzoned.h)
218
-
*/
206
+
/* 130-136 are used by zoned block device ioctls (uapi/linux/blkzoned.h) */
207
+
/* 137-141 are used by blk-crypto ioctls (uapi/linux/blk-crypto.h) */
219
208
220
209
#define BMAP_IOCTL 1 /* obsolete - kept for compatibility */
221
210
#define FIBMAP _IO(0x00,1) /* bmap access */
···
339
332
/* Atomic Write */
340
333
#define RWF_ATOMIC ((__force __kernel_rwf_t)0x00000040)
341
334
335
+
/* buffered IO that drops the cache after reading or writing data */
336
+
#define RWF_DONTCACHE ((__force __kernel_rwf_t)0x00000080)
337
+
342
338
/* mask of flags supported by the kernel */
343
339
#define RWF_SUPPORTED (RWF_HIPRI | RWF_DSYNC | RWF_SYNC | RWF_NOWAIT |\
344
-
RWF_APPEND | RWF_NOAPPEND | RWF_ATOMIC)
340
+
RWF_APPEND | RWF_NOAPPEND | RWF_ATOMIC |\
341
+
RWF_DONTCACHE)
345
342
346
343
#define PROCFS_IOCTL_MAGIC 'f'
347
344
+9
-1
tools/perf/trace/beauty/include/uapi/linux/mount.h
+9
-1
tools/perf/trace/beauty/include/uapi/linux/mount.h
···
179
179
__u32 opt_array; /* [str] Array of nul terminated fs options */
180
180
__u32 opt_sec_num; /* Number of security options */
181
181
__u32 opt_sec_array; /* [str] Array of nul terminated security options */
182
-
__u64 __spare2[46];
182
+
__u64 supported_mask; /* Mask flags that this kernel supports */
183
+
__u32 mnt_uidmap_num; /* Number of uid mappings */
184
+
__u32 mnt_uidmap; /* [str] Array of uid mappings (as seen from callers namespace) */
185
+
__u32 mnt_gidmap_num; /* Number of gid mappings */
186
+
__u32 mnt_gidmap; /* [str] Array of gid mappings (as seen from callers namespace) */
187
+
__u64 __spare2[43];
183
188
char str[]; /* Variable size part containing strings */
184
189
};
185
190
···
222
217
#define STATMOUNT_SB_SOURCE 0x00000200U /* Want/got sb_source */
223
218
#define STATMOUNT_OPT_ARRAY 0x00000400U /* Want/got opt_... */
224
219
#define STATMOUNT_OPT_SEC_ARRAY 0x00000800U /* Want/got opt_sec... */
220
+
#define STATMOUNT_SUPPORTED_MASK 0x00001000U /* Want/got supported mask flags */
221
+
#define STATMOUNT_MNT_UIDMAP 0x00002000U /* Want/got uidmap... */
222
+
#define STATMOUNT_MNT_GIDMAP 0x00004000U /* Want/got gidmap... */
225
223
226
224
/*
227
225
* Special @mnt_id values that can be passed to listmount
+11
tools/perf/trace/beauty/include/uapi/linux/prctl.h
+11
tools/perf/trace/beauty/include/uapi/linux/prctl.h
···
353
353
*/
354
354
#define PR_LOCK_SHADOW_STACK_STATUS 76
355
355
356
+
/*
357
+
* Controls the mode of timer_create() for CRIU restore operations.
358
+
* Enabling this allows CRIU to restore timers with explicit IDs.
359
+
*
360
+
* Don't use for normal operations as the result might be undefined.
361
+
*/
362
+
#define PR_TIMER_CREATE_RESTORE_IDS 77
363
+
# define PR_TIMER_CREATE_RESTORE_IDS_OFF 0
364
+
# define PR_TIMER_CREATE_RESTORE_IDS_ON 1
365
+
# define PR_TIMER_CREATE_RESTORE_IDS_GET 2
366
+
356
367
#endif /* _LINUX_PRCTL_H */
+75
-24
tools/perf/trace/beauty/include/uapi/linux/stat.h
+75
-24
tools/perf/trace/beauty/include/uapi/linux/stat.h
···
98
98
*/
99
99
struct statx {
100
100
/* 0x00 */
101
-
__u32 stx_mask; /* What results were written [uncond] */
102
-
__u32 stx_blksize; /* Preferred general I/O size [uncond] */
103
-
__u64 stx_attributes; /* Flags conveying information about the file [uncond] */
101
+
/* What results were written [uncond] */
102
+
__u32 stx_mask;
103
+
104
+
/* Preferred general I/O size [uncond] */
105
+
__u32 stx_blksize;
106
+
107
+
/* Flags conveying information about the file [uncond] */
108
+
__u64 stx_attributes;
109
+
104
110
/* 0x10 */
105
-
__u32 stx_nlink; /* Number of hard links */
106
-
__u32 stx_uid; /* User ID of owner */
107
-
__u32 stx_gid; /* Group ID of owner */
108
-
__u16 stx_mode; /* File mode */
111
+
/* Number of hard links */
112
+
__u32 stx_nlink;
113
+
114
+
/* User ID of owner */
115
+
__u32 stx_uid;
116
+
117
+
/* Group ID of owner */
118
+
__u32 stx_gid;
119
+
120
+
/* File mode */
121
+
__u16 stx_mode;
109
122
__u16 __spare0[1];
123
+
110
124
/* 0x20 */
111
-
__u64 stx_ino; /* Inode number */
112
-
__u64 stx_size; /* File size */
113
-
__u64 stx_blocks; /* Number of 512-byte blocks allocated */
114
-
__u64 stx_attributes_mask; /* Mask to show what's supported in stx_attributes */
125
+
/* Inode number */
126
+
__u64 stx_ino;
127
+
128
+
/* File size */
129
+
__u64 stx_size;
130
+
131
+
/* Number of 512-byte blocks allocated */
132
+
__u64 stx_blocks;
133
+
134
+
/* Mask to show what's supported in stx_attributes */
135
+
__u64 stx_attributes_mask;
136
+
115
137
/* 0x40 */
116
-
struct statx_timestamp stx_atime; /* Last access time */
117
-
struct statx_timestamp stx_btime; /* File creation time */
118
-
struct statx_timestamp stx_ctime; /* Last attribute change time */
119
-
struct statx_timestamp stx_mtime; /* Last data modification time */
138
+
/* Last access time */
139
+
struct statx_timestamp stx_atime;
140
+
141
+
/* File creation time */
142
+
struct statx_timestamp stx_btime;
143
+
144
+
/* Last attribute change time */
145
+
struct statx_timestamp stx_ctime;
146
+
147
+
/* Last data modification time */
148
+
struct statx_timestamp stx_mtime;
149
+
120
150
/* 0x80 */
121
-
__u32 stx_rdev_major; /* Device ID of special file [if bdev/cdev] */
151
+
/* Device ID of special file [if bdev/cdev] */
152
+
__u32 stx_rdev_major;
122
153
__u32 stx_rdev_minor;
123
-
__u32 stx_dev_major; /* ID of device containing file [uncond] */
154
+
155
+
/* ID of device containing file [uncond] */
156
+
__u32 stx_dev_major;
124
157
__u32 stx_dev_minor;
158
+
125
159
/* 0x90 */
126
160
__u64 stx_mnt_id;
127
-
__u32 stx_dio_mem_align; /* Memory buffer alignment for direct I/O */
128
-
__u32 stx_dio_offset_align; /* File offset alignment for direct I/O */
161
+
162
+
/* Memory buffer alignment for direct I/O */
163
+
__u32 stx_dio_mem_align;
164
+
165
+
/* File offset alignment for direct I/O */
166
+
__u32 stx_dio_offset_align;
167
+
129
168
/* 0xa0 */
130
-
__u64 stx_subvol; /* Subvolume identifier */
131
-
__u32 stx_atomic_write_unit_min; /* Min atomic write unit in bytes */
132
-
__u32 stx_atomic_write_unit_max; /* Max atomic write unit in bytes */
169
+
/* Subvolume identifier */
170
+
__u64 stx_subvol;
171
+
172
+
/* Min atomic write unit in bytes */
173
+
__u32 stx_atomic_write_unit_min;
174
+
175
+
/* Max atomic write unit in bytes */
176
+
__u32 stx_atomic_write_unit_max;
177
+
133
178
/* 0xb0 */
134
-
__u32 stx_atomic_write_segments_max; /* Max atomic write segment count */
135
-
__u32 __spare1[1];
179
+
/* Max atomic write segment count */
180
+
__u32 stx_atomic_write_segments_max;
181
+
182
+
/* File offset alignment for direct I/O reads */
183
+
__u32 stx_dio_read_offset_align;
184
+
136
185
/* 0xb8 */
137
186
__u64 __spare3[9]; /* Spare space for future expansion */
187
+
138
188
/* 0x100 */
139
189
};
140
190
···
214
164
#define STATX_MNT_ID_UNIQUE 0x00004000U /* Want/got extended stx_mount_id */
215
165
#define STATX_SUBVOL 0x00008000U /* Want/got stx_subvol */
216
166
#define STATX_WRITE_ATOMIC 0x00010000U /* Want/got atomic_write_* fields */
167
+
#define STATX_DIO_READ_ALIGN 0x00020000U /* Want/got dio read alignment info */
217
168
218
169
#define STATX__RESERVED 0x80000000U /* Reserved for future struct statx expansion */
219
170
+6
-2
tools/perf/trace/beauty/include/uapi/sound/asound.h
+6
-2
tools/perf/trace/beauty/include/uapi/sound/asound.h
···
716
716
* Raw MIDI section - /dev/snd/midi??
717
717
*/
718
718
719
-
#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 4)
719
+
#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 5)
720
720
721
721
enum {
722
722
SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
···
728
728
#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
729
729
#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
730
730
#define SNDRV_RAWMIDI_INFO_UMP 0x00000008
731
+
#define SNDRV_RAWMIDI_INFO_STREAM_INACTIVE 0x00000010
732
+
733
+
#define SNDRV_RAWMIDI_DEVICE_UNKNOWN 0
731
734
732
735
struct snd_rawmidi_info {
733
736
unsigned int device; /* RO/WR (control): device number */
···
743
740
unsigned char subname[32]; /* name of active or selected subdevice */
744
741
unsigned int subdevices_count;
745
742
unsigned int subdevices_avail;
746
-
unsigned char reserved[64]; /* reserved for future use */
743
+
int tied_device; /* R: tied rawmidi device (UMP/legacy) */
744
+
unsigned char reserved[60]; /* reserved for future use */
747
745
};
748
746
749
747
#define SNDRV_RAWMIDI_MODE_FRAMING_MASK (7<<0)
-22
tools/perf/util/evsel.c
-22
tools/perf/util/evsel.c
···
2566
2566
return false;
2567
2567
}
2568
2568
2569
-
static bool evsel__handle_error_quirks(struct evsel *evsel, int error)
2570
-
{
2571
-
/*
2572
-
* AMD core PMU tries to forward events with precise_ip to IBS PMU
2573
-
* implicitly. But IBS PMU has more restrictions so it can fail with
2574
-
* supported event attributes. Let's forward it back to the core PMU
2575
-
* by clearing precise_ip only if it's from precise_max (:P).
2576
-
*/
2577
-
if ((error == -EINVAL || error == -ENOENT) && x86__is_amd_cpu() &&
2578
-
evsel->core.attr.precise_ip && evsel->precise_max) {
2579
-
evsel->core.attr.precise_ip = 0;
2580
-
pr_debug2_peo("removing precise_ip on AMD\n");
2581
-
display_attr(&evsel->core.attr);
2582
-
return true;
2583
-
}
2584
-
2585
-
return false;
2586
-
}
2587
-
2588
2569
static int evsel__open_cpu(struct evsel *evsel, struct perf_cpu_map *cpus,
2589
2570
struct perf_thread_map *threads,
2590
2571
int start_cpu_map_idx, int end_cpu_map_idx)
···
2709
2728
goto fallback_missing_features;
2710
2729
2711
2730
if (evsel__precise_ip_fallback(evsel))
2712
-
goto retry_open;
2713
-
2714
-
if (evsel__handle_error_quirks(evsel, err))
2715
2731
goto retry_open;
2716
2732
2717
2733
out_close:
+1
-1
tools/perf/util/unwind-libunwind-local.c
+1
-1
tools/perf/util/unwind-libunwind-local.c
+1
tools/scripts/syscall.tbl
+1
tools/scripts/syscall.tbl
+6
tools/testing/memblock/internal.h
+6
tools/testing/memblock/internal.h
+14
tools/testing/memblock/linux/mutex.h
+14
tools/testing/memblock/linux/mutex.h
+5
-2
tools/testing/selftests/bpf/prog_tests/res_spin_lock.c
+5
-2
tools/testing/selftests/bpf/prog_tests/res_spin_lock.c
···
25
25
26
26
while (!READ_ONCE(skip)) {
27
27
err = bpf_prog_test_run_opts(prog_fd, &topts);
28
-
ASSERT_OK(err, "test_run");
29
-
ASSERT_OK(topts.retval, "test_run retval");
28
+
if (err || topts.retval) {
29
+
ASSERT_OK(err, "test_run");
30
+
ASSERT_OK(topts.retval, "test_run retval");
31
+
break;
32
+
}
30
33
}
31
34
pthread_exit(arg);
32
35
}
+7
-3
tools/testing/selftests/bpf/progs/res_spin_lock.c
+7
-3
tools/testing/selftests/bpf/progs/res_spin_lock.c
···
38
38
r = bpf_res_spin_lock(&elem1->lock);
39
39
if (r)
40
40
return r;
41
-
if (!bpf_res_spin_lock(&elem2->lock)) {
41
+
r = bpf_res_spin_lock(&elem2->lock);
42
+
if (!r) {
42
43
bpf_res_spin_unlock(&elem2->lock);
43
44
bpf_res_spin_unlock(&elem1->lock);
44
45
return -1;
45
46
}
46
47
bpf_res_spin_unlock(&elem1->lock);
47
-
return 0;
48
+
return r != -EDEADLK;
48
49
}
49
50
50
51
SEC("tc")
···
125
124
/* Trigger AA, after exhausting entries in the held lock table. This
126
125
* time, only the timeout can save us, as AA detection won't succeed.
127
126
*/
128
-
if (!bpf_res_spin_lock(locks[34])) {
127
+
ret = bpf_res_spin_lock(locks[34]);
128
+
if (!ret) {
129
129
bpf_res_spin_unlock(locks[34]);
130
130
ret = 1;
131
131
goto end;
132
132
}
133
+
134
+
ret = ret != -ETIMEDOUT ? 2 : 0;
133
135
134
136
end:
135
137
for (i = i - 1; i >= 0; i--)
+4
tools/testing/selftests/drivers/net/hw/iou-zcrx.py
+4
tools/testing/selftests/drivers/net/hw/iou-zcrx.py
···
35
35
rx_ring = _get_rx_ring_entries(cfg)
36
36
37
37
try:
38
+
ethtool(f"-G {cfg.ifname} tcp-data-split on", host=cfg.remote)
38
39
ethtool(f"-G {cfg.ifname} rx 64", host=cfg.remote)
39
40
ethtool(f"-X {cfg.ifname} equal {combined_chans - 1}", host=cfg.remote)
40
41
flow_rule_id = _set_flow_rule(cfg, combined_chans - 1)
···
49
48
ethtool(f"-N {cfg.ifname} delete {flow_rule_id}", host=cfg.remote)
50
49
ethtool(f"-X {cfg.ifname} default", host=cfg.remote)
51
50
ethtool(f"-G {cfg.ifname} rx {rx_ring}", host=cfg.remote)
51
+
ethtool(f"-G {cfg.ifname} tcp-data-split auto", host=cfg.remote)
52
52
53
53
54
54
def test_zcrx_oneshot(cfg) -> None:
···
61
59
rx_ring = _get_rx_ring_entries(cfg)
62
60
63
61
try:
62
+
ethtool(f"-G {cfg.ifname} tcp-data-split on", host=cfg.remote)
64
63
ethtool(f"-G {cfg.ifname} rx 64", host=cfg.remote)
65
64
ethtool(f"-X {cfg.ifname} equal {combined_chans - 1}", host=cfg.remote)
66
65
flow_rule_id = _set_flow_rule(cfg, combined_chans - 1)
···
75
72
ethtool(f"-N {cfg.ifname} delete {flow_rule_id}", host=cfg.remote)
76
73
ethtool(f"-X {cfg.ifname} default", host=cfg.remote)
77
74
ethtool(f"-G {cfg.ifname} rx {rx_ring}", host=cfg.remote)
75
+
ethtool(f"-G {cfg.ifname} tcp-data-split auto", host=cfg.remote)
78
76
79
77
80
78
def main() -> None:
+177
tools/testing/selftests/ftrace/test.d/ftrace/fgraph-multi-filter.tc
+177
tools/testing/selftests/ftrace/test.d/ftrace/fgraph-multi-filter.tc
···
1
+
#!/bin/sh
2
+
# SPDX-License-Identifier: GPL-2.0
3
+
# description: ftrace - function graph filters
4
+
# requires: set_ftrace_filter function_graph:tracer
5
+
6
+
# Make sure that function graph filtering works
7
+
8
+
INSTANCE1="instances/test1_$$"
9
+
INSTANCE2="instances/test2_$$"
10
+
11
+
WD=`pwd`
12
+
13
+
do_reset() {
14
+
cd $WD
15
+
if [ -d $INSTANCE1 ]; then
16
+
echo nop > $INSTANCE1/current_tracer
17
+
rmdir $INSTANCE1
18
+
fi
19
+
if [ -d $INSTANCE2 ]; then
20
+
echo nop > $INSTANCE2/current_tracer
21
+
rmdir $INSTANCE2
22
+
fi
23
+
}
24
+
25
+
mkdir $INSTANCE1
26
+
if ! grep -q function_graph $INSTANCE1/available_tracers; then
27
+
echo "function_graph not allowed with instances"
28
+
rmdir $INSTANCE1
29
+
exit_unsupported
30
+
fi
31
+
32
+
mkdir $INSTANCE2
33
+
34
+
fail() { # msg
35
+
do_reset
36
+
echo $1
37
+
exit_fail
38
+
}
39
+
40
+
disable_tracing
41
+
clear_trace
42
+
43
+
function_count() {
44
+
search=$1
45
+
vsearch=$2
46
+
47
+
if [ -z "$search" ]; then
48
+
cat enabled_functions | wc -l
49
+
elif [ -z "$vsearch" ]; then
50
+
grep $search enabled_functions | wc -l
51
+
else
52
+
grep $search enabled_functions | grep $vsearch| wc -l
53
+
fi
54
+
}
55
+
56
+
set_fgraph() {
57
+
instance=$1
58
+
filter="$2"
59
+
notrace="$3"
60
+
61
+
echo "$filter" > $instance/set_ftrace_filter
62
+
echo "$notrace" > $instance/set_ftrace_notrace
63
+
echo function_graph > $instance/current_tracer
64
+
}
65
+
66
+
check_functions() {
67
+
orig_cnt=$1
68
+
test=$2
69
+
70
+
cnt=`function_count $test`
71
+
if [ $cnt -gt $orig_cnt ]; then
72
+
fail
73
+
fi
74
+
}
75
+
76
+
check_cnt() {
77
+
orig_cnt=$1
78
+
search=$2
79
+
vsearch=$3
80
+
81
+
cnt=`function_count $search $vsearch`
82
+
if [ $cnt -gt $orig_cnt ]; then
83
+
fail
84
+
fi
85
+
}
86
+
87
+
reset_graph() {
88
+
instance=$1
89
+
echo nop > $instance/current_tracer
90
+
}
91
+
92
+
# get any functions that were enabled before the test
93
+
total_cnt=`function_count`
94
+
sched_cnt=`function_count sched`
95
+
lock_cnt=`function_count lock`
96
+
time_cnt=`function_count time`
97
+
clock_cnt=`function_count clock`
98
+
locks_clock_cnt=`function_count locks clock`
99
+
clock_locks_cnt=`function_count clock locks`
100
+
101
+
# Trace functions with "sched" but not "time"
102
+
set_fgraph $INSTANCE1 '*sched*' '*time*'
103
+
104
+
# Make sure "time" isn't listed
105
+
check_functions $time_cnt 'time'
106
+
instance1_cnt=`function_count`
107
+
108
+
# Trace functions with "lock" but not "clock"
109
+
set_fgraph $INSTANCE2 '*lock*' '*clock*'
110
+
instance1_2_cnt=`function_count`
111
+
112
+
# Turn off the first instance
113
+
reset_graph $INSTANCE1
114
+
115
+
# The second instance doesn't trace "clock" functions
116
+
check_functions $clock_cnt 'clock'
117
+
instance2_cnt=`function_count`
118
+
119
+
# Start from a clean slate
120
+
reset_graph $INSTANCE2
121
+
check_functions $total_cnt
122
+
123
+
# Trace functions with "lock" but not "clock"
124
+
set_fgraph $INSTANCE2 '*lock*' '*clock*'
125
+
126
+
# This should match the last time instance 2 was by itself
127
+
cnt=`function_count`
128
+
if [ $instance2_cnt -ne $cnt ]; then
129
+
fail
130
+
fi
131
+
132
+
# And it should not be tracing "clock" functions
133
+
check_functions $clock_cnt 'clock'
134
+
135
+
# Trace functions with "sched" but not "time"
136
+
set_fgraph $INSTANCE1 '*sched*' '*time*'
137
+
138
+
# This should match the last time both instances were enabled
139
+
cnt=`function_count`
140
+
if [ $instance1_2_cnt -ne $cnt ]; then
141
+
fail
142
+
fi
143
+
144
+
# Turn off the second instance
145
+
reset_graph $INSTANCE2
146
+
147
+
# This should match the last time instance 1 was by itself
148
+
cnt=`function_count`
149
+
if [ $instance1_cnt -ne $cnt ]; then
150
+
fail
151
+
fi
152
+
153
+
# And it should not be tracing "time" functions
154
+
check_functions $time_cnt 'time'
155
+
156
+
# Start from a clean slate
157
+
reset_graph $INSTANCE1
158
+
check_functions $total_cnt
159
+
160
+
# Enable all functions but those that have "locks"
161
+
set_fgraph $INSTANCE1 '' '*locks*'
162
+
163
+
# Enable all functions but those that have "clock"
164
+
set_fgraph $INSTANCE2 '' '*clock*'
165
+
166
+
# If a function has "locks" it should not have "clock"
167
+
check_cnt $locks_clock_cnt locks clock
168
+
169
+
# If a function has "clock" it should not have "locks"
170
+
check_cnt $clock_locks_cnt clock locks
171
+
172
+
reset_graph $INSTANCE1
173
+
reset_graph $INSTANCE2
174
+
175
+
do_reset
176
+
177
+
exit 0
+2
-14
tools/testing/selftests/mincore/mincore_selftest.c
+2
-14
tools/testing/selftests/mincore/mincore_selftest.c
···
283
283
284
284
/*
285
285
* Test mincore() behavior on a page backed by a tmpfs file. This test
286
-
* performs the same steps as the previous one. However, we don't expect
287
-
* any readahead in this case.
286
+
* performs the same steps as the previous one.
288
287
*/
289
288
TEST(check_tmpfs_mmap)
290
289
{
···
294
295
int page_size;
295
296
int fd;
296
297
int i;
297
-
int ra_pages = 0;
298
298
299
299
page_size = sysconf(_SC_PAGESIZE);
300
300
vec_size = FILE_SIZE / page_size;
···
336
338
}
337
339
338
340
/*
339
-
* Touch a page in the middle of the mapping. We expect only
340
-
* that page to be fetched into memory.
341
+
* Touch a page in the middle of the mapping.
341
342
*/
342
343
addr[FILE_SIZE / 2] = 1;
343
344
retval = mincore(addr, FILE_SIZE, vec);
344
345
ASSERT_EQ(0, retval);
345
346
ASSERT_EQ(1, vec[FILE_SIZE / 2 / page_size]) {
346
347
TH_LOG("Page not found in memory after use");
347
-
}
348
-
349
-
i = FILE_SIZE / 2 / page_size + 1;
350
-
while (i < vec_size && vec[i]) {
351
-
ra_pages++;
352
-
i++;
353
-
}
354
-
ASSERT_EQ(ra_pages, 0) {
355
-
TH_LOG("Read-ahead pages found in memory");
356
348
}
357
349
358
350
munmap(addr, FILE_SIZE);
+2
-2
tools/testing/selftests/mm/charge_reserved_hugetlb.sh
+2
-2
tools/testing/selftests/mm/charge_reserved_hugetlb.sh
···
29
29
if [[ $cgroup2 ]]; then
30
30
cgroup_path=$(mount -t cgroup2 | head -1 | awk '{print $3}')
31
31
if [[ -z "$cgroup_path" ]]; then
32
-
cgroup_path=/dev/cgroup/memory
32
+
cgroup_path=$(mktemp -d)
33
33
mount -t cgroup2 none $cgroup_path
34
34
do_umount=1
35
35
fi
···
37
37
else
38
38
cgroup_path=$(mount -t cgroup | grep ",hugetlb" | awk '{print $3}')
39
39
if [[ -z "$cgroup_path" ]]; then
40
-
cgroup_path=/dev/cgroup/memory
40
+
cgroup_path=$(mktemp -d)
41
41
mount -t cgroup memory,hugetlb $cgroup_path
42
42
do_umount=1
43
43
fi
+1
-1
tools/testing/selftests/mm/cow.c
+1
-1
tools/testing/selftests/mm/cow.c
+1
-1
tools/testing/selftests/mm/hugetlb_reparenting_test.sh
+1
-1
tools/testing/selftests/mm/hugetlb_reparenting_test.sh
+1
tools/testing/selftests/net/.gitignore
+1
tools/testing/selftests/net/.gitignore
+2
tools/testing/selftests/net/Makefile
+2
tools/testing/selftests/net/Makefile
···
106
106
TEST_PROGS += busy_poll_test.sh
107
107
TEST_GEN_PROGS += proc_net_pktgen
108
108
TEST_PROGS += lwt_dst_cache_ref_loop.sh
109
+
TEST_PROGS += skf_net_off.sh
110
+
TEST_GEN_FILES += skf_net_off
109
111
110
112
# YNL files, must be before "include ..lib.mk"
111
113
YNL_GEN_FILES := busy_poller netlink-dumps
+34
tools/testing/selftests/net/fib_rule_tests.sh
+34
tools/testing/selftests/net/fib_rule_tests.sh
···
359
359
"$getnomatch" "iif flowlabel masked redirect to table" \
360
360
"iif flowlabel masked no redirect to table"
361
361
fi
362
+
363
+
$IP link show dev $DEV | grep -q vrf0
364
+
if [ $? -eq 0 ]; then
365
+
match="oif vrf0"
366
+
getmatch="oif $DEV"
367
+
getnomatch="oif lo"
368
+
fib_rule6_test_match_n_redirect "$match" "$getmatch" \
369
+
"$getnomatch" "VRF oif redirect to table" \
370
+
"VRF oif no redirect to table"
371
+
372
+
match="from $SRC_IP6 iif vrf0"
373
+
getmatch="from $SRC_IP6 iif $DEV"
374
+
getnomatch="from $SRC_IP6 iif lo"
375
+
fib_rule6_test_match_n_redirect "$match" "$getmatch" \
376
+
"$getnomatch" "VRF iif redirect to table" \
377
+
"VRF iif no redirect to table"
378
+
fi
362
379
}
363
380
364
381
fib_rule6_vrf_test()
···
651
634
fib_rule4_test_match_n_redirect "$match" "$getmatch" \
652
635
"$getnomatch" "iif dscp masked redirect to table" \
653
636
"iif dscp masked no redirect to table"
637
+
fi
638
+
639
+
$IP link show dev $DEV | grep -q vrf0
640
+
if [ $? -eq 0 ]; then
641
+
match="oif vrf0"
642
+
getmatch="oif $DEV"
643
+
getnomatch="oif lo"
644
+
fib_rule4_test_match_n_redirect "$match" "$getmatch" \
645
+
"$getnomatch" "VRF oif redirect to table" \
646
+
"VRF oif no redirect to table"
647
+
648
+
match="from $SRC_IP iif vrf0"
649
+
getmatch="from $SRC_IP iif $DEV"
650
+
getnomatch="from $SRC_IP iif lo"
651
+
fib_rule4_test_match_n_redirect "$match" "$getmatch" \
652
+
"$getnomatch" "VRF iif redirect to table" \
653
+
"VRF iif no redirect to table"
654
654
fi
655
655
}
656
656
+244
tools/testing/selftests/net/skf_net_off.c
+244
tools/testing/selftests/net/skf_net_off.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
3
+
/* Open a tun device.
4
+
*
5
+
* [modifications: use IFF_NAPI_FRAGS, add sk filter]
6
+
*
7
+
* Expects the device to have been configured previously, e.g.:
8
+
* sudo ip tuntap add name tap1 mode tap
9
+
* sudo ip link set tap1 up
10
+
* sudo ip link set dev tap1 addr 02:00:00:00:00:01
11
+
* sudo ip -6 addr add fdab::1 peer fdab::2 dev tap1 nodad
12
+
*
13
+
* And to avoid premature pskb_may_pull:
14
+
*
15
+
* sudo ethtool -K tap1 gro off
16
+
* sudo bash -c 'echo 0 > /proc/sys/net/ipv4/ip_early_demux'
17
+
*/
18
+
19
+
#define _GNU_SOURCE
20
+
21
+
#include <arpa/inet.h>
22
+
#include <errno.h>
23
+
#include <error.h>
24
+
#include <fcntl.h>
25
+
#include <getopt.h>
26
+
#include <linux/filter.h>
27
+
#include <linux/if.h>
28
+
#include <linux/if_packet.h>
29
+
#include <linux/if_tun.h>
30
+
#include <linux/ipv6.h>
31
+
#include <netinet/if_ether.h>
32
+
#include <netinet/in.h>
33
+
#include <netinet/ip.h>
34
+
#include <netinet/ip6.h>
35
+
#include <netinet/udp.h>
36
+
#include <poll.h>
37
+
#include <signal.h>
38
+
#include <stdbool.h>
39
+
#include <stddef.h>
40
+
#include <stdio.h>
41
+
#include <stdlib.h>
42
+
#include <string.h>
43
+
#include <sys/ioctl.h>
44
+
#include <sys/socket.h>
45
+
#include <sys/poll.h>
46
+
#include <sys/types.h>
47
+
#include <sys/uio.h>
48
+
#include <unistd.h>
49
+
50
+
static bool cfg_do_filter;
51
+
static bool cfg_do_frags;
52
+
static int cfg_dst_port = 8000;
53
+
static char *cfg_ifname;
54
+
55
+
static int tun_open(const char *tun_name)
56
+
{
57
+
struct ifreq ifr = {0};
58
+
int fd, ret;
59
+
60
+
fd = open("/dev/net/tun", O_RDWR);
61
+
if (fd == -1)
62
+
error(1, errno, "open /dev/net/tun");
63
+
64
+
ifr.ifr_flags = IFF_TAP;
65
+
if (cfg_do_frags)
66
+
ifr.ifr_flags |= IFF_NAPI | IFF_NAPI_FRAGS;
67
+
68
+
strncpy(ifr.ifr_name, tun_name, IFNAMSIZ - 1);
69
+
70
+
ret = ioctl(fd, TUNSETIFF, &ifr);
71
+
if (ret)
72
+
error(1, ret, "ioctl TUNSETIFF");
73
+
74
+
return fd;
75
+
}
76
+
77
+
static void sk_set_filter(int fd)
78
+
{
79
+
const int offset_proto = offsetof(struct ip6_hdr, ip6_nxt);
80
+
const int offset_dport = sizeof(struct ip6_hdr) + offsetof(struct udphdr, dest);
81
+
82
+
/* Filter UDP packets with destination port cfg_dst_port */
83
+
struct sock_filter filter_code[] = {
84
+
BPF_STMT(BPF_LD + BPF_B + BPF_ABS, SKF_AD_OFF + SKF_AD_PKTTYPE),
85
+
BPF_JUMP(BPF_JMP + BPF_JEQ + BPF_K, PACKET_HOST, 0, 4),
86
+
BPF_STMT(BPF_LD + BPF_B + BPF_ABS, SKF_NET_OFF + offset_proto),
87
+
BPF_JUMP(BPF_JMP + BPF_JEQ + BPF_K, IPPROTO_UDP, 0, 2),
88
+
BPF_STMT(BPF_LD + BPF_H + BPF_ABS, SKF_NET_OFF + offset_dport),
89
+
BPF_JUMP(BPF_JMP + BPF_JEQ + BPF_K, cfg_dst_port, 1, 0),
90
+
BPF_STMT(BPF_RET + BPF_K, 0),
91
+
BPF_STMT(BPF_RET + BPF_K, 0xFFFF),
92
+
};
93
+
94
+
struct sock_fprog filter = {
95
+
sizeof(filter_code) / sizeof(filter_code[0]),
96
+
filter_code,
97
+
};
98
+
99
+
if (setsockopt(fd, SOL_SOCKET, SO_ATTACH_FILTER, &filter, sizeof(filter)))
100
+
error(1, errno, "setsockopt attach filter");
101
+
}
102
+
103
+
static int raw_open(void)
104
+
{
105
+
int fd;
106
+
107
+
fd = socket(PF_INET6, SOCK_RAW, IPPROTO_UDP);
108
+
if (fd == -1)
109
+
error(1, errno, "socket raw (udp)");
110
+
111
+
if (cfg_do_filter)
112
+
sk_set_filter(fd);
113
+
114
+
return fd;
115
+
}
116
+
117
+
static void tun_write(int fd)
118
+
{
119
+
const char eth_src[] = { 0x02, 0x00, 0x00, 0x00, 0x00, 0x02 };
120
+
const char eth_dst[] = { 0x02, 0x00, 0x00, 0x00, 0x00, 0x01 };
121
+
struct tun_pi pi = {0};
122
+
struct ipv6hdr ip6h = {0};
123
+
struct udphdr uh = {0};
124
+
struct ethhdr eth = {0};
125
+
uint32_t payload;
126
+
struct iovec iov[5];
127
+
int ret;
128
+
129
+
pi.proto = htons(ETH_P_IPV6);
130
+
131
+
memcpy(eth.h_source, eth_src, sizeof(eth_src));
132
+
memcpy(eth.h_dest, eth_dst, sizeof(eth_dst));
133
+
eth.h_proto = htons(ETH_P_IPV6);
134
+
135
+
ip6h.version = 6;
136
+
ip6h.payload_len = htons(sizeof(uh) + sizeof(uint32_t));
137
+
ip6h.nexthdr = IPPROTO_UDP;
138
+
ip6h.hop_limit = 8;
139
+
if (inet_pton(AF_INET6, "fdab::2", &ip6h.saddr) != 1)
140
+
error(1, errno, "inet_pton src");
141
+
if (inet_pton(AF_INET6, "fdab::1", &ip6h.daddr) != 1)
142
+
error(1, errno, "inet_pton src");
143
+
144
+
uh.source = htons(8000);
145
+
uh.dest = htons(cfg_dst_port);
146
+
uh.len = ip6h.payload_len;
147
+
uh.check = 0;
148
+
149
+
payload = htonl(0xABABABAB); /* Covered in IPv6 length */
150
+
151
+
iov[0].iov_base = π
152
+
iov[0].iov_len = sizeof(pi);
153
+
iov[1].iov_base = ð
154
+
iov[1].iov_len = sizeof(eth);
155
+
iov[2].iov_base = &ip6h;
156
+
iov[2].iov_len = sizeof(ip6h);
157
+
iov[3].iov_base = &uh;
158
+
iov[3].iov_len = sizeof(uh);
159
+
iov[4].iov_base = &payload;
160
+
iov[4].iov_len = sizeof(payload);
161
+
162
+
ret = writev(fd, iov, sizeof(iov) / sizeof(iov[0]));
163
+
if (ret <= 0)
164
+
error(1, errno, "writev");
165
+
}
166
+
167
+
static void raw_read(int fd)
168
+
{
169
+
struct timeval tv = { .tv_usec = 100 * 1000 };
170
+
struct msghdr msg = {0};
171
+
struct iovec iov[2];
172
+
struct udphdr uh;
173
+
uint32_t payload[2];
174
+
int ret;
175
+
176
+
if (setsockopt(fd, SOL_SOCKET, SO_RCVTIMEO, &tv, sizeof(tv)))
177
+
error(1, errno, "setsockopt rcvtimeo udp");
178
+
179
+
iov[0].iov_base = &uh;
180
+
iov[0].iov_len = sizeof(uh);
181
+
182
+
iov[1].iov_base = payload;
183
+
iov[1].iov_len = sizeof(payload);
184
+
185
+
msg.msg_iov = iov;
186
+
msg.msg_iovlen = sizeof(iov) / sizeof(iov[0]);
187
+
188
+
ret = recvmsg(fd, &msg, 0);
189
+
if (ret <= 0)
190
+
error(1, errno, "read raw");
191
+
if (ret != sizeof(uh) + sizeof(payload[0]))
192
+
error(1, errno, "read raw: len=%d\n", ret);
193
+
194
+
fprintf(stderr, "raw recv: 0x%x\n", payload[0]);
195
+
}
196
+
197
+
static void parse_opts(int argc, char **argv)
198
+
{
199
+
int c;
200
+
201
+
while ((c = getopt(argc, argv, "fFi:")) != -1) {
202
+
switch (c) {
203
+
case 'f':
204
+
cfg_do_filter = true;
205
+
printf("bpf filter enabled\n");
206
+
break;
207
+
case 'F':
208
+
cfg_do_frags = true;
209
+
printf("napi frags mode enabled\n");
210
+
break;
211
+
case 'i':
212
+
cfg_ifname = optarg;
213
+
break;
214
+
default:
215
+
error(1, 0, "unknown option %c", optopt);
216
+
break;
217
+
}
218
+
}
219
+
220
+
if (!cfg_ifname)
221
+
error(1, 0, "must specify tap interface name (-i)");
222
+
}
223
+
224
+
int main(int argc, char **argv)
225
+
{
226
+
int fdt, fdr;
227
+
228
+
parse_opts(argc, argv);
229
+
230
+
fdr = raw_open();
231
+
fdt = tun_open(cfg_ifname);
232
+
233
+
tun_write(fdt);
234
+
raw_read(fdr);
235
+
236
+
if (close(fdt))
237
+
error(1, errno, "close tun");
238
+
if (close(fdr))
239
+
error(1, errno, "close udp");
240
+
241
+
fprintf(stderr, "OK\n");
242
+
return 0;
243
+
}
244
+
+30
tools/testing/selftests/net/skf_net_off.sh
+30
tools/testing/selftests/net/skf_net_off.sh
···
1
+
#!/bin/bash
2
+
# SPDX-License-Identifier: GPL-2.0
3
+
4
+
readonly NS="ns-$(mktemp -u XXXXXX)"
5
+
6
+
cleanup() {
7
+
ip netns del $NS
8
+
}
9
+
10
+
ip netns add $NS
11
+
trap cleanup EXIT
12
+
13
+
ip -netns $NS link set lo up
14
+
ip -netns $NS tuntap add name tap1 mode tap
15
+
ip -netns $NS link set tap1 up
16
+
ip -netns $NS link set dev tap1 addr 02:00:00:00:00:01
17
+
ip -netns $NS -6 addr add fdab::1 peer fdab::2 dev tap1 nodad
18
+
ip netns exec $NS ethtool -K tap1 gro off
19
+
20
+
# disable early demux, else udp_v6_early_demux pulls udp header into linear
21
+
ip netns exec $NS sysctl -w net.ipv4.ip_early_demux=0
22
+
23
+
echo "no filter"
24
+
ip netns exec $NS ./skf_net_off -i tap1
25
+
26
+
echo "filter, linear skb (-f)"
27
+
ip netns exec $NS ./skf_net_off -i tap1 -f
28
+
29
+
echo "filter, fragmented skb (-f) (-F)"
30
+
ip netns exec $NS ./skf_net_off -i tap1 -f -F
+22
tools/testing/selftests/tc-testing/tc-tests/infra/actions.json
+22
tools/testing/selftests/tc-testing/tc-tests/infra/actions.json
···
412
412
"teardown": [
413
413
"$TC qdisc del dev $DUMMY ingress"
414
414
]
415
+
},
416
+
{
417
+
"id": "33f4",
418
+
"name": "Check echo of big filter command",
419
+
"category": [
420
+
"infra",
421
+
"u32"
422
+
],
423
+
"plugins": {
424
+
"requires": "nsPlugin"
425
+
},
426
+
"setup": [
427
+
"$TC qdisc add dev $DUMMY parent root handle 10: fq_codel"
428
+
],
429
+
"cmdUnderTest": "bash -c '$TC -echo filter add dev $DUMMY parent 10: u32 match u32 0 0 $(for i in $(seq 32); do echo action pedit munge ip dport set 22; done) | grep \"added filter\"'",
430
+
"verifyCmd": "",
431
+
"expExitCode": "0",
432
+
"matchCount": "0",
433
+
"matchPattern": "",
434
+
"teardown": [
435
+
"$TC qdisc del dev $DUMMY parent root fq_codel"
436
+
]
415
437
}
416
438
]