tjh.dev / kernel
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phy: cadence-torrent: Add PCIe multilink configuration for 100 MHz refclk

Add register sequences to support PCIe multilink configuration for 100MHz
reference clock. Maximum two PCIe links are supported.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20250616064705.3225758-2-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Swapnil Jakhade and committed by
Vinod Koul 240ef19a 47311eaa

+129 -1
+129 -1
drivers/phy/cadence/phy-cadence-torrent.c
··· 197 197 #define RX_SDCAL1_INIT_TMR 0x004CU 198 198 #define RX_SDCAL1_ITER_TMR 0x004DU 199 199 #define RX_CDRLF_CNFG 0x0080U 200 + #define RX_CDRLF_CNFG2 0x0081U 200 201 #define RX_CDRLF_CNFG3 0x0082U 201 202 #define RX_SIGDET_HL_FILT_TMR 0x0090U 202 203 #define RX_REE_GCSM1_CTRL 0x0108U ··· 205 204 #define RX_REE_GCSM1_EQENM_PH2 0x010AU 206 205 #define RX_REE_GCSM2_CTRL 0x0110U 207 206 #define RX_REE_PERGCSM_CTRL 0x0118U 207 + #define RX_REE_PEAK_UTHR 0x0142U 208 208 #define RX_REE_ATTEN_THR 0x0149U 209 209 #define RX_REE_TAP1_CLIP 0x0171U 210 210 #define RX_REE_TAP2TON_CLIP 0x0172U ··· 214 212 #define RX_DIAG_DFE_CTRL 0x01E0U 215 213 #define RX_DIAG_DFE_AMP_TUNE_2 0x01E2U 216 214 #define RX_DIAG_DFE_AMP_TUNE_3 0x01E3U 215 + #define RX_DIAG_REE_DAC_CTRL 0x01E4U 217 216 #define RX_DIAG_NQST_CTRL 0x01E5U 218 217 #define RX_DIAG_SIGDET_TUNE 0x01E8U 219 218 #define RX_DIAG_PI_RATE 0x01F4U ··· 3134 3131 cdns_torrent_clk_cleanup(cdns_phy); 3135 3132 } 3136 3133 3134 + /* Multi link PCIe configuration */ 3135 + static const struct cdns_reg_pairs ml_pcie_link_cmn_regs[] = { 3136 + {0x0002, PHY_PLL_CFG}, 3137 + {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0} 3138 + }; 3139 + 3140 + static const struct cdns_reg_pairs ml_pcie_xcvr_diag_ln_regs[] = { 3141 + {0x0100, XCVR_DIAG_HSCLK_SEL}, 3142 + {0x0001, XCVR_DIAG_HSCLK_DIV}, 3143 + {0x0812, XCVR_DIAG_PLLDRC_CTRL} 3144 + }; 3145 + 3146 + static const struct cdns_torrent_vals ml_pcie_link_cmn_vals = { 3147 + .reg_pairs = ml_pcie_link_cmn_regs, 3148 + .num_regs = ARRAY_SIZE(ml_pcie_link_cmn_regs), 3149 + }; 3150 + 3151 + static const struct cdns_torrent_vals ml_pcie_xcvr_diag_ln_vals = { 3152 + .reg_pairs = ml_pcie_xcvr_diag_ln_regs, 3153 + .num_regs = ARRAY_SIZE(ml_pcie_xcvr_diag_ln_regs), 3154 + }; 3155 + 3156 + /* Multi link PCIe, 100 MHz Ref clk, no SSC */ 3157 + static const struct cdns_reg_pairs ml_pcie_100_no_ssc_cmn_regs[] = { 3158 + {0x0003, CMN_PLL0_VCOCAL_TCTRL}, 3159 + {0x0003, CMN_PLL1_VCOCAL_TCTRL} 3160 + }; 3161 + 3162 + static const struct cdns_reg_pairs ml_pcie_100_no_ssc_rx_ln_regs[] = { 3163 + {0x0019, RX_REE_TAP1_CLIP}, 3164 + {0x0019, RX_REE_TAP2TON_CLIP}, 3165 + {0x0008, RX_REE_PEAK_UTHR}, 3166 + {0x018E, RX_CDRLF_CNFG}, 3167 + {0x2E33, RX_CDRLF_CNFG2}, 3168 + {0x0001, RX_DIAG_ACYA}, 3169 + {0x0C21, RX_DIAG_DFE_AMP_TUNE_2}, 3170 + {0x0002, RX_DIAG_DFE_AMP_TUNE_3}, 3171 + {0x0005, RX_DIAG_REE_DAC_CTRL} 3172 + }; 3173 + 3174 + static const struct cdns_torrent_vals ml_pcie_100_no_ssc_cmn_vals = { 3175 + .reg_pairs = ml_pcie_100_no_ssc_cmn_regs, 3176 + .num_regs = ARRAY_SIZE(ml_pcie_100_no_ssc_cmn_regs), 3177 + }; 3178 + 3179 + static const struct cdns_torrent_vals ml_pcie_100_no_ssc_rx_ln_vals = { 3180 + .reg_pairs = ml_pcie_100_no_ssc_rx_ln_regs, 3181 + .num_regs = ARRAY_SIZE(ml_pcie_100_no_ssc_rx_ln_regs), 3182 + }; 3183 + 3184 + /* Multi link PCIe, 100 MHz Ref clk, internal SSC */ 3185 + static const struct cdns_reg_pairs ml_pcie_100_int_ssc_cmn_regs[] = { 3186 + {0x0004, CMN_PLL0_DSM_DIAG_M0}, 3187 + {0x0004, CMN_PLL1_DSM_DIAG_M0}, 3188 + {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0}, 3189 + {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0}, 3190 + {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0}, 3191 + {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0}, 3192 + {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0}, 3193 + {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0}, 3194 + {0x0064, CMN_PLL0_INTDIV_M0}, 3195 + {0x0050, CMN_PLL1_INTDIV_M0}, 3196 + {0x0002, CMN_PLL0_FRACDIVH_M0}, 3197 + {0x0002, CMN_PLL1_FRACDIVH_M0}, 3198 + {0x0044, CMN_PLL0_HIGH_THR_M0}, 3199 + {0x0036, CMN_PLL1_HIGH_THR_M0}, 3200 + {0x0002, CMN_PDIAG_PLL0_CTRL_M0}, 3201 + {0x0002, CMN_PDIAG_PLL1_CTRL_M0}, 3202 + {0x0001, CMN_PLL0_SS_CTRL1_M0}, 3203 + {0x0001, CMN_PLL1_SS_CTRL1_M0}, 3204 + {0x011B, CMN_PLL0_SS_CTRL2_M0}, 3205 + {0x011B, CMN_PLL1_SS_CTRL2_M0}, 3206 + {0x006E, CMN_PLL0_SS_CTRL3_M0}, 3207 + {0x0058, CMN_PLL1_SS_CTRL3_M0}, 3208 + {0x000E, CMN_PLL0_SS_CTRL4_M0}, 3209 + {0x0012, CMN_PLL1_SS_CTRL4_M0}, 3210 + {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START}, 3211 + {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START}, 3212 + {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START}, 3213 + {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START}, 3214 + {0x0003, CMN_PLL0_VCOCAL_TCTRL}, 3215 + {0x0003, CMN_PLL1_VCOCAL_TCTRL}, 3216 + {0x00C7, CMN_PLL0_LOCK_REFCNT_START}, 3217 + {0x00C7, CMN_PLL1_LOCK_REFCNT_START}, 3218 + {0x00C7, CMN_PLL0_LOCK_PLLCNT_START}, 3219 + {0x00C7, CMN_PLL1_LOCK_PLLCNT_START}, 3220 + {0x0005, CMN_PLL0_LOCK_PLLCNT_THR}, 3221 + {0x0005, CMN_PLL1_LOCK_PLLCNT_THR} 3222 + }; 3223 + 3224 + static const struct cdns_torrent_vals ml_pcie_100_int_ssc_cmn_vals = { 3225 + .reg_pairs = ml_pcie_100_int_ssc_cmn_regs, 3226 + .num_regs = ARRAY_SIZE(ml_pcie_100_int_ssc_cmn_regs), 3227 + }; 3228 + 3137 3229 /* SGMII and QSGMII link configuration */ 3138 3230 static const struct cdns_reg_pairs sgmii_qsgmii_link_cmn_regs[] = { 3139 3231 {0x0002, PHY_PLL_CFG} ··· 4629 4531 .num_regs = ARRAY_SIZE(sl_sgmii_xcvr_diag_ln_regs), 4630 4532 }; 4631 4533 4632 - /* Multi link PCIe, 100 MHz Ref clk, internal SSC */ 4534 + /* For PCIe (with some other protocol), 100 MHz Ref clk, internal SSC */ 4633 4535 static const struct cdns_reg_pairs pcie_100_int_ssc_cmn_regs[] = { 4634 4536 {0x0004, CMN_PLL0_DSM_DIAG_M0}, 4635 4537 {0x0004, CMN_PLL0_DSM_DIAG_M1}, ··· 4768 4670 {CDNS_TORRENT_KEY_ANYCLK(TYPE_DP, TYPE_USB), &usb_dp_link_cmn_vals}, 4769 4671 4770 4672 {CDNS_TORRENT_KEY_ANYCLK(TYPE_PCIE, TYPE_NONE), NULL}, 4673 + {CDNS_TORRENT_KEY_ANYCLK(TYPE_PCIE, TYPE_PCIE), &ml_pcie_link_cmn_vals}, 4771 4674 {CDNS_TORRENT_KEY_ANYCLK(TYPE_PCIE, TYPE_SGMII), &pcie_sgmii_link_cmn_vals}, 4772 4675 {CDNS_TORRENT_KEY_ANYCLK(TYPE_PCIE, TYPE_QSGMII), &pcie_sgmii_link_cmn_vals}, 4773 4676 {CDNS_TORRENT_KEY_ANYCLK(TYPE_PCIE, TYPE_USB), &pcie_usb_link_cmn_vals}, ··· 4805 4706 {CDNS_TORRENT_KEY_ANYCLK(TYPE_DP, TYPE_USB), &dp_usb_xcvr_diag_ln_vals}, 4806 4707 4807 4708 {CDNS_TORRENT_KEY_ANYCLK(TYPE_PCIE, TYPE_NONE), NULL}, 4709 + {CDNS_TORRENT_KEY_ANYCLK(TYPE_PCIE, TYPE_PCIE), &ml_pcie_xcvr_diag_ln_vals}, 4808 4710 {CDNS_TORRENT_KEY_ANYCLK(TYPE_PCIE, TYPE_SGMII), &pcie_sgmii_xcvr_diag_ln_vals}, 4809 4711 {CDNS_TORRENT_KEY_ANYCLK(TYPE_PCIE, TYPE_QSGMII), &pcie_sgmii_xcvr_diag_ln_vals}, 4810 4712 {CDNS_TORRENT_KEY_ANYCLK(TYPE_PCIE, TYPE_USB), &pcie_usb_xcvr_diag_ln_vals}, ··· 4855 4755 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, NO_SSC), NULL}, 4856 4756 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, EXTERNAL_SSC), NULL}, 4857 4757 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, INTERNAL_SSC), &sl_pcie_100_int_ssc_cmn_vals}, 4758 + 4759 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, NO_SSC), &ml_pcie_100_no_ssc_cmn_vals}, 4760 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, EXTERNAL_SSC), &ml_pcie_100_no_ssc_cmn_vals}, 4761 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, INTERNAL_SSC), &ml_pcie_100_int_ssc_cmn_vals}, 4858 4762 4859 4763 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, NO_SSC), &pcie_100_no_ssc_cmn_vals}, 4860 4764 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, EXTERNAL_SSC), &pcie_100_no_ssc_cmn_vals}, ··· 4942 4838 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, EXTERNAL_SSC), NULL}, 4943 4839 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, INTERNAL_SSC), NULL}, 4944 4840 4841 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, NO_SSC), NULL}, 4842 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, EXTERNAL_SSC), NULL}, 4843 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, INTERNAL_SSC), NULL}, 4844 + 4945 4845 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, NO_SSC), NULL}, 4946 4846 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, EXTERNAL_SSC), NULL}, 4947 4847 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, INTERNAL_SSC), NULL}, ··· 5027 4919 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, NO_SSC), &pcie_100_no_ssc_rx_ln_vals}, 5028 4920 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, EXTERNAL_SSC), &pcie_100_no_ssc_rx_ln_vals}, 5029 4921 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, INTERNAL_SSC), &pcie_100_no_ssc_rx_ln_vals}, 4922 + 4923 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, NO_SSC), &ml_pcie_100_no_ssc_rx_ln_vals}, 4924 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, EXTERNAL_SSC), &ml_pcie_100_no_ssc_rx_ln_vals}, 4925 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, INTERNAL_SSC), &ml_pcie_100_no_ssc_rx_ln_vals}, 5030 4926 5031 4927 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, NO_SSC), &pcie_100_no_ssc_rx_ln_vals}, 5032 4928 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, EXTERNAL_SSC), &pcie_100_no_ssc_rx_ln_vals}, ··· 5150 5038 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, EXTERNAL_SSC), NULL}, 5151 5039 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, INTERNAL_SSC), NULL}, 5152 5040 5041 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, NO_SSC), NULL}, 5042 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, EXTERNAL_SSC), NULL}, 5043 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, INTERNAL_SSC), NULL}, 5044 + 5153 5045 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, NO_SSC), NULL}, 5154 5046 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, EXTERNAL_SSC), NULL}, 5155 5047 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, INTERNAL_SSC), NULL}, ··· 5270 5154 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, EXTERNAL_SSC), NULL}, 5271 5155 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, INTERNAL_SSC), &sl_pcie_100_int_ssc_cmn_vals}, 5272 5156 5157 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, NO_SSC), &ml_pcie_100_no_ssc_cmn_vals}, 5158 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, EXTERNAL_SSC), &ml_pcie_100_no_ssc_cmn_vals}, 5159 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, INTERNAL_SSC), &ml_pcie_100_int_ssc_cmn_vals}, 5160 + 5273 5161 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, NO_SSC), &pcie_100_no_ssc_cmn_vals}, 5274 5162 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, EXTERNAL_SSC), &pcie_100_no_ssc_cmn_vals}, 5275 5163 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, INTERNAL_SSC), &pcie_100_int_ssc_cmn_vals}, ··· 5356 5236 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, EXTERNAL_SSC), NULL}, 5357 5237 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, INTERNAL_SSC), NULL}, 5358 5238 5239 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, NO_SSC), NULL}, 5240 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, EXTERNAL_SSC), NULL}, 5241 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, INTERNAL_SSC), NULL}, 5242 + 5359 5243 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, NO_SSC), NULL}, 5360 5244 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, EXTERNAL_SSC), NULL}, 5361 5245 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, INTERNAL_SSC), NULL}, ··· 5441 5317 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, NO_SSC), &pcie_100_no_ssc_rx_ln_vals}, 5442 5318 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, EXTERNAL_SSC), &pcie_100_no_ssc_rx_ln_vals}, 5443 5319 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_NONE, INTERNAL_SSC), &pcie_100_no_ssc_rx_ln_vals}, 5320 + 5321 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, NO_SSC), &pcie_100_no_ssc_rx_ln_vals}, 5322 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, EXTERNAL_SSC), &pcie_100_no_ssc_rx_ln_vals}, 5323 + {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_PCIE, INTERNAL_SSC), &pcie_100_no_ssc_rx_ln_vals}, 5444 5324 5445 5325 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, NO_SSC), &pcie_100_no_ssc_rx_ln_vals}, 5446 5326 {CDNS_TORRENT_KEY(CLK_100_MHZ, CLK_100_MHZ, TYPE_PCIE, TYPE_SGMII, EXTERNAL_SSC), &pcie_100_no_ssc_rx_ln_vals},