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drm/amd/pm: Fill max mem bw & total app clk counter

Fill max memory bandwidth and total app clock counter to metrics v1_7

v2: Remove unnecessary check

v3: Add app clock counter support for apu

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Asad Kamal and committed by
Alex Deucher
24a1b667 6caf95b7

+23
+23
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
··· 119 119 } 120 120 } 121 121 122 + static inline bool smu_v13_0_6_is_blw_host_limit_available(struct smu_context *smu) 123 + { 124 + if (smu->adev->flags & AMD_IS_APU) 125 + return smu->smc_fw_version >= 0x04556F00; 126 + 127 + switch (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)) { 128 + case IP_VERSION(13, 0, 6): 129 + return smu->smc_fw_version >= 0x557900; 130 + case IP_VERSION(13, 0, 14): 131 + return smu->smc_fw_version >= 0x05551000; 132 + default: 133 + return false; 134 + } 135 + } 136 + 122 137 struct mca_bank_ipid { 123 138 enum amdgpu_mca_ip ip; 124 139 uint16_t hwid; ··· 2373 2358 gpu_metrics->average_umc_activity = 2374 2359 SMUQ10_ROUND(GET_METRIC_FIELD(DramBandwidthUtilization, flag)); 2375 2360 2361 + gpu_metrics->mem_max_bandwidth = 2362 + SMUQ10_ROUND(GET_METRIC_FIELD(MaxDramBandwidth, flag)); 2363 + 2376 2364 gpu_metrics->curr_socket_power = 2377 2365 SMUQ10_ROUND(GET_METRIC_FIELD(SocketPower, flag)); 2378 2366 /* Energy counter reported in 15.259uJ (2^-16) units */ ··· 2514 2496 SMUQ10_ROUND(metrics_x->GfxBusy[inst]); 2515 2497 gpu_metrics->xcp_stats[i].gfx_busy_acc[idx] = 2516 2498 SMUQ10_ROUND(metrics_x->GfxBusyAcc[inst]); 2499 + 2500 + if (smu_v13_0_6_is_blw_host_limit_available(smu)) 2501 + gpu_metrics->xcp_stats[i].gfx_below_host_limit_acc[idx] = 2502 + SMUQ10_ROUND(metrics_x->GfxclkBelowHostLimitAcc 2503 + [inst]); 2517 2504 idx++; 2518 2505 } 2519 2506 }