Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'spi-v3.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown:
"A few driver specific fixes, the biggest one being a fix for the newly
added Qualcomm SPI controller driver to make it not use its internal
chip select due to hardware bugs, replacing it with GPIOs"
* tag 'spi-v3.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: qup: Remove chip select function
spi: qup: Fix order of spi_register_master
spi: sh-sci: fix use-after-free in sh_sci_spi_remove()
spi/pxa2xx: fix incorrect SW mode chipselect setting for BayTrail LPSS SPI
+27
-35
+6
Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
+6
Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
···
23
23
- spi-max-frequency: Specifies maximum SPI clock frequency,
24
24
Units - Hz. Definition as per
25
25
Documentation/devicetree/bindings/spi/spi-bus.txt
26
+
- num-cs: total number of chipselects
27
+
- cs-gpios: should specify GPIOs used for chipselects.
28
+
The gpios will be referred to as reg = <index> in the SPI child
29
+
nodes. If unspecified, a single SPI device without a chip
30
+
select can be used.
31
+
26
32
27
33
SPI slave nodes must be children of the SPI master node and can contain
28
34
properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
+6
-2
drivers/spi/spi-pxa2xx.c
+6
-2
drivers/spi/spi-pxa2xx.c
···
118
118
*/
119
119
orig = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL);
120
120
121
+
/* Test SPI_CS_CONTROL_SW_MODE bit enabling */
121
122
value = orig | SPI_CS_CONTROL_SW_MODE;
122
123
writel(value, drv_data->ioaddr + offset + SPI_CS_CONTROL);
123
124
value = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL);
···
127
126
goto detection_done;
128
127
}
129
128
130
-
value &= ~SPI_CS_CONTROL_SW_MODE;
129
+
orig = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL);
130
+
131
+
/* Test SPI_CS_CONTROL_SW_MODE bit disabling */
132
+
value = orig & ~SPI_CS_CONTROL_SW_MODE;
131
133
writel(value, drv_data->ioaddr + offset + SPI_CS_CONTROL);
132
134
value = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL);
133
-
if (value != orig) {
135
+
if (value != (orig & ~SPI_CS_CONTROL_SW_MODE)) {
134
136
offset = 0x800;
135
137
goto detection_done;
136
138
}
+13
-31
drivers/spi/spi-qup.c
+13
-31
drivers/spi/spi-qup.c
···
424
424
return 0;
425
425
}
426
426
427
-
static void spi_qup_set_cs(struct spi_device *spi, bool enable)
428
-
{
429
-
struct spi_qup *controller = spi_master_get_devdata(spi->master);
430
-
431
-
u32 iocontol, mask;
432
-
433
-
iocontol = readl_relaxed(controller->base + SPI_IO_CONTROL);
434
-
435
-
/* Disable auto CS toggle and use manual */
436
-
iocontol &= ~SPI_IO_C_MX_CS_MODE;
437
-
iocontol |= SPI_IO_C_FORCE_CS;
438
-
439
-
iocontol &= ~SPI_IO_C_CS_SELECT_MASK;
440
-
iocontol |= SPI_IO_C_CS_SELECT(spi->chip_select);
441
-
442
-
mask = SPI_IO_C_CS_N_POLARITY_0 << spi->chip_select;
443
-
444
-
if (enable)
445
-
iocontol |= mask;
446
-
else
447
-
iocontol &= ~mask;
448
-
449
-
writel_relaxed(iocontol, controller->base + SPI_IO_CONTROL);
450
-
}
451
-
452
427
static int spi_qup_transfer_one(struct spi_master *master,
453
428
struct spi_device *spi,
454
429
struct spi_transfer *xfer)
···
546
571
return -ENOMEM;
547
572
}
548
573
574
+
/* use num-cs unless not present or out of range */
575
+
if (of_property_read_u16(dev->of_node, "num-cs",
576
+
&master->num_chipselect) ||
577
+
(master->num_chipselect > SPI_NUM_CHIPSELECTS))
578
+
master->num_chipselect = SPI_NUM_CHIPSELECTS;
579
+
549
580
master->bus_num = pdev->id;
550
581
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;
551
-
master->num_chipselect = SPI_NUM_CHIPSELECTS;
552
582
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
553
583
master->max_speed_hz = max_freq;
554
-
master->set_cs = spi_qup_set_cs;
555
584
master->transfer_one = spi_qup_transfer_one;
556
585
master->dev.of_node = pdev->dev.of_node;
557
586
master->auto_runtime_pm = true;
···
619
640
if (ret)
620
641
goto error;
621
642
622
-
ret = devm_spi_register_master(dev, master);
623
-
if (ret)
624
-
goto error;
625
-
626
643
pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
627
644
pm_runtime_use_autosuspend(dev);
628
645
pm_runtime_set_active(dev);
629
646
pm_runtime_enable(dev);
647
+
648
+
ret = devm_spi_register_master(dev, master);
649
+
if (ret)
650
+
goto disable_pm;
651
+
630
652
return 0;
631
653
654
+
disable_pm:
655
+
pm_runtime_disable(&pdev->dev);
632
656
error:
633
657
clk_disable_unprepare(cclk);
634
658
clk_disable_unprepare(iclk);
+2
-2
drivers/spi/spi-sh-sci.c
+2
-2
drivers/spi/spi-sh-sci.c
···
175
175
{
176
176
struct sh_sci_spi *sp = platform_get_drvdata(dev);
177
177
178
-
iounmap(sp->membase);
179
-
setbits(sp, PIN_INIT, 0);
180
178
spi_bitbang_stop(&sp->bitbang);
179
+
setbits(sp, PIN_INIT, 0);
180
+
iounmap(sp->membase);
181
181
spi_master_put(sp->bitbang.master);
182
182
return 0;
183
183
}