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ARM: dts: r9a06g032: Add the two DMA nodes

Describe the two DMA controllers available on this SoC.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220427095653.91804-9-miquel.raynal@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

authored by

Miquel Raynal and committed by
Geert Uytterhoeven 257d24b3 747bbcd3

+28
+28
arch/arm/boot/dts/r9a06g032.dtsi
··· 201 201 status = "disabled"; 202 202 }; 203 203 204 + dma0: dma-controller@40104000 { 205 + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; 206 + reg = <0x40104000 0x1000>; 207 + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 208 + clock-names = "hclk"; 209 + clocks = <&sysctrl R9A06G032_HCLK_DMA0>; 210 + dma-channels = <8>; 211 + dma-requests = <16>; 212 + dma-masters = <1>; 213 + #dma-cells = <3>; 214 + block_size = <0xfff>; 215 + data-width = <8>; 216 + }; 217 + 218 + dma1: dma-controller@40105000 { 219 + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; 220 + reg = <0x40105000 0x1000>; 221 + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 222 + clock-names = "hclk"; 223 + clocks = <&sysctrl R9A06G032_HCLK_DMA1>; 224 + dma-channels = <8>; 225 + dma-requests = <16>; 226 + dma-masters = <1>; 227 + #dma-cells = <3>; 228 + block_size = <0xfff>; 229 + data-width = <8>; 230 + }; 231 + 204 232 gic: interrupt-controller@44101000 { 205 233 compatible = "arm,gic-400", "arm,cortex-a7-gic"; 206 234 interrupt-controller;