Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/msm/dpu: fix SSPP_UBWC_STATIC_CTRL programming on UBWC 5.x+
Code in dpu_hw_sspp_setup_format() doesn't handle UBWC versions bigger
than 4.0. Replace switch-case with if-else checks, making sure that the
register is initialized on UBWC 5.x (and later) hosts.
Fixes: c2577fc1740d ("drm/msm/dpu: Add support for SM8750")
Tested-by: Val Packett <val@packett.cool> # x1e80100-dell-latitude-7455
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/699280/
Link: https://lore.kernel.org/r/20260119-msm-ubwc-fixes-v4-4-0987acc0427f@oss.qualcomm.com
+24
-21
+24
-21
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+24
-21
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
···
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if (fmt->fetch_mode != MDP_FETCH_LINEAR) {
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u32 hbb = ctx->ubwc->highest_bank_bit - 13;
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+
u32 ctrl_val;
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if (MSM_FORMAT_IS_UBWC(fmt))
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opmode |= MDSS_MDP_OP_BWC_EN;
···
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DPU_REG_WRITE(c, SSPP_FETCH_CONFIG,
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DPU_FETCH_CONFIG_RESET_VALUE |
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hbb << 18);
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-
switch (ctx->ubwc->ubwc_enc_version) {
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-
case UBWC_1_0:
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+
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+
if (ctx->ubwc->ubwc_enc_version == UBWC_1_0) {
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fast_clear = fmt->alpha_enable ? BIT(31) : 0;
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-
DPU_REG_WRITE(c, ubwc_ctrl_off,
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-
fast_clear | (ctx->ubwc->ubwc_swizzle & 0x1) |
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-
BIT(8) |
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-
(hbb << 4));
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-
break;
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-
case UBWC_2_0:
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+
ctrl_val = fast_clear | (ctx->ubwc->ubwc_swizzle & 0x1) |
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+
BIT(8) | (hbb << 4);
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+
} else if (ctx->ubwc->ubwc_enc_version == UBWC_2_0) {
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fast_clear = fmt->alpha_enable ? BIT(31) : 0;
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-
DPU_REG_WRITE(c, ubwc_ctrl_off,
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-
fast_clear | (ctx->ubwc->ubwc_swizzle) |
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-
(hbb << 4));
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-
break;
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-
case UBWC_3_0:
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-
DPU_REG_WRITE(c, ubwc_ctrl_off,
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-
BIT(30) | (ctx->ubwc->ubwc_swizzle) |
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-
(hbb << 4));
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-
break;
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-
case UBWC_4_0:
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-
DPU_REG_WRITE(c, ubwc_ctrl_off,
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-
MSM_FORMAT_IS_YUV(fmt) ? 0 : BIT(30));
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-
break;
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+
ctrl_val = fast_clear | ctx->ubwc->ubwc_swizzle | (hbb << 4);
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+
} else if (ctx->ubwc->ubwc_enc_version == UBWC_3_0) {
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+
ctrl_val = BIT(30) | (ctx->ubwc->ubwc_swizzle) | (hbb << 4);
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+
} else if (ctx->ubwc->ubwc_enc_version == UBWC_4_0) {
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+
ctrl_val = MSM_FORMAT_IS_YUV(fmt) ? 0 : BIT(30);
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+
} else if (ctx->ubwc->ubwc_enc_version <= UBWC_6_0) {
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+
if (MSM_FORMAT_IS_YUV(fmt))
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+
ctrl_val = 0;
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+
else if (MSM_FORMAT_IS_DX(fmt)) /* or FP16, but it's unsupported */
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+
ctrl_val = BIT(30);
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+
else
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+
ctrl_val = BIT(30) | BIT(31);
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+
/* SDE also sets bits for lossy formats, but we don't support them yet */
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+
} else {
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+
DRM_WARN_ONCE("Unsupported UBWC version %x\n", ctx->ubwc->ubwc_enc_version);
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+
ctrl_val = 0;
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}
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+
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+
DPU_REG_WRITE(c, ubwc_ctrl_off, ctrl_val);
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}
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opmode |= MDSS_MDP_OP_PE_OVERRIDE;