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mtd: spinand: winbond: Clarify when to enable the HS bit

Above 104MHz when in fast dual or quad I/O reads, the delay between
address and data cycles is too short. It is possible to reach higher
frequencies, up to 166MHz, by adding a few more dummy cycles through the
setting of the HS bit. Improve the condition for enabling this bit, and
also make sure we set it at soon as we go over 104MHz.

Fixes: f1a91175faaa ("mtd: spinand: winbond: Enable high-speed modes on w25n0xjw")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

+8 -5
+8 -5
drivers/mtd/nand/spi/winbond.c
··· 337 337 if (iface != SSDR) 338 338 return -EOPNOTSUPP; 339 339 340 + /* 341 + * SDR dual and quad I/O operations over 104MHz require the HS bit to 342 + * enable a few more dummy cycles. 343 + */ 340 344 op = spinand->op_templates->read_cache; 341 345 if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr) 342 346 hs = false; 343 - else if (op->cmd.buswidth == 1 && op->addr.buswidth == 1 && 344 - op->dummy.buswidth == 1 && op->data.buswidth == 1) 347 + else if (op->cmd.buswidth != 1 || op->addr.buswidth == 1) 345 348 hs = false; 346 - else if (!op->max_freq) 347 - hs = true; 349 + else if (op->max_freq && op->max_freq <= 104 * HZ_PER_MHZ) 350 + hs = false; 348 351 else 349 - hs = false; 352 + hs = true; 350 353 351 354 ret = spinand_read_reg_op(spinand, W25N0XJW_SR4, &sr4); 352 355 if (ret)