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Merge tag 'pinctrl-v5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:

- Fix an issue in the AMD driver for the UART0 group

- Fix a glitch issue in the Baytrail pin controller

* tag 'pinctrl-v5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: baytrail: Fix pin being driven low for a while on gpiod_get(..., GPIOD_OUT_HIGH)
pinctrl: amd: fix npins for uart0 in kerncz_groups

+54 -15
+53 -14
drivers/pinctrl/intel/pinctrl-baytrail.c
··· 800 800 pm_runtime_put(vg->dev); 801 801 } 802 802 803 + static void byt_gpio_direct_irq_check(struct intel_pinctrl *vg, 804 + unsigned int offset) 805 + { 806 + void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); 807 + 808 + /* 809 + * Before making any direction modifications, do a check if gpio is set 810 + * for direct IRQ. On Bay Trail, setting GPIO to output does not make 811 + * sense, so let's at least inform the caller before they shoot 812 + * themselves in the foot. 813 + */ 814 + if (readl(conf_reg) & BYT_DIRECT_IRQ_EN) 815 + dev_info_once(vg->dev, "Potential Error: Setting GPIO with direct_irq_en to output"); 816 + } 817 + 803 818 static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev, 804 819 struct pinctrl_gpio_range *range, 805 820 unsigned int offset, ··· 822 807 { 823 808 struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); 824 809 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); 825 - void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); 826 810 unsigned long flags; 827 811 u32 value; 828 812 ··· 831 817 value &= ~BYT_DIR_MASK; 832 818 if (input) 833 819 value |= BYT_OUTPUT_EN; 834 - else if (readl(conf_reg) & BYT_DIRECT_IRQ_EN) 835 - /* 836 - * Before making any direction modifications, do a check if gpio 837 - * is set for direct IRQ. On baytrail, setting GPIO to output 838 - * does not make sense, so let's at least inform the caller before 839 - * they shoot themselves in the foot. 840 - */ 841 - dev_info_once(vg->dev, "Potential Error: Setting GPIO with direct_irq_en to output"); 820 + else 821 + byt_gpio_direct_irq_check(vg, offset); 842 822 843 823 writel(value, val_reg); 844 824 ··· 1173 1165 1174 1166 static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) 1175 1167 { 1176 - return pinctrl_gpio_direction_input(chip->base + offset); 1168 + struct intel_pinctrl *vg = gpiochip_get_data(chip); 1169 + void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); 1170 + unsigned long flags; 1171 + u32 reg; 1172 + 1173 + raw_spin_lock_irqsave(&byt_lock, flags); 1174 + 1175 + reg = readl(val_reg); 1176 + reg &= ~BYT_DIR_MASK; 1177 + reg |= BYT_OUTPUT_EN; 1178 + writel(reg, val_reg); 1179 + 1180 + raw_spin_unlock_irqrestore(&byt_lock, flags); 1181 + return 0; 1177 1182 } 1178 1183 1184 + /* 1185 + * Note despite the temptation this MUST NOT be converted into a call to 1186 + * pinctrl_gpio_direction_output() + byt_gpio_set() that does not work this 1187 + * MUST be done as a single BYT_VAL_REG register write. 1188 + * See the commit message of the commit adding this comment for details. 1189 + */ 1179 1190 static int byt_gpio_direction_output(struct gpio_chip *chip, 1180 1191 unsigned int offset, int value) 1181 1192 { 1182 - int ret = pinctrl_gpio_direction_output(chip->base + offset); 1193 + struct intel_pinctrl *vg = gpiochip_get_data(chip); 1194 + void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); 1195 + unsigned long flags; 1196 + u32 reg; 1183 1197 1184 - if (ret) 1185 - return ret; 1198 + raw_spin_lock_irqsave(&byt_lock, flags); 1186 1199 1187 - byt_gpio_set(chip, offset, value); 1200 + byt_gpio_direct_irq_check(vg, offset); 1188 1201 1202 + reg = readl(val_reg); 1203 + reg &= ~BYT_DIR_MASK; 1204 + if (value) 1205 + reg |= BYT_LEVEL; 1206 + else 1207 + reg &= ~BYT_LEVEL; 1208 + 1209 + writel(reg, val_reg); 1210 + 1211 + raw_spin_unlock_irqrestore(&byt_lock, flags); 1189 1212 return 0; 1190 1213 } 1191 1214
+1 -1
drivers/pinctrl/pinctrl-amd.h
··· 252 252 { 253 253 .name = "uart0", 254 254 .pins = uart0_pins, 255 - .npins = 9, 255 + .npins = 5, 256 256 }, 257 257 { 258 258 .name = "uart1",