Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'char-misc-3.15-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver fixes from Greg KH:
"Here are a few driver fixes for char/misc drivers that resolve
reported issues.
All have been in linux-next successfully for a few days"
* tag 'char-misc-3.15-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc:
Drivers: hv: vmbus: Negotiate version 3.0 when running on ws2012r2 hosts
Tools: hv: Handle the case when the target file exists correctly
vme_tsi148: Utilize to_pci_dev() macro
vme_tsi148: Fix PCI address mapping assumption
vme_tsi148: Fix typo in tsi148_slave_get()
w1: avoid recursive device_add
w1: fix netlink refcnt leak on error path
misc: Grammar s/addition/additional/
drivers: mcb: fix memory leak in chameleon_parse_cells() error path
mei: ignore client writing state during cb completion
mei: me: do not load the driver if the FW doesn't support MEI interface
GenWQE: Increase driver version number
GenWQE: Fix multithreading problems
GenWQE: Ensure rc is not returning an uninitialized value
GenWQE: Add wmb before DDCB is started
GenWQE: Enable access to VPD flash area
+280
-158
+4
-1
drivers/hv/connection.c
+4
-1
drivers/hv/connection.c
···
55
55
case (VERSION_WIN8):
56
56
return VERSION_WIN7;
57
57
58
+
case (VERSION_WIN8_1):
59
+
return VERSION_WIN8;
60
+
58
61
case (VERSION_WS2008):
59
62
default:
60
63
return VERSION_INVAL;
···
80
77
msg->interrupt_page = virt_to_phys(vmbus_connection.int_page);
81
78
msg->monitor_page1 = virt_to_phys(vmbus_connection.monitor_pages[0]);
82
79
msg->monitor_page2 = virt_to_phys(vmbus_connection.monitor_pages[1]);
83
-
if (version == VERSION_WIN8)
80
+
if (version == VERSION_WIN8_1)
84
81
msg->target_vcpu = hv_context.vp_index[smp_processor_id()];
85
82
86
83
/*
+1
drivers/mcb/mcb-parse.c
+1
drivers/mcb/mcb-parse.c
+2
-2
drivers/misc/Kconfig
+2
-2
drivers/misc/Kconfig
···
300
300
depends on SGI_GRU
301
301
default n
302
302
---help---
303
-
This option enables addition debugging code for the SGI GRU driver. If
304
-
you are unsure, say N.
303
+
This option enables additional debugging code for the SGI GRU driver.
304
+
If you are unsure, say N.
305
305
306
306
config APDS9802ALS
307
307
tristate "Medfield Avago APDS9802 ALS Sensor module"
+39
-19
drivers/misc/genwqe/card_base.h
+39
-19
drivers/misc/genwqe/card_base.h
···
337
337
};
338
338
339
339
/**
340
+
* struct genwqe_sgl - Scatter gather list describing user-space memory
341
+
* @sgl: scatter gather list needs to be 128 byte aligned
342
+
* @sgl_dma_addr: dma address of sgl
343
+
* @sgl_size: size of area used for sgl
344
+
* @user_addr: user-space address of memory area
345
+
* @user_size: size of user-space memory area
346
+
* @page: buffer for partial pages if needed
347
+
* @page_dma_addr: dma address partial pages
348
+
*/
349
+
struct genwqe_sgl {
350
+
dma_addr_t sgl_dma_addr;
351
+
struct sg_entry *sgl;
352
+
size_t sgl_size; /* size of sgl */
353
+
354
+
void __user *user_addr; /* user-space base-address */
355
+
size_t user_size; /* size of memory area */
356
+
357
+
unsigned long nr_pages;
358
+
unsigned long fpage_offs;
359
+
size_t fpage_size;
360
+
size_t lpage_size;
361
+
362
+
void *fpage;
363
+
dma_addr_t fpage_dma_addr;
364
+
365
+
void *lpage;
366
+
dma_addr_t lpage_dma_addr;
367
+
};
368
+
369
+
int genwqe_alloc_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
370
+
void __user *user_addr, size_t user_size);
371
+
372
+
int genwqe_setup_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
373
+
dma_addr_t *dma_list);
374
+
375
+
int genwqe_free_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl);
376
+
377
+
/**
340
378
* struct ddcb_requ - Kernel internal representation of the DDCB request
341
379
* @cmd: User space representation of the DDCB execution request
342
380
*/
···
385
347
struct ddcb_queue *queue; /* associated queue */
386
348
387
349
struct dma_mapping dma_mappings[DDCB_FIXUPS];
388
-
struct sg_entry *sgl[DDCB_FIXUPS];
389
-
dma_addr_t sgl_dma_addr[DDCB_FIXUPS];
390
-
size_t sgl_size[DDCB_FIXUPS];
350
+
struct genwqe_sgl sgls[DDCB_FIXUPS];
391
351
392
352
/* kernel/user shared content */
393
353
struct genwqe_ddcb_cmd cmd; /* ddcb_no for this request */
···
488
452
489
453
int genwqe_user_vunmap(struct genwqe_dev *cd, struct dma_mapping *m,
490
454
struct ddcb_requ *req);
491
-
492
-
struct sg_entry *genwqe_alloc_sgl(struct genwqe_dev *cd, int num_pages,
493
-
dma_addr_t *dma_addr, size_t *sgl_size);
494
-
495
-
void genwqe_free_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list,
496
-
dma_addr_t dma_addr, size_t size);
497
-
498
-
int genwqe_setup_sgl(struct genwqe_dev *cd,
499
-
unsigned long offs,
500
-
unsigned long size,
501
-
struct sg_entry *sgl, /* genwqe sgl */
502
-
dma_addr_t dma_addr, size_t sgl_size,
503
-
dma_addr_t *dma_list, int page_offs, int num_pages);
504
-
505
-
int genwqe_check_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list,
506
-
int size);
507
455
508
456
static inline bool dma_mapping_used(struct dma_mapping *m)
509
457
{
+5
-1
drivers/misc/genwqe/card_ddcb.c
+5
-1
drivers/misc/genwqe/card_ddcb.c
···
305
305
break;
306
306
307
307
new = (old | DDCB_NEXT_BE32);
308
+
309
+
wmb();
308
310
icrc_hsi_shi = cmpxchg(&prev_ddcb->icrc_hsi_shi_32, old, new);
309
311
310
312
if (icrc_hsi_shi == old)
···
316
314
/* Queue must be re-started by updating QUEUE_OFFSET */
317
315
ddcb_mark_tapped(pddcb);
318
316
num = (u64)ddcb_no << 8;
317
+
318
+
wmb();
319
319
__genwqe_writeq(cd, queue->IO_QUEUE_OFFSET, num); /* start queue */
320
320
321
321
return RET_DDCB_TAPPED;
···
1310
1306
*/
1311
1307
int genwqe_finish_queue(struct genwqe_dev *cd)
1312
1308
{
1313
-
int i, rc, in_flight;
1309
+
int i, rc = 0, in_flight;
1314
1310
int waitmax = genwqe_ddcb_software_timeout;
1315
1311
struct pci_dev *pci_dev = cd->pci_dev;
1316
1312
struct ddcb_queue *queue = &cd->queue;
+16
-28
drivers/misc/genwqe/card_dev.c
+16
-28
drivers/misc/genwqe/card_dev.c
···
531
531
case '1':
532
532
cmdopts = 0x1C;
533
533
break; /* download/erase_first/part_1 */
534
-
case 'v': /* cmdopts = 0x0c (VPD) */
534
+
case 'v':
535
+
cmdopts = 0x0C;
536
+
break; /* download/erase_first/vpd */
535
537
default:
536
538
return -EINVAL;
537
539
}
···
667
665
cmdopts = 0x1A;
668
666
break; /* upload/part_1 */
669
667
case 'v':
668
+
cmdopts = 0x0A;
669
+
break; /* upload/vpd */
670
670
default:
671
671
return -EINVAL;
672
672
}
···
840
836
__genwqe_del_mapping(cfile, dma_map);
841
837
genwqe_user_vunmap(cd, dma_map, req);
842
838
}
843
-
if (req->sgl[i] != NULL) {
844
-
genwqe_free_sgl(cd, req->sgl[i],
845
-
req->sgl_dma_addr[i],
846
-
req->sgl_size[i]);
847
-
req->sgl[i] = NULL;
848
-
req->sgl_dma_addr[i] = 0x0;
849
-
req->sgl_size[i] = 0;
850
-
}
851
-
839
+
if (req->sgls[i].sgl != NULL)
840
+
genwqe_free_sync_sgl(cd, &req->sgls[i]);
852
841
}
853
842
return 0;
854
843
}
···
910
913
911
914
case ATS_TYPE_SGL_RDWR:
912
915
case ATS_TYPE_SGL_RD: {
913
-
int page_offs, nr_pages, offs;
916
+
int page_offs;
914
917
915
918
u_addr = be64_to_cpu(*((__be64 *)
916
919
&cmd->asiv[asiv_offs]));
···
948
951
page_offs = 0;
949
952
}
950
953
951
-
offs = offset_in_page(u_addr);
952
-
nr_pages = DIV_ROUND_UP(offs + u_size, PAGE_SIZE);
953
-
954
954
/* create genwqe style scatter gather list */
955
-
req->sgl[i] = genwqe_alloc_sgl(cd, m->nr_pages,
956
-
&req->sgl_dma_addr[i],
957
-
&req->sgl_size[i]);
958
-
if (req->sgl[i] == NULL) {
959
-
rc = -ENOMEM;
955
+
rc = genwqe_alloc_sync_sgl(cd, &req->sgls[i],
956
+
(void __user *)u_addr,
957
+
u_size);
958
+
if (rc != 0)
960
959
goto err_out;
961
-
}
962
-
genwqe_setup_sgl(cd, offs, u_size,
963
-
req->sgl[i],
964
-
req->sgl_dma_addr[i],
965
-
req->sgl_size[i],
966
-
m->dma_list,
967
-
page_offs,
968
-
nr_pages);
960
+
961
+
genwqe_setup_sgl(cd, &req->sgls[i],
962
+
&m->dma_list[page_offs]);
969
963
970
964
*((__be64 *)&cmd->asiv[asiv_offs]) =
971
-
cpu_to_be64(req->sgl_dma_addr[i]);
965
+
cpu_to_be64(req->sgls[i].sgl_dma_addr);
972
966
973
967
break;
974
968
}
+130
-40
drivers/misc/genwqe/card_utils.c
+130
-40
drivers/misc/genwqe/card_utils.c
···
275
275
return roundup(len, PAGE_SIZE);
276
276
}
277
277
278
-
struct sg_entry *genwqe_alloc_sgl(struct genwqe_dev *cd, int num_pages,
279
-
dma_addr_t *dma_addr, size_t *sgl_size)
278
+
/**
279
+
* genwqe_alloc_sync_sgl() - Allocate memory for sgl and overlapping pages
280
+
*
281
+
* Allocates memory for sgl and overlapping pages. Pages which might
282
+
* overlap other user-space memory blocks are being cached for DMAs,
283
+
* such that we do not run into syncronization issues. Data is copied
284
+
* from user-space into the cached pages.
285
+
*/
286
+
int genwqe_alloc_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
287
+
void __user *user_addr, size_t user_size)
280
288
{
289
+
int rc;
281
290
struct pci_dev *pci_dev = cd->pci_dev;
282
-
struct sg_entry *sgl;
283
291
284
-
*sgl_size = genwqe_sgl_size(num_pages);
285
-
if (get_order(*sgl_size) > MAX_ORDER) {
292
+
sgl->fpage_offs = offset_in_page((unsigned long)user_addr);
293
+
sgl->fpage_size = min_t(size_t, PAGE_SIZE-sgl->fpage_offs, user_size);
294
+
sgl->nr_pages = DIV_ROUND_UP(sgl->fpage_offs + user_size, PAGE_SIZE);
295
+
sgl->lpage_size = (user_size - sgl->fpage_size) % PAGE_SIZE;
296
+
297
+
dev_dbg(&pci_dev->dev, "[%s] uaddr=%p usize=%8ld nr_pages=%ld "
298
+
"fpage_offs=%lx fpage_size=%ld lpage_size=%ld\n",
299
+
__func__, user_addr, user_size, sgl->nr_pages,
300
+
sgl->fpage_offs, sgl->fpage_size, sgl->lpage_size);
301
+
302
+
sgl->user_addr = user_addr;
303
+
sgl->user_size = user_size;
304
+
sgl->sgl_size = genwqe_sgl_size(sgl->nr_pages);
305
+
306
+
if (get_order(sgl->sgl_size) > MAX_ORDER) {
286
307
dev_err(&pci_dev->dev,
287
308
"[%s] err: too much memory requested!\n", __func__);
288
-
return NULL;
309
+
return -ENOMEM;
289
310
}
290
311
291
-
sgl = __genwqe_alloc_consistent(cd, *sgl_size, dma_addr);
292
-
if (sgl == NULL) {
312
+
sgl->sgl = __genwqe_alloc_consistent(cd, sgl->sgl_size,
313
+
&sgl->sgl_dma_addr);
314
+
if (sgl->sgl == NULL) {
293
315
dev_err(&pci_dev->dev,
294
316
"[%s] err: no memory available!\n", __func__);
295
-
return NULL;
317
+
return -ENOMEM;
296
318
}
297
319
298
-
return sgl;
320
+
/* Only use buffering on incomplete pages */
321
+
if ((sgl->fpage_size != 0) && (sgl->fpage_size != PAGE_SIZE)) {
322
+
sgl->fpage = __genwqe_alloc_consistent(cd, PAGE_SIZE,
323
+
&sgl->fpage_dma_addr);
324
+
if (sgl->fpage == NULL)
325
+
goto err_out;
326
+
327
+
/* Sync with user memory */
328
+
if (copy_from_user(sgl->fpage + sgl->fpage_offs,
329
+
user_addr, sgl->fpage_size)) {
330
+
rc = -EFAULT;
331
+
goto err_out;
332
+
}
333
+
}
334
+
if (sgl->lpage_size != 0) {
335
+
sgl->lpage = __genwqe_alloc_consistent(cd, PAGE_SIZE,
336
+
&sgl->lpage_dma_addr);
337
+
if (sgl->lpage == NULL)
338
+
goto err_out1;
339
+
340
+
/* Sync with user memory */
341
+
if (copy_from_user(sgl->lpage, user_addr + user_size -
342
+
sgl->lpage_size, sgl->lpage_size)) {
343
+
rc = -EFAULT;
344
+
goto err_out1;
345
+
}
346
+
}
347
+
return 0;
348
+
349
+
err_out1:
350
+
__genwqe_free_consistent(cd, PAGE_SIZE, sgl->fpage,
351
+
sgl->fpage_dma_addr);
352
+
err_out:
353
+
__genwqe_free_consistent(cd, sgl->sgl_size, sgl->sgl,
354
+
sgl->sgl_dma_addr);
355
+
return -ENOMEM;
299
356
}
300
357
301
-
int genwqe_setup_sgl(struct genwqe_dev *cd,
302
-
unsigned long offs,
303
-
unsigned long size,
304
-
struct sg_entry *sgl,
305
-
dma_addr_t dma_addr, size_t sgl_size,
306
-
dma_addr_t *dma_list, int page_offs, int num_pages)
358
+
int genwqe_setup_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
359
+
dma_addr_t *dma_list)
307
360
{
308
361
int i = 0, j = 0, p;
309
362
unsigned long dma_offs, map_offs;
310
-
struct pci_dev *pci_dev = cd->pci_dev;
311
363
dma_addr_t prev_daddr = 0;
312
364
struct sg_entry *s, *last_s = NULL;
313
-
314
-
/* sanity checks */
315
-
if (offs > PAGE_SIZE) {
316
-
dev_err(&pci_dev->dev,
317
-
"[%s] too large start offs %08lx\n", __func__, offs);
318
-
return -EFAULT;
319
-
}
320
-
if (sgl_size < genwqe_sgl_size(num_pages)) {
321
-
dev_err(&pci_dev->dev,
322
-
"[%s] sgl_size too small %08lx for %d pages\n",
323
-
__func__, sgl_size, num_pages);
324
-
return -EFAULT;
325
-
}
365
+
size_t size = sgl->user_size;
326
366
327
367
dma_offs = 128; /* next block if needed/dma_offset */
328
-
map_offs = offs; /* offset in first page */
368
+
map_offs = sgl->fpage_offs; /* offset in first page */
329
369
330
-
s = &sgl[0]; /* first set of 8 entries */
370
+
s = &sgl->sgl[0]; /* first set of 8 entries */
331
371
p = 0; /* page */
332
-
while (p < num_pages) {
372
+
while (p < sgl->nr_pages) {
333
373
dma_addr_t daddr;
334
374
unsigned int size_to_map;
335
375
336
376
/* always write the chaining entry, cleanup is done later */
337
377
j = 0;
338
-
s[j].target_addr = cpu_to_be64(dma_addr + dma_offs);
378
+
s[j].target_addr = cpu_to_be64(sgl->sgl_dma_addr + dma_offs);
339
379
s[j].len = cpu_to_be32(128);
340
380
s[j].flags = cpu_to_be32(SG_CHAINED);
341
381
j++;
···
383
343
while (j < 8) {
384
344
/* DMA mapping for requested page, offs, size */
385
345
size_to_map = min(size, PAGE_SIZE - map_offs);
386
-
daddr = dma_list[page_offs + p] + map_offs;
346
+
347
+
if ((p == 0) && (sgl->fpage != NULL)) {
348
+
daddr = sgl->fpage_dma_addr + map_offs;
349
+
350
+
} else if ((p == sgl->nr_pages - 1) &&
351
+
(sgl->lpage != NULL)) {
352
+
daddr = sgl->lpage_dma_addr;
353
+
} else {
354
+
daddr = dma_list[p] + map_offs;
355
+
}
356
+
387
357
size -= size_to_map;
388
358
map_offs = 0;
389
359
···
408
358
size_to_map);
409
359
410
360
p++; /* process next page */
411
-
if (p == num_pages)
361
+
if (p == sgl->nr_pages)
412
362
goto fixup; /* nothing to do */
413
363
414
364
prev_daddr = daddr + size_to_map;
···
424
374
j++;
425
375
426
376
p++; /* process next page */
427
-
if (p == num_pages)
377
+
if (p == sgl->nr_pages)
428
378
goto fixup; /* nothing to do */
429
379
}
430
380
dma_offs += 128;
···
445
395
return 0;
446
396
}
447
397
448
-
void genwqe_free_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list,
449
-
dma_addr_t dma_addr, size_t size)
398
+
/**
399
+
* genwqe_free_sync_sgl() - Free memory for sgl and overlapping pages
400
+
*
401
+
* After the DMA transfer has been completed we free the memory for
402
+
* the sgl and the cached pages. Data is being transfered from cached
403
+
* pages into user-space buffers.
404
+
*/
405
+
int genwqe_free_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl)
450
406
{
451
-
__genwqe_free_consistent(cd, size, sg_list, dma_addr);
407
+
int rc;
408
+
struct pci_dev *pci_dev = cd->pci_dev;
409
+
410
+
if (sgl->fpage) {
411
+
if (copy_to_user(sgl->user_addr, sgl->fpage + sgl->fpage_offs,
412
+
sgl->fpage_size)) {
413
+
dev_err(&pci_dev->dev, "[%s] err: copying fpage!\n",
414
+
__func__);
415
+
rc = -EFAULT;
416
+
}
417
+
__genwqe_free_consistent(cd, PAGE_SIZE, sgl->fpage,
418
+
sgl->fpage_dma_addr);
419
+
sgl->fpage = NULL;
420
+
sgl->fpage_dma_addr = 0;
421
+
}
422
+
if (sgl->lpage) {
423
+
if (copy_to_user(sgl->user_addr + sgl->user_size -
424
+
sgl->lpage_size, sgl->lpage,
425
+
sgl->lpage_size)) {
426
+
dev_err(&pci_dev->dev, "[%s] err: copying lpage!\n",
427
+
__func__);
428
+
rc = -EFAULT;
429
+
}
430
+
__genwqe_free_consistent(cd, PAGE_SIZE, sgl->lpage,
431
+
sgl->lpage_dma_addr);
432
+
sgl->lpage = NULL;
433
+
sgl->lpage_dma_addr = 0;
434
+
}
435
+
__genwqe_free_consistent(cd, sgl->sgl_size, sgl->sgl,
436
+
sgl->sgl_dma_addr);
437
+
438
+
sgl->sgl = NULL;
439
+
sgl->sgl_dma_addr = 0x0;
440
+
sgl->sgl_size = 0;
441
+
return rc;
452
442
}
453
443
454
444
/**
+1
-1
drivers/misc/genwqe/genwqe_driver.h
+1
-1
drivers/misc/genwqe/genwqe_driver.h
+5
drivers/misc/mei/hw-me-regs.h
+5
drivers/misc/mei/hw-me-regs.h
···
115
115
#define MEI_DEV_ID_LPT_HR 0x8CBA /* Lynx Point H Refresh */
116
116
117
117
#define MEI_DEV_ID_WPT_LP 0x9CBA /* Wildcat Point LP */
118
+
119
+
/* Host Firmware Status Registers in PCI Config Space */
120
+
#define PCI_CFG_HFS_1 0x40
121
+
#define PCI_CFG_HFS_2 0x48
122
+
118
123
/*
119
124
* MEI HW Section
120
125
*/
+1
-2
drivers/misc/mei/interrupt.c
+1
-2
drivers/misc/mei/interrupt.c
···
455
455
456
456
cl->status = 0;
457
457
list_del(&cb->list);
458
-
if (MEI_WRITING == cl->writing_state &&
459
-
cb->fop_type == MEI_FOP_WRITE &&
458
+
if (cb->fop_type == MEI_FOP_WRITE &&
460
459
cl != &dev->iamthif_cl) {
461
460
cl_dbg(dev, cl, "MEI WRITE COMPLETE\n");
462
461
cl->writing_state = MEI_WRITE_COMPLETE;
+1
-2
drivers/misc/mei/main.c
+1
-2
drivers/misc/mei/main.c
+23
-7
drivers/misc/mei/pci-me.c
+23
-7
drivers/misc/mei/pci-me.c
···
97
97
const struct pci_device_id *ent)
98
98
{
99
99
u32 reg;
100
-
if (ent->device == MEI_DEV_ID_PBG_1) {
101
-
pci_read_config_dword(pdev, 0x48, ®);
102
-
/* make sure that bit 9 is up and bit 10 is down */
103
-
if ((reg & 0x600) == 0x200) {
104
-
dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
105
-
return false;
106
-
}
100
+
/* Cougar Point || Patsburg */
101
+
if (ent->device == MEI_DEV_ID_CPT_1 ||
102
+
ent->device == MEI_DEV_ID_PBG_1) {
103
+
pci_read_config_dword(pdev, PCI_CFG_HFS_2, ®);
104
+
/* make sure that bit 9 (NM) is up and bit 10 (DM) is down */
105
+
if ((reg & 0x600) == 0x200)
106
+
goto no_mei;
107
107
}
108
+
109
+
/* Lynx Point */
110
+
if (ent->device == MEI_DEV_ID_LPT_H ||
111
+
ent->device == MEI_DEV_ID_LPT_W ||
112
+
ent->device == MEI_DEV_ID_LPT_HR) {
113
+
/* Read ME FW Status check for SPS Firmware */
114
+
pci_read_config_dword(pdev, PCI_CFG_HFS_1, ®);
115
+
/* if bits [19:16] = 15, running SPS Firmware */
116
+
if ((reg & 0xf0000) == 0xf0000)
117
+
goto no_mei;
118
+
}
119
+
108
120
return true;
121
+
122
+
no_mei:
123
+
dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
124
+
return false;
109
125
}
110
126
/**
111
127
* mei_probe - Device Initialization Routine
+13
-9
drivers/vme/bridges/vme_tsi148.c
+13
-9
drivers/vme/bridges/vme_tsi148.c
···
320
320
struct pci_dev *pdev;
321
321
struct tsi148_driver *bridge;
322
322
323
-
pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev);
323
+
pdev = to_pci_dev(tsi148_bridge->parent);
324
324
325
325
bridge = tsi148_bridge->driver_priv;
326
326
···
433
433
iowrite32be(tmp, bridge->base + TSI148_LCSR_INTEO);
434
434
435
435
if (sync != 0) {
436
-
pdev = container_of(tsi148_bridge->parent,
437
-
struct pci_dev, dev);
438
-
436
+
pdev = to_pci_dev(tsi148_bridge->parent);
439
437
synchronize_irq(pdev->irq);
440
438
}
441
439
} else {
···
739
741
reg_join(vme_bound_high, vme_bound_low, &vme_bound);
740
742
reg_join(pci_offset_high, pci_offset_low, &pci_offset);
741
743
742
-
*pci_base = (dma_addr_t)vme_base + pci_offset;
744
+
*pci_base = (dma_addr_t)(*vme_base + pci_offset);
743
745
744
746
*enabled = 0;
745
747
*aspace = 0;
···
812
814
813
815
tsi148_bridge = image->parent;
814
816
815
-
pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev);
817
+
pdev = to_pci_dev(tsi148_bridge->parent);
816
818
817
819
existing_size = (unsigned long long)(image->bus_resource.end -
818
820
image->bus_resource.start);
···
908
910
unsigned long long pci_bound, vme_offset, pci_base;
909
911
struct vme_bridge *tsi148_bridge;
910
912
struct tsi148_driver *bridge;
913
+
struct pci_bus_region region;
914
+
struct pci_dev *pdev;
911
915
912
916
tsi148_bridge = image->parent;
913
917
914
918
bridge = tsi148_bridge->driver_priv;
919
+
920
+
pdev = to_pci_dev(tsi148_bridge->parent);
915
921
916
922
/* Verify input data */
917
923
if (vme_base & 0xFFFF) {
···
951
949
pci_bound = 0;
952
950
vme_offset = 0;
953
951
} else {
954
-
pci_base = (unsigned long long)image->bus_resource.start;
952
+
pcibios_resource_to_bus(pdev->bus, ®ion,
953
+
&image->bus_resource);
954
+
pci_base = region.start;
955
955
956
956
/*
957
957
* Bound address is a valid address for the window, adjust
···
2236
2232
struct pci_dev *pdev;
2237
2233
2238
2234
/* Find pci_dev container of dev */
2239
-
pdev = container_of(parent, struct pci_dev, dev);
2235
+
pdev = to_pci_dev(parent);
2240
2236
2241
2237
return pci_alloc_consistent(pdev, size, dma);
2242
2238
}
···
2247
2243
struct pci_dev *pdev;
2248
2244
2249
2245
/* Find pci_dev container of dev */
2250
-
pdev = container_of(parent, struct pci_dev, dev);
2246
+
pdev = to_pci_dev(parent);
2251
2247
2252
2248
pci_free_consistent(pdev, size, vaddr, dma);
2253
2249
}
+6
-26
drivers/w1/w1.c
+6
-26
drivers/w1/w1.c
···
614
614
return err;
615
615
}
616
616
617
-
/*
618
-
* Handle sysfs file creation and removal here, before userspace is told that
619
-
* the device is added / removed from the system
620
-
*/
621
-
static int w1_bus_notify(struct notifier_block *nb, unsigned long action,
622
-
void *data)
617
+
static int w1_family_notify(unsigned long action, struct w1_slave *sl)
623
618
{
624
-
struct device *dev = data;
625
-
struct w1_slave *sl;
626
619
struct w1_family_ops *fops;
627
620
int err;
628
621
629
-
/*
630
-
* Only care about slave devices at the moment. Yes, we should use a
631
-
* separate "type" for this, but for now, look at the release function
632
-
* to know which type it is...
633
-
*/
634
-
if (dev->release != w1_slave_release)
635
-
return 0;
636
-
637
-
sl = dev_to_w1_slave(dev);
638
622
fops = sl->family->fops;
639
623
640
624
if (!fops)
···
657
673
return 0;
658
674
}
659
675
660
-
static struct notifier_block w1_bus_nb = {
661
-
.notifier_call = w1_bus_notify,
662
-
};
663
-
664
676
static int __w1_attach_slave_device(struct w1_slave *sl)
665
677
{
666
678
int err;
···
678
698
dev_dbg(&sl->dev, "%s: registering %s as %p.\n", __func__,
679
699
dev_name(&sl->dev), sl);
680
700
701
+
/* suppress for w1_family_notify before sending KOBJ_ADD */
702
+
dev_set_uevent_suppress(&sl->dev, true);
703
+
681
704
err = device_register(&sl->dev);
682
705
if (err < 0) {
683
706
dev_err(&sl->dev,
···
688
705
dev_name(&sl->dev), err);
689
706
return err;
690
707
}
691
-
708
+
w1_family_notify(BUS_NOTIFY_ADD_DEVICE, sl);
692
709
693
710
dev_set_uevent_suppress(&sl->dev, false);
694
711
kobject_uevent(&sl->dev.kobj, KOBJ_ADD);
···
782
799
msg.type = W1_SLAVE_REMOVE;
783
800
w1_netlink_send(sl->master, &msg);
784
801
802
+
w1_family_notify(BUS_NOTIFY_DEL_DEVICE, sl);
785
803
device_unregister(&sl->dev);
786
804
#ifdef DEBUG
787
805
memset(sl, 0, sizeof(*sl));
···
1169
1185
printk(KERN_ERR "Failed to register bus. err=%d.\n", retval);
1170
1186
goto err_out_exit_init;
1171
1187
}
1172
-
1173
-
retval = bus_register_notifier(&w1_bus_type, &w1_bus_nb);
1174
-
if (retval)
1175
-
goto err_out_bus_unregister;
1176
1188
1177
1189
retval = driver_register(&w1_master_driver);
1178
1190
if (retval) {
+26
-18
drivers/w1/w1_netlink.c
+26
-18
drivers/w1/w1_netlink.c
···
300
300
struct w1_netlink_msg *w;
301
301
u32 *id;
302
302
303
-
if (mcmd->type != W1_LIST_MASTERS) {
304
-
printk(KERN_NOTICE "%s: msg: %x.%x, wrong type: %u, len: %u.\n",
305
-
__func__, msg->id.idx, msg->id.val, mcmd->type, mcmd->len);
306
-
return -EPROTO;
307
-
}
308
-
309
303
cn = kmalloc(PAGE_SIZE, GFP_KERNEL);
310
304
if (!cn)
311
305
return -ENOMEM;
···
435
441
w1_netlink_send_error(&node->block->msg, node->m, cmd,
436
442
node->block->portid, err);
437
443
444
+
/* ref taken in w1_search_slave or w1_search_master_id when building
445
+
* the block
446
+
*/
438
447
if (sl)
439
448
w1_unref_slave(sl);
440
449
else
···
500
503
501
504
msg_len = msg->len;
502
505
while (msg_len && !err) {
503
-
struct w1_reg_num id;
504
-
u16 mlen = m->len;
505
506
506
507
dev = NULL;
507
508
sl = NULL;
508
509
509
-
memcpy(&id, m->id.id, sizeof(id));
510
-
#if 0
511
-
printk("%s: %02x.%012llx.%02x: type=%02x, len=%u.\n",
512
-
__func__, id.family, (unsigned long long)id.id, id.crc, m->type, m->len);
513
-
#endif
514
510
if (m->len + sizeof(struct w1_netlink_msg) > msg_len) {
515
511
err = -E2BIG;
516
512
break;
517
513
}
518
514
515
+
/* execute on this thread, no need to process later */
516
+
if (m->type == W1_LIST_MASTERS) {
517
+
err = w1_process_command_root(msg, m, nsp->portid);
518
+
goto out_cont;
519
+
}
520
+
521
+
/* All following message types require additional data,
522
+
* check here before references are taken.
523
+
*/
524
+
if (!m->len) {
525
+
err = -EPROTO;
526
+
goto out_cont;
527
+
}
528
+
529
+
/* both search calls take reference counts */
519
530
if (m->type == W1_MASTER_CMD) {
520
531
dev = w1_search_master_id(m->id.mst.id);
521
532
} else if (m->type == W1_SLAVE_CMD) {
522
-
sl = w1_search_slave(&id);
533
+
sl = w1_search_slave((struct w1_reg_num *)m->id.id);
523
534
if (sl)
524
535
dev = sl->master;
525
536
} else {
526
-
err = w1_process_command_root(msg, m, nsp->portid);
537
+
printk(KERN_NOTICE
538
+
"%s: msg: %x.%x, wrong type: %u, len: %u.\n",
539
+
__func__, msg->id.idx, msg->id.val,
540
+
m->type, m->len);
541
+
err = -EPROTO;
527
542
goto out_cont;
528
543
}
529
544
···
545
536
}
546
537
547
538
err = 0;
548
-
if (!mlen)
549
-
goto out_cont;
550
539
551
540
atomic_inc(&block->refcnt);
552
541
node->async.cb = w1_process_cb;
···
564
557
if (err)
565
558
w1_netlink_send_error(msg, m, NULL, nsp->portid, err);
566
559
msg_len -= sizeof(struct w1_netlink_msg) + m->len;
567
-
m = (struct w1_netlink_msg *)(((u8 *)m) + sizeof(struct w1_netlink_msg) + m->len);
560
+
m = (struct w1_netlink_msg *)(((u8 *)m) +
561
+
sizeof(struct w1_netlink_msg) + m->len);
568
562
569
563
/*
570
564
* Let's allow requests for nonexisting devices.
+3
-1
include/linux/hyperv.h
+3
-1
include/linux/hyperv.h
···
147
147
* 0 . 13 (Windows Server 2008)
148
148
* 1 . 1 (Windows 7)
149
149
* 2 . 4 (Windows 8)
150
+
* 3 . 0 (Windows 8 R2)
150
151
*/
151
152
152
153
#define VERSION_WS2008 ((0 << 16) | (13))
153
154
#define VERSION_WIN7 ((1 << 16) | (1))
154
155
#define VERSION_WIN8 ((2 << 16) | (4))
156
+
#define VERSION_WIN8_1 ((3 << 16) | (0))
155
157
156
158
#define VERSION_INVAL -1
157
159
158
-
#define VERSION_CURRENT VERSION_WIN8
160
+
#define VERSION_CURRENT VERSION_WIN8_1
159
161
160
162
/* Make maximum size of pipe payload of 16K */
161
163
#define MAX_PIPE_DATA_PAYLOAD (sizeof(u8) * 16384)
+1
include/uapi/linux/hyperv.h
+1
include/uapi/linux/hyperv.h
+3
-1
tools/hv/hv_fcopy_daemon.c
+3
-1
tools/hv/hv_fcopy_daemon.c
···
82
82
83
83
if (!access(target_fname, F_OK)) {
84
84
syslog(LOG_INFO, "File: %s exists", target_fname);
85
-
if (!smsg->copy_flags & OVER_WRITE)
85
+
if (!(smsg->copy_flags & OVER_WRITE)) {
86
+
error = HV_ERROR_ALREADY_EXISTS;
86
87
goto done;
88
+
}
87
89
}
88
90
89
91
target_fd = open(target_fname, O_RDWR | O_CREAT | O_CLOEXEC, 0744);