Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mfd-next-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"Core:
- Add a resource-managed version of alloc_workqueue()
(`devm_alloc_workqueue()`)
- Preserve the Open Firmware (OF) node when an ACPI handle
is present
Apple SMC:
- Wire up the Apple SMC power driver by adding a new MFD cell
Atmel HLCDC:
- Fetch the LVDS PLL clock as a fallback if the generic sys_clk
is unavailable
Broadcom BCM2835 PM:
- Add support for the BCM2712 power management device
- Introduce a hardware type identifier to distinguish SoC variants
Congatec CGBC, KEMPLD, RSMU, Si476x:
- Fix various kernel-doc warnings and correct struct member names
DLN2:
- Drop redundant USB device references and switch to managed
resource allocations
- Update bare 'unsigned' types to 'unsigned int'
ENE KB3930:
- Use the of_device_is_system_power_controller() wrapper
EZX PCAP:
- Avoid rescheduling after destroying the workqueue by switching
to a device-managed workqueue
- Drop redundant memory allocation error messages
- Return directly instead of using empty goto statements
Freescale i.MX25 TSADC:
- Convert devicetree bindings from TXT to YAML format
Freescale MC13xxx:
- Fix a memory leak in subdevice platform data allocation by
using devm_kmemdup()
Intel LPC ICH:
- Expose a software node for the GPIO controller cell to fix
GPIO lookups
Intel LPSS:
- Add PCI IDs for the Intel Nova Lake-H platform
Maxim MAX77620:
- Convert devicetree bindings from TXT to YAML format
- Document an optional I2C address for the MAX77663 RTC device
Maxim MAX77705:
- Make the max77705_pm_ops variable static to resolve a
sparse warning
MediaTek MT6397:
- Correct the hardware CIDs for the MT6328, MT6331, and MT6332
PMICs to allow proper driver binding
ROHM BD71828:
- Enable system wakeup via the power button
ROHM BD72720:
- Add a new compatible string for the ROHM BD73900 PMIC
SpacemiT P1:
- Drop the deprecated "vin-supply" property from the devicetree
bindings
- Add individual regulator supply properties to match actual
hardware topology
STMicroelectronics STPMIC1:
- Attempt system shutdown a second time to handle transient I2C
communication failures
Viperboard:
- Drop redundant USB device references"
* tag 'mfd-next-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (28 commits)
mfd: core: Preserve OF node when ACPI handle is present
mfd: ene-kb3930: Use of_device_is_system_power_controller() wrapper
mfd: intel-lpss: Add Intel Nova Lake-H PCI IDs
dt-bindings: mfd: max77620: Document optional RTC address for MAX77663
dt-bindings: mfd: max77620: Convert to DT schema
mfd: ezx-pcap: Avoid rescheduling after destroying workqueue
mfd: ezx-pcap: Return directly instead of empty gotos
mfd: ezx-pcap: Drop memory allocation error message
mfd: bcm2835-pm: Add BCM2712 PM device support
mfd: bcm2835-pm: Introduce SoC-specific type identifier
dt-bindings: mfd: bd72720: Add ROHM BD73900
mfd: si476x: Fix kernel-doc warnings
mfd: rsmu: Remove a empty kernel-doc line
mfd: kempld: Fix kernel-doc struct member names
mfd: congatec: Fix kernel-doc struct member names
dt-bindings: mfd: Convert fsl-imx25-tsadc.txt to yaml format
mfd: viperboard: Drop redundant device reference
mfd: dln2: Switch to managed resources and fix bare unsigned types
mfd: macsmc: Wire up Apple SMC power driver
mfd: mt6397: Properly fix CID of MT6328, MT6331 and MT6332
...
+680
-356
-2
Documentation/devicetree/bindings/gpio/trivial-gpio.yaml
-2
Documentation/devicetree/bindings/gpio/trivial-gpio.yaml
···
27
27
- gateworks,pld-gpio
28
28
- ibm,ppc4xx-gpio
29
29
- loongson,ls1x-gpio
30
-
- maxim,max77620
31
30
- nintendo,hollywood-gpio
32
31
- nxp,pca9570
33
32
- nxp,pca9571
···
85
86
compatible:
86
87
contains:
87
88
enum:
88
-
- maxim,max77620
89
89
- rockchip,rk3328-grf-gpio
90
90
- ti,lp3943-gpio
91
91
- ti,palmas-gpio
+97
Documentation/devicetree/bindings/mfd/fsl,imx25-tsadc.yaml
+97
Documentation/devicetree/bindings/mfd/fsl,imx25-tsadc.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/mfd/fsl,imx25-tsadc.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale MX25 ADC/TSC MultiFunction Device (MFD)
8
+
9
+
maintainers:
10
+
- Frank Li <Frank.Li@nxp.com>
11
+
12
+
description:
13
+
This device combines two general purpose conversion queues one used for general
14
+
ADC and the other used for touchscreens.
15
+
16
+
properties:
17
+
compatible:
18
+
const: fsl,imx25-tsadc
19
+
20
+
reg:
21
+
maxItems: 1
22
+
23
+
interrupts:
24
+
maxItems: 1
25
+
26
+
clocks:
27
+
maxItems: 1
28
+
29
+
clock-names:
30
+
items:
31
+
- const: ipg
32
+
33
+
interrupt-controller: true
34
+
35
+
'#interrupt-cells':
36
+
const: 1
37
+
38
+
'#address-cells':
39
+
const: 1
40
+
41
+
'#size-cells':
42
+
const: 1
43
+
44
+
ranges: true
45
+
46
+
patternProperties:
47
+
'^touchscreen@[0-9a-f]+$':
48
+
type: object
49
+
$ref: /schemas/input/touchscreen/fsl,imx25-tcq.yaml
50
+
unevaluatedProperties: false
51
+
52
+
'^adc@[0-9a-f]+$':
53
+
type: object
54
+
$ref: /schemas/iio/adc/fsl,imx25-gcq.yaml
55
+
unevaluatedProperties: false
56
+
57
+
required:
58
+
- compatible
59
+
- reg
60
+
- interrupts
61
+
- clocks
62
+
- clock-names
63
+
- '#interrupt-cells'
64
+
- '#address-cells'
65
+
- '#size-cells'
66
+
67
+
additionalProperties: false
68
+
69
+
examples:
70
+
- |
71
+
tscadc@50030000 {
72
+
compatible = "fsl,imx25-tsadc";
73
+
reg = <0x50030000 0xc>;
74
+
interrupts = <46>;
75
+
clocks = <&clks 119>;
76
+
clock-names = "ipg";
77
+
interrupt-controller;
78
+
#interrupt-cells = <1>;
79
+
#address-cells = <1>;
80
+
#size-cells = <1>;
81
+
ranges;
82
+
83
+
touchscreen@50030400 {
84
+
compatible = "fsl,imx25-tcq";
85
+
reg = <0x50030400 0x60>;
86
+
interrupts = <0>;
87
+
fsl,wires = <4>;
88
+
};
89
+
90
+
adc@50030800 {
91
+
compatible = "fsl,imx25-gcq";
92
+
reg = <0x50030800 0x60>;
93
+
interrupts = <1>;
94
+
#address-cells = <1>;
95
+
#size-cells = <0>;
96
+
};
97
+
};
-47
Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
-47
Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
···
1
-
Freescale MX25 ADC/TSC MultiFunction Device (MFD)
2
-
3
-
This device combines two general purpose conversion queues one used for general
4
-
ADC and the other used for touchscreens.
5
-
6
-
Required properties:
7
-
- compatible: Should be "fsl,imx25-tsadc".
8
-
- reg: Start address and size of the memory area of
9
-
the device
10
-
- interrupts: Interrupt for this device
11
-
(See: ../interrupt-controller/interrupts.txt)
12
-
- clocks: An 'ipg' clock (See: ../clock/clock-bindings.txt)
13
-
- interrupt-controller: This device is an interrupt controller. It
14
-
controls the interrupts of both
15
-
conversion queues.
16
-
- #interrupt-cells: Should be '<1>'.
17
-
- #address-cells: Should be '<1>'.
18
-
- #size-cells: Should be '<1>'.
19
-
20
-
This device includes two conversion queues which can be added as subnodes.
21
-
The first queue is for the touchscreen, the second for general purpose ADC.
22
-
23
-
Example:
24
-
tscadc: tscadc@50030000 {
25
-
compatible = "fsl,imx25-tsadc";
26
-
reg = <0x50030000 0xc>;
27
-
interrupts = <46>;
28
-
clocks = <&clks 119>;
29
-
clock-names = "ipg";
30
-
interrupt-controller;
31
-
#interrupt-cells = <1>;
32
-
#address-cells = <1>;
33
-
#size-cells = <1>;
34
-
ranges;
35
-
36
-
tsc: tcq@50030400 {
37
-
compatible = "fsl,imx25-tcq";
38
-
reg = <0x50030400 0x60>;
39
-
...
40
-
};
41
-
42
-
adc: gcq@50030800 {
43
-
compatible = "fsl,imx25-gcq";
44
-
reg = <0x50030800 0x60>;
45
-
...
46
-
};
47
-
};
-162
Documentation/devicetree/bindings/mfd/max77620.txt
-162
Documentation/devicetree/bindings/mfd/max77620.txt
···
1
-
MAX77620 Power management IC from Maxim Semiconductor.
2
-
3
-
Required properties:
4
-
-------------------
5
-
- compatible: Must be one of
6
-
"maxim,max77620"
7
-
"maxim,max20024"
8
-
"maxim,max77663"
9
-
- reg: I2C device address.
10
-
11
-
Optional properties:
12
-
-------------------
13
-
- interrupts: The interrupt on the parent the controller is
14
-
connected to.
15
-
- interrupt-controller: Marks the device node as an interrupt controller.
16
-
- #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17
-
variant of <../interrupt-controller/interrupts.txt>
18
-
IRQ numbers for different interrupt source of MAX77620
19
-
are defined at dt-bindings/mfd/max77620.h.
20
-
21
-
- system-power-controller: Indicates that this PMIC is controlling the
22
-
system power, see [1] for more details.
23
-
24
-
[1] Documentation/devicetree/bindings/power/power-controller.txt
25
-
26
-
Optional subnodes and their properties:
27
-
=======================================
28
-
29
-
Flexible power sequence configurations:
30
-
--------------------------------------
31
-
The Flexible Power Sequencer (FPS) allows each regulator to power up under
32
-
hardware or software control. Additionally, each regulator can power on
33
-
independently or among a group of other regulators with an adjustable power-up
34
-
and power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be programmed
35
-
to be part of a sequence allowing external regulators to be sequenced along
36
-
with internal regulators. 32KHz clock can be programmed to be part of a
37
-
sequence.
38
-
39
-
The flexible sequencing structure consists of two hardware enable inputs
40
-
(EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
41
-
Each master sequencing timer is programmable through its configuration
42
-
register to have a hardware enable source (EN1 or EN2) or a software enable
43
-
source (SW). When enabled/disabled, the master sequencing timer generates
44
-
eight sequencing events on different time periods called slots. The time
45
-
period between each event is programmable within the configuration register.
46
-
Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
47
-
sequence slave register which allows its enable source to be specified as
48
-
a flexible power sequencer timer or a software bit. When a FPS source of
49
-
regulators, GPIOs and clocks specifies the enable source to be a flexible
50
-
power sequencer, the power up and power down delays can be specified in
51
-
the regulators, GPIOs and clocks flexible power sequencer configuration
52
-
registers.
53
-
54
-
When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz
55
-
clock are set into following state at the sequencing event that
56
-
corresponds to its flexible sequencer configuration register.
57
-
Sleep state: In this state, regulators, GPIOs
58
-
and 32KHz clock get disabled at
59
-
the sequencing event.
60
-
Global Low Power Mode (GLPM): In this state, regulators are set in
61
-
low power mode at the sequencing event.
62
-
63
-
The configuration parameters of FPS is provided through sub-node "fps"
64
-
and their child for FPS specific. The child node name for FPS are "fps0",
65
-
"fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively.
66
-
67
-
The FPS configurations like FPS source, power up and power down slots for
68
-
regulators, GPIOs and 32kHz clocks are provided in their respective
69
-
configuration nodes which is explained in respective sub-system DT
70
-
binding document.
71
-
72
-
There is need for different FPS configuration parameters based on system
73
-
state like when system state changed from active to suspend or active to
74
-
power off (shutdown).
75
-
76
-
Optional properties:
77
-
-------------------
78
-
-maxim,fps-event-source: u32, FPS event source like external
79
-
hardware input to PMIC i.e. EN0, EN1 or
80
-
software (SW).
81
-
The macros are defined on
82
-
dt-bindings/mfd/max77620.h
83
-
for different control source.
84
-
- MAX77620_FPS_EVENT_SRC_EN0
85
-
for hardware input pin EN0.
86
-
- MAX77620_FPS_EVENT_SRC_EN1
87
-
for hardware input pin EN1.
88
-
- MAX77620_FPS_EVENT_SRC_SW
89
-
for software control.
90
-
91
-
-maxim,shutdown-fps-time-period-us: u32, FPS time period in microseconds
92
-
when system enters in to shutdown
93
-
state.
94
-
95
-
-maxim,suspend-fps-time-period-us: u32, FPS time period in microseconds
96
-
when system enters in to suspend state.
97
-
98
-
-maxim,device-state-on-disabled-event: u32, describe the PMIC state when FPS
99
-
event cleared (set to LOW) whether it
100
-
should go to sleep state or low-power
101
-
state. Following are valid values:
102
-
- MAX77620_FPS_INACTIVE_STATE_SLEEP
103
-
to set the PMIC state to sleep.
104
-
- MAX77620_FPS_INACTIVE_STATE_LOW_POWER
105
-
to set the PMIC state to low
106
-
power.
107
-
Absence of this property or other value
108
-
will not change device state when FPS
109
-
event get cleared.
110
-
111
-
Here supported time periods by device in microseconds are as follows:
112
-
MAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds.
113
-
MAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
114
-
MAX77663 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
115
-
116
-
-maxim,power-ok-control: configure map power ok bit
117
-
1: Enables POK(Power OK) to control nRST_IO and GPIO1
118
-
POK function.
119
-
0: Disables POK control.
120
-
if property missing, do not configure MPOK bit.
121
-
If POK mapping is enabled for GPIO1/nRST_IO then,
122
-
GPIO1/nRST_IO pins are HIGH only if all rails
123
-
that have POK control enabled are HIGH.
124
-
If any of the rails goes down(which are enabled for POK
125
-
control) then, GPIO1/nRST_IO goes LOW.
126
-
this property is valid for max20024 only.
127
-
128
-
For DT binding details of different sub modules like GPIO, pincontrol,
129
-
regulator, power, please refer respective device-tree binding document
130
-
under their respective sub-system directories.
131
-
132
-
Example:
133
-
--------
134
-
#include <dt-bindings/mfd/max77620.h>
135
-
136
-
max77620@3c {
137
-
compatible = "maxim,max77620";
138
-
reg = <0x3c>;
139
-
140
-
interrupt-parent = <&intc>;
141
-
interrupts = <0 86 IRQ_TYPE_NONE>;
142
-
143
-
interrupt-controller;
144
-
#interrupt-cells = <2>;
145
-
146
-
fps {
147
-
fps0 {
148
-
maxim,shutdown-fps-time-period-us = <1280>;
149
-
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
150
-
};
151
-
152
-
fps1 {
153
-
maxim,shutdown-fps-time-period-us = <1280>;
154
-
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
155
-
};
156
-
157
-
fps2 {
158
-
maxim,shutdown-fps-time-period-us = <1280>;
159
-
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_SW>;
160
-
};
161
-
};
162
-
};
+444
Documentation/devicetree/bindings/mfd/maxim,max77620.yaml
+444
Documentation/devicetree/bindings/mfd/maxim,max77620.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/mfd/maxim,max77620.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: MAX77620 Power management IC from Maxim Semiconductor
8
+
9
+
maintainers:
10
+
- Svyatoslav Ryhel <clamor95@gmail.com>
11
+
12
+
properties:
13
+
compatible:
14
+
enum:
15
+
- maxim,max20024
16
+
- maxim,max77620
17
+
- maxim,max77663
18
+
19
+
reg:
20
+
description:
21
+
Can contain an optional second I2C address pointing to the PMIC's
22
+
RTC device. If no RTC address is provided, a default address specific
23
+
to this PMIC will be used.
24
+
minItems: 1
25
+
maxItems: 2
26
+
27
+
reg-names:
28
+
items:
29
+
- const: pmic
30
+
- const: rtc
31
+
32
+
interrupts:
33
+
maxItems: 1
34
+
35
+
interrupt-controller: true
36
+
37
+
"#interrupt-cells":
38
+
const: 2
39
+
40
+
gpio-controller: true
41
+
42
+
"#gpio-cells":
43
+
const: 2
44
+
description:
45
+
Device has 8 GPIO pins which can be configured as GPIO as well as
46
+
the special IO functions. The first cell is the pin number, and the
47
+
second cell is used to specify the gpio polarity (GPIO_ACTIVE_HIGH or
48
+
GPIO_ACTIVE_LOW).
49
+
50
+
system-power-controller: true
51
+
52
+
"#thermal-sensor-cells":
53
+
const: 0
54
+
description:
55
+
Maxim Semiconductor MAX77620 supports alarm interrupts when its
56
+
die temperature crosses 120C and 140C. These threshold temperatures
57
+
are not configurable. Device does not provide the real temperature
58
+
of die other than just indicating whether temperature is above or
59
+
below threshold level.
60
+
61
+
fps:
62
+
type: object
63
+
additionalProperties: false
64
+
description: |
65
+
The Flexible Power Sequencer (FPS) allows each regulator to power up
66
+
under hardware or software control. Additionally, each regulator can
67
+
power on independently or among a group of other regulators with an
68
+
adjustable power-up and power-down delays (sequencing). GPIO1, GPIO2,
69
+
and GPIO3 can be programmed to be part of a sequence allowing external
70
+
regulators to be sequenced along with internal regulators. 32KHz clock
71
+
can be programmed to be part of a sequence.
72
+
73
+
The flexible sequencing structure consists of two hardware enable inputs
74
+
(EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
75
+
Each master sequencing timer is programmable through its configuration
76
+
register to have a hardware enable source (EN1 or EN2) or a software enable
77
+
source (SW). When enabled/disabled, the master sequencing timer generates
78
+
eight sequencing events on different time periods called slots. The time
79
+
period between each event is programmable within the configuration register.
80
+
Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
81
+
sequence slave register which allows its enable source to be specified as
82
+
a flexible power sequencer timer or a software bit. When a FPS source of
83
+
regulators, GPIOs and clocks specifies the enable source to be a flexible
84
+
power sequencer, the power up and power down delays can be specified in
85
+
the regulators, GPIOs and clocks flexible power sequencer configuration
86
+
registers.
87
+
88
+
When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz clock
89
+
are set into following state at the sequencing event that corresponds
90
+
to its flexible sequencer configuration register.
91
+
92
+
Sleep state: In this state, regulators, GPIOs and 32KHz clock get disabled
93
+
at the sequencing event.
94
+
Global Low Power Mode (GLPM): In this state, regulators are set in low
95
+
power mode at the sequencing event.
96
+
97
+
The configuration parameters of FPS is provided through sub-node "fps"
98
+
and their child for FPS specific. The child node name for FPS are "fps0",
99
+
"fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively.
100
+
101
+
The FPS configurations like FPS source, power up and power down slots for
102
+
regulators, GPIOs and 32kHz clocks are provided in their respective
103
+
configuration nodes which is explained in respective sub-system DT
104
+
binding document.
105
+
106
+
There is need for different FPS configuration parameters based on system
107
+
state like when system state changed from active to suspend or active to
108
+
power off (shutdown).
109
+
110
+
patternProperties:
111
+
"^fps[0-2]$":
112
+
type: object
113
+
additionalProperties: false
114
+
115
+
properties:
116
+
maxim,fps-event-source:
117
+
$ref: /schemas/types.yaml#/definitions/uint32
118
+
description: |
119
+
FPS event source like external hardware input to PMIC i.e. EN0, EN1
120
+
or software (SW).
121
+
122
+
The macros are defined on dt-bindings/mfd/max77620.h for different
123
+
control source.
124
+
- MAX77620_FPS_EVENT_SRC_EN0 for hardware input pin EN0.
125
+
- MAX77620_FPS_EVENT_SRC_EN1 for hardware input pin EN1.
126
+
- MAX77620_FPS_EVENT_SRC_SW for software control.
127
+
128
+
maxim,shutdown-fps-time-period-us:
129
+
description:
130
+
FPS time period in microseconds when system enters in to shutdown state.
131
+
132
+
maxim,suspend-fps-time-period-us:
133
+
description:
134
+
FPS time period in microseconds when system enters in to suspend state.
135
+
136
+
maxim,device-state-on-disabled-event:
137
+
$ref: /schemas/types.yaml#/definitions/uint32
138
+
description: |
139
+
Describe the PMIC state when FPS event cleared (set to LOW) whether it
140
+
should go to sleep state or low-power state. Following are valid values:
141
+
- MAX77620_FPS_INACTIVE_STATE_SLEEP to set the PMIC state to sleep.
142
+
- MAX77620_FPS_INACTIVE_STATE_LOW_POWER to set the PMIC state to low
143
+
power.
144
+
Absence of this property or other value will not change device state
145
+
when FPS event get cleared.
146
+
147
+
maxim,power-ok-control:
148
+
$ref: /schemas/types.yaml#/definitions/uint32
149
+
description: |
150
+
Configure map power ok bit
151
+
152
+
1: Enables POK(Power OK) to control nRST_IO and GPIO1 POK function.
153
+
0: Disables POK control.
154
+
155
+
If property missing, do not configure MPOK bit. If POK mapping is
156
+
enabled for GPIO1/nRST_IO then, GPIO1/nRST_IO pins are HIGH only if
157
+
all rails that have POK control enabled are HIGH. If any of the rails
158
+
goes down (which are enabled for POK control) then, GPIO1/nRST_IO
159
+
goes LOW.
160
+
enum: [0, 1]
161
+
162
+
pinmux:
163
+
$ref: /schemas/pinctrl/maxim,max77620-pinctrl.yaml
164
+
165
+
regulators:
166
+
$ref: /schemas/regulator/maxim,max77620-regulator.yaml
167
+
168
+
allOf:
169
+
- if:
170
+
properties:
171
+
compatible:
172
+
contains:
173
+
enum:
174
+
- maxim,max20024
175
+
- maxim,max77663
176
+
then:
177
+
properties:
178
+
"#thermal-sensor-cells": false
179
+
fps:
180
+
patternProperties:
181
+
"^fps[0-2]$":
182
+
properties:
183
+
maxim,shutdown-fps-time-period-us:
184
+
enum: [20, 40, 80, 160, 320, 640, 1280, 2540]
185
+
maxim,suspend-fps-time-period-us:
186
+
enum: [20, 40, 80, 160, 320, 640, 1280, 2540]
187
+
maxim,power-ok-control: false
188
+
189
+
- if:
190
+
properties:
191
+
compatible:
192
+
contains:
193
+
const: maxim,max77620
194
+
then:
195
+
properties:
196
+
fps:
197
+
patternProperties:
198
+
"^fps[0-2]$":
199
+
properties:
200
+
maxim,shutdown-fps-time-period-us:
201
+
enum: [40, 80, 160, 320, 640, 1280, 2560, 5120]
202
+
maxim,suspend-fps-time-period-us:
203
+
enum: [40, 80, 160, 320, 640, 1280, 2560, 5120]
204
+
205
+
- if:
206
+
properties:
207
+
compatible:
208
+
not:
209
+
contains:
210
+
const: maxim,max77663
211
+
then:
212
+
properties:
213
+
reg-names: false
214
+
215
+
required:
216
+
- compatible
217
+
- reg
218
+
219
+
additionalProperties: false
220
+
221
+
examples:
222
+
- |
223
+
#include <dt-bindings/interrupt-controller/irq.h>
224
+
#include <dt-bindings/mfd/max77620.h>
225
+
226
+
i2c {
227
+
#address-cells = <1>;
228
+
#size-cells = <0>;
229
+
230
+
pmic@3c {
231
+
compatible = "maxim,max77620";
232
+
reg = <0x3c>;
233
+
234
+
interrupt-parent = <&gpio>;
235
+
interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
236
+
237
+
interrupt-controller;
238
+
#interrupt-cells = <2>;
239
+
240
+
gpio-controller;
241
+
#gpio-cells = <2>;
242
+
243
+
#thermal-sensor-cells = <0>;
244
+
245
+
system-power-controller;
246
+
247
+
pinctrl-names = "default";
248
+
pinctrl-0 = <&max77620_default>;
249
+
250
+
max77620_default: pinmux {
251
+
gpio0 {
252
+
pins = "gpio0";
253
+
function = "gpio";
254
+
};
255
+
256
+
gpio1 {
257
+
pins = "gpio1";
258
+
function = "fps-out";
259
+
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
260
+
};
261
+
262
+
gpio2 {
263
+
pins = "gpio2";
264
+
function = "fps-out";
265
+
maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
266
+
};
267
+
268
+
gpio3 {
269
+
pins = "gpio3";
270
+
function = "gpio";
271
+
};
272
+
273
+
gpio4 {
274
+
pins = "gpio4";
275
+
function = "32k-out1";
276
+
};
277
+
278
+
gpio5-6 {
279
+
pins = "gpio5", "gpio6";
280
+
function = "gpio";
281
+
drive-push-pull = <1>;
282
+
};
283
+
284
+
gpio7 {
285
+
pins = "gpio7";
286
+
function = "gpio";
287
+
};
288
+
};
289
+
290
+
fps {
291
+
fps0 {
292
+
maxim,shutdown-fps-time-period-us = <1280>;
293
+
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
294
+
};
295
+
296
+
fps1 {
297
+
maxim,shutdown-fps-time-period-us = <1280>;
298
+
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
299
+
};
300
+
301
+
fps2 {
302
+
maxim,shutdown-fps-time-period-us = <1280>;
303
+
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_SW>;
304
+
};
305
+
};
306
+
307
+
regulators {
308
+
in-sd0-supply = <&vdd_5v0_vbus>;
309
+
in-sd1-supply = <&vdd_5v0_vbus>;
310
+
in-sd2-supply = <&vdd_5v0_vbus>;
311
+
in-sd3-supply = <&vdd_5v0_vbus>;
312
+
313
+
in-ldo0-1-supply = <&vdd_1v8_vio>;
314
+
in-ldo2-supply = <&vdd_3v3_vbat>;
315
+
in-ldo3-5-supply = <&vdd_3v3_vbat>;
316
+
in-ldo4-6-supply = <&vdd_3v3_vbat>;
317
+
in-ldo7-8-supply = <&vdd_1v8_vio>;
318
+
319
+
sd0 {
320
+
regulator-name = "vdd_cpu";
321
+
regulator-min-microvolt = <800000>;
322
+
regulator-max-microvolt = <1250000>;
323
+
regulator-always-on;
324
+
regulator-boot-on;
325
+
326
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
327
+
};
328
+
329
+
sd1 {
330
+
regulator-name = "vdd_core";
331
+
regulator-min-microvolt = <950000>;
332
+
regulator-max-microvolt = <1350000>;
333
+
regulator-always-on;
334
+
regulator-boot-on;
335
+
336
+
maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
337
+
};
338
+
339
+
vdd_1v8_vio: sd2 {
340
+
regulator-name = "vdd_1v8_gen";
341
+
regulator-min-microvolt = <1800000>;
342
+
regulator-max-microvolt = <1800000>;
343
+
regulator-always-on;
344
+
regulator-boot-on;
345
+
346
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
347
+
};
348
+
349
+
sd3 {
350
+
regulator-name = "vddio_ddr";
351
+
regulator-min-microvolt = <1200000>;
352
+
regulator-max-microvolt = <1200000>;
353
+
regulator-always-on;
354
+
regulator-boot-on;
355
+
356
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
357
+
};
358
+
359
+
ldo0 {
360
+
regulator-name = "avdd_pll";
361
+
regulator-min-microvolt = <1200000>;
362
+
regulator-max-microvolt = <1200000>;
363
+
regulator-always-on;
364
+
regulator-boot-on;
365
+
366
+
maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
367
+
};
368
+
369
+
ldo1 {
370
+
regulator-name = "vdd_ddr_hs";
371
+
regulator-min-microvolt = <1000000>;
372
+
regulator-max-microvolt = <1000000>;
373
+
regulator-always-on;
374
+
regulator-boot-on;
375
+
376
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
377
+
};
378
+
379
+
ldo2 {
380
+
regulator-name = "avdd_usb";
381
+
regulator-min-microvolt = <3300000>;
382
+
regulator-max-microvolt = <3300000>;
383
+
384
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
385
+
};
386
+
387
+
ldo3 {
388
+
regulator-name = "vdd_sdmmc3";
389
+
regulator-min-microvolt = <3000000>;
390
+
regulator-max-microvolt = <3000000>;
391
+
regulator-always-on;
392
+
393
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
394
+
};
395
+
396
+
ldo4 {
397
+
regulator-name = "vdd_rtc";
398
+
regulator-min-microvolt = <1200000>;
399
+
regulator-max-microvolt = <1200000>;
400
+
regulator-always-on;
401
+
regulator-boot-on;
402
+
403
+
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
404
+
};
405
+
406
+
ldo5 {
407
+
regulator-name = "vdd_ddr_rx";
408
+
regulator-min-microvolt = <2850000>;
409
+
regulator-max-microvolt = <2850000>;
410
+
regulator-always-on;
411
+
regulator-boot-on;
412
+
413
+
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
414
+
};
415
+
416
+
ldo6 {
417
+
regulator-name = "avdd_osc";
418
+
regulator-min-microvolt = <1800000>;
419
+
regulator-max-microvolt = <1800000>;
420
+
regulator-always-on;
421
+
regulator-boot-on;
422
+
423
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
424
+
};
425
+
426
+
ldo7 {
427
+
regulator-name = "vdd_1v2_mhl";
428
+
regulator-min-microvolt = <1050000>;
429
+
regulator-max-microvolt = <1250000>;
430
+
431
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
432
+
};
433
+
434
+
ldo8 {
435
+
regulator-name = "avdd_dsi_csi";
436
+
regulator-min-microvolt = <1200000>;
437
+
regulator-max-microvolt = <1200000>;
438
+
439
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
440
+
};
441
+
};
442
+
};
443
+
};
444
+
...
+17
-12
Documentation/devicetree/bindings/mfd/rohm,bd72720-pmic.yaml
+17
-12
Documentation/devicetree/bindings/mfd/rohm,bd72720-pmic.yaml
···
4
4
$id: http://devicetree.org/schemas/mfd/rohm,bd72720-pmic.yaml#
5
5
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
6
7
-
title: ROHM BD72720 Power Management Integrated Circuit
7
+
title: ROHM BD72720 and BD73900 Power Management Integrated Circuits
8
8
9
9
maintainers:
10
10
- Matti Vaittinen <mazziesaccount@gmail.com>
11
11
12
12
description:
13
-
BD72720 is a single-chip power management IC for battery-powered portable
14
-
devices. The BD72720 integrates 10 bucks and 11 LDOs, and a 3000 mA
15
-
switching charger. The IC also includes a Coulomb counter, a real-time
16
-
clock (RTC), GPIOs and a 32.768 kHz clock gate.
13
+
BD72720 and BD73900 are single-chip power management ICs for
14
+
battery-powered portable devices. They integrate 10 bucks and 11 LDOs,
15
+
and a 3000 mA switching charger. ICs also include a Coulomb counter,
16
+
a real-time clock (RTC), GPIOs and a 32.768 kHz clock gate.
17
17
18
-
# In addition to the properties found from the charger node, the ROHM BD72720
19
-
# uses properties from a static battery node. Please see the:
18
+
# In addition to the properties found from the charger node, PMICs
19
+
# use properties from a static battery node. Please see the:
20
20
# Documentation/devicetree/bindings/power/supply/battery.yaml
21
21
#
22
22
# Following properties are used
···
48
48
49
49
properties:
50
50
compatible:
51
-
const: rohm,bd72720
51
+
oneOf:
52
+
- const: rohm,bd72720
53
+
54
+
- items:
55
+
- const: rohm,bd73900
56
+
- const: rohm,bd72720
52
57
53
58
reg:
54
59
description:
···
89
84
minimum: 10000
90
85
maximum: 50000
91
86
description:
92
-
BD72720 has a SAR ADC for measuring charging currents. External sense
87
+
PMIC has a SAR ADC for measuring charging currents. External sense
93
88
resistor (RSENSE in data sheet) should be used. If some other but
94
89
30 mOhm resistor is used the resistance value should be given here in
95
90
micro Ohms.
···
105
100
rohm,pin-fault_b:
106
101
$ref: /schemas/types.yaml#/definitions/string
107
102
description:
108
-
BD72720 has an OTP option to use fault_b-pin for different
103
+
PMIC has an OTP option to use fault_b-pin for different
109
104
purposes. Set this property accordingly. OTP options are
110
105
OTP0 - bi-directional FAULT_B or READY indicator depending on a
111
106
'sub option'
···
121
116
"^rohm,pin-dvs[0-1]$":
122
117
$ref: /schemas/types.yaml#/definitions/string
123
118
description:
124
-
BD72720 has 4 different OTP options to determine the use of dvs<X>-pins.
119
+
PMIC has 4 different OTP options to determine the use of dvs<X>-pins.
125
120
OTP0 - regulator RUN state control.
126
121
OTP1 - GPI.
127
122
OTP2 - GPO.
···
135
130
136
131
"^rohm,pin-exten[0-1]$":
137
132
$ref: /schemas/types.yaml#/definitions/string
138
-
description: BD72720 has an OTP option to use exten0-pin for different
133
+
description: PMIC has an OTP option to use exten0-pin for different
139
134
purposes. Set this property accordingly.
140
135
OTP0 - GPO
141
136
OTP1 - Power sequencer output.
-70
Documentation/devicetree/bindings/thermal/max77620_thermal.txt
-70
Documentation/devicetree/bindings/thermal/max77620_thermal.txt
···
1
-
Thermal driver for MAX77620 Power management IC from Maxim Semiconductor.
2
-
3
-
Maxim Semiconductor MAX77620 supports alarm interrupts when its
4
-
die temperature crosses 120C and 140C. These threshold temperatures
5
-
are not configurable. Device does not provide the real temperature
6
-
of die other than just indicating whether temperature is above or
7
-
below threshold level.
8
-
9
-
Required properties:
10
-
-------------------
11
-
#thermal-sensor-cells: For more details, please refer to
12
-
<devicetree/bindings/thermal/thermal-sensor.yaml>
13
-
The value must be 0.
14
-
15
-
For more details, please refer generic thermal DT binding document
16
-
<devicetree/bindings/thermal/thermal*.yaml>.
17
-
18
-
Please refer <devicetree/bindings/mfd/max77620.txt> for mfd DT binding
19
-
document for the MAX77620.
20
-
21
-
Example:
22
-
--------
23
-
#include <dt-bindings/mfd/max77620.h>
24
-
#include <dt-bindings/thermal/thermal.h>
25
-
...
26
-
27
-
i2c@7000d000 {
28
-
spmic: max77620@3c {
29
-
compatible = "maxim,max77620";
30
-
:::::
31
-
#thermal-sensor-cells = <0>;
32
-
:::
33
-
};
34
-
};
35
-
36
-
cool_dev: cool-dev {
37
-
compatible = "cooling-dev";
38
-
#cooling-cells = <2>;
39
-
};
40
-
41
-
thermal-zones {
42
-
PMIC-Die {
43
-
polling-delay = <0>;
44
-
polling-delay-passive = <0>;
45
-
thermal-sensors = <&spmic>;
46
-
47
-
trips {
48
-
pmic_die_warn_temp_thresh: hot-die {
49
-
temperature = <120000>;
50
-
type = "hot";
51
-
hysteresis = <0>;
52
-
};
53
-
54
-
pmic_die_cirt_temp_thresh: cirtical-die {
55
-
temperature = <140000>;
56
-
type = "critical";
57
-
hysteresis = <0>;
58
-
};
59
-
};
60
-
61
-
cooling-maps {
62
-
map0 {
63
-
trip = <&pmic_die_warn_temp_thresh>;
64
-
cooling-device = <&cool_dev THERMAL_NO_LIMIT
65
-
THERMAL_NO_LIMIT>;
66
-
contribution = <100>;
67
-
};
68
-
};
69
-
};
70
-
};
+11
-2
drivers/mfd/atmel-hlcdc.c
+11
-2
drivers/mfd/atmel-hlcdc.c
···
108
108
return PTR_ERR(hlcdc->periph_clk);
109
109
}
110
110
111
+
/*
112
+
* Retrieve one of the primary clocks required for LCD operation:
113
+
* prefer sys_clk (for RGB/MIPI), and fall back to lvds_pll_clk
114
+
* (for LVDS) if needed.
115
+
*/
111
116
hlcdc->sys_clk = devm_clk_get(dev, "sys_clk");
112
117
if (IS_ERR(hlcdc->sys_clk)) {
113
-
dev_err(dev, "failed to get system clock\n");
114
-
return PTR_ERR(hlcdc->sys_clk);
118
+
hlcdc->sys_clk = NULL;
119
+
hlcdc->lvds_pll_clk = devm_clk_get(dev, "lvds_pll_clk");
120
+
if (IS_ERR(hlcdc->lvds_pll_clk)) {
121
+
dev_err(dev, "Failed to obtain both the LCDC (generic) and LVDS PLL clocks\n");
122
+
return PTR_ERR(hlcdc->lvds_pll_clk);
123
+
}
115
124
}
116
125
117
126
hlcdc->slow_clk = devm_clk_get(dev, "slow_clk");
+5
-4
drivers/mfd/bcm2835-pm.c
+5
-4
drivers/mfd/bcm2835-pm.c
···
81
81
platform_set_drvdata(pdev, pm);
82
82
83
83
pm->dev = dev;
84
+
pm->soc = (uintptr_t)device_get_match_data(dev);
84
85
85
86
ret = bcm2835_pm_get_pdata(pdev, pm);
86
87
if (ret)
···
98
97
* bcm2835-pm binding as the key for whether we can reference
99
98
* the full PM register range and support power domains.
100
99
*/
101
-
if (pm->asb)
100
+
if (pm->asb || pm->soc == BCM2835_PM_SOC_BCM2712)
102
101
return devm_mfd_add_devices(dev, -1, bcm2835_power_devs,
103
102
ARRAY_SIZE(bcm2835_power_devs),
104
103
NULL, 0, NULL);
···
107
106
108
107
static const struct of_device_id bcm2835_pm_of_match[] = {
109
108
{ .compatible = "brcm,bcm2835-pm-wdt", },
110
-
{ .compatible = "brcm,bcm2835-pm", },
111
-
{ .compatible = "brcm,bcm2711-pm", },
112
-
{ .compatible = "brcm,bcm2712-pm", },
109
+
{ .compatible = "brcm,bcm2835-pm", .data = (void *)BCM2835_PM_SOC_BCM2835 },
110
+
{ .compatible = "brcm,bcm2711-pm", .data = (void *)BCM2835_PM_SOC_BCM2711 },
111
+
{ .compatible = "brcm,bcm2712-pm", .data = (void *)BCM2835_PM_SOC_BCM2712 },
113
112
{},
114
113
};
115
114
MODULE_DEVICE_TABLE(of, bcm2835_pm_of_match);
+9
-12
drivers/mfd/dln2.c
+9
-12
drivers/mfd/dln2.c
···
424
424
}
425
425
426
426
static int _dln2_transfer(struct dln2_dev *dln2, u16 handle, u16 cmd,
427
-
const void *obuf, unsigned obuf_len,
428
-
void *ibuf, unsigned *ibuf_len)
427
+
const void *obuf, unsigned int obuf_len,
428
+
void *ibuf, unsigned int *ibuf_len)
429
429
{
430
430
int ret = 0;
431
431
int rx_slot;
···
511
511
}
512
512
513
513
int dln2_transfer(struct platform_device *pdev, u16 cmd,
514
-
const void *obuf, unsigned obuf_len,
515
-
void *ibuf, unsigned *ibuf_len)
514
+
const void *obuf, unsigned int obuf_len,
515
+
void *ibuf, unsigned int *ibuf_len)
516
516
{
517
517
struct dln2_platform_data *dln2_pdata;
518
518
struct dln2_dev *dln2;
···
583
583
{
584
584
int i;
585
585
586
-
for (i = 0; i < DLN2_MAX_URBS; i++) {
586
+
for (i = 0; i < DLN2_MAX_URBS; i++)
587
587
usb_free_urb(dln2->rx_urb[i]);
588
-
kfree(dln2->rx_buf[i]);
589
-
}
590
588
}
591
589
592
590
static void dln2_stop_rx_urbs(struct dln2_dev *dln2)
···
598
600
static void dln2_free(struct dln2_dev *dln2)
599
601
{
600
602
dln2_free_rx_urbs(dln2);
601
-
usb_put_dev(dln2->usb_dev);
602
-
kfree(dln2);
603
603
}
604
604
605
605
static int dln2_setup_rx_urbs(struct dln2_dev *dln2,
···
605
609
{
606
610
int i;
607
611
const int rx_max_size = DLN2_RX_BUF_SIZE;
612
+
struct device *dev = &dln2->interface->dev;
608
613
609
614
for (i = 0; i < DLN2_MAX_URBS; i++) {
610
-
dln2->rx_buf[i] = kmalloc(rx_max_size, GFP_KERNEL);
615
+
dln2->rx_buf[i] = devm_kmalloc(dev, rx_max_size, GFP_KERNEL);
611
616
if (!dln2->rx_buf[i])
612
617
return -ENOMEM;
613
618
···
775
778
if (ret)
776
779
return ret;
777
780
778
-
dln2 = kzalloc_obj(*dln2);
781
+
dln2 = devm_kzalloc(dev, sizeof(*dln2), GFP_KERNEL);
779
782
if (!dln2)
780
783
return -ENOMEM;
781
784
782
785
dln2->ep_out = epout->bEndpointAddress;
783
786
dln2->ep_in = epin->bEndpointAddress;
784
-
dln2->usb_dev = usb_get_dev(interface_to_usbdev(interface));
787
+
dln2->usb_dev = interface_to_usbdev(interface);
785
788
dln2->interface = interface;
786
789
usb_set_intfdata(interface, dln2);
787
790
init_waitqueue_head(&dln2->disconnect_wq);
+1
-1
drivers/mfd/ene-kb3930.c
+1
-1
drivers/mfd/ene-kb3930.c
+9
-18
drivers/mfd/ezx-pcap.c
+9
-18
drivers/mfd/ezx-pcap.c
···
375
375
/* cleanup irqchip */
376
376
for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++)
377
377
irq_set_chip_and_handler(i, NULL, NULL);
378
-
379
-
destroy_workqueue(pcap->workqueue);
380
378
}
381
379
382
380
static int ezx_pcap_probe(struct spi_device *spi)
···
382
384
struct pcap_platform_data *pdata = dev_get_platdata(&spi->dev);
383
385
struct pcap_chip *pcap;
384
386
int i, adc_irq;
385
-
int ret = -ENODEV;
387
+
int ret;
386
388
387
389
/* platform data is required */
388
390
if (!pdata)
389
-
goto ret;
391
+
return -ENODEV;
390
392
391
393
pcap = devm_kzalloc(&spi->dev, sizeof(*pcap), GFP_KERNEL);
392
-
if (!pcap) {
393
-
ret = -ENOMEM;
394
-
goto ret;
395
-
}
394
+
if (!pcap)
395
+
return -ENOMEM;
396
396
397
397
spin_lock_init(&pcap->io_lock);
398
398
spin_lock_init(&pcap->adc_lock);
···
403
407
spi->mode = SPI_MODE_0 | (pdata->config & PCAP_CS_AH ? SPI_CS_HIGH : 0);
404
408
ret = spi_setup(spi);
405
409
if (ret)
406
-
goto ret;
410
+
return ret;
407
411
408
412
pcap->spi = spi;
409
413
410
414
/* setup irq */
411
415
pcap->irq_base = pdata->irq_base;
412
-
pcap->workqueue = create_singlethread_workqueue("pcapd");
413
-
if (!pcap->workqueue) {
414
-
ret = -ENOMEM;
415
-
dev_err(&spi->dev, "can't create pcap thread\n");
416
-
goto ret;
417
-
}
416
+
pcap->workqueue = devm_alloc_ordered_workqueue(&spi->dev, "pcapd", 0);
417
+
if (!pcap->workqueue)
418
+
return -ENOMEM;
418
419
419
420
/* redirect interrupts to AP, except adcdone2 */
420
421
if (!(pdata->config & PCAP_SECOND_PORT))
···
461
468
free_irqchip:
462
469
for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++)
463
470
irq_set_chip_and_handler(i, NULL, NULL);
464
-
/* destroy_workqueue: */
465
-
destroy_workqueue(pcap->workqueue);
466
-
ret:
471
+
467
472
return ret;
468
473
}
469
474
+13
drivers/mfd/intel-lpss-pci.c
+13
drivers/mfd/intel-lpss-pci.c
···
633
633
{ PCI_VDEVICE(INTEL, 0xa879), (kernel_ulong_t)&ehl_i2c_info },
634
634
{ PCI_VDEVICE(INTEL, 0xa87a), (kernel_ulong_t)&ehl_i2c_info },
635
635
{ PCI_VDEVICE(INTEL, 0xa87b), (kernel_ulong_t)&ehl_i2c_info },
636
+
/* NVL-H */
637
+
{ PCI_VDEVICE(INTEL, 0xd325), (kernel_ulong_t)&bxt_uart_info },
638
+
{ PCI_VDEVICE(INTEL, 0xd326), (kernel_ulong_t)&bxt_uart_info },
639
+
{ PCI_VDEVICE(INTEL, 0xd327), (kernel_ulong_t)&tgl_spi_info },
640
+
{ PCI_VDEVICE(INTEL, 0xd330), (kernel_ulong_t)&tgl_spi_info },
641
+
{ PCI_VDEVICE(INTEL, 0xd347), (kernel_ulong_t)&tgl_spi_info },
642
+
{ PCI_VDEVICE(INTEL, 0xd350), (kernel_ulong_t)&ehl_i2c_info },
643
+
{ PCI_VDEVICE(INTEL, 0xd351), (kernel_ulong_t)&ehl_i2c_info },
644
+
{ PCI_VDEVICE(INTEL, 0xd352), (kernel_ulong_t)&bxt_uart_info },
645
+
{ PCI_VDEVICE(INTEL, 0xd378), (kernel_ulong_t)&ehl_i2c_info },
646
+
{ PCI_VDEVICE(INTEL, 0xd379), (kernel_ulong_t)&ehl_i2c_info },
647
+
{ PCI_VDEVICE(INTEL, 0xd37a), (kernel_ulong_t)&ehl_i2c_info },
648
+
{ PCI_VDEVICE(INTEL, 0xd37b), (kernel_ulong_t)&ehl_i2c_info },
636
649
/* PTL-H */
637
650
{ PCI_VDEVICE(INTEL, 0xe325), (kernel_ulong_t)&bxt_uart_info },
638
651
{ PCI_VDEVICE(INTEL, 0xe326), (kernel_ulong_t)&bxt_uart_info },
+7
drivers/mfd/lpc_ich.c
+7
drivers/mfd/lpc_ich.c
···
45
45
#include <linux/acpi.h>
46
46
#include <linux/pci.h>
47
47
#include <linux/pinctrl/pinctrl.h>
48
+
#include <linux/property.h>
48
49
#include <linux/mfd/core.h>
49
50
#include <linux/mfd/lpc_ich.h>
50
51
#include <linux/platform_data/itco_wdt.h>
···
126
125
.ignore_resource_conflicts = true,
127
126
};
128
127
128
+
const struct software_node lpc_ich_gpio_swnode = {
129
+
.name = "gpio_ich",
130
+
};
131
+
EXPORT_SYMBOL_NS(lpc_ich_gpio_swnode, "LPC_ICH");
132
+
129
133
static struct mfd_cell lpc_ich_gpio_cell = {
130
134
.name = "gpio_ich",
131
135
.num_resources = ARRAY_SIZE(gpio_ich_res),
132
136
.resources = gpio_ich_res,
133
137
.ignore_resource_conflicts = true,
138
+
.swnode = &lpc_ich_gpio_swnode,
134
139
};
135
140
136
141
#define INTEL_GPIO_RESOURCE_SIZE 0x1000
+1
drivers/mfd/macsmc.c
+1
drivers/mfd/macsmc.c
···
46
46
47
47
static const struct mfd_cell apple_smc_devs[] = {
48
48
MFD_CELL_NAME("macsmc-input"),
49
+
MFD_CELL_NAME("macsmc-power"),
49
50
MFD_CELL_OF("macsmc-gpio", NULL, NULL, 0, 0, "apple,smc-gpio"),
50
51
MFD_CELL_OF("macsmc-hwmon", NULL, NULL, 0, 0, "apple,smc-hwmon"),
51
52
MFD_CELL_OF("macsmc-reboot", NULL, NULL, 0, 0, "apple,smc-reboot"),
+1
-1
drivers/mfd/max77705.c
+1
-1
drivers/mfd/max77705.c
···
157
157
158
158
return 0;
159
159
}
160
-
DEFINE_SIMPLE_DEV_PM_OPS(max77705_pm_ops, max77705_suspend, max77705_resume);
160
+
static DEFINE_SIMPLE_DEV_PM_OPS(max77705_pm_ops, max77705_suspend, max77705_resume);
161
161
162
162
static const struct of_device_id max77705_i2c_of_match[] = {
163
163
{ .compatible = "maxim,max77705" },
+1
-1
drivers/mfd/mc13xxx-core.c
+1
-1
drivers/mfd/mc13xxx-core.c
+11
-1
drivers/mfd/mfd-core.c
+11
-1
drivers/mfd/mfd-core.c
···
88
88
}
89
89
}
90
90
91
-
device_set_node(&pdev->dev, acpi_fwnode_handle(adev ?: parent));
91
+
/*
92
+
* NOTE: The fwnode design doesn't allow proper stacking/sharing. This
93
+
* should eventually turn into a device fwnode API call that will allow
94
+
* prepending to a list of fwnodes (with ACPI taking precedence).
95
+
*
96
+
* set_primary_fwnode() is used here, instead of device_set_node(), as
97
+
* device_set_node() will overwrite the existing fwnode, which may be an
98
+
* OF node that was populated earlier. To support a use case where ACPI
99
+
* and OF is used in conjunction, we call set_primary_fwnode() instead.
100
+
*/
101
+
set_primary_fwnode(&pdev->dev, acpi_fwnode_handle(adev ?: parent));
92
102
}
93
103
#else
94
104
static inline void mfd_acpi_add_device(const struct mfd_cell *cell,
+2
-2
drivers/mfd/mt6397-core.c
+2
-2
drivers/mfd/mt6397-core.c
···
297
297
298
298
static const struct chip_data mt6328_core = {
299
299
.cid_addr = MT6328_HWCID,
300
-
.cid_shift = 0,
300
+
.cid_shift = 8,
301
301
.cells = mt6328_devs,
302
302
.cell_size = ARRAY_SIZE(mt6328_devs),
303
303
.irq_init = mt6397_irq_init,
···
313
313
314
314
static const struct chip_data mt6331_mt6332_core = {
315
315
.cid_addr = MT6331_HWCID,
316
-
.cid_shift = 0,
316
+
.cid_shift = 8,
317
317
.cells = mt6331_mt6332_devs,
318
318
.cell_size = ARRAY_SIZE(mt6331_mt6332_devs),
319
319
.irq_init = mt6397_irq_init,
+1
drivers/mfd/rohm-bd71828.c
+1
drivers/mfd/rohm-bd71828.c
+18
-2
drivers/mfd/stpmic1.c
+18
-2
drivers/mfd/stpmic1.c
···
16
16
17
17
#include <dt-bindings/mfd/st,stpmic1.h>
18
18
19
+
#define STPMIC1_MAX_RETRIES 2
20
+
19
21
#define STPMIC1_MAIN_IRQ 0
20
22
21
23
static const struct regmap_range stpmic1_readable_ranges[] = {
···
123
121
static int stpmic1_power_off(struct sys_off_data *data)
124
122
{
125
123
struct stpmic1 *ddata = data->cb_data;
124
+
int ret;
126
125
127
-
regmap_update_bits(ddata->regmap, MAIN_CR,
128
-
SOFTWARE_SWITCH_OFF, SOFTWARE_SWITCH_OFF);
126
+
/*
127
+
* Attempt to shut down again, in case the first attempt failed.
128
+
* The STPMIC1 might get confused and the first regmap_update_bits()
129
+
* returns with -ETIMEDOUT / -110 . If that or similar transient
130
+
* failure occurs, try to shut down again. If the second attempt
131
+
* fails, there is some bigger problem, report it to user.
132
+
*/
133
+
for (int retries = 0; retries < STPMIC1_MAX_RETRIES; retries++) {
134
+
ret = regmap_update_bits(ddata->regmap, MAIN_CR, SOFTWARE_SWITCH_OFF,
135
+
SOFTWARE_SWITCH_OFF);
136
+
if (!ret)
137
+
return NOTIFY_DONE;
138
+
}
139
+
140
+
dev_err(ddata->dev, "Failed to access PMIC I2C bus (%d)\n", ret);
129
141
130
142
return NOTIFY_DONE;
131
143
}
+2
-5
drivers/mfd/viperboard.c
+2
-5
drivers/mfd/viperboard.c
···
59
59
60
60
mutex_init(&vb->lock);
61
61
62
-
vb->usb_dev = usb_get_dev(interface_to_usbdev(interface));
62
+
vb->usb_dev = interface_to_usbdev(interface);
63
63
64
64
/* save our data pointer in this interface device */
65
65
usb_set_intfdata(interface, vb);
···
96
96
return 0;
97
97
98
98
error:
99
-
if (vb) {
100
-
usb_put_dev(vb->usb_dev);
99
+
if (vb)
101
100
kfree(vb);
102
-
}
103
101
104
102
return ret;
105
103
}
···
108
110
109
111
mfd_remove_devices(&interface->dev);
110
112
usb_set_intfdata(interface, NULL);
111
-
usb_put_dev(vb->usb_dev);
112
113
kfree(vb);
113
114
114
115
dev_dbg(&interface->dev, "disconnected\n");
+1
include/linux/mfd/atmel-hlcdc.h
+1
include/linux/mfd/atmel-hlcdc.h
+7
include/linux/mfd/bcm2835-pm.h
+7
include/linux/mfd/bcm2835-pm.h
···
5
5
6
6
#include <linux/regmap.h>
7
7
8
+
enum bcm2835_soc {
9
+
BCM2835_PM_SOC_BCM2835,
10
+
BCM2835_PM_SOC_BCM2711,
11
+
BCM2835_PM_SOC_BCM2712,
12
+
};
13
+
8
14
struct bcm2835_pm {
9
15
struct device *dev;
10
16
void __iomem *base;
11
17
void __iomem *asb;
12
18
void __iomem *rpivid_asb;
19
+
enum bcm2835_soc soc;
13
20
};
14
21
15
22
#endif /* BCM2835_MFD_PM_H */
+2
-2
include/linux/mfd/cgbc.h
+2
-2
include/linux/mfd/cgbc.h
···
26
26
* @io_cmd: Pointer to the command IO memory
27
27
* @session: Session id returned by the Board Controller
28
28
* @dev: Pointer to kernel device structure
29
-
* @cgbc_version: Board Controller version structure
30
-
* @mutex: Board Controller mutex
29
+
* @version: Board Controller version structure
30
+
* @lock: Board Controller mutex
31
31
*/
32
32
struct cgbc_device_data {
33
33
void __iomem *io_session;
+3
-3
include/linux/mfd/kempld.h
+3
-3
include/linux/mfd/kempld.h
···
98
98
/**
99
99
* struct kempld_platform_data - PLD hardware configuration structure
100
100
* @pld_clock: PLD clock frequency
101
-
* @gpio_base GPIO base pin number
101
+
* @gpio_base: GPIO base pin number
102
102
* @ioresource: IO addresses of the PLD
103
-
* @get_mutex: PLD specific get_mutex callback
104
-
* @release_mutex: PLD specific release_mutex callback
103
+
* @get_hardware_mutex: PLD specific get_mutex callback
104
+
* @release_hardware_mutex: PLD specific release_mutex callback
105
105
* @get_info: PLD specific get_info callback
106
106
* @register_cells: PLD specific register_cells callback
107
107
*/
+2
include/linux/mfd/lpc_ich.h
+2
include/linux/mfd/lpc_ich.h
+3
-3
include/linux/mfd/mt6397/core.h
+3
-3
include/linux/mfd/mt6397/core.h
···
12
12
13
13
enum chip_id {
14
14
MT6323_CHIP_ID = 0x23,
15
-
MT6328_CHIP_ID = 0x30,
16
-
MT6331_CHIP_ID = 0x20,
17
-
MT6332_CHIP_ID = 0x20,
15
+
MT6328_CHIP_ID = 0x28,
16
+
MT6331_CHIP_ID = 0x31,
17
+
MT6332_CHIP_ID = 0x32,
18
18
MT6357_CHIP_ID = 0x57,
19
19
MT6358_CHIP_ID = 0x58,
20
20
MT6359_CHIP_ID = 0x59,
-1
include/linux/mfd/rsmu.h
-1
include/linux/mfd/rsmu.h
+12
-5
include/linux/mfd/si476x-core.h
+12
-5
include/linux/mfd/si476x-core.h
···
77
77
* underlying "core" device which all the MFD cell-devices use.
78
78
*
79
79
* @client: Actual I2C client used to transfer commands to the chip.
80
+
* @regmap: Regmap for accessing the device registers
80
81
* @chip_id: Last digit of the chip model(E.g. "1" for SI4761)
81
82
* @cells: MFD cell devices created by this driver.
82
83
* @cmd_lock: Mutex used to serialize all the requests to the core
···
101
100
* @stc: Similar to @cts, but for the STC bit of the status value.
102
101
* @power_up_parameters: Parameters used as argument for POWER_UP
103
102
* command when the device is started.
104
-
* @state: Current power state of the device.
105
-
* @supplues: Structure containing handles to all power supplies used
103
+
* @power_state: Current power state of the device.
104
+
* @supplies: Structure containing handles to all power supplies used
106
105
* by the device (NULL ones are ignored).
107
106
* @gpio_reset: GPIO pin connectet to the RSTB pin of the chip.
108
107
* @pinmux: Chip's configurable pins configuration.
109
108
* @diversity_mode: Chips role when functioning in diversity mode.
109
+
* @is_alive: Chip is initialized and active.
110
110
* @status_monitor: Polling worker used in polling use case scenarion
111
111
* (when IRQ is not avalible).
112
112
* @revision: Chip's running firmware revision number(Used for correct
113
113
* command set support).
114
+
* @rds_fifo_depth: RDS FIFO size: 20 for IRQ mode or 5 for polling mode.
114
115
*/
115
116
116
117
struct si476x_core {
···
169
166
/**
170
167
* si476x_core_lock() - lock the core device to get an exclusive access
171
168
* to it.
169
+
* @core: Core device structure
172
170
*/
173
171
static inline void si476x_core_lock(struct si476x_core *core)
174
172
{
···
179
175
/**
180
176
* si476x_core_unlock() - unlock the core device to relinquish an
181
177
* exclusive access to it.
178
+
* @core: Core device structure
182
179
*/
183
180
static inline void si476x_core_unlock(struct si476x_core *core)
184
181
{
···
251
246
* struct si476x_func_info - structure containing result of the
252
247
* FUNC_INFO command.
253
248
*
249
+
* @firmware: Firmware version numbers.
254
250
* @firmware.major: Firmware major number.
255
251
* @firmware.minor[...]: Firmware minor numbers.
256
-
* @patch_id:
252
+
* @patch_id: Firmware patch level.
257
253
* @func: Mode tuner is working in.
258
254
*/
259
255
struct si476x_func_info {
···
324
318
* @tp: Current channel's TP flag.
325
319
* @pty: Current channel's PTY code.
326
320
* @pi: Current channel's PI code.
327
-
* @rdsfifoused: Number of blocks remaining in the RDS FIFO (0 if
328
-
* empty).
321
+
* @rdsfifoused: Number of blocks remaining in the RDS FIFO (0 if empty).
322
+
* @ble:
323
+
* @rds: RDS data descriptor
329
324
*/
330
325
struct si476x_rds_status_report {
331
326
bool rdstpptyint, rdspiint, rdssyncint, rdsfifoint;