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arm64/mm: Describe TTBR1_BADDR_4852_OFFSET

TTBR1_BADDR_4852_OFFSET is a constant offset which gets added into kernel
page table physical address for TTBR1_EL1 when kernel is build for 52 bit
VA but found to be running on 48 bit VA capable system. Although there is
no explanation on how the macro is computed.

Describe TTBR1_BADDR_4852_OFFSET computation in detail via deriving from
all required parameters involved thus improving clarity and readability.

Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ryan Roberts <ryan.roberts@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

authored by

Anshuman Khandual and committed by
Catalin Marinas 2615924e 1f318b96

+5 -2
+5 -2
arch/arm64/include/asm/pgtable-hwdef.h
··· 287 287 #endif 288 288 289 289 #ifdef CONFIG_ARM64_VA_BITS_52 290 + #define PTRS_PER_PGD_52_VA (UL(1) << (52 - PGDIR_SHIFT)) 291 + #define PTRS_PER_PGD_48_VA (UL(1) << (48 - PGDIR_SHIFT)) 292 + #define PTRS_PER_PGD_EXTRA (PTRS_PER_PGD_52_VA - PTRS_PER_PGD_48_VA) 293 + 290 294 /* Must be at least 64-byte aligned to prevent corruption of the TTBR */ 291 - #define TTBR1_BADDR_4852_OFFSET (((UL(1) << (52 - PGDIR_SHIFT)) - \ 292 - (UL(1) << (48 - PGDIR_SHIFT))) * 8) 295 + #define TTBR1_BADDR_4852_OFFSET (PTRS_PER_PGD_EXTRA << PTDESC_ORDER) 293 296 #endif 294 297 295 298 #endif