Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
usb: mtu3: add feature to disable device's usb3 port
We may want to disable device's usb3 port when the combo phy is switched
from usb3 mode to pcie mode for some projects.
Meanwhile rename member @is_u3_ip to @u3_capable to avoid misleading, due
to the member's value may be changed when disable usb3 port, but the
controller is still a usb3 IP which also tells us how to manage the fifo.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20220708071903.25752-3-chunfeng.yun@mediatek.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
authored by
Chunfeng Yun
and committed by
Greg Kroah-Hartman
269f49ff
3cb79822
+24
-16
+3
-1
drivers/usb/mtu3/mtu3.h
+3
-1
drivers/usb/mtu3/mtu3.h
···
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* @ep0_req: dummy request used while handling standard USB requests
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* for GET_STATUS and SET_SEL
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* @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests
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+
* @u3_capable: is capable of supporting USB3
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*/
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struct mtu3 {
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spinlock_t lock;
···
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unsigned softconnect:1;
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unsigned u1_enable:1;
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unsigned u2_enable:1;
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-
unsigned is_u3_ip:1;
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+
unsigned u3_capable:1;
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unsigned delayed_status:1;
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unsigned gen2cp:1;
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unsigned connected:1;
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unsigned async_callbacks:1;
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+
unsigned separate_fifo:1;
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u8 address;
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u8 test_mode_nr;
+19
-13
drivers/usb/mtu3/mtu3_core.c
+19
-13
drivers/usb/mtu3/mtu3_core.c
···
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mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
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-
if (mtu->is_u3_ip) {
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+
if (mtu->u3_capable) {
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check_clk = SSUSB_U3_MAC_RST_B_STS;
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mtu3_clrbits(ibase, SSUSB_U3_CTRL(0),
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(SSUSB_U3_PORT_DIS | SSUSB_U3_PORT_PDN |
···
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if (mtu->ssusb->dr_mode == USB_DR_MODE_OTG) {
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mtu3_setbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
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-
if (mtu->is_u3_ip)
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+
if (mtu->u3_capable)
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mtu3_setbits(ibase, SSUSB_U3_CTRL(0),
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SSUSB_U3_PORT_DUAL_MODE);
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}
···
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{
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void __iomem *ibase = mtu->ippc_base;
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-
if (mtu->is_u3_ip)
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+
if (mtu->u3_capable)
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mtu3_setbits(ibase, SSUSB_U3_CTRL(0),
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(SSUSB_U3_PORT_DIS | SSUSB_U3_PORT_PDN));
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···
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if (mtu->ssusb->dr_mode == USB_DR_MODE_OTG) {
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mtu3_clrbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
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-
if (mtu->is_u3_ip)
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+
if (mtu->u3_capable)
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mtu3_clrbits(ibase, SSUSB_U3_CTRL(0),
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SSUSB_U3_PORT_DUAL_MODE);
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}
···
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void __iomem *ibase = mtu->ippc_base;
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mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
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-
if (mtu->is_u3_ip)
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+
if (mtu->u3_capable)
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mtu3_clrbits(ibase, SSUSB_U3_CTRL(0), SSUSB_U3_PORT_PDN);
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mtu3_clrbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_PDN);
···
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{
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void __iomem *ibase = mtu->ippc_base;
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-
if (mtu->is_u3_ip)
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+
if (mtu->u3_capable)
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mtu3_setbits(ibase, SSUSB_U3_CTRL(0), SSUSB_U3_PORT_PDN);
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mtu3_setbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_PDN);
···
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value = SUSPEND_INTR | RESUME_INTR | RESET_INTR;
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mtu3_writel(mbase, U3D_COMMON_USB_INTR_ENABLE, value);
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-
if (mtu->is_u3_ip) {
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+
if (mtu->u3_capable) {
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/* Enable U3 LTSSM interrupts */
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value = HOT_RST_INTR | WARM_RST_INTR |
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ENTER_U3_INTR | EXIT_U3_INTR;
···
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{
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void __iomem *mbase = mtu->mac_base;
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-
if (mtu->is_u3_ip) {
276
+
if (mtu->u3_capable) {
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/* disable LGO_U1/U2 by default */
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mtu3_clrbits(mbase, U3D_LINK_POWER_CONTROL,
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SW_U1_REQUEST_ENABLE | SW_U2_REQUEST_ENABLE);
···
341
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void mtu3_dev_on_off(struct mtu3 *mtu, int is_on)
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{
344
-
if (mtu->is_u3_ip && mtu->speed >= USB_SPEED_SUPER)
344
+
if (mtu->u3_capable && mtu->speed >= USB_SPEED_SUPER)
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mtu3_ss_func_set(mtu, is_on);
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else
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mtu3_hs_softconn_set(mtu, is_on);
···
544
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struct mtu3_fifo_info *rx_fifo;
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u32 fifosize;
546
546
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-
if (mtu->is_u3_ip) {
547
+
if (mtu->separate_fifo) {
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fifosize = mtu3_readl(mtu->mac_base, U3D_CAP_EPNTXFFSZ);
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tx_fifo = &mtu->tx_fifo;
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tx_fifo->base = 0;
···
821
821
822
822
static void mtu3_check_params(struct mtu3 *mtu)
823
823
{
824
+
/* device's u3 port (port0) is disabled */
825
+
if (mtu->u3_capable && (mtu->ssusb->u3p_dis_msk & BIT(0)))
826
+
mtu->u3_capable = 0;
827
+
824
828
/* check the max_speed parameter */
825
829
switch (mtu->max_speed) {
826
830
case USB_SPEED_FULL:
···
842
838
break;
843
839
}
844
840
845
-
if (!mtu->is_u3_ip && (mtu->max_speed > USB_SPEED_HIGH))
841
+
if (!mtu->u3_capable && (mtu->max_speed > USB_SPEED_HIGH))
846
842
mtu->max_speed = USB_SPEED_HIGH;
847
843
848
844
mtu->speed = mtu->max_speed;
···
861
857
mtu->gen2cp = !!(mtu->hw_version >= MTU3_TRUNK_VERS_1003);
862
858
863
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value = mtu3_readl(mtu->ippc_base, U3D_SSUSB_IP_DEV_CAP);
864
-
mtu->is_u3_ip = !!SSUSB_IP_DEV_U3_PORT_NUM(value);
860
+
mtu->u3_capable = !!SSUSB_IP_DEV_U3_PORT_NUM(value);
861
+
/* usb3 ip uses separate fifo */
862
+
mtu->separate_fifo = mtu->u3_capable;
865
863
866
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dev_info(mtu->dev, "IP version 0x%x(%s IP)\n", mtu->hw_version,
867
-
mtu->is_u3_ip ? "U3" : "U2");
865
+
mtu->u3_capable ? "U3" : "U2");
868
866
869
867
mtu3_check_params(mtu);
870
868
+2
-2
drivers/usb/mtu3/mtu3_plat.c
+2
-2
drivers/usb/mtu3/mtu3_plat.c
···
244
244
if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
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ssusb->dr_mode = USB_DR_MODE_OTG;
246
246
247
+
of_property_read_u32(node, "mediatek,u3p-dis-msk", &ssusb->u3p_dis_msk);
248
+
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249
if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
248
250
goto out;
249
251
···
257
255
}
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256
259
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/* optional property, ignore the error if it does not exist */
260
-
of_property_read_u32(node, "mediatek,u3p-dis-msk",
261
-
&ssusb->u3p_dis_msk);
262
258
of_property_read_u32(node, "mediatek,u2p-dis-msk",
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&ssusb->u2p_dis_msk);
264
260