Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'usb-4.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB fixes from Greg KH:
"Here's a few USB and PHY fixes for 4.2-rc4.
Nothing major, the shortlog has the full details.
All of these have been in linux-next successfully"
* tag 'usb-4.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (21 commits)
USB: OHCI: fix bad #define in ohci-tmio.c
cdc-acm: Destroy acm_minors IDR on module exit
usb-storage: Add ignore-device quirk for gm12u320 based usb mini projectors
usb-storage: ignore ZTE MF 823 card reader in mode 0x1225
USB: OHCI: Fix race between ED unlink and URB submission
usb: core: lpm: set lpm_capable for root hub device
xhci: do not report PLC when link is in internal resume state
xhci: prevent bus_suspend if SS port resuming in phase 1
xhci: report U3 when link is in resume state
xhci: Calculate old endpoints correctly on device reset
usb: xhci: Bugfix for NULL pointer deference in xhci_endpoint_init() function
xhci: Workaround to get D3 working in Intel xHCI
xhci: call BIOS workaround to enable runtime suspend on Intel Braswell
usb: dwc3: Reset the transfer resource index on SET_INTERFACE
usb: gadget: udc: core: Fix argument of dma_map_single for IOMMU
usb: gadget: mv_udc_core: fix phy_regs I/O memory leak
usb: ulpi: ulpi_init should be executed in subsys_initcall
phy: berlin-usb: fix divider for BG2
phy: berlin-usb: fix divider for BG2CD
phy/pxa: add HAS_IOMEM dependency
...
+169
-160
+2
drivers/phy/Kconfig
+2
drivers/phy/Kconfig
···
56
56
57
57
config PHY_PXA_28NM_HSIC
58
58
tristate "Marvell USB HSIC 28nm PHY Driver"
59
+
depends on HAS_IOMEM
59
60
select GENERIC_PHY
60
61
help
61
62
Enable this to support Marvell USB HSIC PHY driver for Marvell
···
67
66
68
67
config PHY_PXA_28NM_USB2
69
68
tristate "Marvell USB 2.0 28nm PHY Driver"
69
+
depends on HAS_IOMEM
70
70
select GENERIC_PHY
71
71
help
72
72
Enable this to support Marvell USB 2.0 PHY driver for Marvell
+2
-2
drivers/phy/phy-berlin-usb.c
+2
-2
drivers/phy/phy-berlin-usb.c
···
105
105
106
106
static const u32 phy_berlin_pll_dividers[] = {
107
107
/* Berlin 2 */
108
-
CLK_REF_DIV(0xc) | FEEDBACK_CLK_DIV(0x54),
109
-
/* Berlin 2CD */
110
108
CLK_REF_DIV(0x6) | FEEDBACK_CLK_DIV(0x55),
109
+
/* Berlin 2CD/Q */
110
+
CLK_REF_DIV(0xc) | FEEDBACK_CLK_DIV(0x54),
111
111
};
112
112
113
113
struct phy_berlin_usb_priv {
+40
-130
drivers/phy/phy-ti-pipe3.c
+40
-130
drivers/phy/phy-ti-pipe3.c
···
28
28
#include <linux/delay.h>
29
29
#include <linux/phy/omap_control_phy.h>
30
30
#include <linux/of_platform.h>
31
-
#include <linux/spinlock.h>
32
31
33
32
#define PLL_STATUS 0x00000004
34
33
#define PLL_GO 0x00000008
···
82
83
struct clk *refclk;
83
84
struct clk *div_clk;
84
85
struct pipe3_dpll_map *dpll_map;
85
-
bool enabled;
86
-
spinlock_t lock; /* serialize clock enable/disable */
87
-
/* the below flag is needed specifically for SATA */
88
-
bool refclk_enabled;
89
86
};
90
87
91
88
static struct pipe3_dpll_map dpll_map_usb[] = {
···
131
136
132
137
return NULL;
133
138
}
139
+
140
+
static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy);
141
+
static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy);
134
142
135
143
static int ti_pipe3_power_off(struct phy *x)
136
144
{
···
215
217
u32 val;
216
218
int ret = 0;
217
219
220
+
ti_pipe3_enable_clocks(phy);
218
221
/*
219
222
* Set pcie_pcs register to 0x96 for proper functioning of phy
220
223
* as recommended in AM572x TRM SPRUHZ6, section 18.5.2.2, table
···
249
250
u32 val;
250
251
unsigned long timeout;
251
252
252
-
/* SATA DPLL can't be powered down due to Errata i783 and PCIe
253
-
* does not have internal DPLL
254
-
*/
255
-
if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata") ||
256
-
of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie"))
253
+
/* SATA DPLL can't be powered down due to Errata i783 */
254
+
if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata"))
257
255
return 0;
258
256
259
-
/* Put DPLL in IDLE mode */
260
-
val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
261
-
val |= PLL_IDLE;
262
-
ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
257
+
/* PCIe doesn't have internal DPLL */
258
+
if (!of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie")) {
259
+
/* Put DPLL in IDLE mode */
260
+
val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
261
+
val |= PLL_IDLE;
262
+
ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
263
263
264
-
/* wait for LDO and Oscillator to power down */
265
-
timeout = jiffies + msecs_to_jiffies(PLL_IDLE_TIME);
266
-
do {
267
-
cpu_relax();
268
-
val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
269
-
if ((val & PLL_TICOPWDN) && (val & PLL_LDOPWDN))
270
-
break;
271
-
} while (!time_after(jiffies, timeout));
264
+
/* wait for LDO and Oscillator to power down */
265
+
timeout = jiffies + msecs_to_jiffies(PLL_IDLE_TIME);
266
+
do {
267
+
cpu_relax();
268
+
val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
269
+
if ((val & PLL_TICOPWDN) && (val & PLL_LDOPWDN))
270
+
break;
271
+
} while (!time_after(jiffies, timeout));
272
272
273
-
if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) {
274
-
dev_err(phy->dev, "Failed to power down: PLL_STATUS 0x%x\n",
275
-
val);
276
-
return -EBUSY;
273
+
if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) {
274
+
dev_err(phy->dev, "Failed to power down: PLL_STATUS 0x%x\n",
275
+
val);
276
+
return -EBUSY;
277
+
}
277
278
}
279
+
280
+
ti_pipe3_disable_clocks(phy);
278
281
279
282
return 0;
280
283
}
···
307
306
return -ENOMEM;
308
307
309
308
phy->dev = &pdev->dev;
310
-
spin_lock_init(&phy->lock);
311
309
312
310
if (!of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {
313
311
match = of_match_device(ti_pipe3_id_table, &pdev->dev);
···
402
402
403
403
platform_set_drvdata(pdev, phy);
404
404
pm_runtime_enable(phy->dev);
405
+
/* Prevent auto-disable of refclk for SATA PHY due to Errata i783 */
406
+
if (of_device_is_compatible(node, "ti,phy-pipe3-sata"))
407
+
if (!IS_ERR(phy->refclk))
408
+
clk_prepare_enable(phy->refclk);
405
409
406
410
generic_phy = devm_phy_create(phy->dev, NULL, &ops);
407
411
if (IS_ERR(generic_phy))
···
417
413
if (IS_ERR(phy_provider))
418
414
return PTR_ERR(phy_provider);
419
415
420
-
pm_runtime_get(&pdev->dev);
421
-
422
416
return 0;
423
417
}
424
418
425
419
static int ti_pipe3_remove(struct platform_device *pdev)
426
420
{
427
-
if (!pm_runtime_suspended(&pdev->dev))
428
-
pm_runtime_put(&pdev->dev);
429
421
pm_runtime_disable(&pdev->dev);
430
422
431
423
return 0;
432
424
}
433
425
434
-
#ifdef CONFIG_PM
435
-
static int ti_pipe3_enable_refclk(struct ti_pipe3 *phy)
426
+
static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy)
436
427
{
437
-
if (!IS_ERR(phy->refclk) && !phy->refclk_enabled) {
438
-
int ret;
428
+
int ret = 0;
439
429
430
+
if (!IS_ERR(phy->refclk)) {
440
431
ret = clk_prepare_enable(phy->refclk);
441
432
if (ret) {
442
433
dev_err(phy->dev, "Failed to enable refclk %d\n", ret);
443
434
return ret;
444
435
}
445
-
phy->refclk_enabled = true;
446
436
}
447
-
448
-
return 0;
449
-
}
450
-
451
-
static void ti_pipe3_disable_refclk(struct ti_pipe3 *phy)
452
-
{
453
-
if (!IS_ERR(phy->refclk))
454
-
clk_disable_unprepare(phy->refclk);
455
-
456
-
phy->refclk_enabled = false;
457
-
}
458
-
459
-
static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy)
460
-
{
461
-
int ret = 0;
462
-
unsigned long flags;
463
-
464
-
spin_lock_irqsave(&phy->lock, flags);
465
-
if (phy->enabled)
466
-
goto err1;
467
-
468
-
ret = ti_pipe3_enable_refclk(phy);
469
-
if (ret)
470
-
goto err1;
471
437
472
438
if (!IS_ERR(phy->wkupclk)) {
473
439
ret = clk_prepare_enable(phy->wkupclk);
474
440
if (ret) {
475
441
dev_err(phy->dev, "Failed to enable wkupclk %d\n", ret);
476
-
goto err2;
442
+
goto disable_refclk;
477
443
}
478
444
}
479
445
···
451
477
ret = clk_prepare_enable(phy->div_clk);
452
478
if (ret) {
453
479
dev_err(phy->dev, "Failed to enable div_clk %d\n", ret);
454
-
goto err3;
480
+
goto disable_wkupclk;
455
481
}
456
482
}
457
483
458
-
phy->enabled = true;
459
-
spin_unlock_irqrestore(&phy->lock, flags);
460
484
return 0;
461
485
462
-
err3:
486
+
disable_wkupclk:
463
487
if (!IS_ERR(phy->wkupclk))
464
488
clk_disable_unprepare(phy->wkupclk);
465
489
466
-
err2:
490
+
disable_refclk:
467
491
if (!IS_ERR(phy->refclk))
468
492
clk_disable_unprepare(phy->refclk);
469
493
470
-
ti_pipe3_disable_refclk(phy);
471
-
err1:
472
-
spin_unlock_irqrestore(&phy->lock, flags);
473
494
return ret;
474
495
}
475
496
476
497
static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy)
477
498
{
478
-
unsigned long flags;
479
-
480
-
spin_lock_irqsave(&phy->lock, flags);
481
-
if (!phy->enabled) {
482
-
spin_unlock_irqrestore(&phy->lock, flags);
483
-
return;
484
-
}
485
-
486
499
if (!IS_ERR(phy->wkupclk))
487
500
clk_disable_unprepare(phy->wkupclk);
488
-
/* Don't disable refclk for SATA PHY due to Errata i783 */
489
-
if (!of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata"))
490
-
ti_pipe3_disable_refclk(phy);
501
+
if (!IS_ERR(phy->refclk))
502
+
clk_disable_unprepare(phy->refclk);
491
503
if (!IS_ERR(phy->div_clk))
492
504
clk_disable_unprepare(phy->div_clk);
493
-
phy->enabled = false;
494
-
spin_unlock_irqrestore(&phy->lock, flags);
495
505
}
496
-
497
-
static int ti_pipe3_runtime_suspend(struct device *dev)
498
-
{
499
-
struct ti_pipe3 *phy = dev_get_drvdata(dev);
500
-
501
-
ti_pipe3_disable_clocks(phy);
502
-
return 0;
503
-
}
504
-
505
-
static int ti_pipe3_runtime_resume(struct device *dev)
506
-
{
507
-
struct ti_pipe3 *phy = dev_get_drvdata(dev);
508
-
int ret = 0;
509
-
510
-
ret = ti_pipe3_enable_clocks(phy);
511
-
return ret;
512
-
}
513
-
514
-
static int ti_pipe3_suspend(struct device *dev)
515
-
{
516
-
struct ti_pipe3 *phy = dev_get_drvdata(dev);
517
-
518
-
ti_pipe3_disable_clocks(phy);
519
-
return 0;
520
-
}
521
-
522
-
static int ti_pipe3_resume(struct device *dev)
523
-
{
524
-
struct ti_pipe3 *phy = dev_get_drvdata(dev);
525
-
int ret;
526
-
527
-
ret = ti_pipe3_enable_clocks(phy);
528
-
if (ret)
529
-
return ret;
530
-
531
-
pm_runtime_disable(dev);
532
-
pm_runtime_set_active(dev);
533
-
pm_runtime_enable(dev);
534
-
return 0;
535
-
}
536
-
#endif
537
-
538
-
static const struct dev_pm_ops ti_pipe3_pm_ops = {
539
-
SET_RUNTIME_PM_OPS(ti_pipe3_runtime_suspend,
540
-
ti_pipe3_runtime_resume, NULL)
541
-
SET_SYSTEM_SLEEP_PM_OPS(ti_pipe3_suspend, ti_pipe3_resume)
542
-
};
543
506
544
507
static const struct of_device_id ti_pipe3_id_table[] = {
545
508
{
···
503
592
.remove = ti_pipe3_remove,
504
593
.driver = {
505
594
.name = "ti-pipe3",
506
-
.pm = &ti_pipe3_pm_ops,
507
595
.of_match_table = ti_pipe3_id_table,
508
596
},
509
597
};
+1
drivers/usb/class/cdc-acm.c
+1
drivers/usb/class/cdc-acm.c
+1
-1
drivers/usb/common/ulpi.c
+1
-1
drivers/usb/common/ulpi.c
+5
-2
drivers/usb/core/hcd.c
+5
-2
drivers/usb/core/hcd.c
···
1022
1022
dev_name(&usb_dev->dev), retval);
1023
1023
return (retval < 0) ? retval : -EMSGSIZE;
1024
1024
}
1025
-
if (usb_dev->speed == USB_SPEED_SUPER) {
1025
+
1026
+
if (le16_to_cpu(usb_dev->descriptor.bcdUSB) >= 0x0201) {
1026
1027
retval = usb_get_bos_descriptor(usb_dev);
1027
-
if (retval < 0) {
1028
+
if (!retval) {
1029
+
usb_dev->lpm_capable = usb_device_supports_lpm(usb_dev);
1030
+
} else if (usb_dev->speed == USB_SPEED_SUPER) {
1028
1031
mutex_unlock(&usb_bus_list_lock);
1029
1032
dev_dbg(parent_dev, "can't read %s bos descriptor %d\n",
1030
1033
dev_name(&usb_dev->dev), retval);
+1
-1
drivers/usb/core/hub.c
+1
-1
drivers/usb/core/hub.c
···
122
122
return usb_get_intfdata(hdev->actconfig->interface[0]);
123
123
}
124
124
125
-
static int usb_device_supports_lpm(struct usb_device *udev)
125
+
int usb_device_supports_lpm(struct usb_device *udev)
126
126
{
127
127
/* USB 2.1 (and greater) devices indicate LPM support through
128
128
* their USB 2.0 Extended Capabilities BOS descriptor.
+1
drivers/usb/core/usb.h
+1
drivers/usb/core/usb.h
+4
drivers/usb/dwc3/ep0.c
+4
drivers/usb/dwc3/ep0.c
···
727
727
dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_ISOCH_DELAY");
728
728
ret = dwc3_ep0_set_isoch_delay(dwc, ctrl);
729
729
break;
730
+
case USB_REQ_SET_INTERFACE:
731
+
dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_INTERFACE");
732
+
dwc->start_config_issued = false;
733
+
/* Fall through */
730
734
default:
731
735
dwc3_trace(trace_dwc3_ep0, "Forwarding to gadget driver");
732
736
ret = dwc3_ep0_delegate_req(dwc, ctrl);
+1
-1
drivers/usb/gadget/udc/mv_udc_core.c
+1
-1
drivers/usb/gadget/udc/mv_udc_core.c
···
2167
2167
return -ENODEV;
2168
2168
}
2169
2169
2170
-
udc->phy_regs = ioremap(r->start, resource_size(r));
2170
+
udc->phy_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
2171
2171
if (udc->phy_regs == NULL) {
2172
2172
dev_err(&pdev->dev, "failed to map phy I/O memory\n");
2173
2173
return -EBUSY;
+8
-6
drivers/usb/gadget/udc/udc-core.c
+8
-6
drivers/usb/gadget/udc/udc-core.c
···
60
60
int usb_gadget_map_request(struct usb_gadget *gadget,
61
61
struct usb_request *req, int is_in)
62
62
{
63
+
struct device *dev = gadget->dev.parent;
64
+
63
65
if (req->length == 0)
64
66
return 0;
65
67
66
68
if (req->num_sgs) {
67
69
int mapped;
68
70
69
-
mapped = dma_map_sg(&gadget->dev, req->sg, req->num_sgs,
71
+
mapped = dma_map_sg(dev, req->sg, req->num_sgs,
70
72
is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
71
73
if (mapped == 0) {
72
74
dev_err(&gadget->dev, "failed to map SGs\n");
···
77
75
78
76
req->num_mapped_sgs = mapped;
79
77
} else {
80
-
req->dma = dma_map_single(&gadget->dev, req->buf, req->length,
78
+
req->dma = dma_map_single(dev, req->buf, req->length,
81
79
is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
82
80
83
-
if (dma_mapping_error(&gadget->dev, req->dma)) {
84
-
dev_err(&gadget->dev, "failed to map buffer\n");
81
+
if (dma_mapping_error(dev, req->dma)) {
82
+
dev_err(dev, "failed to map buffer\n");
85
83
return -EFAULT;
86
84
}
87
85
}
···
97
95
return;
98
96
99
97
if (req->num_mapped_sgs) {
100
-
dma_unmap_sg(&gadget->dev, req->sg, req->num_mapped_sgs,
98
+
dma_unmap_sg(gadget->dev.parent, req->sg, req->num_mapped_sgs,
101
99
is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
102
100
103
101
req->num_mapped_sgs = 0;
104
102
} else {
105
-
dma_unmap_single(&gadget->dev, req->dma, req->length,
103
+
dma_unmap_single(gadget->dev.parent, req->dma, req->length,
106
104
is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
107
105
}
108
106
}
+1
-6
drivers/usb/host/ohci-q.c
+1
-6
drivers/usb/host/ohci-q.c
···
981
981
int completed, modified;
982
982
__hc32 *prev;
983
983
984
-
/* Is this ED already invisible to the hardware? */
985
-
if (ed->state == ED_IDLE)
986
-
goto ed_idle;
987
-
988
984
/* only take off EDs that the HC isn't using, accounting for
989
985
* frame counter wraps and EDs with partially retired TDs
990
986
*/
···
1008
1012
}
1009
1013
1010
1014
/* ED's now officially unlinked, hc doesn't see */
1011
-
ed->state = ED_IDLE;
1012
1015
ed->hwHeadP &= ~cpu_to_hc32(ohci, ED_H);
1013
1016
ed->hwNextED = 0;
1014
1017
wmb();
1015
1018
ed->hwINFO &= ~cpu_to_hc32(ohci, ED_SKIP | ED_DEQUEUE);
1016
-
ed_idle:
1017
1019
1018
1020
/* reentrancy: if we drop the schedule lock, someone might
1019
1021
* have modified this list. normally it's just prepending
···
1082
1088
if (list_empty(&ed->td_list)) {
1083
1089
*last = ed->ed_next;
1084
1090
ed->ed_next = NULL;
1091
+
ed->state = ED_IDLE;
1085
1092
list_del(&ed->in_use_list);
1086
1093
} else if (ohci->rh_state == OHCI_RH_RUNNING) {
1087
1094
*last = ed->ed_next;
+1
-1
drivers/usb/host/ohci-tmio.c
+1
-1
drivers/usb/host/ohci-tmio.c
+16
-6
drivers/usb/host/xhci-hub.c
+16
-6
drivers/usb/host/xhci-hub.c
···
484
484
u32 pls = status_reg & PORT_PLS_MASK;
485
485
486
486
/* resume state is a xHCI internal state.
487
-
* Do not report it to usb core.
487
+
* Do not report it to usb core, instead, pretend to be U3,
488
+
* thus usb core knows it's not ready for transfer
488
489
*/
489
-
if (pls == XDEV_RESUME)
490
+
if (pls == XDEV_RESUME) {
491
+
*status |= USB_SS_PORT_LS_U3;
490
492
return;
493
+
}
491
494
492
495
/* When the CAS bit is set then warm reset
493
496
* should be performed on port
···
591
588
status |= USB_PORT_STAT_C_RESET << 16;
592
589
/* USB3.0 only */
593
590
if (hcd->speed == HCD_USB3) {
594
-
if ((raw_port_status & PORT_PLC))
591
+
/* Port link change with port in resume state should not be
592
+
* reported to usbcore, as this is an internal state to be
593
+
* handled by xhci driver. Reporting PLC to usbcore may
594
+
* cause usbcore clearing PLC first and port change event
595
+
* irq won't be generated.
596
+
*/
597
+
if ((raw_port_status & PORT_PLC) &&
598
+
(raw_port_status & PORT_PLS_MASK) != XDEV_RESUME)
595
599
status |= USB_PORT_STAT_C_LINK_STATE << 16;
596
600
if ((raw_port_status & PORT_WRC))
597
601
status |= USB_PORT_STAT_C_BH_RESET << 16;
···
1130
1120
spin_lock_irqsave(&xhci->lock, flags);
1131
1121
1132
1122
if (hcd->self.root_hub->do_remote_wakeup) {
1133
-
if (bus_state->resuming_ports) {
1123
+
if (bus_state->resuming_ports || /* USB2 */
1124
+
bus_state->port_remote_wakeup) { /* USB3 */
1134
1125
spin_unlock_irqrestore(&xhci->lock, flags);
1135
-
xhci_dbg(xhci, "suspend failed because "
1136
-
"a port is resuming\n");
1126
+
xhci_dbg(xhci, "suspend failed because a port is resuming\n");
1137
1127
return -EBUSY;
1138
1128
}
1139
1129
}
+1
-1
drivers/usb/host/xhci-mem.c
+1
-1
drivers/usb/host/xhci-mem.c
···
1427
1427
/* Attempt to use the ring cache */
1428
1428
if (virt_dev->num_rings_cached == 0)
1429
1429
return -ENOMEM;
1430
+
virt_dev->num_rings_cached--;
1430
1431
virt_dev->eps[ep_index].new_ring =
1431
1432
virt_dev->ring_cache[virt_dev->num_rings_cached];
1432
1433
virt_dev->ring_cache[virt_dev->num_rings_cached] = NULL;
1433
-
virt_dev->num_rings_cached--;
1434
1434
xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring,
1435
1435
1, type);
1436
1436
}
+54
-3
drivers/usb/host/xhci-pci.c
+54
-3
drivers/usb/host/xhci-pci.c
···
23
23
#include <linux/pci.h>
24
24
#include <linux/slab.h>
25
25
#include <linux/module.h>
26
+
#include <linux/acpi.h>
26
27
27
28
#include "xhci.h"
28
29
#include "xhci-trace.h"
30
+
31
+
#define PORT2_SSIC_CONFIG_REG2 0x883c
32
+
#define PROG_DONE (1 << 30)
33
+
#define SSIC_PORT_UNUSED (1 << 31)
29
34
30
35
/* Device for a quirk */
31
36
#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
···
181
176
}
182
177
183
178
/*
179
+
* In some Intel xHCI controllers, in order to get D3 working,
180
+
* through a vendor specific SSIC CONFIG register at offset 0x883c,
181
+
* SSIC PORT need to be marked as "unused" before putting xHCI
182
+
* into D3. After D3 exit, the SSIC port need to be marked as "used".
183
+
* Without this change, xHCI might not enter D3 state.
184
184
* Make sure PME works on some Intel xHCI controllers by writing 1 to clear
185
185
* the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
186
186
*/
187
-
static void xhci_pme_quirk(struct xhci_hcd *xhci)
187
+
static void xhci_pme_quirk(struct usb_hcd *hcd, bool suspend)
188
188
{
189
+
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
190
+
struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
189
191
u32 val;
190
192
void __iomem *reg;
193
+
194
+
if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
195
+
pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
196
+
197
+
reg = (void __iomem *) xhci->cap_regs + PORT2_SSIC_CONFIG_REG2;
198
+
199
+
/* Notify SSIC that SSIC profile programming is not done */
200
+
val = readl(reg) & ~PROG_DONE;
201
+
writel(val, reg);
202
+
203
+
/* Mark SSIC port as unused(suspend) or used(resume) */
204
+
val = readl(reg);
205
+
if (suspend)
206
+
val |= SSIC_PORT_UNUSED;
207
+
else
208
+
val &= ~SSIC_PORT_UNUSED;
209
+
writel(val, reg);
210
+
211
+
/* Notify SSIC that SSIC profile programming is done */
212
+
val = readl(reg) | PROG_DONE;
213
+
writel(val, reg);
214
+
readl(reg);
215
+
}
191
216
192
217
reg = (void __iomem *) xhci->cap_regs + 0x80a4;
193
218
val = readl(reg);
194
219
writel(val | BIT(28), reg);
195
220
readl(reg);
196
221
}
222
+
223
+
#ifdef CONFIG_ACPI
224
+
static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev)
225
+
{
226
+
static const u8 intel_dsm_uuid[] = {
227
+
0xb7, 0x0c, 0x34, 0xac, 0x01, 0xe9, 0xbf, 0x45,
228
+
0xb7, 0xe6, 0x2b, 0x34, 0xec, 0x93, 0x1e, 0x23,
229
+
};
230
+
acpi_evaluate_dsm(ACPI_HANDLE(&dev->dev), intel_dsm_uuid, 3, 1, NULL);
231
+
}
232
+
#else
233
+
static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
234
+
#endif /* CONFIG_ACPI */
197
235
198
236
/* called during probe() after chip reset completes */
199
237
static int xhci_pci_setup(struct usb_hcd *hcd)
···
311
263
HCC_MAX_PSA(xhci->hcc_params) >= 4)
312
264
xhci->shared_hcd->can_do_streams = 1;
313
265
266
+
if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
267
+
xhci_pme_acpi_rtd3_enable(dev);
268
+
314
269
/* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */
315
270
pm_runtime_put_noidle(&dev->dev);
316
271
···
358
307
pdev->no_d3cold = true;
359
308
360
309
if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
361
-
xhci_pme_quirk(xhci);
310
+
xhci_pme_quirk(hcd, true);
362
311
363
312
return xhci_suspend(xhci, do_wakeup);
364
313
}
···
391
340
usb_enable_intel_xhci_ports(pdev);
392
341
393
342
if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
394
-
xhci_pme_quirk(xhci);
343
+
xhci_pme_quirk(hcd, false);
395
344
396
345
retval = xhci_resume(xhci, hibernated);
397
346
return retval;
+3
drivers/usb/host/xhci-ring.c
+3
drivers/usb/host/xhci-ring.c
···
1546
1546
usb_hcd_resume_root_hub(hcd);
1547
1547
}
1548
1548
1549
+
if (hcd->speed == HCD_USB3 && (temp & PORT_PLS_MASK) == XDEV_INACTIVE)
1550
+
bus_state->port_remote_wakeup &= ~(1 << faked_port_index);
1551
+
1549
1552
if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_RESUME) {
1550
1553
xhci_dbg(xhci, "port resume event for port %d\n", port_id);
1551
1554
+3
drivers/usb/host/xhci.c
+3
drivers/usb/host/xhci.c
+1
drivers/usb/host/xhci.h
+1
drivers/usb/host/xhci.h
+23
drivers/usb/storage/unusual_devs.h
+23
drivers/usb/storage/unusual_devs.h
···
2065
2065
USB_SC_DEVICE, USB_PR_DEVICE, NULL,
2066
2066
US_FL_NO_READ_DISC_INFO ),
2067
2067
2068
+
/* Reported by Oliver Neukum <oneukum@suse.com>
2069
+
* This device morphes spontaneously into another device if the access
2070
+
* pattern of Windows isn't followed. Thus writable media would be dirty
2071
+
* if the initial instance is used. So the device is limited to its
2072
+
* virtual CD.
2073
+
* And yes, the concept that BCD goes up to 9 is not heeded */
2074
+
UNUSUAL_DEV( 0x19d2, 0x1225, 0x0000, 0xffff,
2075
+
"ZTE,Incorporated",
2076
+
"ZTE WCDMA Technologies MSM",
2077
+
USB_SC_DEVICE, USB_PR_DEVICE, NULL,
2078
+
US_FL_SINGLE_LUN ),
2079
+
2068
2080
/* Reported by Sven Geggus <sven-usbst@geggus.net>
2069
2081
* This encrypted pen drive returns bogus data for the initial READ(10).
2070
2082
*/
···
2085
2073
"Padlock v2",
2086
2074
USB_SC_DEVICE, USB_PR_DEVICE, NULL,
2087
2075
US_FL_INITIAL_READ10 ),
2076
+
2077
+
/* Reported by Hans de Goede <hdegoede@redhat.com>
2078
+
* These are mini projectors using USB for both power and video data transport
2079
+
* The usb-storage interface is a virtual windows driver CD, which the gm12u320
2080
+
* driver automatically converts into framebuffer & kms dri device nodes.
2081
+
*/
2082
+
UNUSUAL_DEV( 0x1de1, 0xc102, 0x0000, 0xffff,
2083
+
"Grain-media Technology Corp.",
2084
+
"USB3.0 Device GM12U320",
2085
+
USB_SC_DEVICE, USB_PR_DEVICE, NULL,
2086
+
US_FL_IGNORE_DEVICE ),
2088
2087
2089
2088
/* Patch by Richard Schütz <r.schtz@t-online.de>
2090
2089
* This external hard drive enclosure uses a JMicron chip which