+2 -2

Documentation/ABI/testing/sysfs-platform-i2c-demux-pinctrl

reviewed

··· 1 1 What: /sys/devices/platform/<i2c-demux-name>/available_masters 2 2 Date: January 2016 3 3 KernelVersion: 4.6 4 4 - Contact: Wolfram Sang <wsa@the-dreams.de> 4 4 + Contact: Wolfram Sang <wsa+renesas@sang-engineering.com> 5 5 Description: 6 6 Reading the file will give you a list of masters which can be 7 7 selected for a demultiplexed bus. The format is ··· 12 12 What: /sys/devices/platform/<i2c-demux-name>/current_master 13 13 Date: January 2016 14 14 KernelVersion: 4.6 15 15 - Contact: Wolfram Sang <wsa@the-dreams.de> 15 15 + Contact: Wolfram Sang <wsa+renesas@sang-engineering.com> 16 16 Description: 17 17 This file selects/shows the active I2C master for a demultiplexed 18 18 bus. It uses the <index> value from the file 'available_masters'.

+65

Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml

reviewed

··· 1 1 + # SPDX-License-Identifier: GPL-2.0 2 2 + %YAML 1.2 3 3 + --- 4 4 + $id: http://devicetree.org/schemas/i2c/allwinner,sun6i-a31-p2wi.yaml# 5 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 + 7 7 + title: Allwinner A31 P2WI (Push/Pull 2 Wires Interface) Device Tree Bindings 8 8 + 9 9 + maintainers: 10 10 + - Chen-Yu Tsai <wens@csie.org> 11 11 + - Maxime Ripard <maxime.ripard@bootlin.com> 12 12 + 13 13 + allOf: 14 14 + - $ref: /schemas/i2c/i2c-controller.yaml# 15 15 + 16 16 + properties: 17 17 + compatible: 18 18 + const: allwinner,sun6i-a31-p2wi 19 19 + 20 20 + reg: 21 21 + maxItems: 1 22 22 + 23 23 + interrupts: 24 24 + maxItems: 1 25 25 + 26 26 + clocks: 27 27 + maxItems: 1 28 28 + 29 29 + resets: 30 30 + maxItems: 1 31 31 + 32 32 + clock-frequency: 33 33 + minimum: 1 34 34 + maximum: 6000000 35 35 + 36 36 + required: 37 37 + - compatible 38 38 + - reg 39 39 + - interrupts 40 40 + - clocks 41 41 + - resets 42 42 + 43 43 + # FIXME: We should set it, but it would report all the generic 44 44 + # properties as additional properties. 45 45 + # additionalProperties: false 46 46 + 47 47 + examples: 48 48 + - | 49 49 + i2c@1f03400 { 50 50 + compatible = "allwinner,sun6i-a31-p2wi"; 51 51 + reg = <0x01f03400 0x400>; 52 52 + interrupts = <0 39 4>; 53 53 + clocks = <&apb0_gates 3>; 54 54 + clock-frequency = <100000>; 55 55 + resets = <&apb0_rst 3>; 56 56 + #address-cells = <1>; 57 57 + #size-cells = <0>; 58 58 + 59 59 + axp221: pmic@68 { 60 60 + compatible = "x-powers,axp221"; 61 61 + reg = <0x68>; 62 62 + }; 63 63 + }; 64 64 + 65 65 + ...

+25

Documentation/devicetree/bindings/i2c/i2c-mt7621.txt

reviewed

··· 1 1 + MediaTek MT7621/MT7628 I2C master controller 2 2 + 3 3 + Required properties: 4 4 + 5 5 + - compatible: Should be one of the following: 6 6 + - "mediatek,mt7621-i2c": for MT7621/MT7628/MT7688 platforms 7 7 + - #address-cells: should be 1. 8 8 + - #size-cells: should be 0. 9 9 + - reg: Address and length of the register set for the device 10 10 + - resets: phandle to the reset controller asserting this device in 11 11 + reset 12 12 + See ../reset/reset.txt for details. 13 13 + 14 14 + Optional properties : 15 15 + 16 16 + Example: 17 17 + 18 18 + i2c: i2c@900 { 19 19 + compatible = "mediatek,mt7621-i2c"; 20 20 + reg = <0x900 0x100>; 21 21 + #address-cells = <1>; 22 22 + #size-cells = <0>; 23 23 + resets = <&rstctrl 16>; 24 24 + reset-names = "i2c"; 25 25 + };

-64

Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt

reviewed

··· 1 1 - 2 2 - * Marvell MV64XXX I2C controller 3 3 - 4 4 - Required properties : 5 5 - 6 6 - - reg : Offset and length of the register set for the device 7 7 - - compatible : Should be either: 8 8 - - "allwinner,sun4i-a10-i2c" 9 9 - - "allwinner,sun6i-a31-i2c" 10 10 - - "marvell,mv64xxx-i2c" 11 11 - - "marvell,mv78230-i2c" 12 12 - - "marvell,mv78230-a0-i2c" 13 13 - * Note: Only use "marvell,mv78230-a0-i2c" for a 14 14 - very rare, initial version of the SoC which 15 15 - had broken offload support. Linux 16 16 - auto-detects this and sets it appropriately. 17 17 - - interrupts : The interrupt number 18 18 - 19 19 - Optional properties : 20 20 - 21 21 - - clock-frequency : Desired I2C bus clock frequency in Hz. If not set the 22 22 - default frequency is 100kHz 23 23 - 24 24 - - resets : phandle to the parent reset controller. Mandatory 25 25 - whenever you're using the "allwinner,sun6i-a31-i2c" 26 26 - compatible. 27 27 - 28 28 - - clocks: : pointers to the reference clocks for this device, the 29 29 - first one is the one used for the clock on the i2c bus, 30 30 - the second one is the clock used to acces the registers 31 31 - of the controller 32 32 - 33 33 - - clock-names : names of used clocks, mandatory if the second clock is 34 34 - used, the name must be "core", and "reg" (the latter is 35 35 - only for Armada 7K/8K). 36 36 - 37 37 - Examples: 38 38 - 39 39 - i2c@11000 { 40 40 - compatible = "marvell,mv64xxx-i2c"; 41 41 - reg = <0x11000 0x20>; 42 42 - interrupts = <29>; 43 43 - clock-frequency = <100000>; 44 44 - }; 45 45 - 46 46 - For the Armada XP: 47 47 - 48 48 - i2c@11000 { 49 49 - compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; 50 50 - reg = <0x11000 0x100>; 51 51 - interrupts = <29>; 52 52 - clock-frequency = <100000>; 53 53 - }; 54 54 - 55 55 - For the Armada 7040: 56 56 - 57 57 - i2c@701000 { 58 58 - compatible = "marvell,mv78230-i2c"; 59 59 - reg = <0x701000 0x20>; 60 60 - interrupts = <29>; 61 61 - clock-frequency = <100000>; 62 62 - clock-names = "core", "reg"; 63 63 - clocks = <&core_clock>, <&reg_clock>; 64 64 - };

+7 -2

Documentation/devicetree/bindings/i2c/i2c-ocores.txt

reviewed

··· 1 1 Device tree configuration for i2c-ocores 2 2 3 3 Required properties: 4 4 - - compatible : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst" 4 4 + - compatible : "opencores,i2c-ocores" 5 5 + "aeroflexgaisler,i2cmst" 6 6 + "sifive,fu540-c000-i2c", "sifive,i2c0" 7 7 + For Opencore based I2C IP block reimplemented in 8 8 + FU540-C000 SoC. Please refer to sifive-blocks-ip-versioning.txt 9 9 + for additional details. 5 10 - reg : bus address start and address range size of device 6 6 - - interrupts : interrupt number 7 11 - clocks : handle to the controller clock; see the note below. 8 12 Mutually exclusive with opencores,ip-clock-frequency 9 13 - opencores,ip-clock-frequency: frequency of the controller clock in Hz; ··· 16 12 - #size-cells : should be <0> 17 13 18 14 Optional properties: 15 15 + - interrupts : interrupt number. 19 16 - clock-frequency : frequency of bus clock in Hz; see the note below. 20 17 Defaults to 100 KHz when the property is not specified 21 18 - reg-shift : device register offsets are shifted by this value

+1

Documentation/devicetree/bindings/i2c/i2c-omap.txt

reviewed

··· 7 7 "ti,omap3-i2c" for OMAP3 SoCs 8 8 "ti,omap4-i2c" for OMAP4+ SoCs 9 9 "ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs 10 10 + "ti,j721e-i2c", "ti,omap4-i2c" for J721E SoCs 10 11 - ti,hwmods : Must be "i2c<n>", n being the instance number (1-based) 11 12 - #address-cells = <1>; 12 13 - #size-cells = <0>;

+2

Documentation/devicetree/bindings/i2c/i2c-stm32.txt

reviewed

··· 21 21 100000 and 400000. 22 22 For STM32F7, STM32H7 and STM32MP1 SoCs, Standard-mode, Fast-mode and Fast-mode 23 23 Plus are supported, possible values are 100000, 400000 and 1000000. 24 24 + - dmas: List of phandles to rx and tx DMA channels. Refer to stm32-dma.txt. 25 25 + - dma-names: List of dma names. Valid names are: "rx" and "tx". 24 26 - i2c-scl-rising-time-ns: I2C SCL Rising time for the board (default: 25) 25 27 For STM32F7, STM32H7 and STM32MP1 only. 26 28 - i2c-scl-falling-time-ns: I2C SCL Falling time for the board (default: 10)

-41

Documentation/devicetree/bindings/i2c/i2c-sun6i-p2wi.txt

reviewed

··· 1 1 - 2 2 - * Allwinner P2WI (Push/Pull 2 Wire Interface) controller 3 3 - 4 4 - Required properties : 5 5 - 6 6 - - reg : Offset and length of the register set for the device. 7 7 - - compatible : Should one of the following: 8 8 - - "allwinner,sun6i-a31-p2wi" 9 9 - - interrupts : The interrupt line connected to the P2WI peripheral. 10 10 - - clocks : The gate clk connected to the P2WI peripheral. 11 11 - - resets : The reset line connected to the P2WI peripheral. 12 12 - 13 13 - Optional properties : 14 14 - 15 15 - - clock-frequency : Desired P2WI bus clock frequency in Hz. If not set the 16 16 - default frequency is 100kHz 17 17 - 18 18 - A P2WI may contain one child node encoding a P2WI slave device. 19 19 - 20 20 - Slave device properties: 21 21 - Required properties: 22 22 - - reg : the I2C slave address used during the initialization 23 23 - process to switch from I2C to P2WI mode 24 24 - 25 25 - Example: 26 26 - 27 27 - p2wi@1f03400 { 28 28 - compatible = "allwinner,sun6i-a31-p2wi"; 29 29 - reg = <0x01f03400 0x400>; 30 30 - interrupts = <0 39 4>; 31 31 - clocks = <&apb0_gates 3>; 32 32 - clock-frequency = <6000000>; 33 33 - resets = <&apb0_rst 3>; 34 34 - 35 35 - axp221: pmic@68 { 36 36 - compatible = "x-powers,axp221"; 37 37 - reg = <0x68>; 38 38 - 39 39 - /* ... */ 40 40 - }; 41 41 - };

+124

Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml

reviewed

··· 1 1 + # SPDX-License-Identifier: GPL-2.0 2 2 + %YAML 1.2 3 3 + --- 4 4 + $id: http://devicetree.org/schemas/i2c/marvell,mv64xxx-i2c.yaml# 5 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 + 7 7 + title: Marvell MV64XXX I2C Controller Device Tree Bindings 8 8 + 9 9 + maintainers: 10 10 + - Gregory CLEMENT <gregory.clement@bootlin.com> 11 11 + 12 12 + properties: 13 13 + compatible: 14 14 + oneOf: 15 15 + - const: allwinner,sun4i-a10-i2c 16 16 + - items: 17 17 + - const: allwinner,sun7i-a20-i2c 18 18 + - const: allwinner,sun4i-a10-i2c 19 19 + - const: allwinner,sun6i-a31-i2c 20 20 + - items: 21 21 + - const: allwinner,sun8i-a23-i2c 22 22 + - const: allwinner,sun6i-a31-i2c 23 23 + - items: 24 24 + - const: allwinner,sun8i-a83t-i2c 25 25 + - const: allwinner,sun6i-a31-i2c 26 26 + - items: 27 27 + - const: allwinner,sun50i-a64-i2c 28 28 + - const: allwinner,sun6i-a31-i2c 29 29 + 30 30 + - const: marvell,mv64xxx-i2c 31 31 + - const: marvell,mv78230-i2c 32 32 + - const: marvell,mv78230-a0-i2c 33 33 + 34 34 + description: 35 35 + Only use "marvell,mv78230-a0-i2c" for a very rare, initial 36 36 + version of the SoC which had broken offload support. Linux 37 37 + auto-detects this and sets it appropriately. 38 38 + 39 39 + reg: 40 40 + maxItems: 1 41 41 + 42 42 + interrupts: 43 43 + maxItems: 1 44 44 + 45 45 + clocks: 46 46 + minItems: 1 47 47 + maxItems: 2 48 48 + items: 49 49 + - description: Reference clock for the I2C bus 50 50 + - description: Bus clock (Only for Armada 7K/8K) 51 51 + 52 52 + clock-names: 53 53 + minItems: 1 54 54 + maxItems: 2 55 55 + items: 56 56 + - const: core 57 57 + - const: reg 58 58 + description: 59 59 + Mandatory if two clocks are used (only for Armada 7k and 8k). 60 60 + 61 61 + resets: 62 62 + maxItems: 1 63 63 + 64 64 + required: 65 65 + - compatible 66 66 + - reg 67 67 + - interrupts 68 68 + 69 69 + allOf: 70 70 + - $ref: /schemas/i2c/i2c-controller.yaml# 71 71 + - if: 72 72 + properties: 73 73 + compatible: 74 74 + contains: 75 75 + enum: 76 76 + - allwinner,sun4i-a10-i2c 77 77 + - allwinner,sun6i-a31-i2c 78 78 + 79 79 + then: 80 80 + required: 81 81 + - clocks 82 82 + 83 83 + - if: 84 84 + properties: 85 85 + compatible: 86 86 + contains: 87 87 + const: allwinner,sun6i-a31-i2c 88 88 + 89 89 + then: 90 90 + required: 91 91 + - resets 92 92 + 93 93 + # FIXME: We should set it, but it would report all the generic 94 94 + # properties as additional properties. 95 95 + # additionalProperties: false 96 96 + 97 97 + examples: 98 98 + - | 99 99 + i2c@11000 { 100 100 + compatible = "marvell,mv64xxx-i2c"; 101 101 + reg = <0x11000 0x20>; 102 102 + interrupts = <29>; 103 103 + clock-frequency = <100000>; 104 104 + }; 105 105 + 106 106 + - | 107 107 + i2c@11000 { 108 108 + compatible = "marvell,mv78230-i2c"; 109 109 + reg = <0x11000 0x100>; 110 110 + interrupts = <29>; 111 111 + clock-frequency = <100000>; 112 112 + }; 113 113 + 114 114 + - | 115 115 + i2c@701000 { 116 116 + compatible = "marvell,mv78230-i2c"; 117 117 + reg = <0x701000 0x20>; 118 118 + interrupts = <29>; 119 119 + clock-frequency = <100000>; 120 120 + clock-names = "core", "reg"; 121 121 + clocks = <&core_clock>, <&reg_clock>; 122 122 + }; 123 123 + 124 124 + ...

+11 -9

Documentation/i2c/busses/i2c-i801

reviewed

··· 37 37 * Intel Cedar Fork (PCH) 38 38 * Intel Ice Lake (PCH) 39 39 * Intel Comet Lake (PCH) 40 40 + * Intel Elkhart Lake (PCH) 41 41 + * Intel Tiger Lake (PCH) 40 42 Datasheets: Publicly available at the Intel website 41 43 42 44 On Intel Patsburg and later chipsets, both the normal host SMBus controller ··· 60 58 0x02 disable the block buffer 61 59 0x08 disable the I2C block read functionality 62 60 0x10 don't use interrupts 61 61 + 0x20 disable SMBus Host Notify 63 62 64 63 65 64 Description ··· 91 88 Process Call Support 92 89 -------------------- 93 90 94 94 - Not supported. 91 91 + Block process call is supported on the 82801EB (ICH5) and later chips. 95 92 96 93 97 94 I2C Block Read Support ··· 121 118 well known for first doing this on their P4B motherboard, and many other 122 119 boards after that. Some vendor machines are affected as well. 123 120 124 124 - The first thing to try is the "i2c_ec" ACPI driver. It could be that the 121 121 + The first thing to try is the "i2c-scmi" ACPI driver. It could be that the 125 122 SMBus was hidden on purpose because it'll be driven by ACPI. If the 126 126 - i2c_ec driver works for you, just forget about the i2c-i801 driver and 127 127 - don't try to unhide the ICH SMBus. Even if i2c_ec doesn't work, you 123 123 + i2c-scmi driver works for you, just forget about the i2c-i801 driver and 124 124 + don't try to unhide the ICH SMBus. Even if i2c-scmi doesn't work, you 128 125 better make sure that the SMBus isn't used by the ACPI code. Try loading 129 129 - the "fan" and "thermal" drivers, and check in /proc/acpi/fan and 130 130 - /proc/acpi/thermal_zone. If you find anything there, it's likely that 131 131 - the ACPI is accessing the SMBus and it's safer not to unhide it. Only 132 132 - once you are certain that ACPI isn't using the SMBus, you can attempt 133 133 - to unhide it. 126 126 + the "fan" and "thermal" drivers, and check in /sys/class/thermal. If you 127 127 + find a thermal zone with type "acpitz", it's likely that the ACPI is 128 128 + accessing the SMBus and it's safer not to unhide it. Only once you are 129 129 + certain that ACPI isn't using the SMBus, you can attempt to unhide it. 134 130 135 131 In order to unhide the SMBus, we need to change the value of a PCI 136 132 register before the kernel enumerates the PCI devices. This is done in

+7

MAINTAINERS

reviewed

··· 10123 10123 S: Maintained 10124 10124 F: drivers/net/wireless/mediatek/mt7601u/ 10125 10125 10126 10126 + MEDIATEK MT7621/28/88 I2C DRIVER 10127 10127 + M: Stefan Roese <sr@denx.de> 10128 10128 + L: linux-i2c@vger.kernel.org 10129 10129 + S: Maintained 10130 10130 + F: drivers/i2c/busses/i2c-mt7621.c 10131 10131 + F: Documentation/devicetree/bindings/i2c/i2c-mt7621.txt 10132 10132 + 10126 10133 MEDIATEK NAND CONTROLLER DRIVER 10127 10134 M: Xiaolei Li <xiaolei.li@mediatek.com> 10128 10135 L: linux-mtd@lists.infradead.org

+2

arch/arm/include/asm/hardware/iop3xx.h

reviewed

··· 302 302 extern struct platform_device iop3xx_aau_channel; 303 303 extern struct platform_device iop3xx_i2c0_device; 304 304 extern struct platform_device iop3xx_i2c1_device; 305 305 + extern struct gpiod_lookup_table iop3xx_i2c0_gpio_lookup; 306 306 + extern struct gpiod_lookup_table iop3xx_i2c1_gpio_lookup; 305 307 306 308 #endif 307 309

+3

arch/arm/mach-iop32x/em7210.c

reviewed

··· 20 20 #include <linux/platform_device.h> 21 21 #include <linux/i2c.h> 22 22 #include <linux/gpio.h> 23 23 + #include <linux/gpio/machine.h> 23 24 #include <mach/hardware.h> 24 25 #include <linux/io.h> 25 26 #include <linux/irq.h> ··· 208 207 { 209 208 register_iop32x_gpio(); 210 209 platform_device_register(&em7210_serial_device); 210 210 + gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup); 211 211 + gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup); 211 212 platform_device_register(&iop3xx_i2c0_device); 212 213 platform_device_register(&iop3xx_i2c1_device); 213 214 platform_device_register(&em7210_flash_device);

+3

arch/arm/mach-iop32x/glantank.c

reviewed

··· 21 21 #include <linux/i2c.h> 22 22 #include <linux/platform_device.h> 23 23 #include <linux/io.h> 24 24 + #include <linux/gpio/machine.h> 24 25 #include <mach/hardware.h> 25 26 #include <asm/irq.h> 26 27 #include <asm/mach/arch.h> ··· 186 185 static void __init glantank_init_machine(void) 187 186 { 188 187 register_iop32x_gpio(); 188 188 + gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup); 189 189 + gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup); 189 190 platform_device_register(&iop3xx_i2c0_device); 190 191 platform_device_register(&iop3xx_i2c1_device); 191 192 platform_device_register(&glantank_flash_device);

+3

arch/arm/mach-iop32x/iq31244.c

reviewed

··· 22 22 #include <linux/mtd/physmap.h> 23 23 #include <linux/platform_device.h> 24 24 #include <linux/io.h> 25 25 + #include <linux/gpio/machine.h> 25 26 #include <mach/hardware.h> 26 27 #include <asm/cputype.h> 27 28 #include <asm/irq.h> ··· 282 281 static void __init iq31244_init_machine(void) 283 282 { 284 283 register_iop32x_gpio(); 284 284 + gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup); 285 285 + gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup); 285 286 platform_device_register(&iop3xx_i2c0_device); 286 287 platform_device_register(&iop3xx_i2c1_device); 287 288 platform_device_register(&iq31244_flash_device);

+3

arch/arm/mach-iop32x/iq80321.c

reviewed

··· 19 19 #include <linux/mtd/physmap.h> 20 20 #include <linux/platform_device.h> 21 21 #include <linux/io.h> 22 22 + #include <linux/gpio/machine.h> 22 23 #include <mach/hardware.h> 23 24 #include <asm/irq.h> 24 25 #include <asm/mach/arch.h> ··· 169 168 static void __init iq80321_init_machine(void) 170 169 { 171 170 register_iop32x_gpio(); 171 171 + gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup); 172 172 + gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup); 172 173 platform_device_register(&iop3xx_i2c0_device); 173 174 platform_device_register(&iop3xx_i2c1_device); 174 175 platform_device_register(&iq80321_flash_device);

+2

arch/arm/mach-iop32x/n2100.c

reviewed

··· 27 27 #include <linux/reboot.h> 28 28 #include <linux/io.h> 29 29 #include <linux/gpio.h> 30 30 + #include <linux/gpio/machine.h> 30 31 #include <mach/hardware.h> 31 32 #include <asm/irq.h> 32 33 #include <asm/mach/arch.h> ··· 342 341 static void __init n2100_init_machine(void) 343 342 { 344 343 register_iop32x_gpio(); 344 344 + gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup); 345 345 platform_device_register(&iop3xx_i2c0_device); 346 346 platform_device_register(&n2100_flash_device); 347 347 platform_device_register(&n2100_serial_device);

+24

arch/arm/plat-iop/i2c.c

reviewed

··· 16 16 #include <linux/tty.h> 17 17 #include <linux/serial_core.h> 18 18 #include <linux/io.h> 19 19 + #include <linux/gpio/machine.h> 19 20 #include <asm/pgtable.h> 20 21 #include <asm/page.h> 21 22 #include <asm/mach/map.h> ··· 34 33 #define IRQ_IOP3XX_I2C_0 IRQ_IOP33X_I2C_0 35 34 #define IRQ_IOP3XX_I2C_1 IRQ_IOP33X_I2C_1 36 35 #endif 36 36 + 37 37 + /* 38 38 + * Each of the I2C busses have corresponding GPIO lines, and the driver 39 39 + * need to access these directly to drive the bus low at times. 40 40 + */ 41 41 + 42 42 + struct gpiod_lookup_table iop3xx_i2c0_gpio_lookup = { 43 43 + .dev_id = "IOP3xx-I2C.0", 44 44 + .table = { 45 45 + GPIO_LOOKUP("gpio-iop", 7, "scl", GPIO_ACTIVE_HIGH), 46 46 + GPIO_LOOKUP("gpio-iop", 6, "sda", GPIO_ACTIVE_HIGH), 47 47 + { } 48 48 + }, 49 49 + }; 50 50 + 51 51 + struct gpiod_lookup_table iop3xx_i2c1_gpio_lookup = { 52 52 + .dev_id = "IOP3xx-I2C.1", 53 53 + .table = { 54 54 + GPIO_LOOKUP("gpio-iop", 5, "scl", GPIO_ACTIVE_HIGH), 55 55 + GPIO_LOOKUP("gpio-iop", 4, "sda", GPIO_ACTIVE_HIGH), 56 56 + { } 57 57 + }, 58 58 + }; 37 59 38 60 static struct resource iop3xx_i2c0_resources[] = { 39 61 [0] = {

+1

drivers/gpio/gpio-iop.c

reviewed

··· 36 36 37 37 gc->base = 0; 38 38 gc->owner = THIS_MODULE; 39 39 + gc->label = "gpio-iop"; 39 40 40 41 return devm_gpiochip_add_data(&pdev->dev, gc, NULL); 41 42 }

+11 -2

drivers/i2c/busses/Kconfig

reviewed

··· 143 143 Cedar Fork (PCH) 144 144 Ice Lake (PCH) 145 145 Comet Lake (PCH) 146 146 + Elkhart Lake (PCH) 147 147 + Tiger Lake (PCH) 146 148 147 149 This driver can also be built as a module. If so, the module 148 150 will be called i2c-i801. ··· 438 436 439 437 config I2C_BCM2835 440 438 tristate "Broadcom BCM2835 I2C controller" 441 441 - depends on ARCH_BCM2835 439 439 + depends on ARCH_BCM2835 || ARCH_BRCMSTB 442 440 help 443 441 If you say yes to this option, support will be included for the 444 442 BCM2835 I2C controller. ··· 694 692 695 693 config I2C_JZ4780 696 694 tristate "JZ4780 I2C controller interface support" 697 697 - depends on MACH_JZ4780 || COMPILE_TEST 695 695 + depends on MIPS || COMPILE_TEST 698 696 help 699 697 If you say yes to this option, support will be included for the 700 698 Ingenic JZ4780 I2C controller. ··· 747 745 for MT65xx and MT81xx. 748 746 If you want to use MediaTek(R) I2C interface, say Y or M here. 749 747 If unsure, say N. 748 748 + 749 749 + config I2C_MT7621 750 750 + tristate "MT7621/MT7628 I2C Controller" 751 751 + depends on (RALINK && (SOC_MT7620 || SOC_MT7621)) || COMPILE_TEST 752 752 + help 753 753 + Say Y here to include support for I2C controller in the 754 754 + MediaTek MT7621/MT7628 SoCs. 750 755 751 756 config I2C_MV64XXX 752 757 tristate "Marvell mv64xxx I2C Controller"

+1

drivers/i2c/busses/Makefile

reviewed

··· 77 77 obj-$(CONFIG_I2C_MESON) += i2c-meson.o 78 78 obj-$(CONFIG_I2C_MPC) += i2c-mpc.o 79 79 obj-$(CONFIG_I2C_MT65XX) += i2c-mt65xx.o 80 80 + obj-$(CONFIG_I2C_MT7621) += i2c-mt7621.o 80 81 obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o 81 82 obj-$(CONFIG_I2C_MXS) += i2c-mxs.o 82 83 obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o

+53 -64

drivers/i2c/busses/i2c-bcm-iproc.c

reviewed

··· 165 165 I2C_SLAVE_RX_END, 166 166 }; 167 167 168 168 - enum i2c_slave_xfer_dir { 169 169 - I2C_SLAVE_DIR_READ = 0, 170 170 - I2C_SLAVE_DIR_WRITE, 171 171 - I2C_SLAVE_DIR_NONE, 172 172 - }; 173 173 - 174 168 enum bus_speed_index { 175 169 I2C_SPD_100K = 0, 176 170 I2C_SPD_400K, ··· 197 203 struct i2c_msg *msg; 198 204 199 205 struct i2c_client *slave; 200 200 - enum i2c_slave_xfer_dir xfer_dir; 201 206 202 207 /* bytes that have been transferred */ 203 208 unsigned int tx_bytes; ··· 212 219 | BIT(IS_M_RX_THLD_SHIFT)) 213 220 214 221 #define ISR_MASK_SLAVE (BIT(IS_S_START_BUSY_SHIFT)\ 215 215 - | BIT(IS_S_RX_EVENT_SHIFT) | BIT(IS_S_RD_EVENT_SHIFT)) 222 222 + | BIT(IS_S_RX_EVENT_SHIFT) | BIT(IS_S_RD_EVENT_SHIFT)\ 223 223 + | BIT(IS_S_TX_UNDERRUN_SHIFT)) 216 224 217 225 static int bcm_iproc_i2c_reg_slave(struct i2c_client *slave); 218 226 static int bcm_iproc_i2c_unreg_slave(struct i2c_client *slave); ··· 291 297 /* clear all pending slave interrupts */ 292 298 iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, ISR_MASK_SLAVE); 293 299 294 294 - /* Enable interrupt register for any READ event */ 295 295 - val = BIT(IE_S_RD_EVENT_SHIFT); 296 300 /* Enable interrupt register to indicate a valid byte in receive fifo */ 297 297 - val |= BIT(IE_S_RX_EVENT_SHIFT); 301 301 + val = BIT(IE_S_RX_EVENT_SHIFT); 298 302 /* Enable interrupt register for the Slave BUSY command */ 299 303 val |= BIT(IE_S_START_BUSY_SHIFT); 300 304 iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val); 301 301 - 302 302 - iproc_i2c->xfer_dir = I2C_SLAVE_DIR_NONE; 303 305 } 304 306 305 307 static void bcm_iproc_i2c_check_slave_status( ··· 304 314 u32 val; 305 315 306 316 val = iproc_i2c_rd_reg(iproc_i2c, S_CMD_OFFSET); 307 307 - val = (val >> S_CMD_STATUS_SHIFT) & S_CMD_STATUS_MASK; 317 317 + /* status is valid only when START_BUSY is cleared after it was set */ 318 318 + if (val & BIT(S_CMD_START_BUSY_SHIFT)) 319 319 + return; 308 320 321 321 + val = (val >> S_CMD_STATUS_SHIFT) & S_CMD_STATUS_MASK; 309 322 if (val == S_CMD_STATUS_TIMEOUT) { 310 323 dev_err(iproc_i2c->device, "slave random stretch time timeout\n"); 311 324 ··· 320 327 } 321 328 322 329 static bool bcm_iproc_i2c_slave_isr(struct bcm_iproc_i2c_dev *iproc_i2c, 323 323 - u32 status) 330 330 + u32 status) 324 331 { 325 325 - u8 value; 326 332 u32 val; 327 327 - u32 rd_status; 328 328 - u32 tmp; 333 333 + u8 value, rx_status; 329 334 330 330 - /* Start of transaction. check address and populate the direction */ 331 331 - if (iproc_i2c->xfer_dir == I2C_SLAVE_DIR_NONE) { 332 332 - tmp = iproc_i2c_rd_reg(iproc_i2c, S_RX_OFFSET); 333 333 - rd_status = (tmp >> S_RX_STATUS_SHIFT) & S_RX_STATUS_MASK; 334 334 - /* This condition checks whether the request is a new request */ 335 335 - if (((rd_status == I2C_SLAVE_RX_START) && 336 336 - (status & BIT(IS_S_RX_EVENT_SHIFT))) || 337 337 - ((rd_status == I2C_SLAVE_RX_END) && 338 338 - (status & BIT(IS_S_RD_EVENT_SHIFT)))) { 339 339 - 340 340 - /* Last bit is W/R bit. 341 341 - * If 1 then its a read request(by master). 342 342 - */ 343 343 - iproc_i2c->xfer_dir = tmp & SLAVE_READ_WRITE_BIT_MASK; 344 344 - if (iproc_i2c->xfer_dir == I2C_SLAVE_DIR_WRITE) 345 345 - i2c_slave_event(iproc_i2c->slave, 346 346 - I2C_SLAVE_READ_REQUESTED, &value); 347 347 - else 348 348 - i2c_slave_event(iproc_i2c->slave, 335 335 + /* Slave RX byte receive */ 336 336 + if (status & BIT(IS_S_RX_EVENT_SHIFT)) { 337 337 + val = iproc_i2c_rd_reg(iproc_i2c, S_RX_OFFSET); 338 338 + rx_status = (val >> S_RX_STATUS_SHIFT) & S_RX_STATUS_MASK; 339 339 + if (rx_status == I2C_SLAVE_RX_START) { 340 340 + /* Start of SMBUS for Master write */ 341 341 + i2c_slave_event(iproc_i2c->slave, 349 342 I2C_SLAVE_WRITE_REQUESTED, &value); 343 343 + 344 344 + val = iproc_i2c_rd_reg(iproc_i2c, S_RX_OFFSET); 345 345 + value = (u8)((val >> S_RX_DATA_SHIFT) & S_RX_DATA_MASK); 346 346 + i2c_slave_event(iproc_i2c->slave, 347 347 + I2C_SLAVE_WRITE_RECEIVED, &value); 348 348 + } else if (status & BIT(IS_S_RD_EVENT_SHIFT)) { 349 349 + /* Start of SMBUS for Master Read */ 350 350 + i2c_slave_event(iproc_i2c->slave, 351 351 + I2C_SLAVE_READ_REQUESTED, &value); 352 352 + iproc_i2c_wr_reg(iproc_i2c, S_TX_OFFSET, value); 353 353 + 354 354 + val = BIT(S_CMD_START_BUSY_SHIFT); 355 355 + iproc_i2c_wr_reg(iproc_i2c, S_CMD_OFFSET, val); 356 356 + 357 357 + /* 358 358 + * Enable interrupt for TX FIFO becomes empty and 359 359 + * less than PKT_LENGTH bytes were output on the SMBUS 360 360 + */ 361 361 + val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET); 362 362 + val |= BIT(IE_S_TX_UNDERRUN_SHIFT); 363 363 + iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val); 364 364 + } else { 365 365 + /* Master write other than start */ 366 366 + value = (u8)((val >> S_RX_DATA_SHIFT) & S_RX_DATA_MASK); 367 367 + i2c_slave_event(iproc_i2c->slave, 368 368 + I2C_SLAVE_WRITE_RECEIVED, &value); 350 369 } 351 351 - } 352 352 - 353 353 - /* read request from master */ 354 354 - if ((status & BIT(IS_S_RD_EVENT_SHIFT)) && 355 355 - (iproc_i2c->xfer_dir == I2C_SLAVE_DIR_WRITE)) { 370 370 + } else if (status & BIT(IS_S_TX_UNDERRUN_SHIFT)) { 371 371 + /* Master read other than start */ 356 372 i2c_slave_event(iproc_i2c->slave, 357 357 - I2C_SLAVE_READ_PROCESSED, &value); 358 358 - iproc_i2c_wr_reg(iproc_i2c, S_TX_OFFSET, value); 373 373 + I2C_SLAVE_READ_PROCESSED, &value); 359 374 375 375 + iproc_i2c_wr_reg(iproc_i2c, S_TX_OFFSET, value); 360 376 val = BIT(S_CMD_START_BUSY_SHIFT); 361 377 iproc_i2c_wr_reg(iproc_i2c, S_CMD_OFFSET, val); 362 362 - } 363 363 - 364 364 - /* write request from master */ 365 365 - if ((status & BIT(IS_S_RX_EVENT_SHIFT)) && 366 366 - (iproc_i2c->xfer_dir == I2C_SLAVE_DIR_READ)) { 367 367 - val = iproc_i2c_rd_reg(iproc_i2c, S_RX_OFFSET); 368 368 - /* Its a write request by Master to Slave. 369 369 - * We read data present in receive FIFO 370 370 - */ 371 371 - value = (u8)((val >> S_RX_DATA_SHIFT) & S_RX_DATA_MASK); 372 372 - i2c_slave_event(iproc_i2c->slave, 373 373 - I2C_SLAVE_WRITE_RECEIVED, &value); 374 374 - 375 375 - /* check the status for the last byte of the transaction */ 376 376 - rd_status = (val >> S_RX_STATUS_SHIFT) & S_RX_STATUS_MASK; 377 377 - if (rd_status == I2C_SLAVE_RX_END) 378 378 - iproc_i2c->xfer_dir = I2C_SLAVE_DIR_NONE; 379 379 - 380 380 - dev_dbg(iproc_i2c->device, "\nread value = 0x%x\n", value); 381 378 } 382 379 383 380 /* Stop */ 384 381 if (status & BIT(IS_S_START_BUSY_SHIFT)) { 385 382 i2c_slave_event(iproc_i2c->slave, I2C_SLAVE_STOP, &value); 386 386 - iproc_i2c->xfer_dir = I2C_SLAVE_DIR_NONE; 383 383 + /* 384 384 + * Enable interrupt for TX FIFO becomes empty and 385 385 + * less than PKT_LENGTH bytes were output on the SMBUS 386 386 + */ 387 387 + val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET); 388 388 + val &= ~BIT(IE_S_TX_UNDERRUN_SHIFT); 389 389 + iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val); 387 390 } 388 391 389 392 /* clear interrupt status */

+114 -23

drivers/i2c/busses/i2c-bcm2835.c

reviewed

··· 4 4 */ 5 5 6 6 #include <linux/clk.h> 7 7 + #include <linux/clkdev.h> 8 8 + #include <linux/clk-provider.h> 7 9 #include <linux/completion.h> 8 10 #include <linux/err.h> 9 11 #include <linux/i2c.h> ··· 53 51 struct bcm2835_i2c_dev { 54 52 struct device *dev; 55 53 void __iomem *regs; 56 56 - struct clk *clk; 57 54 int irq; 58 58 - u32 bus_clk_rate; 59 55 struct i2c_adapter adapter; 60 56 struct completion completion; 61 57 struct i2c_msg *curr_msg; ··· 74 74 return readl(i2c_dev->regs + reg); 75 75 } 76 76 77 77 - static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev) 78 78 - { 79 79 - u32 divider, redl, fedl; 77 77 + #define to_clk_bcm2835_i2c(_hw) container_of(_hw, struct clk_bcm2835_i2c, hw) 78 78 + struct clk_bcm2835_i2c { 79 79 + struct clk_hw hw; 80 80 + struct bcm2835_i2c_dev *i2c_dev; 81 81 + }; 80 82 81 81 - divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), 82 82 - i2c_dev->bus_clk_rate); 83 83 + static int clk_bcm2835_i2c_calc_divider(unsigned long rate, 84 84 + unsigned long parent_rate) 85 85 + { 86 86 + u32 divider = DIV_ROUND_UP(parent_rate, rate); 87 87 + 83 88 /* 84 89 * Per the datasheet, the register is always interpreted as an even 85 90 * number, by rounding down. In other words, the LSB is ignored. So, ··· 93 88 if (divider & 1) 94 89 divider++; 95 90 if ((divider < BCM2835_I2C_CDIV_MIN) || 96 96 - (divider > BCM2835_I2C_CDIV_MAX)) { 97 97 - dev_err_ratelimited(i2c_dev->dev, "Invalid clock-frequency\n"); 91 91 + (divider > BCM2835_I2C_CDIV_MAX)) 98 92 return -EINVAL; 99 99 - } 100 93 101 101 - bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider); 94 94 + return divider; 95 95 + } 96 96 + 97 97 + static int clk_bcm2835_i2c_set_rate(struct clk_hw *hw, unsigned long rate, 98 98 + unsigned long parent_rate) 99 99 + { 100 100 + struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw); 101 101 + u32 redl, fedl; 102 102 + u32 divider = clk_bcm2835_i2c_calc_divider(rate, parent_rate); 103 103 + 104 104 + if (divider == -EINVAL) 105 105 + return -EINVAL; 106 106 + 107 107 + bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DIV, divider); 102 108 103 109 /* 104 110 * Number of core clocks to wait after falling edge before ··· 124 108 */ 125 109 redl = max(divider / 4, 1u); 126 110 127 127 - bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DEL, 111 111 + bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DEL, 128 112 (fedl << BCM2835_I2C_FEDL_SHIFT) | 129 113 (redl << BCM2835_I2C_REDL_SHIFT)); 130 114 return 0; 115 115 + } 116 116 + 117 117 + static long clk_bcm2835_i2c_round_rate(struct clk_hw *hw, unsigned long rate, 118 118 + unsigned long *parent_rate) 119 119 + { 120 120 + u32 divider = clk_bcm2835_i2c_calc_divider(rate, *parent_rate); 121 121 + 122 122 + return DIV_ROUND_UP(*parent_rate, divider); 123 123 + } 124 124 + 125 125 + static unsigned long clk_bcm2835_i2c_recalc_rate(struct clk_hw *hw, 126 126 + unsigned long parent_rate) 127 127 + { 128 128 + struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw); 129 129 + u32 divider = bcm2835_i2c_readl(div->i2c_dev, BCM2835_I2C_DIV); 130 130 + 131 131 + return DIV_ROUND_UP(parent_rate, divider); 132 132 + } 133 133 + 134 134 + static const struct clk_ops clk_bcm2835_i2c_ops = { 135 135 + .set_rate = clk_bcm2835_i2c_set_rate, 136 136 + .round_rate = clk_bcm2835_i2c_round_rate, 137 137 + .recalc_rate = clk_bcm2835_i2c_recalc_rate, 138 138 + }; 139 139 + 140 140 + static struct clk *bcm2835_i2c_register_div(struct device *dev, 141 141 + struct clk *mclk, 142 142 + struct bcm2835_i2c_dev *i2c_dev) 143 143 + { 144 144 + struct clk_init_data init; 145 145 + struct clk_bcm2835_i2c *priv; 146 146 + char name[32]; 147 147 + const char *mclk_name; 148 148 + 149 149 + snprintf(name, sizeof(name), "%s_div", dev_name(dev)); 150 150 + 151 151 + mclk_name = __clk_get_name(mclk); 152 152 + 153 153 + init.ops = &clk_bcm2835_i2c_ops; 154 154 + init.name = name; 155 155 + init.parent_names = (const char* []) { mclk_name }; 156 156 + init.num_parents = 1; 157 157 + init.flags = 0; 158 158 + 159 159 + priv = devm_kzalloc(dev, sizeof(struct clk_bcm2835_i2c), GFP_KERNEL); 160 160 + if (priv == NULL) 161 161 + return ERR_PTR(-ENOMEM); 162 162 + 163 163 + priv->hw.init = &init; 164 164 + priv->i2c_dev = i2c_dev; 165 165 + 166 166 + clk_hw_register_clkdev(&priv->hw, "div", dev_name(dev)); 167 167 + return devm_clk_register(dev, &priv->hw); 131 168 } 132 169 133 170 static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev) ··· 340 271 { 341 272 struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap); 342 273 unsigned long time_left; 343 343 - int i, ret; 274 274 + int i; 344 275 345 276 for (i = 0; i < (num - 1); i++) 346 277 if (msgs[i].flags & I2C_M_RD) { ··· 348 279 "only one read message supported, has to be last\n"); 349 280 return -EOPNOTSUPP; 350 281 } 351 351 - 352 352 - ret = bcm2835_i2c_set_divider(i2c_dev); 353 353 - if (ret) 354 354 - return ret; 355 282 356 283 i2c_dev->curr_msg = msgs; 357 284 i2c_dev->num_msgs = num; ··· 403 338 struct resource *mem, *irq; 404 339 int ret; 405 340 struct i2c_adapter *adap; 341 341 + struct clk *bus_clk; 342 342 + struct clk *mclk; 343 343 + u32 bus_clk_rate; 406 344 407 345 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); 408 346 if (!i2c_dev) ··· 419 351 if (IS_ERR(i2c_dev->regs)) 420 352 return PTR_ERR(i2c_dev->regs); 421 353 422 422 - i2c_dev->clk = devm_clk_get(&pdev->dev, NULL); 423 423 - if (IS_ERR(i2c_dev->clk)) { 424 424 - if (PTR_ERR(i2c_dev->clk) != -EPROBE_DEFER) 354 354 + mclk = devm_clk_get(&pdev->dev, NULL); 355 355 + if (IS_ERR(mclk)) { 356 356 + if (PTR_ERR(mclk) != -EPROBE_DEFER) 425 357 dev_err(&pdev->dev, "Could not get clock\n"); 426 426 - return PTR_ERR(i2c_dev->clk); 358 358 + return PTR_ERR(mclk); 359 359 + } 360 360 + 361 361 + bus_clk = bcm2835_i2c_register_div(&pdev->dev, mclk, i2c_dev); 362 362 + 363 363 + if (IS_ERR(bus_clk)) { 364 364 + dev_err(&pdev->dev, "Could not register clock\n"); 365 365 + return PTR_ERR(bus_clk); 427 366 } 428 367 429 368 ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", 430 430 - &i2c_dev->bus_clk_rate); 369 369 + &bus_clk_rate); 431 370 if (ret < 0) { 432 371 dev_warn(&pdev->dev, 433 372 "Could not read clock-frequency property\n"); 434 434 - i2c_dev->bus_clk_rate = 100000; 373 373 + bus_clk_rate = 100000; 374 374 + } 375 375 + 376 376 + ret = clk_set_rate_exclusive(bus_clk, bus_clk_rate); 377 377 + if (ret < 0) { 378 378 + dev_err(&pdev->dev, "Could not set clock frequency\n"); 379 379 + return ret; 380 380 + } 381 381 + 382 382 + ret = clk_prepare_enable(bus_clk); 383 383 + if (ret) { 384 384 + dev_err(&pdev->dev, "Couldn't prepare clock"); 385 385 + return ret; 435 386 } 436 387 437 388 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); ··· 489 402 static int bcm2835_i2c_remove(struct platform_device *pdev) 490 403 { 491 404 struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev); 405 405 + struct clk *bus_clk = devm_clk_get(i2c_dev->dev, "div"); 406 406 + 407 407 + clk_rate_exclusive_put(bus_clk); 408 408 + clk_disable_unprepare(bus_clk); 492 409 493 410 free_irq(i2c_dev->irq, i2c_dev); 494 411 i2c_del_adapter(&i2c_dev->adapter);

+3 -1

drivers/i2c/busses/i2c-cpm.c

reviewed

··· 531 531 } 532 532 out_be32(&rbdf[i].cbd_bufaddr, ((cpm->rxdma[i] + 1) & ~1)); 533 533 534 534 - cpm->txbuf[i] = (unsigned char *)dma_alloc_coherent(&cpm->ofdev->dev, CPM_MAX_READ + 1, &cpm->txdma[i], GFP_KERNEL); 534 534 + cpm->txbuf[i] = dma_alloc_coherent(&cpm->ofdev->dev, 535 535 + CPM_MAX_READ + 1, 536 536 + &cpm->txdma[i], GFP_KERNEL); 535 537 if (!cpm->txbuf[i]) { 536 538 ret = -ENOMEM; 537 539 goto out_muram;

+27 -5

drivers/i2c/busses/i2c-fsi.c

reviewed

··· 658 658 .functionality = fsi_i2c_functionality, 659 659 }; 660 660 661 661 + static struct device_node *fsi_i2c_find_port_of_node(struct device_node *fsi, 662 662 + int port) 663 663 + { 664 664 + struct device_node *np; 665 665 + u32 port_no; 666 666 + int rc; 667 667 + 668 668 + for_each_child_of_node(fsi, np) { 669 669 + rc = of_property_read_u32(np, "reg", &port_no); 670 670 + if (!rc && port_no == port) 671 671 + return np; 672 672 + } 673 673 + 674 674 + return NULL; 675 675 + } 676 676 + 661 677 static int fsi_i2c_probe(struct device *dev) 662 678 { 663 679 struct fsi_i2c_master *i2c; 664 680 struct fsi_i2c_port *port; 665 681 struct device_node *np; 682 682 + u32 port_no, ports, stat; 666 683 int rc; 667 667 - u32 port_no; 668 684 669 685 i2c = devm_kzalloc(dev, sizeof(*i2c), GFP_KERNEL); 670 686 if (!i2c) ··· 694 678 if (rc) 695 679 return rc; 696 680 697 697 - /* Add adapter for each i2c port of the master. */ 698 698 - for_each_available_child_of_node(dev->of_node, np) { 699 699 - rc = of_property_read_u32(np, "reg", &port_no); 700 700 - if (rc || port_no > USHRT_MAX) 681 681 + rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_STAT, &stat); 682 682 + if (rc) 683 683 + return rc; 684 684 + 685 685 + ports = FIELD_GET(I2C_STAT_MAX_PORT, stat) + 1; 686 686 + dev_dbg(dev, "I2C master has %d ports\n", ports); 687 687 + 688 688 + for (port_no = 0; port_no < ports; port_no++) { 689 689 + np = fsi_i2c_find_port_of_node(dev->of_node, port_no); 690 690 + if (np && !of_device_is_available(np)) 701 691 continue; 702 692 703 693 port = kzalloc(sizeof(*port), GFP_KERNEL);

+192 -14

drivers/i2c/busses/i2c-i801.c

reviewed

··· 64 64 * Cedar Fork (PCH) 0x18df 32 hard yes yes yes 65 65 * Ice Lake-LP (PCH) 0x34a3 32 hard yes yes yes 66 66 * Comet Lake (PCH) 0x02a3 32 hard yes yes yes 67 67 + * Elkhart Lake (PCH) 0x4b23 32 hard yes yes yes 68 68 + * Tiger Lake-LP (PCH) 0xa0a3 32 hard yes yes yes 67 69 * 68 70 * Features supported by this driver: 69 71 * Software PEC no 70 72 * Hardware PEC yes 71 73 * Block buffer yes 72 72 - * Block process call transaction no 74 74 + * Block process call transaction yes 73 75 * I2C block read transaction yes (doesn't use the block buffer) 74 76 * Slave mode no 75 77 * SMBus Host Notify yes ··· 94 92 #include <linux/io.h> 95 93 #include <linux/dmi.h> 96 94 #include <linux/slab.h> 95 95 + #include <linux/string.h> 97 96 #include <linux/wait.h> 98 97 #include <linux/err.h> 99 98 #include <linux/platform_device.h> ··· 102 99 #include <linux/pm_runtime.h> 103 100 104 101 #if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI 105 105 - #include <linux/gpio.h> 102 102 + #include <linux/gpio/machine.h> 106 103 #include <linux/platform_data/i2c-mux-gpio.h> 107 104 #endif 108 105 ··· 172 169 #define I801_PROC_CALL 0x10 /* unimplemented */ 173 170 #define I801_BLOCK_DATA 0x14 174 171 #define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */ 172 172 + #define I801_BLOCK_PROC_CALL 0x1C 175 173 176 174 /* I801 Host Control register bits */ 177 175 #define SMBHSTCNT_INTREN BIT(0) ··· 204 200 STATUS_ERROR_FLAGS) 205 201 206 202 /* Older devices have their ID defined in <linux/pci_ids.h> */ 203 203 + #define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS 0x02a3 207 204 #define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS 0x0f12 208 205 #define PCI_DEVICE_ID_INTEL_CDF_SMBUS 0x18df 209 206 #define PCI_DEVICE_ID_INTEL_DNV_SMBUS 0x19df ··· 222 217 #define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS 0x31d4 223 218 #define PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS 0x34a3 224 219 #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30 220 220 + #define PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS 0x4b23 225 221 #define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4 226 222 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22 227 223 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS 0x8ca2 ··· 234 228 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS 0x9ca2 235 229 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS 0x9d23 236 230 #define PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS 0x9da3 231 231 + #define PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS 0xa0a3 237 232 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS 0xa123 238 233 #define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS 0xa1a3 239 234 #define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS 0xa223 240 235 #define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS 0xa2a3 241 236 #define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS 0xa323 242 242 - #define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS 0x02a3 243 237 244 238 struct i801_mux_config { 245 239 char *gpio_chip; ··· 272 266 #if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI 273 267 const struct i801_mux_config *mux_drvdata; 274 268 struct platform_device *mux_pdev; 269 269 + struct gpiod_lookup_table *lookup; 275 270 #endif 276 271 struct platform_device *tco_pdev; 277 272 ··· 516 509 517 510 static int i801_block_transaction_by_block(struct i801_priv *priv, 518 511 union i2c_smbus_data *data, 519 519 - char read_write, int hwpec) 512 512 + char read_write, int command, 513 513 + int hwpec) 520 514 { 521 515 int i, len; 522 516 int status; 517 517 + int xact = hwpec ? SMBHSTCNT_PEC_EN : 0; 518 518 + 519 519 + switch (command) { 520 520 + case I2C_SMBUS_BLOCK_PROC_CALL: 521 521 + xact |= I801_BLOCK_PROC_CALL; 522 522 + break; 523 523 + case I2C_SMBUS_BLOCK_DATA: 524 524 + xact |= I801_BLOCK_DATA; 525 525 + break; 526 526 + default: 527 527 + return -EOPNOTSUPP; 528 528 + } 523 529 524 530 inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */ 525 531 ··· 544 524 outb_p(data->block[i+1], SMBBLKDAT(priv)); 545 525 } 546 526 547 547 - status = i801_transaction(priv, I801_BLOCK_DATA | 548 548 - (hwpec ? SMBHSTCNT_PEC_EN : 0)); 527 527 + status = i801_transaction(priv, xact); 549 528 if (status) 550 529 return status; 551 530 552 552 - if (read_write == I2C_SMBUS_READ) { 531 531 + if (read_write == I2C_SMBUS_READ || 532 532 + command == I2C_SMBUS_BLOCK_PROC_CALL) { 553 533 len = inb_p(SMBHSTDAT0(priv)); 554 534 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) 555 535 return -EPROTO; ··· 687 667 int result; 688 668 const struct i2c_adapter *adap = &priv->adapter; 689 669 670 670 + if (command == I2C_SMBUS_BLOCK_PROC_CALL) 671 671 + return -EOPNOTSUPP; 672 672 + 690 673 result = i801_check_pre(priv); 691 674 if (result < 0) 692 675 return result; ··· 821 798 && command != I2C_SMBUS_I2C_BLOCK_DATA 822 799 && i801_set_block_buffer_mode(priv) == 0) 823 800 result = i801_block_transaction_by_block(priv, data, 824 824 - read_write, hwpec); 801 801 + read_write, 802 802 + command, hwpec); 825 803 else 826 804 result = i801_block_transaction_byte_by_byte(priv, data, 827 805 read_write, ··· 914 890 outb_p(command, SMBHSTCMD(priv)); 915 891 block = 1; 916 892 break; 893 893 + case I2C_SMBUS_BLOCK_PROC_CALL: 894 894 + /* 895 895 + * Bit 0 of the slave address register always indicate a write 896 896 + * command. 897 897 + */ 898 898 + outb_p((addr & 0x7f) << 1, SMBHSTADD(priv)); 899 899 + outb_p(command, SMBHSTCMD(priv)); 900 900 + block = 1; 901 901 + break; 917 902 default: 918 903 dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n", 919 904 size); ··· 983 950 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 984 951 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | 985 952 ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | 953 953 + ((priv->features & FEATURE_BLOCK_PROC) ? 954 954 + I2C_FUNC_SMBUS_BLOCK_PROC_CALL : 0) | 986 955 ((priv->features & FEATURE_I2C_BLOCK_READ) ? 987 956 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) | 988 957 ((priv->features & FEATURE_HOST_NOTIFY) ? ··· 1068 1033 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) }, 1069 1034 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) }, 1070 1035 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) }, 1036 1036 + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS) }, 1037 1037 + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS) }, 1071 1038 { 0, } 1072 1039 }; 1073 1040 ··· 1171 1134 } 1172 1135 } 1173 1136 1137 1137 + /* NOTE: Keep this list in sync with drivers/platform/x86/dell-smo8800.c */ 1138 1138 + static const char *const acpi_smo8800_ids[] = { 1139 1139 + "SMO8800", 1140 1140 + "SMO8801", 1141 1141 + "SMO8810", 1142 1142 + "SMO8811", 1143 1143 + "SMO8820", 1144 1144 + "SMO8821", 1145 1145 + "SMO8830", 1146 1146 + "SMO8831", 1147 1147 + }; 1148 1148 + 1149 1149 + static acpi_status check_acpi_smo88xx_device(acpi_handle obj_handle, 1150 1150 + u32 nesting_level, 1151 1151 + void *context, 1152 1152 + void **return_value) 1153 1153 + { 1154 1154 + struct acpi_device_info *info; 1155 1155 + acpi_status status; 1156 1156 + char *hid; 1157 1157 + int i; 1158 1158 + 1159 1159 + status = acpi_get_object_info(obj_handle, &info); 1160 1160 + if (!ACPI_SUCCESS(status) || !(info->valid & ACPI_VALID_HID)) 1161 1161 + return AE_OK; 1162 1162 + 1163 1163 + hid = info->hardware_id.string; 1164 1164 + if (!hid) 1165 1165 + return AE_OK; 1166 1166 + 1167 1167 + i = match_string(acpi_smo8800_ids, ARRAY_SIZE(acpi_smo8800_ids), hid); 1168 1168 + if (i < 0) 1169 1169 + return AE_OK; 1170 1170 + 1171 1171 + *((bool *)return_value) = true; 1172 1172 + return AE_CTRL_TERMINATE; 1173 1173 + } 1174 1174 + 1175 1175 + static bool is_dell_system_with_lis3lv02d(void) 1176 1176 + { 1177 1177 + bool found; 1178 1178 + const char *vendor; 1179 1179 + 1180 1180 + vendor = dmi_get_system_info(DMI_SYS_VENDOR); 1181 1181 + if (!vendor || strcmp(vendor, "Dell Inc.")) 1182 1182 + return false; 1183 1183 + 1184 1184 + /* 1185 1185 + * Check that ACPI device SMO88xx is present and is functioning. 1186 1186 + * Function acpi_get_devices() already filters all ACPI devices 1187 1187 + * which are not present or are not functioning. 1188 1188 + * ACPI device SMO88xx represents our ST microelectronics lis3lv02d 1189 1189 + * accelerometer but unfortunately ACPI does not provide any other 1190 1190 + * information (like I2C address). 1191 1191 + */ 1192 1192 + found = false; 1193 1193 + acpi_get_devices(NULL, check_acpi_smo88xx_device, NULL, 1194 1194 + (void **)&found); 1195 1195 + 1196 1196 + return found; 1197 1197 + } 1198 1198 + 1199 1199 + /* 1200 1200 + * Accelerometer's I2C address is not specified in DMI nor ACPI, 1201 1201 + * so it is needed to define mapping table based on DMI product names. 1202 1202 + */ 1203 1203 + static const struct { 1204 1204 + const char *dmi_product_name; 1205 1205 + unsigned short i2c_addr; 1206 1206 + } dell_lis3lv02d_devices[] = { 1207 1207 + /* 1208 1208 + * Dell platform team told us that these Latitude devices have 1209 1209 + * ST microelectronics accelerometer at I2C address 0x29. 1210 1210 + */ 1211 1211 + { "Latitude E5250", 0x29 }, 1212 1212 + { "Latitude E5450", 0x29 }, 1213 1213 + { "Latitude E5550", 0x29 }, 1214 1214 + { "Latitude E6440", 0x29 }, 1215 1215 + { "Latitude E6440 ATG", 0x29 }, 1216 1216 + { "Latitude E6540", 0x29 }, 1217 1217 + /* 1218 1218 + * Additional individual entries were added after verification. 1219 1219 + */ 1220 1220 + { "Vostro V131", 0x1d }, 1221 1221 + }; 1222 1222 + 1223 1223 + static void register_dell_lis3lv02d_i2c_device(struct i801_priv *priv) 1224 1224 + { 1225 1225 + struct i2c_board_info info; 1226 1226 + const char *dmi_product_name; 1227 1227 + int i; 1228 1228 + 1229 1229 + dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME); 1230 1230 + for (i = 0; i < ARRAY_SIZE(dell_lis3lv02d_devices); ++i) { 1231 1231 + if (strcmp(dmi_product_name, 1232 1232 + dell_lis3lv02d_devices[i].dmi_product_name) == 0) 1233 1233 + break; 1234 1234 + } 1235 1235 + 1236 1236 + if (i == ARRAY_SIZE(dell_lis3lv02d_devices)) { 1237 1237 + dev_warn(&priv->pci_dev->dev, 1238 1238 + "Accelerometer lis3lv02d is present on SMBus but its" 1239 1239 + " address is unknown, skipping registration\n"); 1240 1240 + return; 1241 1241 + } 1242 1242 + 1243 1243 + memset(&info, 0, sizeof(struct i2c_board_info)); 1244 1244 + info.addr = dell_lis3lv02d_devices[i].i2c_addr; 1245 1245 + strlcpy(info.type, "lis3lv02d", I2C_NAME_SIZE); 1246 1246 + i2c_new_device(&priv->adapter, &info); 1247 1247 + } 1248 1248 + 1174 1249 /* Register optional slaves */ 1175 1250 static void i801_probe_optional_slaves(struct i801_priv *priv) 1176 1251 { ··· 1301 1152 1302 1153 if (dmi_name_in_vendors("FUJITSU")) 1303 1154 dmi_walk(dmi_check_onboard_devices, &priv->adapter); 1155 1155 + 1156 1156 + if (is_dell_system_with_lis3lv02d()) 1157 1157 + register_dell_lis3lv02d_i2c_device(priv); 1304 1158 } 1305 1159 #else 1306 1160 static void __init input_apanel_init(void) {} ··· 1402 1250 struct device *dev = &priv->adapter.dev; 1403 1251 const struct i801_mux_config *mux_config; 1404 1252 struct i2c_mux_gpio_platform_data gpio_data; 1405 1405 - int err; 1253 1253 + struct gpiod_lookup_table *lookup; 1254 1254 + int err, i; 1406 1255 1407 1256 if (!priv->mux_drvdata) 1408 1257 return 0; ··· 1415 1262 gpio_data.values = mux_config->values; 1416 1263 gpio_data.n_values = mux_config->n_values; 1417 1264 gpio_data.classes = mux_config->classes; 1418 1418 - gpio_data.gpio_chip = mux_config->gpio_chip; 1419 1419 - gpio_data.gpios = mux_config->gpios; 1420 1420 - gpio_data.n_gpios = mux_config->n_gpios; 1421 1265 gpio_data.idle = I2C_MUX_GPIO_NO_IDLE; 1422 1266 1423 1423 - /* Register the mux device */ 1267 1267 + /* Register GPIO descriptor lookup table */ 1268 1268 + lookup = devm_kzalloc(dev, 1269 1269 + struct_size(lookup, table, mux_config->n_gpios), 1270 1270 + GFP_KERNEL); 1271 1271 + if (!lookup) 1272 1272 + return -ENOMEM; 1273 1273 + lookup->dev_id = "i2c-mux-gpio"; 1274 1274 + for (i = 0; i < mux_config->n_gpios; i++) { 1275 1275 + lookup->table[i].chip_label = mux_config->gpio_chip; 1276 1276 + lookup->table[i].chip_hwnum = mux_config->gpios[i]; 1277 1277 + lookup->table[i].con_id = "mux"; 1278 1278 + } 1279 1279 + gpiod_add_lookup_table(lookup); 1280 1280 + priv->lookup = lookup; 1281 1281 + 1282 1282 + /* 1283 1283 + * Register the mux device, we use PLATFORM_DEVID_NONE here 1284 1284 + * because since we are referring to the GPIO chip by name we are 1285 1285 + * anyways in deep trouble if there is more than one of these 1286 1286 + * devices, and there should likely only be one platform controller 1287 1287 + * hub. 1288 1288 + */ 1424 1289 priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio", 1425 1425 - PLATFORM_DEVID_AUTO, &gpio_data, 1290 1290 + PLATFORM_DEVID_NONE, &gpio_data, 1426 1291 sizeof(struct i2c_mux_gpio_platform_data)); 1427 1292 if (IS_ERR(priv->mux_pdev)) { 1428 1293 err = PTR_ERR(priv->mux_pdev); 1294 1294 + gpiod_remove_lookup_table(lookup); 1429 1295 priv->mux_pdev = NULL; 1430 1296 dev_err(dev, "Failed to register i2c-mux-gpio device\n"); 1431 1297 return err; ··· 1457 1285 { 1458 1286 if (priv->mux_pdev) 1459 1287 platform_device_unregister(priv->mux_pdev); 1288 1288 + if (priv->lookup) 1289 1289 + gpiod_remove_lookup_table(priv->lookup); 1460 1290 } 1461 1291 1462 1292 static unsigned int i801_get_adapter_class(struct i801_priv *priv) ··· 1704 1530 case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS: 1705 1531 case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS: 1706 1532 case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS: 1533 1533 + case PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS: 1534 1534 + case PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS: 1535 1535 + priv->features |= FEATURE_BLOCK_PROC; 1707 1536 priv->features |= FEATURE_I2C_BLOCK_READ; 1708 1537 priv->features |= FEATURE_IRQ; 1709 1538 priv->features |= FEATURE_SMBUS_PEC; ··· 1726 1549 priv->features |= FEATURE_IDF; 1727 1550 /* fall through */ 1728 1551 default: 1552 1552 + priv->features |= FEATURE_BLOCK_PROC; 1729 1553 priv->features |= FEATURE_I2C_BLOCK_READ; 1730 1554 priv->features |= FEATURE_IRQ; 1731 1555 /* fall through */

+3 -8

drivers/i2c/busses/i2c-imx.c

reviewed

··· 1220 1220 return 0; 1221 1221 } 1222 1222 1223 1223 - #ifdef CONFIG_PM 1224 1224 - static int i2c_imx_runtime_suspend(struct device *dev) 1223 1223 + static int __maybe_unused i2c_imx_runtime_suspend(struct device *dev) 1225 1224 { 1226 1225 struct imx_i2c_struct *i2c_imx = dev_get_drvdata(dev); 1227 1226 ··· 1229 1230 return 0; 1230 1231 } 1231 1232 1232 1232 - static int i2c_imx_runtime_resume(struct device *dev) 1233 1233 + static int __maybe_unused i2c_imx_runtime_resume(struct device *dev) 1233 1234 { 1234 1235 struct imx_i2c_struct *i2c_imx = dev_get_drvdata(dev); 1235 1236 int ret; ··· 1245 1246 SET_RUNTIME_PM_OPS(i2c_imx_runtime_suspend, 1246 1247 i2c_imx_runtime_resume, NULL) 1247 1248 }; 1248 1248 - #define I2C_IMX_PM_OPS (&i2c_imx_pm_ops) 1249 1249 - #else 1250 1250 - #define I2C_IMX_PM_OPS NULL 1251 1251 - #endif /* CONFIG_PM */ 1252 1249 1253 1250 static struct platform_driver i2c_imx_driver = { 1254 1251 .probe = i2c_imx_probe, 1255 1252 .remove = i2c_imx_remove, 1256 1253 .driver = { 1257 1254 .name = DRIVER_NAME, 1258 1258 - .pm = I2C_IMX_PM_OPS, 1255 1255 + .pm = &i2c_imx_pm_ops, 1259 1256 .of_match_table = i2c_imx_dt_ids, 1260 1257 }, 1261 1258 .id_table = imx_i2c_devtype,

+21 -11

drivers/i2c/busses/i2c-iop3xx.c

reviewed

··· 35 35 #include <linux/platform_device.h> 36 36 #include <linux/i2c.h> 37 37 #include <linux/io.h> 38 38 - #include <linux/gpio.h> 38 38 + #include <linux/gpio/consumer.h> 39 39 40 40 #include "i2c-iop3xx.h" 41 41 ··· 68 68 69 69 /* 70 70 * Every time unit enable is asserted, GPOD needs to be cleared 71 71 - * on IOP3XX to avoid data corruption on the bus. 71 71 + * on IOP3XX to avoid data corruption on the bus. We use the 72 72 + * gpiod_set_raw_value() to make sure the 0 hits the hardware 73 73 + * GPOD register. These descriptors are only passed along to 74 74 + * the device if this is necessary. 72 75 */ 73 73 - #if defined(CONFIG_ARCH_IOP32X) || defined(CONFIG_ARCH_IOP33X) 74 74 - if (iop3xx_adap->id == 0) { 75 75 - gpio_set_value(7, 0); 76 76 - gpio_set_value(6, 0); 77 77 - } else { 78 78 - gpio_set_value(5, 0); 79 79 - gpio_set_value(4, 0); 80 80 - } 81 81 - #endif 76 76 + if (iop3xx_adap->gpio_scl) 77 77 + gpiod_set_raw_value(iop3xx_adap->gpio_scl, 0); 78 78 + if (iop3xx_adap->gpio_sda) 79 79 + gpiod_set_raw_value(iop3xx_adap->gpio_sda, 0); 80 80 + 82 81 /* NB SR bits not same position as CR IE bits :-( */ 83 82 iop3xx_adap->SR_enabled = 84 83 IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD | ··· 429 430 ret = -ENOMEM; 430 431 goto free_adapter; 431 432 } 433 433 + 434 434 + adapter_data->gpio_scl = devm_gpiod_get_optional(&pdev->dev, 435 435 + "scl", 436 436 + GPIOD_ASIS); 437 437 + if (IS_ERR(adapter_data->gpio_scl)) 438 438 + return PTR_ERR(adapter_data->gpio_scl); 439 439 + adapter_data->gpio_sda = devm_gpiod_get_optional(&pdev->dev, 440 440 + "sda", 441 441 + GPIOD_ASIS); 442 442 + if (IS_ERR(adapter_data->gpio_sda)) 443 443 + return PTR_ERR(adapter_data->gpio_sda); 432 444 433 445 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 434 446 if (!res) {

+2

drivers/i2c/busses/i2c-iop3xx.h

reviewed

··· 92 92 spinlock_t lock; 93 93 u32 SR_enabled, SR_received; 94 94 int id; 95 95 + struct gpio_desc *gpio_scl; 96 96 + struct gpio_desc *gpio_sda; 95 97 }; 96 98 97 99 #endif /* I2C_IOP3XX_H */

+356

drivers/i2c/busses/i2c-mt7621.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0 2 2 + /* 3 3 + * drivers/i2c/busses/i2c-mt7621.c 4 4 + * 5 5 + * Copyright (C) 2013 Steven Liu <steven_liu@mediatek.com> 6 6 + * Copyright (C) 2016 Michael Lee <igvtee@gmail.com> 7 7 + * Copyright (C) 2018 Jan Breuer <jan.breuer@jaybee.cz> 8 8 + * 9 9 + * Improve driver for i2cdetect from i2c-tools to detect i2c devices on the bus. 10 10 + * (C) 2014 Sittisak <sittisaks@hotmail.com> 11 11 + */ 12 12 + 13 13 + #include <linux/clk.h> 14 14 + #include <linux/delay.h> 15 15 + #include <linux/i2c.h> 16 16 + #include <linux/io.h> 17 17 + #include <linux/iopoll.h> 18 18 + #include <linux/module.h> 19 19 + #include <linux/of_platform.h> 20 20 + #include <linux/reset.h> 21 21 + 22 22 + #define REG_SM0CFG2_REG 0x28 23 23 + #define REG_SM0CTL0_REG 0x40 24 24 + #define REG_SM0CTL1_REG 0x44 25 25 + #define REG_SM0D0_REG 0x50 26 26 + #define REG_SM0D1_REG 0x54 27 27 + #define REG_PINTEN_REG 0x5c 28 28 + #define REG_PINTST_REG 0x60 29 29 + #define REG_PINTCL_REG 0x64 30 30 + 31 31 + /* REG_SM0CFG2_REG */ 32 32 + #define SM0CFG2_IS_AUTOMODE BIT(0) 33 33 + 34 34 + /* REG_SM0CTL0_REG */ 35 35 + #define SM0CTL0_ODRAIN BIT(31) 36 36 + #define SM0CTL0_CLK_DIV_MASK (0x7ff << 16) 37 37 + #define SM0CTL0_CLK_DIV_MAX 0x7ff 38 38 + #define SM0CTL0_CS_STATUS BIT(4) 39 39 + #define SM0CTL0_SCL_STATE BIT(3) 40 40 + #define SM0CTL0_SDA_STATE BIT(2) 41 41 + #define SM0CTL0_EN BIT(1) 42 42 + #define SM0CTL0_SCL_STRETCH BIT(0) 43 43 + 44 44 + /* REG_SM0CTL1_REG */ 45 45 + #define SM0CTL1_ACK_MASK (0xff << 16) 46 46 + #define SM0CTL1_PGLEN_MASK (0x7 << 8) 47 47 + #define SM0CTL1_PGLEN(x) ((((x) - 1) << 8) & SM0CTL1_PGLEN_MASK) 48 48 + #define SM0CTL1_READ (5 << 4) 49 49 + #define SM0CTL1_READ_LAST (4 << 4) 50 50 + #define SM0CTL1_STOP (3 << 4) 51 51 + #define SM0CTL1_WRITE (2 << 4) 52 52 + #define SM0CTL1_START (1 << 4) 53 53 + #define SM0CTL1_MODE_MASK (0x7 << 4) 54 54 + #define SM0CTL1_TRI BIT(0) 55 55 + 56 56 + /* timeout waiting for I2C devices to respond */ 57 57 + #define TIMEOUT_MS 1000 58 58 + 59 59 + struct mtk_i2c { 60 60 + void __iomem *base; 61 61 + struct device *dev; 62 62 + struct i2c_adapter adap; 63 63 + u32 bus_freq; 64 64 + u32 clk_div; 65 65 + u32 flags; 66 66 + struct clk *clk; 67 67 + }; 68 68 + 69 69 + static int mtk_i2c_wait_idle(struct mtk_i2c *i2c) 70 70 + { 71 71 + int ret; 72 72 + u32 val; 73 73 + 74 74 + ret = readl_relaxed_poll_timeout(i2c->base + REG_SM0CTL1_REG, 75 75 + val, !(val & SM0CTL1_TRI), 76 76 + 10, TIMEOUT_MS * 1000); 77 77 + if (ret) 78 78 + dev_dbg(i2c->dev, "idle err(%d)\n", ret); 79 79 + 80 80 + return ret; 81 81 + } 82 82 + 83 83 + static void mtk_i2c_reset(struct mtk_i2c *i2c) 84 84 + { 85 85 + int ret; 86 86 + 87 87 + ret = device_reset(i2c->adap.dev.parent); 88 88 + if (ret) 89 89 + dev_err(i2c->dev, "I2C reset failed!\n"); 90 90 + 91 91 + /* 92 92 + * Don't set SM0CTL0_ODRAIN as its bit meaning is inverted. To 93 93 + * configure open-drain mode, this bit needs to be cleared. 94 94 + */ 95 95 + iowrite32(((i2c->clk_div << 16) & SM0CTL0_CLK_DIV_MASK) | SM0CTL0_EN | 96 96 + SM0CTL0_SCL_STRETCH, i2c->base + REG_SM0CTL0_REG); 97 97 + iowrite32(0, i2c->base + REG_SM0CFG2_REG); 98 98 + } 99 99 + 100 100 + static void mtk_i2c_dump_reg(struct mtk_i2c *i2c) 101 101 + { 102 102 + dev_dbg(i2c->dev, 103 103 + "SM0CFG2 %08x, SM0CTL0 %08x, SM0CTL1 %08x, SM0D0 %08x, SM0D1 %08x\n", 104 104 + ioread32(i2c->base + REG_SM0CFG2_REG), 105 105 + ioread32(i2c->base + REG_SM0CTL0_REG), 106 106 + ioread32(i2c->base + REG_SM0CTL1_REG), 107 107 + ioread32(i2c->base + REG_SM0D0_REG), 108 108 + ioread32(i2c->base + REG_SM0D1_REG)); 109 109 + } 110 110 + 111 111 + static int mtk_i2c_check_ack(struct mtk_i2c *i2c, u32 expected) 112 112 + { 113 113 + u32 ack = readl_relaxed(i2c->base + REG_SM0CTL1_REG); 114 114 + u32 ack_expected = (expected << 16) & SM0CTL1_ACK_MASK; 115 115 + 116 116 + return ((ack & ack_expected) == ack_expected) ? 0 : -ENXIO; 117 117 + } 118 118 + 119 119 + static int mtk_i2c_master_start(struct mtk_i2c *i2c) 120 120 + { 121 121 + iowrite32(SM0CTL1_START | SM0CTL1_TRI, i2c->base + REG_SM0CTL1_REG); 122 122 + return mtk_i2c_wait_idle(i2c); 123 123 + } 124 124 + 125 125 + static int mtk_i2c_master_stop(struct mtk_i2c *i2c) 126 126 + { 127 127 + iowrite32(SM0CTL1_STOP | SM0CTL1_TRI, i2c->base + REG_SM0CTL1_REG); 128 128 + return mtk_i2c_wait_idle(i2c); 129 129 + } 130 130 + 131 131 + static int mtk_i2c_master_cmd(struct mtk_i2c *i2c, u32 cmd, int page_len) 132 132 + { 133 133 + iowrite32(cmd | SM0CTL1_TRI | SM0CTL1_PGLEN(page_len), 134 134 + i2c->base + REG_SM0CTL1_REG); 135 135 + return mtk_i2c_wait_idle(i2c); 136 136 + } 137 137 + 138 138 + static int mtk_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, 139 139 + int num) 140 140 + { 141 141 + struct mtk_i2c *i2c; 142 142 + struct i2c_msg *pmsg; 143 143 + u16 addr; 144 144 + int i, j, ret, len, page_len; 145 145 + u32 cmd; 146 146 + u32 data[2]; 147 147 + 148 148 + i2c = i2c_get_adapdata(adap); 149 149 + 150 150 + for (i = 0; i < num; i++) { 151 151 + pmsg = &msgs[i]; 152 152 + 153 153 + /* wait hardware idle */ 154 154 + ret = mtk_i2c_wait_idle(i2c); 155 155 + if (ret) 156 156 + goto err_timeout; 157 157 + 158 158 + /* start sequence */ 159 159 + ret = mtk_i2c_master_start(i2c); 160 160 + if (ret) 161 161 + goto err_timeout; 162 162 + 163 163 + /* write address */ 164 164 + if (pmsg->flags & I2C_M_TEN) { 165 165 + /* 10 bits address */ 166 166 + addr = 0xf0 | ((pmsg->addr >> 7) & 0x06); 167 167 + addr |= (pmsg->addr & 0xff) << 8; 168 168 + if (pmsg->flags & I2C_M_RD) 169 169 + addr |= 1; 170 170 + iowrite32(addr, i2c->base + REG_SM0D0_REG); 171 171 + ret = mtk_i2c_master_cmd(i2c, SM0CTL1_WRITE, 2); 172 172 + if (ret) 173 173 + goto err_timeout; 174 174 + } else { 175 175 + /* 7 bits address */ 176 176 + addr = i2c_8bit_addr_from_msg(pmsg); 177 177 + iowrite32(addr, i2c->base + REG_SM0D0_REG); 178 178 + ret = mtk_i2c_master_cmd(i2c, SM0CTL1_WRITE, 1); 179 179 + if (ret) 180 180 + goto err_timeout; 181 181 + } 182 182 + 183 183 + /* check address ACK */ 184 184 + if (!(pmsg->flags & I2C_M_IGNORE_NAK)) { 185 185 + ret = mtk_i2c_check_ack(i2c, BIT(0)); 186 186 + if (ret) 187 187 + goto err_ack; 188 188 + } 189 189 + 190 190 + /* transfer data */ 191 191 + for (len = pmsg->len, j = 0; len > 0; len -= 8, j += 8) { 192 192 + page_len = (len >= 8) ? 8 : len; 193 193 + 194 194 + if (pmsg->flags & I2C_M_RD) { 195 195 + cmd = (len > 8) ? 196 196 + SM0CTL1_READ : SM0CTL1_READ_LAST; 197 197 + } else { 198 198 + memcpy(data, &pmsg->buf[j], page_len); 199 199 + iowrite32(data[0], i2c->base + REG_SM0D0_REG); 200 200 + iowrite32(data[1], i2c->base + REG_SM0D1_REG); 201 201 + cmd = SM0CTL1_WRITE; 202 202 + } 203 203 + 204 204 + ret = mtk_i2c_master_cmd(i2c, cmd, page_len); 205 205 + if (ret) 206 206 + goto err_timeout; 207 207 + 208 208 + if (pmsg->flags & I2C_M_RD) { 209 209 + data[0] = ioread32(i2c->base + REG_SM0D0_REG); 210 210 + data[1] = ioread32(i2c->base + REG_SM0D1_REG); 211 211 + memcpy(&pmsg->buf[j], data, page_len); 212 212 + } else { 213 213 + if (!(pmsg->flags & I2C_M_IGNORE_NAK)) { 214 214 + ret = mtk_i2c_check_ack(i2c, 215 215 + (1 << page_len) 216 216 + - 1); 217 217 + if (ret) 218 218 + goto err_ack; 219 219 + } 220 220 + } 221 221 + } 222 222 + } 223 223 + 224 224 + ret = mtk_i2c_master_stop(i2c); 225 225 + if (ret) 226 226 + goto err_timeout; 227 227 + 228 228 + /* the return value is number of executed messages */ 229 229 + return i; 230 230 + 231 231 + err_ack: 232 232 + ret = mtk_i2c_master_stop(i2c); 233 233 + if (ret) 234 234 + goto err_timeout; 235 235 + return -ENXIO; 236 236 + 237 237 + err_timeout: 238 238 + mtk_i2c_dump_reg(i2c); 239 239 + mtk_i2c_reset(i2c); 240 240 + return ret; 241 241 + } 242 242 + 243 243 + static u32 mtk_i2c_func(struct i2c_adapter *a) 244 244 + { 245 245 + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING; 246 246 + } 247 247 + 248 248 + static const struct i2c_algorithm mtk_i2c_algo = { 249 249 + .master_xfer = mtk_i2c_master_xfer, 250 250 + .functionality = mtk_i2c_func, 251 251 + }; 252 252 + 253 253 + static const struct of_device_id i2c_mtk_dt_ids[] = { 254 254 + { .compatible = "mediatek,mt7621-i2c" }, 255 255 + { /* sentinel */ } 256 256 + }; 257 257 + 258 258 + MODULE_DEVICE_TABLE(of, i2c_mtk_dt_ids); 259 259 + 260 260 + static void mtk_i2c_init(struct mtk_i2c *i2c) 261 261 + { 262 262 + i2c->clk_div = clk_get_rate(i2c->clk) / i2c->bus_freq - 1; 263 263 + if (i2c->clk_div < 99) 264 264 + i2c->clk_div = 99; 265 265 + if (i2c->clk_div > SM0CTL0_CLK_DIV_MAX) 266 266 + i2c->clk_div = SM0CTL0_CLK_DIV_MAX; 267 267 + 268 268 + mtk_i2c_reset(i2c); 269 269 + } 270 270 + 271 271 + static int mtk_i2c_probe(struct platform_device *pdev) 272 272 + { 273 273 + struct resource *res; 274 274 + struct mtk_i2c *i2c; 275 275 + struct i2c_adapter *adap; 276 276 + int ret; 277 277 + 278 278 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 279 279 + 280 280 + i2c = devm_kzalloc(&pdev->dev, sizeof(struct mtk_i2c), GFP_KERNEL); 281 281 + if (!i2c) 282 282 + return -ENOMEM; 283 283 + 284 284 + i2c->base = devm_ioremap_resource(&pdev->dev, res); 285 285 + if (IS_ERR(i2c->base)) 286 286 + return PTR_ERR(i2c->base); 287 287 + 288 288 + i2c->clk = devm_clk_get(&pdev->dev, NULL); 289 289 + if (IS_ERR(i2c->clk)) { 290 290 + dev_err(&pdev->dev, "no clock defined\n"); 291 291 + return PTR_ERR(i2c->clk); 292 292 + } 293 293 + ret = clk_prepare_enable(i2c->clk); 294 294 + if (ret) { 295 295 + dev_err(&pdev->dev, "Unable to enable clock\n"); 296 296 + return ret; 297 297 + } 298 298 + 299 299 + i2c->dev = &pdev->dev; 300 300 + 301 301 + if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", 302 302 + &i2c->bus_freq)) 303 303 + i2c->bus_freq = 100000; 304 304 + 305 305 + if (i2c->bus_freq == 0) { 306 306 + dev_warn(i2c->dev, "clock-frequency 0 not supported\n"); 307 307 + return -EINVAL; 308 308 + } 309 309 + 310 310 + adap = &i2c->adap; 311 311 + adap->owner = THIS_MODULE; 312 312 + adap->algo = &mtk_i2c_algo; 313 313 + adap->retries = 3; 314 314 + adap->dev.parent = &pdev->dev; 315 315 + i2c_set_adapdata(adap, i2c); 316 316 + adap->dev.of_node = pdev->dev.of_node; 317 317 + strlcpy(adap->name, dev_name(&pdev->dev), sizeof(adap->name)); 318 318 + 319 319 + platform_set_drvdata(pdev, i2c); 320 320 + 321 321 + mtk_i2c_init(i2c); 322 322 + 323 323 + ret = i2c_add_adapter(adap); 324 324 + if (ret < 0) 325 325 + return ret; 326 326 + 327 327 + dev_info(&pdev->dev, "clock %u kHz\n", i2c->bus_freq / 1000); 328 328 + 329 329 + return ret; 330 330 + } 331 331 + 332 332 + static int mtk_i2c_remove(struct platform_device *pdev) 333 333 + { 334 334 + struct mtk_i2c *i2c = platform_get_drvdata(pdev); 335 335 + 336 336 + clk_disable_unprepare(i2c->clk); 337 337 + i2c_del_adapter(&i2c->adap); 338 338 + 339 339 + return 0; 340 340 + } 341 341 + 342 342 + static struct platform_driver mtk_i2c_driver = { 343 343 + .probe = mtk_i2c_probe, 344 344 + .remove = mtk_i2c_remove, 345 345 + .driver = { 346 346 + .name = "i2c-mt7621", 347 347 + .of_match_table = i2c_mtk_dt_ids, 348 348 + }, 349 349 + }; 350 350 + 351 351 + module_platform_driver(mtk_i2c_driver); 352 352 + 353 353 + MODULE_AUTHOR("Steven Liu"); 354 354 + MODULE_DESCRIPTION("MT7621 I2C host driver"); 355 355 + MODULE_LICENSE("GPL v2"); 356 356 + MODULE_ALIAS("platform:MT7621-I2C");

+46 -16

drivers/i2c/busses/i2c-nvidia-gpu.c

reviewed

··· 51 51 void __iomem *regs; 52 52 struct i2c_adapter adapter; 53 53 struct i2c_board_info *gpu_ccgx_ucsi; 54 54 + struct i2c_client *ccgx_client; 54 55 }; 55 56 56 57 static void gpu_enable_i2c_bus(struct gpu_i2c_dev *i2cd) ··· 170 169 { 171 170 struct gpu_i2c_dev *i2cd = i2c_get_adapdata(adap); 172 171 int status, status2; 172 172 + bool send_stop = true; 173 173 int i, j; 174 174 175 175 /* 176 176 * The controller supports maximum 4 byte read due to known 177 177 * limitation of sending STOP after every read. 178 178 */ 179 179 + pm_runtime_get_sync(i2cd->dev); 179 180 for (i = 0; i < num; i++) { 180 181 if (msgs[i].flags & I2C_M_RD) { 181 182 /* program client address before starting read */ ··· 185 182 /* gpu_i2c_read has implicit start */ 186 183 status = gpu_i2c_read(i2cd, msgs[i].buf, msgs[i].len); 187 184 if (status < 0) 188 188 - goto stop; 185 185 + goto exit; 189 186 } else { 190 187 u8 addr = i2c_8bit_addr_from_msg(msgs + i); 191 188 192 189 status = gpu_i2c_start(i2cd); 193 190 if (status < 0) { 194 191 if (i == 0) 195 195 - return status; 196 196 - goto stop; 192 192 + send_stop = false; 193 193 + goto exit; 197 194 } 198 195 199 196 status = gpu_i2c_write(i2cd, addr); 200 197 if (status < 0) 201 201 - goto stop; 198 198 + goto exit; 202 199 203 200 for (j = 0; j < msgs[i].len; j++) { 204 201 status = gpu_i2c_write(i2cd, msgs[i].buf[j]); 205 202 if (status < 0) 206 206 - goto stop; 203 203 + goto exit; 207 204 } 208 205 } 209 206 } 207 207 + send_stop = false; 210 208 status = gpu_i2c_stop(i2cd); 211 209 if (status < 0) 212 212 - return status; 210 210 + goto exit; 213 211 214 214 - return i; 215 215 - stop: 216 216 - status2 = gpu_i2c_stop(i2cd); 217 217 - if (status2 < 0) 218 218 - dev_err(i2cd->dev, "i2c stop failed %d\n", status2); 212 212 + status = i; 213 213 + exit: 214 214 + if (send_stop) { 215 215 + status2 = gpu_i2c_stop(i2cd); 216 216 + if (status2 < 0) 217 217 + dev_err(i2cd->dev, "i2c stop failed %d\n", status2); 218 218 + } 219 219 + pm_runtime_mark_last_busy(i2cd->dev); 220 220 + pm_runtime_put_autosuspend(i2cd->dev); 219 221 return status; 220 222 } 221 223 ··· 269 261 270 262 static int gpu_populate_client(struct gpu_i2c_dev *i2cd, int irq) 271 263 { 272 272 - struct i2c_client *ccgx_client; 273 273 - 274 264 i2cd->gpu_ccgx_ucsi = devm_kzalloc(i2cd->dev, 275 265 sizeof(*i2cd->gpu_ccgx_ucsi), 276 266 GFP_KERNEL); ··· 280 274 i2cd->gpu_ccgx_ucsi->addr = 0x8; 281 275 i2cd->gpu_ccgx_ucsi->irq = irq; 282 276 i2cd->gpu_ccgx_ucsi->properties = ccgx_props; 283 283 - ccgx_client = i2c_new_device(&i2cd->adapter, i2cd->gpu_ccgx_ucsi); 284 284 - if (!ccgx_client) 277 277 + i2cd->ccgx_client = i2c_new_device(&i2cd->adapter, i2cd->gpu_ccgx_ucsi); 278 278 + if (!i2cd->ccgx_client) 285 279 return -ENODEV; 286 280 287 281 return 0; ··· 338 332 goto del_adapter; 339 333 } 340 334 335 335 + pm_runtime_set_autosuspend_delay(&pdev->dev, 3000); 336 336 + pm_runtime_use_autosuspend(&pdev->dev); 337 337 + pm_runtime_put_autosuspend(&pdev->dev); 338 338 + pm_runtime_allow(&pdev->dev); 339 339 + 341 340 return 0; 342 341 343 342 del_adapter: ··· 356 345 { 357 346 struct gpu_i2c_dev *i2cd = dev_get_drvdata(&pdev->dev); 358 347 348 348 + pm_runtime_get_noresume(i2cd->dev); 359 349 i2c_del_adapter(&i2cd->adapter); 360 350 pci_free_irq_vectors(pdev); 351 351 + } 352 352 + 353 353 + /* 354 354 + * We need gpu_i2c_suspend() even if it is stub, for runtime pm to work 355 355 + * correctly. Without it, lspci shows runtime pm status as "D0" for the card. 356 356 + * Documentation/power/pci.txt also insists for driver to provide this. 357 357 + */ 358 358 + static __maybe_unused int gpu_i2c_suspend(struct device *dev) 359 359 + { 360 360 + return 0; 361 361 } 362 362 363 363 static __maybe_unused int gpu_i2c_resume(struct device *dev) ··· 376 354 struct gpu_i2c_dev *i2cd = dev_get_drvdata(dev); 377 355 378 356 gpu_enable_i2c_bus(i2cd); 357 357 + /* 358 358 + * Runtime resume ccgx client so that it can see for any 359 359 + * connector change event. Old ccg firmware has known 360 360 + * issue of not triggering interrupt when a device is 361 361 + * connected to runtime resume the controller. 362 362 + */ 363 363 + pm_request_resume(&i2cd->ccgx_client->dev); 379 364 return 0; 380 365 } 381 366 382 382 - static UNIVERSAL_DEV_PM_OPS(gpu_i2c_driver_pm, NULL, gpu_i2c_resume, NULL); 367 367 + static UNIVERSAL_DEV_PM_OPS(gpu_i2c_driver_pm, gpu_i2c_suspend, gpu_i2c_resume, 368 368 + NULL); 383 369 384 370 static struct pci_driver gpu_i2c_driver = { 385 371 .name = "nvidia-gpu",

+31 -2

drivers/i2c/busses/i2c-ocores.c

reviewed

··· 35 35 int iobase; 36 36 u32 reg_shift; 37 37 u32 reg_io_width; 38 38 + unsigned long flags; 38 39 wait_queue_head_t wait; 39 40 struct i2c_adapter adap; 40 41 struct i2c_msg *msg; ··· 83 82 84 83 #define TYPE_OCORES 0 85 84 #define TYPE_GRLIB 1 85 85 + #define TYPE_SIFIVE_REV0 2 86 86 + 87 87 + #define OCORES_FLAG_BROKEN_IRQ BIT(1) /* Broken IRQ for FU540-C000 SoC */ 86 88 87 89 static void oc_setreg_8(struct ocores_i2c *i2c, int reg, u8 value) 88 90 { ··· 239 235 struct ocores_i2c *i2c = dev_id; 240 236 u8 stat = oc_getreg(i2c, OCI2C_STATUS); 241 237 242 242 - if (!(stat & OCI2C_STAT_IF)) 238 238 + if (i2c->flags & OCORES_FLAG_BROKEN_IRQ) { 239 239 + if ((stat & OCI2C_STAT_IF) && !(stat & OCI2C_STAT_BUSY)) 240 240 + return IRQ_NONE; 241 241 + } else if (!(stat & OCI2C_STAT_IF)) { 243 242 return IRQ_NONE; 244 244 - 243 243 + } 245 244 ocores_process(i2c, stat); 246 245 247 246 return IRQ_HANDLED; ··· 359 352 ret = ocores_isr(-1, i2c); 360 353 if (ret == IRQ_NONE) 361 354 break; /* all messages have been transferred */ 355 355 + else { 356 356 + if (i2c->flags & OCORES_FLAG_BROKEN_IRQ) 357 357 + if (i2c->state == STATE_DONE) 358 358 + break; 359 359 + } 362 360 } 363 361 } 364 362 ··· 473 461 { 474 462 .compatible = "aeroflexgaisler,i2cmst", 475 463 .data = (void *)TYPE_GRLIB, 464 464 + }, 465 465 + { 466 466 + .compatible = "sifive,fu540-c000-i2c", 467 467 + .data = (void *)TYPE_SIFIVE_REV0, 468 468 + }, 469 469 + { 470 470 + .compatible = "sifive,i2c0", 471 471 + .data = (void *)TYPE_SIFIVE_REV0, 476 472 }, 477 473 {}, 478 474 }; ··· 606 586 { 607 587 struct ocores_i2c *i2c; 608 588 struct ocores_i2c_platform_data *pdata; 589 589 + const struct of_device_id *match; 609 590 struct resource *res; 610 591 int irq; 611 592 int ret; ··· 689 668 irq = platform_get_irq(pdev, 0); 690 669 if (irq == -ENXIO) { 691 670 ocores_algorithm.master_xfer = ocores_xfer_polling; 671 671 + 672 672 + /* 673 673 + * Set in OCORES_FLAG_BROKEN_IRQ to enable workaround for 674 674 + * FU540-C000 SoC in polling mode. 675 675 + */ 676 676 + match = of_match_node(ocores_i2c_match, pdev->dev.of_node); 677 677 + if (match && (long)match->data == TYPE_SIFIVE_REV0) 678 678 + i2c->flags |= OCORES_FLAG_BROKEN_IRQ; 692 679 } else { 693 680 if (irq < 0) 694 681 return irq;

+16 -1

drivers/i2c/busses/i2c-qcom-geni.c

reviewed

··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. 3 3 4 4 + #include <linux/acpi.h> 4 5 #include <linux/clk.h> 5 6 #include <linux/dma-mapping.h> 6 7 #include <linux/err.h> ··· 484 483 .functionality = geni_i2c_func, 485 484 }; 486 485 486 486 + #ifdef CONFIG_ACPI 487 487 + static const struct acpi_device_id geni_i2c_acpi_match[] = { 488 488 + { "QCOM0220"}, 489 489 + { }, 490 490 + }; 491 491 + MODULE_DEVICE_TABLE(acpi, geni_i2c_acpi_match); 492 492 + #endif 493 493 + 487 494 static int geni_i2c_probe(struct platform_device *pdev) 488 495 { 489 496 struct geni_i2c_dev *gi2c; ··· 511 502 return PTR_ERR(gi2c->se.base); 512 503 513 504 gi2c->se.clk = devm_clk_get(&pdev->dev, "se"); 514 514 - if (IS_ERR(gi2c->se.clk)) { 505 505 + if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(&pdev->dev)) { 515 506 ret = PTR_ERR(gi2c->se.clk); 516 507 dev_err(&pdev->dev, "Err getting SE Core clk %d\n", ret); 517 508 return ret; ··· 524 515 "Bus frequency not specified, default to 100kHz.\n"); 525 516 gi2c->clk_freq_out = KHZ(100); 526 517 } 518 518 + 519 519 + if (has_acpi_companion(&pdev->dev)) 520 520 + ACPI_COMPANION_SET(&gi2c->adap.dev, ACPI_COMPANION(&pdev->dev)); 527 521 528 522 gi2c->irq = platform_get_irq(pdev, 0); 529 523 if (gi2c->irq < 0) { ··· 595 583 pm_runtime_disable(gi2c->se.dev); 596 584 return ret; 597 585 } 586 586 + 587 587 + dev_dbg(&pdev->dev, "Geni-I2C adaptor successfully added\n"); 598 588 599 589 return 0; 600 590 } ··· 674 660 .name = "geni_i2c", 675 661 .pm = &geni_i2c_pm_ops, 676 662 .of_match_table = geni_i2c_dt_match, 663 663 + .acpi_match_table = ACPI_PTR(geni_i2c_acpi_match), 677 664 }, 678 665 }; 679 666

+9 -38

drivers/i2c/busses/i2c-s3c2410.c

reviewed

··· 24 24 #include <linux/slab.h> 25 25 #include <linux/io.h> 26 26 #include <linux/of.h> 27 27 - #include <linux/of_gpio.h> 27 27 + #include <linux/gpio/consumer.h> 28 28 #include <linux/pinctrl/consumer.h> 29 29 #include <linux/mfd/syscon.h> 30 30 #include <linux/regmap.h> ··· 113 113 struct i2c_adapter adap; 114 114 115 115 struct s3c2410_platform_i2c *pdata; 116 116 - int gpios[2]; 116 116 + struct gpio_desc *gpios[2]; 117 117 struct pinctrl *pctrl; 118 118 #if defined(CONFIG_ARM_S3C24XX_CPUFREQ) 119 119 struct notifier_block freq_transition; ··· 947 947 #ifdef CONFIG_OF 948 948 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) 949 949 { 950 950 - int idx, gpio, ret; 950 950 + int i; 951 951 952 952 if (i2c->quirks & QUIRK_NO_GPIO) 953 953 return 0; 954 954 955 955 - for (idx = 0; idx < 2; idx++) { 956 956 - gpio = of_get_gpio(i2c->dev->of_node, idx); 957 957 - if (!gpio_is_valid(gpio)) { 958 958 - dev_err(i2c->dev, "invalid gpio[%d]: %d\n", idx, gpio); 959 959 - goto free_gpio; 960 960 - } 961 961 - i2c->gpios[idx] = gpio; 962 962 - 963 963 - ret = gpio_request(gpio, "i2c-bus"); 964 964 - if (ret) { 965 965 - dev_err(i2c->dev, "gpio [%d] request failed (%d)\n", 966 966 - gpio, ret); 967 967 - goto free_gpio; 955 955 + for (i = 0; i < 2; i++) { 956 956 + i2c->gpios[i] = devm_gpiod_get_index(i2c->dev, NULL, 957 957 + i, GPIOD_ASIS); 958 958 + if (IS_ERR(i2c->gpios[i])) { 959 959 + dev_err(i2c->dev, "i2c gpio invalid at index %d\n", i); 960 960 + return -EINVAL; 968 961 } 969 962 } 970 963 return 0; 971 971 - 972 972 - free_gpio: 973 973 - while (--idx >= 0) 974 974 - gpio_free(i2c->gpios[idx]); 975 975 - return -EINVAL; 976 964 } 977 965 978 978 - static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c) 979 979 - { 980 980 - unsigned int idx; 981 981 - 982 982 - if (i2c->quirks & QUIRK_NO_GPIO) 983 983 - return; 984 984 - 985 985 - for (idx = 0; idx < 2; idx++) 986 986 - gpio_free(i2c->gpios[idx]); 987 987 - } 988 966 #else 989 967 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) 990 968 { 991 969 return 0; 992 992 - } 993 993 - 994 994 - static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c) 995 995 - { 996 970 } 997 971 #endif 998 972 ··· 1195 1221 s3c24xx_i2c_deregister_cpufreq(i2c); 1196 1222 1197 1223 i2c_del_adapter(&i2c->adap); 1198 1198 - 1199 1199 - if (pdev->dev.of_node && IS_ERR(i2c->pctrl)) 1200 1200 - s3c24xx_i2c_dt_gpio_free(i2c); 1201 1224 1202 1225 return 0; 1203 1226 }

+19 -13

drivers/i2c/busses/i2c-stm32f7.c

reviewed

··· 25 25 #include <linux/module.h> 26 26 #include <linux/of.h> 27 27 #include <linux/of_address.h> 28 28 - #include <linux/of_irq.h> 29 28 #include <linux/of_platform.h> 30 29 #include <linux/platform_device.h> 31 30 #include <linux/pinctrl/consumer.h> ··· 952 953 cr2 &= ~STM32F7_I2C_CR2_RD_WRN; 953 954 f7_msg->read_write = I2C_SMBUS_READ; 954 955 break; 956 956 + case I2C_SMBUS_I2C_BLOCK_DATA: 957 957 + /* Rely on emulated i2c transfer (through master_xfer) */ 958 958 + return -EOPNOTSUPP; 955 959 default: 956 960 dev_err(dev, "Unsupported smbus protocol %d\n", f7_msg->size); 957 961 return -EOPNOTSUPP; ··· 1805 1803 I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 1806 1804 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 1807 1805 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | 1808 1808 - I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_PEC; 1806 1806 + I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_PEC | 1807 1807 + I2C_FUNC_SMBUS_I2C_BLOCK; 1809 1808 } 1810 1809 1811 1810 static struct i2c_algorithm stm32f7_i2c_algo = { ··· 1819 1816 1820 1817 static int stm32f7_i2c_probe(struct platform_device *pdev) 1821 1818 { 1822 1822 - struct device_node *np = pdev->dev.of_node; 1823 1819 struct stm32f7_i2c_dev *i2c_dev; 1824 1820 const struct stm32f7_i2c_setup *setup; 1825 1821 struct resource *res; 1826 1826 - u32 irq_error, irq_event, clk_rate, rise_time, fall_time; 1822 1822 + u32 clk_rate, rise_time, fall_time; 1827 1823 struct i2c_adapter *adap; 1828 1824 struct reset_control *rst; 1829 1825 dma_addr_t phy_addr; 1830 1830 - int ret; 1826 1826 + int irq_error, irq_event, ret; 1831 1827 1832 1828 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); 1833 1829 if (!i2c_dev) ··· 1838 1836 return PTR_ERR(i2c_dev->base); 1839 1837 phy_addr = (dma_addr_t)res->start; 1840 1838 1841 1841 - irq_event = irq_of_parse_and_map(np, 0); 1842 1842 - if (!irq_event) { 1843 1843 - dev_err(&pdev->dev, "IRQ event missing or invalid\n"); 1844 1844 - return -EINVAL; 1839 1839 + irq_event = platform_get_irq(pdev, 0); 1840 1840 + if (irq_event <= 0) { 1841 1841 + if (irq_event != -EPROBE_DEFER) 1842 1842 + dev_err(&pdev->dev, "Failed to get IRQ event: %d\n", 1843 1843 + irq_event); 1844 1844 + return irq_event ? : -ENOENT; 1845 1845 } 1846 1846 1847 1847 - irq_error = irq_of_parse_and_map(np, 1); 1848 1848 - if (!irq_error) { 1849 1849 - dev_err(&pdev->dev, "IRQ error missing or invalid\n"); 1850 1850 - return -EINVAL; 1847 1847 + irq_error = platform_get_irq(pdev, 1); 1848 1848 + if (irq_error <= 0) { 1849 1849 + if (irq_error != -EPROBE_DEFER) 1850 1850 + dev_err(&pdev->dev, "Failed to get IRQ error: %d\n", 1851 1851 + irq_error); 1852 1852 + return irq_error ? : -ENOENT; 1851 1853 } 1852 1854 1853 1855 i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);

+93 -43

drivers/i2c/busses/i2c-tegra.c

reviewed

··· 54 54 #define I2C_INT_STATUS 0x068 55 55 #define I2C_INT_BUS_CLR_DONE BIT(11) 56 56 #define I2C_INT_PACKET_XFER_COMPLETE BIT(7) 57 57 - #define I2C_INT_ALL_PACKETS_XFER_COMPLETE BIT(6) 58 58 - #define I2C_INT_TX_FIFO_OVERFLOW BIT(5) 59 59 - #define I2C_INT_RX_FIFO_UNDERFLOW BIT(4) 60 57 #define I2C_INT_NO_ACK BIT(3) 61 58 #define I2C_INT_ARBITRATION_LOST BIT(2) 62 59 #define I2C_INT_TX_FIFO_DATA_REQ BIT(1) 63 60 #define I2C_INT_RX_FIFO_DATA_REQ BIT(0) 64 61 #define I2C_CLK_DIVISOR 0x06c 65 62 #define I2C_CLK_DIVISOR_STD_FAST_MODE_SHIFT 16 66 66 - #define I2C_CLK_MULTIPLIER_STD_FAST_MODE 8 67 63 68 64 #define DVC_CTRL_REG1 0x000 69 65 #define DVC_CTRL_REG1_INTR_EN BIT(10) 70 70 - #define DVC_CTRL_REG2 0x004 71 66 #define DVC_CTRL_REG3 0x008 72 67 #define DVC_CTRL_REG3_SW_PROG BIT(26) 73 68 #define DVC_CTRL_REG3_I2C_DONE_INTR_EN BIT(30) ··· 70 75 #define DVC_STATUS_I2C_DONE_INTR BIT(30) 71 76 72 77 #define I2C_ERR_NONE 0x00 73 73 - #define I2C_ERR_NO_ACK 0x01 74 74 - #define I2C_ERR_ARBITRATION_LOST 0x02 75 75 - #define I2C_ERR_UNKNOWN_INTERRUPT 0x04 78 78 + #define I2C_ERR_NO_ACK BIT(0) 79 79 + #define I2C_ERR_ARBITRATION_LOST BIT(1) 80 80 + #define I2C_ERR_UNKNOWN_INTERRUPT BIT(2) 81 81 + #define I2C_ERR_RX_BUFFER_OVERFLOW BIT(3) 76 82 77 83 #define PACKET_HEADER0_HEADER_SIZE_SHIFT 28 78 84 #define PACKET_HEADER0_PACKET_ID_SHIFT 16 79 85 #define PACKET_HEADER0_CONT_ID_SHIFT 12 80 86 #define PACKET_HEADER0_PROTOCOL_I2C BIT(4) 81 87 82 82 - #define I2C_HEADER_HIGHSPEED_MODE BIT(22) 83 88 #define I2C_HEADER_CONT_ON_NAK BIT(21) 84 84 - #define I2C_HEADER_SEND_START_BYTE BIT(20) 85 89 #define I2C_HEADER_READ BIT(19) 86 90 #define I2C_HEADER_10BIT_ADDR BIT(18) 87 91 #define I2C_HEADER_IE_ENABLE BIT(17) 88 92 #define I2C_HEADER_REPEAT_START BIT(16) 89 93 #define I2C_HEADER_CONTINUE_XFER BIT(15) 90 90 - #define I2C_HEADER_MASTER_ADDR_SHIFT 12 91 94 #define I2C_HEADER_SLAVE_ADDR_SHIFT 1 92 95 93 96 #define I2C_BUS_CLEAR_CNFG 0x084 ··· 99 106 100 107 #define I2C_CONFIG_LOAD 0x08C 101 108 #define I2C_MSTR_CONFIG_LOAD BIT(0) 102 102 - #define I2C_SLV_CONFIG_LOAD BIT(1) 103 103 - #define I2C_TIMEOUT_CONFIG_LOAD BIT(2) 104 109 105 110 #define I2C_CLKEN_OVERRIDE 0x090 106 111 #define I2C_MST_CORE_CLKEN_OVR BIT(0) ··· 124 133 #define I2C_STANDARD_MODE 100000 125 134 #define I2C_FAST_MODE 400000 126 135 #define I2C_FAST_PLUS_MODE 1000000 127 127 - #define I2C_HS_MODE 3500000 128 136 129 137 /* Packet header size in bytes */ 130 138 #define I2C_PACKET_HEADER_SIZE 12 ··· 270 280 u32 bus_clk_rate; 271 281 u16 clk_divisor_non_hs_mode; 272 282 bool is_multimaster_mode; 283 283 + /* xfer_lock: lock to serialize transfer submission and processing */ 273 284 spinlock_t xfer_lock; 274 285 struct dma_chan *tx_dma_chan; 275 286 struct dma_chan *rx_dma_chan; ··· 297 306 * to the I2C block inside the DVC block 298 307 */ 299 308 static unsigned long tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev, 300 300 - unsigned long reg) 309 309 + unsigned long reg) 301 310 { 302 311 if (i2c_dev->is_dvc) 303 312 reg += (reg >= I2C_TX_FIFO) ? 0x10 : 0x40; ··· 305 314 } 306 315 307 316 static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val, 308 308 - unsigned long reg) 317 317 + unsigned long reg) 309 318 { 310 319 writel(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); 311 320 ··· 320 329 } 321 330 322 331 static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data, 323 323 - unsigned long reg, int len) 332 332 + unsigned long reg, int len) 324 333 { 325 334 writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); 326 335 } 327 336 328 337 static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data, 329 329 - unsigned long reg, int len) 338 338 + unsigned long reg, int len) 330 339 { 331 340 readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); 332 341 } ··· 477 486 dev_warn(i2c_dev->dev, "timeout waiting for fifo flush\n"); 478 487 return -ETIMEDOUT; 479 488 } 480 480 - msleep(1); 489 489 + usleep_range(1000, 2000); 481 490 } 482 491 return 0; 483 492 } ··· 489 498 u8 *buf = i2c_dev->msg_buf; 490 499 size_t buf_remaining = i2c_dev->msg_buf_remaining; 491 500 int words_to_transfer; 501 501 + 502 502 + /* 503 503 + * Catch overflow due to message fully sent 504 504 + * before the check for RX FIFO availability. 505 505 + */ 506 506 + if (WARN_ON_ONCE(!(i2c_dev->msg_buf_remaining))) 507 507 + return -EINVAL; 492 508 493 509 if (i2c_dev->hw->has_mst_fifo) { 494 510 val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS); ··· 523 525 * prevent overwriting past the end of buf 524 526 */ 525 527 if (rx_fifo_avail > 0 && buf_remaining > 0) { 526 526 - BUG_ON(buf_remaining > 3); 528 528 + /* 529 529 + * buf_remaining > 3 check not needed as rx_fifo_avail == 0 530 530 + * when (words_to_transfer was > rx_fifo_avail) earlier 531 531 + * in this function. 532 532 + */ 527 533 val = i2c_readl(i2c_dev, I2C_RX_FIFO); 528 534 val = cpu_to_le32(val); 529 535 memcpy(buf, &val, buf_remaining); ··· 535 533 rx_fifo_avail--; 536 534 } 537 535 538 538 - BUG_ON(rx_fifo_avail > 0 && buf_remaining > 0); 536 536 + /* RX FIFO must be drained, otherwise it's an Overflow case. */ 537 537 + if (WARN_ON_ONCE(rx_fifo_avail)) 538 538 + return -EINVAL; 539 539 + 539 540 i2c_dev->msg_buf_remaining = buf_remaining; 540 541 i2c_dev->msg_buf = buf; 541 542 ··· 596 591 * boundary and fault. 597 592 */ 598 593 if (tx_fifo_avail > 0 && buf_remaining > 0) { 599 599 - BUG_ON(buf_remaining > 3); 594 594 + /* 595 595 + * buf_remaining > 3 check not needed as tx_fifo_avail == 0 596 596 + * when (words_to_transfer was > tx_fifo_avail) earlier 597 597 + * in this function for non-zero words_to_transfer. 598 598 + */ 600 599 memcpy(&val, buf, buf_remaining); 601 600 val = le32_to_cpu(val); 602 601 ··· 689 680 i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); 690 681 if (in_interrupt()) 691 682 err = readl_poll_timeout_atomic(addr, val, val == 0, 692 692 - 1000, I2C_CONFIG_LOAD_TIMEOUT); 683 683 + 1000, 684 684 + I2C_CONFIG_LOAD_TIMEOUT); 693 685 else 694 694 - err = readl_poll_timeout(addr, val, val == 0, 695 695 - 1000, I2C_CONFIG_LOAD_TIMEOUT); 686 686 + err = readl_poll_timeout(addr, val, val == 0, 1000, 687 687 + I2C_CONFIG_LOAD_TIMEOUT); 696 688 697 689 if (err) { 698 690 dev_warn(i2c_dev->dev, ··· 710 700 u32 val; 711 701 int err; 712 702 u32 clk_divisor, clk_multiplier; 713 713 - u32 tsu_thd = 0; 703 703 + u32 tsu_thd; 714 704 u8 tlow, thigh; 715 705 716 706 err = pm_runtime_get_sync(i2c_dev->dev); ··· 866 856 867 857 if (!i2c_dev->is_curr_dma_xfer) { 868 858 if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) { 869 869 - if (i2c_dev->msg_buf_remaining) 870 870 - tegra_i2c_empty_rx_fifo(i2c_dev); 871 871 - else 872 872 - BUG(); 859 859 + if (tegra_i2c_empty_rx_fifo(i2c_dev)) { 860 860 + /* 861 861 + * Overflow error condition: message fully sent, 862 862 + * with no XFER_COMPLETE interrupt but hardware 863 863 + * asks to transfer more. 864 864 + */ 865 865 + i2c_dev->msg_err |= I2C_ERR_RX_BUFFER_OVERFLOW; 866 866 + goto err; 867 867 + } 873 868 } 874 869 875 870 if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) { ··· 900 885 if (status & I2C_INT_PACKET_XFER_COMPLETE) { 901 886 if (i2c_dev->is_curr_dma_xfer) 902 887 i2c_dev->msg_buf_remaining = 0; 903 903 - BUG_ON(i2c_dev->msg_buf_remaining); 888 888 + /* 889 889 + * Underflow error condition: XFER_COMPLETE before message 890 890 + * fully sent. 891 891 + */ 892 892 + if (WARN_ON_ONCE(i2c_dev->msg_buf_remaining)) { 893 893 + i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; 894 894 + goto err; 895 895 + } 904 896 complete(&i2c_dev->msg_complete); 905 897 } 906 898 goto done; ··· 1046 1024 } 1047 1025 1048 1026 static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, 1049 1049 - struct i2c_msg *msg, enum msg_end_type end_state) 1027 1027 + struct i2c_msg *msg, 1028 1028 + enum msg_end_type end_state) 1050 1029 { 1051 1030 u32 packet_header; 1052 1031 u32 int_mask; ··· 1184 1161 if (err) 1185 1162 return err; 1186 1163 1187 1187 - time_left = wait_for_completion_timeout( 1188 1188 - &i2c_dev->dma_complete, 1189 1189 - msecs_to_jiffies(xfer_time)); 1164 1164 + time_left = wait_for_completion_timeout(&i2c_dev->dma_complete, 1165 1165 + msecs_to_jiffies(xfer_time)); 1190 1166 if (time_left == 0) { 1191 1167 dev_err(i2c_dev->dev, "DMA transfer timeout\n"); 1192 1168 dmaengine_terminate_sync(i2c_dev->msg_read ? ··· 1247 1225 } 1248 1226 1249 1227 static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], 1250 1250 - int num) 1228 1228 + int num) 1251 1229 { 1252 1230 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); 1253 1231 int i; 1254 1254 - int ret = 0; 1232 1232 + int ret; 1255 1233 1256 1234 ret = pm_runtime_get_sync(i2c_dev->dev); 1257 1235 if (ret < 0) { ··· 1293 1271 { 1294 1272 struct device_node *np = i2c_dev->dev->of_node; 1295 1273 int ret; 1274 1274 + bool multi_mode; 1296 1275 1297 1276 ret = of_property_read_u32(np, "clock-frequency", 1298 1298 - &i2c_dev->bus_clk_rate); 1277 1277 + &i2c_dev->bus_clk_rate); 1299 1278 if (ret) 1300 1279 i2c_dev->bus_clk_rate = 100000; /* default clock rate */ 1301 1280 1302 1302 - i2c_dev->is_multimaster_mode = of_property_read_bool(np, 1303 1303 - "multi-master"); 1281 1281 + multi_mode = of_property_read_bool(np, "multi-master"); 1282 1282 + i2c_dev->is_multimaster_mode = multi_mode; 1304 1283 } 1305 1284 1306 1285 static const struct i2c_algorithm tegra_i2c_algo = { ··· 1523 1500 void __iomem *base; 1524 1501 phys_addr_t base_phys; 1525 1502 int irq; 1526 1526 - int ret = 0; 1503 1503 + int ret; 1527 1504 1528 1505 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1529 1506 base_phys = res->start; ··· 1540 1517 1541 1518 div_clk = devm_clk_get(&pdev->dev, "div-clk"); 1542 1519 if (IS_ERR(div_clk)) { 1543 1543 - dev_err(&pdev->dev, "missing controller clock\n"); 1520 1520 + if (PTR_ERR(div_clk) != -EPROBE_DEFER) 1521 1521 + dev_err(&pdev->dev, "missing controller clock\n"); 1522 1522 + 1544 1523 return PTR_ERR(div_clk); 1545 1524 } 1546 1525 ··· 1647 1622 } 1648 1623 1649 1624 ret = devm_request_irq(&pdev->dev, i2c_dev->irq, 1650 1650 - tegra_i2c_isr, 0, dev_name(&pdev->dev), i2c_dev); 1625 1625 + tegra_i2c_isr, 0, dev_name(&pdev->dev), i2c_dev); 1651 1626 if (ret) { 1652 1627 dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq); 1653 1628 goto release_dma; ··· 1712 1687 } 1713 1688 1714 1689 #ifdef CONFIG_PM_SLEEP 1690 1690 + static int tegra_i2c_suspend(struct device *dev) 1691 1691 + { 1692 1692 + struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); 1693 1693 + 1694 1694 + i2c_mark_adapter_suspended(&i2c_dev->adapter); 1695 1695 + 1696 1696 + return 0; 1697 1697 + } 1698 1698 + 1699 1699 + static int tegra_i2c_resume(struct device *dev) 1700 1700 + { 1701 1701 + struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); 1702 1702 + int err; 1703 1703 + 1704 1704 + err = tegra_i2c_init(i2c_dev, false); 1705 1705 + if (err) 1706 1706 + return err; 1707 1707 + 1708 1708 + i2c_mark_adapter_resumed(&i2c_dev->adapter); 1709 1709 + 1710 1710 + return 0; 1711 1711 + } 1712 1712 + 1715 1713 static const struct dev_pm_ops tegra_i2c_pm = { 1714 1714 + SET_SYSTEM_SLEEP_PM_OPS(tegra_i2c_suspend, tegra_i2c_resume) 1716 1715 SET_RUNTIME_PM_OPS(tegra_i2c_runtime_suspend, tegra_i2c_runtime_resume, 1717 1716 NULL) 1718 1717 }; 1718 1718 + 1719 1719 #define TEGRA_I2C_PM (&tegra_i2c_pm) 1720 1720 #else 1721 1721 #define TEGRA_I2C_PM NULL

+41 -17

drivers/i2c/i2c-core-acpi.c

reviewed

··· 132 132 return 0; 133 133 } 134 134 135 135 + static int i2c_acpi_add_resource(struct acpi_resource *ares, void *data) 136 136 + { 137 137 + int *irq = data; 138 138 + struct resource r; 139 139 + 140 140 + if (*irq <= 0 && acpi_dev_resource_interrupt(ares, 0, &r)) 141 141 + *irq = i2c_dev_irq_from_resources(&r, 1); 142 142 + 143 143 + return 1; /* No need to add resource to the list */ 144 144 + } 145 145 + 146 146 + /** 147 147 + * i2c_acpi_get_irq - get device IRQ number from ACPI 148 148 + * @client: Pointer to the I2C client device 149 149 + * 150 150 + * Find the IRQ number used by a specific client device. 151 151 + * 152 152 + * Return: The IRQ number or an error code. 153 153 + */ 154 154 + int i2c_acpi_get_irq(struct i2c_client *client) 155 155 + { 156 156 + struct acpi_device *adev = ACPI_COMPANION(&client->dev); 157 157 + struct list_head resource_list; 158 158 + int irq = -ENOENT; 159 159 + int ret; 160 160 + 161 161 + INIT_LIST_HEAD(&resource_list); 162 162 + 163 163 + ret = acpi_dev_get_resources(adev, &resource_list, 164 164 + i2c_acpi_add_resource, &irq); 165 165 + if (ret < 0) 166 166 + return ret; 167 167 + 168 168 + acpi_dev_free_resource_list(&resource_list); 169 169 + 170 170 + if (irq == -ENOENT) 171 171 + irq = acpi_dev_gpio_irq_get(adev, 0); 172 172 + 173 173 + return irq; 174 174 + } 175 175 + 135 176 static int i2c_acpi_get_info(struct acpi_device *adev, 136 177 struct i2c_board_info *info, 137 178 struct i2c_adapter *adapter, 138 179 acpi_handle *adapter_handle) 139 180 { 140 140 - struct list_head resource_list; 141 141 - struct resource_entry *entry; 142 181 struct i2c_acpi_lookup lookup; 143 182 int ret; 144 183 ··· 210 171 info->fwnode = acpi_fwnode_handle(adev); 211 172 if (adapter_handle) 212 173 *adapter_handle = lookup.adapter_handle; 213 213 - 214 214 - /* Then fill IRQ number if any */ 215 215 - INIT_LIST_HEAD(&resource_list); 216 216 - ret = acpi_dev_get_resources(adev, &resource_list, NULL, NULL); 217 217 - if (ret < 0) 218 218 - return -EINVAL; 219 219 - 220 220 - resource_list_for_each_entry(entry, &resource_list) { 221 221 - if (resource_type(entry->res) == IORESOURCE_IRQ) { 222 222 - info->irq = entry->res->start; 223 223 - break; 224 224 - } 225 225 - } 226 226 - 227 227 - acpi_dev_free_resource_list(&resource_list); 228 174 229 175 acpi_set_modalias(adev, dev_name(&adev->dev), info->type, 230 176 sizeof(info->type));

+10 -10

drivers/i2c/i2c-core-base.c

reviewed

··· 314 314 315 315 driver = to_i2c_driver(dev->driver); 316 316 317 317 + client->irq = client->init_irq; 318 318 + 317 319 if (!client->irq && !driver->disable_i2c_core_irq_mapping) { 318 320 int irq = -ENOENT; 319 321 ··· 329 327 if (irq == -EINVAL || irq == -ENODATA) 330 328 irq = of_irq_get(dev->of_node, 0); 331 329 } else if (ACPI_COMPANION(dev)) { 332 332 - irq = acpi_dev_gpio_irq_get(ACPI_COMPANION(dev), 0); 330 330 + irq = i2c_acpi_get_irq(client); 333 331 } 334 332 if (irq == -EPROBE_DEFER) 335 333 return irq; ··· 426 424 dev_pm_clear_wake_irq(&client->dev); 427 425 device_init_wakeup(&client->dev, false); 428 426 429 429 - client->irq = client->init_irq; 427 427 + client->irq = 0; 430 428 if (client->flags & I2C_CLIENT_HOST_NOTIFY) 431 429 pm_runtime_put(&client->adapter->dev); 432 430 ··· 681 679 i2c_encode_flags_to_addr(client)); 682 680 } 683 681 684 684 - static int i2c_dev_irq_from_resources(const struct resource *resources, 685 685 - unsigned int num_resources) 682 682 + int i2c_dev_irq_from_resources(const struct resource *resources, 683 683 + unsigned int num_resources) 686 684 { 687 685 struct irq_data *irqd; 688 686 int i; ··· 723 721 * This returns the new i2c client, which may be saved for later use with 724 722 * i2c_unregister_device(); or an ERR_PTR to describe the error. 725 723 */ 726 726 - static struct i2c_client * 724 724 + struct i2c_client * 727 725 i2c_new_client_device(struct i2c_adapter *adap, struct i2c_board_info const *info) 728 726 { 729 727 struct i2c_client *client; ··· 743 741 if (!client->init_irq) 744 742 client->init_irq = i2c_dev_irq_from_resources(info->resources, 745 743 info->num_resources); 746 746 - client->irq = client->init_irq; 747 744 748 745 strlcpy(client->name, info->type, sizeof(client->name)); 749 746 ··· 888 887 * This returns the new i2c client, which should be saved for later use with 889 888 * i2c_unregister_device(); or an ERR_PTR to describe the error. 890 889 */ 891 891 - static struct i2c_client * 892 892 - i2c_new_dummy_device(struct i2c_adapter *adapter, u16 address) 890 890 + struct i2c_client *i2c_new_dummy_device(struct i2c_adapter *adapter, u16 address) 893 891 { 894 892 struct i2c_board_info info = { 895 893 I2C_BOARD_INFO("dummy", address), ··· 1663 1663 1664 1664 /* ------------------------------------------------------------------------- */ 1665 1665 1666 1666 - int i2c_for_each_dev(void *data, int (*fn)(struct device *, void *)) 1666 1666 + int i2c_for_each_dev(void *data, int (*fn)(struct device *dev, void *data)) 1667 1667 { 1668 1668 int res; 1669 1669 ··· 2276 2276 i2c_new_probed_device(struct i2c_adapter *adap, 2277 2277 struct i2c_board_info *info, 2278 2278 unsigned short const *addr_list, 2279 2279 - int (*probe)(struct i2c_adapter *, unsigned short addr)) 2279 2279 + int (*probe)(struct i2c_adapter *adap, unsigned short addr)) 2280 2280 { 2281 2281 int i; 2282 2282

+1

drivers/i2c/i2c-core-of.c

reviewed

··· 15 15 #include <linux/module.h> 16 16 #include <linux/of.h> 17 17 #include <linux/of_device.h> 18 18 + #include <linux/sysfs.h> 18 19 19 20 #include "i2c-core.h" 20 21

+9

drivers/i2c/i2c-core.h

reviewed

··· 19 19 extern int __i2c_first_dynamic_bus_num; 20 20 21 21 int i2c_check_7bit_addr_validity_strict(unsigned short addr); 22 22 + int i2c_dev_irq_from_resources(const struct resource *resources, 23 23 + unsigned int num_resources); 22 24 23 25 /* 24 26 * We only allow atomic transfers for very late communication, e.g. to send ··· 63 61 i2c_acpi_match_device(const struct acpi_device_id *matches, 64 62 struct i2c_client *client); 65 63 void i2c_acpi_register_devices(struct i2c_adapter *adap); 64 64 + 65 65 + int i2c_acpi_get_irq(struct i2c_client *client); 66 66 #else /* CONFIG_ACPI */ 67 67 static inline void i2c_acpi_register_devices(struct i2c_adapter *adap) { } 68 68 static inline const struct acpi_device_id * ··· 72 68 struct i2c_client *client) 73 69 { 74 70 return NULL; 71 71 + } 72 72 + 73 73 + static inline int i2c_acpi_get_irq(struct i2c_client *client) 74 74 + { 75 75 + return 0; 75 76 } 76 77 #endif /* CONFIG_ACPI */ 77 78 extern struct notifier_block i2c_acpi_notifier;

+2 -2

drivers/i2c/i2c-mux.c

reviewed

··· 26 26 #include <linux/module.h> 27 27 #include <linux/of.h> 28 28 #include <linux/slab.h> 29 29 + #include <linux/sysfs.h> 29 30 30 31 /* multiplexer per channel data */ 31 32 struct i2c_mux_priv { ··· 244 243 { 245 244 struct i2c_mux_core *muxc; 246 245 247 247 - muxc = devm_kzalloc(dev, sizeof(*muxc) 248 248 - + max_adapters * sizeof(muxc->adapter[0]) 246 246 + muxc = devm_kzalloc(dev, struct_size(muxc, adapter, max_adapters) 249 247 + sizeof_priv, GFP_KERNEL); 250 248 if (!muxc) 251 249 return NULL;

+27 -52

drivers/i2c/muxes/i2c-arb-gpio-challenge.c

reviewed

··· 6 6 */ 7 7 8 8 #include <linux/delay.h> 9 9 - #include <linux/gpio.h> 9 9 + #include <linux/gpio/consumer.h> 10 10 #include <linux/kernel.h> 11 11 #include <linux/i2c.h> 12 12 #include <linux/i2c-mux.h> 13 13 #include <linux/module.h> 14 14 - #include <linux/of_gpio.h> 15 14 #include <linux/platform_device.h> 16 15 #include <linux/slab.h> 17 16 ··· 18 19 /** 19 20 * struct i2c_arbitrator_data - Driver data for I2C arbitrator 20 21 * 21 21 - * @our_gpio: GPIO we'll use to claim. 22 22 - * @our_gpio_release: 0 if active high; 1 if active low; AKA if the GPIO == 23 23 - * this then consider it released. 24 24 - * @their_gpio: GPIO that the other side will use to claim. 25 25 - * @their_gpio_release: 0 if active high; 1 if active low; AKA if the GPIO == 26 26 - * this then consider it released. 22 22 + * @our_gpio: GPIO descriptor we'll use to claim. 23 23 + * @their_gpio: GPIO descriptor that the other side will use to claim. 27 24 * @slew_delay_us: microseconds to wait for a GPIO to go high. 28 25 * @wait_retry_us: we'll attempt another claim after this many microseconds. 29 26 * @wait_free_us: we'll give up after this many microseconds. 30 27 */ 31 28 32 29 struct i2c_arbitrator_data { 33 33 - int our_gpio; 34 34 - int our_gpio_release; 35 35 - int their_gpio; 36 36 - int their_gpio_release; 30 30 + struct gpio_desc *our_gpio; 31 31 + struct gpio_desc *their_gpio; 37 32 unsigned int slew_delay_us; 38 33 unsigned int wait_retry_us; 39 34 unsigned int wait_free_us; ··· 48 55 stop_time = jiffies + usecs_to_jiffies(arb->wait_free_us) + 1; 49 56 do { 50 57 /* Indicate that we want to claim the bus */ 51 51 - gpio_set_value(arb->our_gpio, !arb->our_gpio_release); 58 58 + gpiod_set_value(arb->our_gpio, 1); 52 59 udelay(arb->slew_delay_us); 53 60 54 61 /* Wait for the other master to release it */ 55 62 stop_retry = jiffies + usecs_to_jiffies(arb->wait_retry_us) + 1; 56 63 while (time_before(jiffies, stop_retry)) { 57 57 - int gpio_val = !!gpio_get_value(arb->their_gpio); 64 64 + int gpio_val = gpiod_get_value(arb->their_gpio); 58 65 59 59 - if (gpio_val == arb->their_gpio_release) { 66 66 + if (!gpio_val) { 60 67 /* We got it, so return */ 61 68 return 0; 62 69 } ··· 65 72 } 66 73 67 74 /* It didn't release, so give up, wait, and try again */ 68 68 - gpio_set_value(arb->our_gpio, arb->our_gpio_release); 75 75 + gpiod_set_value(arb->our_gpio, 0); 69 76 70 77 usleep_range(arb->wait_retry_us, arb->wait_retry_us * 2); 71 78 } while (time_before(jiffies, stop_time)); 72 79 73 80 /* Give up, release our claim */ 74 74 - gpio_set_value(arb->our_gpio, arb->our_gpio_release); 81 81 + gpiod_set_value(arb->our_gpio, 0); 75 82 udelay(arb->slew_delay_us); 76 83 dev_err(muxc->dev, "Could not claim bus, timeout\n"); 77 84 return -EBUSY; ··· 87 94 const struct i2c_arbitrator_data *arb = i2c_mux_priv(muxc); 88 95 89 96 /* Release the bus and wait for the other master to notice */ 90 90 - gpio_set_value(arb->our_gpio, arb->our_gpio_release); 97 97 + gpiod_set_value(arb->our_gpio, 0); 91 98 udelay(arb->slew_delay_us); 92 99 93 100 return 0; ··· 100 107 struct device_node *parent_np; 101 108 struct i2c_mux_core *muxc; 102 109 struct i2c_arbitrator_data *arb; 103 103 - enum of_gpio_flags gpio_flags; 104 104 - unsigned long out_init; 110 110 + struct gpio_desc *dummy; 105 111 int ret; 106 112 107 113 /* We only support probing from device tree; no platform_data */ ··· 121 129 122 130 platform_set_drvdata(pdev, muxc); 123 131 124 124 - /* Request GPIOs */ 125 125 - ret = of_get_named_gpio_flags(np, "our-claim-gpio", 0, &gpio_flags); 126 126 - if (!gpio_is_valid(ret)) { 127 127 - if (ret != -EPROBE_DEFER) 128 128 - dev_err(dev, "Error getting our-claim-gpio\n"); 129 129 - return ret; 130 130 - } 131 131 - arb->our_gpio = ret; 132 132 - arb->our_gpio_release = !!(gpio_flags & OF_GPIO_ACTIVE_LOW); 133 133 - out_init = (gpio_flags & OF_GPIO_ACTIVE_LOW) ? 134 134 - GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; 135 135 - ret = devm_gpio_request_one(dev, arb->our_gpio, out_init, 136 136 - "our-claim-gpio"); 137 137 - if (ret) { 138 138 - if (ret != -EPROBE_DEFER) 139 139 - dev_err(dev, "Error requesting our-claim-gpio\n"); 140 140 - return ret; 132 132 + /* Request GPIOs, our GPIO as unclaimed to begin with */ 133 133 + arb->our_gpio = devm_gpiod_get(dev, "our-claim", GPIOD_OUT_LOW); 134 134 + if (IS_ERR(arb->our_gpio)) { 135 135 + dev_err(dev, "could not get \"our-claim\" GPIO (%ld)\n", 136 136 + PTR_ERR(arb->our_gpio)); 137 137 + return PTR_ERR(arb->our_gpio); 141 138 } 142 139 143 143 - ret = of_get_named_gpio_flags(np, "their-claim-gpios", 0, &gpio_flags); 144 144 - if (!gpio_is_valid(ret)) { 145 145 - if (ret != -EPROBE_DEFER) 146 146 - dev_err(dev, "Error getting their-claim-gpio\n"); 147 147 - return ret; 148 148 - } 149 149 - arb->their_gpio = ret; 150 150 - arb->their_gpio_release = !!(gpio_flags & OF_GPIO_ACTIVE_LOW); 151 151 - ret = devm_gpio_request_one(dev, arb->their_gpio, GPIOF_IN, 152 152 - "their-claim-gpio"); 153 153 - if (ret) { 154 154 - if (ret != -EPROBE_DEFER) 155 155 - dev_err(dev, "Error requesting their-claim-gpio\n"); 156 156 - return ret; 140 140 + arb->their_gpio = devm_gpiod_get(dev, "their-claim", GPIOD_IN); 141 141 + if (IS_ERR(arb->their_gpio)) { 142 142 + dev_err(dev, "could not get \"their-claim\" GPIO (%ld)\n", 143 143 + PTR_ERR(arb->their_gpio)); 144 144 + return PTR_ERR(arb->their_gpio); 157 145 } 158 146 159 147 /* At the moment we only support a single two master (us + 1 other) */ 160 160 - if (gpio_is_valid(of_get_named_gpio(np, "their-claim-gpios", 1))) { 148 148 + dummy = devm_gpiod_get_index(dev, "their-claim", 1, GPIOD_IN); 149 149 + if (!IS_ERR(dummy)) { 161 150 dev_err(dev, "Only one other master is supported\n"); 162 151 return -EINVAL; 152 152 + } else if (PTR_ERR(dummy) == -EPROBE_DEFER) { 153 153 + return -EPROBE_DEFER; 163 154 } 164 155 165 156 /* Arbitration parameters */

+29 -85

drivers/i2c/muxes/i2c-mux-gpio.c

reviewed

··· 11 11 #include <linux/platform_device.h> 12 12 #include <linux/module.h> 13 13 #include <linux/slab.h> 14 14 - #include <linux/gpio.h> 14 14 + #include <linux/bits.h> 15 15 + #include <linux/gpio/consumer.h> 16 16 + /* FIXME: stop poking around inside gpiolib */ 15 17 #include "../../gpio/gpiolib.h" 16 16 - #include <linux/of_gpio.h> 17 18 18 19 struct gpiomux { 19 20 struct i2c_mux_gpio_platform_data data; 20 20 - unsigned gpio_base; 21 21 + int ngpios; 21 22 struct gpio_desc **gpios; 22 23 }; 23 24 ··· 28 27 29 28 values[0] = val; 30 29 31 31 - gpiod_set_array_value_cansleep(mux->data.n_gpios, mux->gpios, NULL, 32 32 - values); 30 30 + gpiod_set_array_value_cansleep(mux->ngpios, mux->gpios, NULL, values); 33 31 } 34 32 35 33 static int i2c_mux_gpio_select(struct i2c_mux_core *muxc, u32 chan) ··· 49 49 return 0; 50 50 } 51 51 52 52 - static int match_gpio_chip_by_label(struct gpio_chip *chip, 53 53 - void *data) 54 54 - { 55 55 - return !strcmp(chip->label, data); 56 56 - } 57 57 - 58 52 #ifdef CONFIG_OF 59 53 static int i2c_mux_gpio_probe_dt(struct gpiomux *mux, 60 54 struct platform_device *pdev) ··· 56 62 struct device_node *np = pdev->dev.of_node; 57 63 struct device_node *adapter_np, *child; 58 64 struct i2c_adapter *adapter; 59 59 - unsigned *values, *gpios; 60 60 - int i = 0, ret; 65 65 + unsigned *values; 66 66 + int i = 0; 61 67 62 68 if (!np) 63 69 return -ENODEV; ··· 94 100 if (of_property_read_u32(np, "idle-state", &mux->data.idle)) 95 101 mux->data.idle = I2C_MUX_GPIO_NO_IDLE; 96 102 97 97 - mux->data.n_gpios = of_gpio_named_count(np, "mux-gpios"); 98 98 - if (mux->data.n_gpios < 0) { 99 99 - dev_err(&pdev->dev, "Missing mux-gpios property in the DT.\n"); 100 100 - return -EINVAL; 101 101 - } 102 102 - 103 103 - gpios = devm_kcalloc(&pdev->dev, 104 104 - mux->data.n_gpios, sizeof(*mux->data.gpios), 105 105 - GFP_KERNEL); 106 106 - if (!gpios) { 107 107 - dev_err(&pdev->dev, "Cannot allocate gpios array"); 108 108 - return -ENOMEM; 109 109 - } 110 110 - 111 111 - for (i = 0; i < mux->data.n_gpios; i++) { 112 112 - ret = of_get_named_gpio(np, "mux-gpios", i); 113 113 - if (ret < 0) 114 114 - return ret; 115 115 - gpios[i] = ret; 116 116 - } 117 117 - 118 118 - mux->data.gpios = gpios; 119 119 - 120 103 return 0; 121 104 } 122 105 #else ··· 110 139 struct gpiomux *mux; 111 140 struct i2c_adapter *parent; 112 141 struct i2c_adapter *root; 113 113 - unsigned initial_state, gpio_base; 114 114 - int i, ret; 142 142 + unsigned initial_state; 143 143 + int i, ngpios, ret; 115 144 116 145 mux = devm_kzalloc(&pdev->dev, sizeof(*mux), GFP_KERNEL); 117 146 if (!mux) ··· 126 155 sizeof(mux->data)); 127 156 } 128 157 129 129 - /* 130 130 - * If a GPIO chip name is provided, the GPIO pin numbers provided are 131 131 - * relative to its base GPIO number. Otherwise they are absolute. 132 132 - */ 133 133 - if (mux->data.gpio_chip) { 134 134 - struct gpio_chip *gpio; 135 135 - 136 136 - gpio = gpiochip_find(mux->data.gpio_chip, 137 137 - match_gpio_chip_by_label); 138 138 - if (!gpio) 139 139 - return -EPROBE_DEFER; 140 140 - 141 141 - gpio_base = gpio->base; 142 142 - } else { 143 143 - gpio_base = 0; 158 158 + ngpios = gpiod_count(&pdev->dev, "mux"); 159 159 + if (ngpios <= 0) { 160 160 + dev_err(&pdev->dev, "no valid gpios provided\n"); 161 161 + return ngpios ?: -EINVAL; 144 162 } 163 163 + mux->ngpios = ngpios; 145 164 146 165 parent = i2c_get_adapter(mux->data.parent); 147 166 if (!parent) 148 167 return -EPROBE_DEFER; 149 168 150 169 muxc = i2c_mux_alloc(parent, &pdev->dev, mux->data.n_values, 151 151 - mux->data.n_gpios * sizeof(*mux->gpios), 0, 170 170 + ngpios * sizeof(*mux->gpios), 0, 152 171 i2c_mux_gpio_select, NULL); 153 172 if (!muxc) { 154 173 ret = -ENOMEM; ··· 152 191 root = i2c_root_adapter(&parent->dev); 153 192 154 193 muxc->mux_locked = true; 155 155 - mux->gpio_base = gpio_base; 156 194 157 195 if (mux->data.idle != I2C_MUX_GPIO_NO_IDLE) { 158 196 initial_state = mux->data.idle; ··· 160 200 initial_state = mux->data.values[0]; 161 201 } 162 202 163 163 - for (i = 0; i < mux->data.n_gpios; i++) { 203 203 + for (i = 0; i < ngpios; i++) { 164 204 struct device *gpio_dev; 165 165 - struct gpio_desc *gpio_desc; 205 205 + struct gpio_desc *gpiod; 206 206 + enum gpiod_flags flag; 166 207 167 167 - ret = gpio_request(gpio_base + mux->data.gpios[i], "i2c-mux-gpio"); 168 168 - if (ret) { 169 169 - dev_err(&pdev->dev, "Failed to request GPIO %d\n", 170 170 - mux->data.gpios[i]); 171 171 - goto err_request_gpio; 208 208 + if (initial_state & BIT(i)) 209 209 + flag = GPIOD_OUT_HIGH; 210 210 + else 211 211 + flag = GPIOD_OUT_LOW; 212 212 + gpiod = devm_gpiod_get_index(&pdev->dev, "mux", i, flag); 213 213 + if (IS_ERR(gpiod)) { 214 214 + ret = PTR_ERR(gpiod); 215 215 + goto alloc_failed; 172 216 } 173 217 174 174 - ret = gpio_direction_output(gpio_base + mux->data.gpios[i], 175 175 - initial_state & (1 << i)); 176 176 - if (ret) { 177 177 - dev_err(&pdev->dev, 178 178 - "Failed to set direction of GPIO %d to output\n", 179 179 - mux->data.gpios[i]); 180 180 - i++; /* gpio_request above succeeded, so must free */ 181 181 - goto err_request_gpio; 182 182 - } 183 183 - 184 184 - gpio_desc = gpio_to_desc(gpio_base + mux->data.gpios[i]); 185 185 - mux->gpios[i] = gpio_desc; 218 218 + mux->gpios[i] = gpiod; 186 219 187 220 if (!muxc->mux_locked) 188 221 continue; 189 222 190 190 - gpio_dev = &gpio_desc->gdev->dev; 223 223 + /* FIXME: find a proper way to access the GPIO device */ 224 224 + gpio_dev = &gpiod->gdev->dev; 191 225 muxc->mux_locked = i2c_root_adapter(gpio_dev) == root; 192 226 } 193 227 ··· 204 250 205 251 add_adapter_failed: 206 252 i2c_mux_del_adapters(muxc); 207 207 - i = mux->data.n_gpios; 208 208 - err_request_gpio: 209 209 - for (; i > 0; i--) 210 210 - gpio_free(gpio_base + mux->data.gpios[i - 1]); 211 253 alloc_failed: 212 254 i2c_put_adapter(parent); 213 255 ··· 213 263 static int i2c_mux_gpio_remove(struct platform_device *pdev) 214 264 { 215 265 struct i2c_mux_core *muxc = platform_get_drvdata(pdev); 216 216 - struct gpiomux *mux = i2c_mux_priv(muxc); 217 217 - int i; 218 266 219 267 i2c_mux_del_adapters(muxc); 220 220 - 221 221 - for (i = 0; i < mux->data.n_gpios; i++) 222 222 - gpio_free(mux->gpio_base + mux->data.gpios[i]); 223 223 - 224 268 i2c_put_adapter(muxc->parent); 225 269 226 270 return 0;

+2 -3

drivers/i2c/muxes/i2c-mux-pinctrl.c

reviewed

··· 16 16 17 17 struct i2c_mux_pinctrl { 18 18 struct pinctrl *pinctrl; 19 19 - struct pinctrl_state **states; 19 19 + struct pinctrl_state *states[]; 20 20 }; 21 21 22 22 static int i2c_mux_pinctrl_select(struct i2c_mux_core *muxc, u32 chan) ··· 93 93 return PTR_ERR(parent); 94 94 95 95 muxc = i2c_mux_alloc(parent, dev, num_names, 96 96 - sizeof(*mux) + num_names * sizeof(*mux->states), 96 96 + struct_size(mux, states, num_names), 97 97 0, i2c_mux_pinctrl_select, NULL); 98 98 if (!muxc) { 99 99 ret = -ENOMEM; 100 100 goto err_put_parent; 101 101 } 102 102 mux = i2c_mux_priv(muxc); 103 103 - mux->states = (struct pinctrl_state **)(mux + 1); 104 103 105 104 platform_set_drvdata(pdev, muxc); 106 105

+28 -58

drivers/misc/eeprom/at24.c

reviewed

··· 507 507 return cdata; 508 508 } 509 509 510 510 - static void at24_remove_dummy_clients(struct at24_data *at24) 511 511 - { 512 512 - int i; 513 513 - 514 514 - for (i = 1; i < at24->num_addresses; i++) 515 515 - i2c_unregister_device(at24->client[i].client); 516 516 - } 517 517 - 518 510 static int at24_make_dummy_client(struct at24_data *at24, unsigned int index, 519 511 struct regmap_config *regmap_config) 520 512 { 521 513 struct i2c_client *base_client, *dummy_client; 522 522 - unsigned short int addr; 523 514 struct regmap *regmap; 524 515 struct device *dev; 525 516 526 517 base_client = at24->client[0].client; 527 518 dev = &base_client->dev; 528 528 - addr = base_client->addr + index; 529 519 530 530 - dummy_client = i2c_new_dummy(base_client->adapter, 531 531 - base_client->addr + index); 532 532 - if (!dummy_client) { 533 533 - dev_err(dev, "address 0x%02x unavailable\n", addr); 534 534 - return -EADDRINUSE; 535 535 - } 520 520 + dummy_client = devm_i2c_new_dummy_device(dev, base_client->adapter, 521 521 + base_client->addr + index); 522 522 + if (IS_ERR(dummy_client)) 523 523 + return PTR_ERR(dummy_client); 536 524 537 525 regmap = devm_regmap_init_i2c(dummy_client, regmap_config); 538 538 - if (IS_ERR(regmap)) { 539 539 - i2c_unregister_device(dummy_client); 526 526 + if (IS_ERR(regmap)) 540 527 return PTR_ERR(regmap); 541 541 - } 542 528 543 529 at24->client[index].client = dummy_client; 544 530 at24->client[index].regmap = regmap; ··· 566 580 unsigned int i, num_addresses; 567 581 struct at24_data *at24; 568 582 struct regmap *regmap; 569 569 - size_t at24_size; 570 583 bool writable; 571 584 u8 test_byte; 572 585 int err; ··· 582 597 if (err) 583 598 /* 584 599 * This is slow, but we can't know all eeproms, so we better 585 585 - * play safe. Specifying custom eeprom-types via platform_data 586 586 - * is recommended anyhow. 600 600 + * play safe. Specifying custom eeprom-types via device tree 601 601 + * or properties is recommended anyhow. 587 602 */ 588 603 page_size = 1; 589 604 ··· 649 664 if (IS_ERR(regmap)) 650 665 return PTR_ERR(regmap); 651 666 652 652 - at24_size = sizeof(*at24) + num_addresses * sizeof(struct at24_client); 653 653 - at24 = devm_kzalloc(dev, at24_size, GFP_KERNEL); 667 667 + at24 = devm_kzalloc(dev, struct_size(at24, client, num_addresses), 668 668 + GFP_KERNEL); 654 669 if (!at24) 655 670 return -ENOMEM; 656 671 ··· 678 693 /* use dummy devices for multiple-address chips */ 679 694 for (i = 1; i < num_addresses; i++) { 680 695 err = at24_make_dummy_client(at24, i, &regmap_config); 681 681 - if (err) { 682 682 - at24_remove_dummy_clients(at24); 696 696 + if (err) 683 697 return err; 684 684 - } 685 685 - } 686 686 - 687 687 - i2c_set_clientdata(client, at24); 688 688 - 689 689 - /* enable runtime pm */ 690 690 - pm_runtime_set_active(dev); 691 691 - pm_runtime_enable(dev); 692 692 - 693 693 - /* 694 694 - * Perform a one-byte test read to verify that the 695 695 - * chip is functional. 696 696 - */ 697 697 - err = at24_read(at24, 0, &test_byte, 1); 698 698 - pm_runtime_idle(dev); 699 699 - if (err) { 700 700 - err = -ENODEV; 701 701 - goto err_clients; 702 698 } 703 699 704 700 nvmem_config.name = dev_name(dev); ··· 697 731 nvmem_config.size = byte_len; 698 732 699 733 at24->nvmem = devm_nvmem_register(dev, &nvmem_config); 700 700 - if (IS_ERR(at24->nvmem)) { 701 701 - err = PTR_ERR(at24->nvmem); 702 702 - goto err_clients; 734 734 + if (IS_ERR(at24->nvmem)) 735 735 + return PTR_ERR(at24->nvmem); 736 736 + 737 737 + i2c_set_clientdata(client, at24); 738 738 + 739 739 + /* enable runtime pm */ 740 740 + pm_runtime_set_active(dev); 741 741 + pm_runtime_enable(dev); 742 742 + 743 743 + /* 744 744 + * Perform a one-byte test read to verify that the 745 745 + * chip is functional. 746 746 + */ 747 747 + err = at24_read(at24, 0, &test_byte, 1); 748 748 + pm_runtime_idle(dev); 749 749 + if (err) { 750 750 + pm_runtime_disable(dev); 751 751 + return -ENODEV; 703 752 } 704 753 705 754 dev_info(dev, "%u byte %s EEPROM, %s, %u bytes/write\n", ··· 722 741 writable ? "writable" : "read-only", at24->write_max); 723 742 724 743 return 0; 725 725 - 726 726 - err_clients: 727 727 - at24_remove_dummy_clients(at24); 728 728 - pm_runtime_disable(dev); 729 729 - 730 730 - return err; 731 744 } 732 745 733 746 static int at24_remove(struct i2c_client *client) 734 747 { 735 735 - struct at24_data *at24; 736 736 - 737 737 - at24 = i2c_get_clientdata(client); 738 738 - 739 739 - at24_remove_dummy_clients(at24); 740 748 pm_runtime_disable(&client->dev); 741 749 pm_runtime_set_suspended(&client->dev); 742 750

+1

drivers/platform/x86/dell-smo8800.c

reviewed

··· 198 198 return 0; 199 199 } 200 200 201 201 + /* NOTE: Keep this list in sync with drivers/i2c/busses/i2c-i801.c */ 201 202 static const struct acpi_device_id smo8800_ids[] = { 202 203 { "SMO8800", 0 }, 203 204 { "SMO8801", 0 },

+10

drivers/usb/typec/ucsi/ucsi.c

reviewed

··· 206 206 207 207 return ret; 208 208 } 209 209 + EXPORT_SYMBOL_GPL(ucsi_send_command); 209 210 211 211 + int ucsi_resume(struct ucsi *ucsi) 212 212 + { 213 213 + struct ucsi_control ctrl; 214 214 + 215 215 + /* Restore UCSI notification enable mask after system resume */ 216 216 + UCSI_CMD_SET_NTFY_ENABLE(ctrl, UCSI_ENABLE_NTFY_ALL); 217 217 + return ucsi_send_command(ucsi, &ctrl, NULL, 0); 218 218 + } 219 219 + EXPORT_SYMBOL_GPL(ucsi_resume); 210 220 /* -------------------------------------------------------------------------- */ 211 221 212 222 void ucsi_altmode_update_active(struct ucsi_connector *con)

+1

drivers/usb/typec/ucsi/ucsi.h

reviewed

··· 430 430 void *retval, size_t size); 431 431 432 432 void ucsi_altmode_update_active(struct ucsi_connector *con); 433 433 + int ucsi_resume(struct ucsi *ucsi); 433 434 434 435 #if IS_ENABLED(CONFIG_TYPEC_DP_ALTMODE) 435 436 struct typec_altmode *

+114 -4

drivers/usb/typec/ucsi/ucsi_ccg.c

reviewed

··· 14 14 #include <linux/module.h> 15 15 #include <linux/pci.h> 16 16 #include <linux/platform_device.h> 17 17 + #include <linux/pm.h> 18 18 + #include <linux/pm_runtime.h> 17 19 18 20 #include <asm/unaligned.h> 19 21 #include "ucsi.h" ··· 109 107 __le16 build; 110 108 u8 patch; 111 109 u8 ver; 110 110 + #define CCG_VERSION_PATCH(x) ((x) << 16) 111 111 + #define CCG_VERSION(x) ((x) << 24) 112 112 #define CCG_VERSION_MIN_SHIFT (0) 113 113 #define CCG_VERSION_MIN_MASK (0xf << CCG_VERSION_MIN_SHIFT) 114 114 #define CCG_VERSION_MAJ_SHIFT (4) 115 115 #define CCG_VERSION_MAJ_MASK (0xf << CCG_VERSION_MAJ_SHIFT) 116 116 } __packed; 117 117 + 118 118 + /* 119 119 + * Firmware version 3.1.10 or earlier, built for NVIDIA has known issue 120 120 + * of missing interrupt when a device is connected for runtime resume 121 121 + */ 122 122 + #define CCG_FW_BUILD_NVIDIA (('n' << 8) | 'v') 123 123 + #define CCG_OLD_FW_VERSION (CCG_VERSION(0x31) | CCG_VERSION_PATCH(10)) 117 124 118 125 struct version_info { 119 126 struct version_format base; ··· 181 170 struct ccg_dev_info info; 182 171 /* version info for boot, primary and secondary */ 183 172 struct version_info version[FW2 + 1]; 173 173 + u32 fw_version; 184 174 /* CCG HPI communication flags */ 185 175 unsigned long flags; 186 176 #define RESET_PENDING 0 ··· 195 183 196 184 /* fw build with vendor information */ 197 185 u16 fw_build; 186 186 + bool run_isr; /* flag to call ISR routine during resume */ 187 187 + struct work_struct pm_work; 198 188 }; 199 189 200 190 static int ccg_read(struct ucsi_ccg *uc, u16 rab, u8 *data, u32 len) ··· 224 210 if (quirks && quirks->max_read_len) 225 211 max_read_len = quirks->max_read_len; 226 212 213 213 + if (uc->fw_build == CCG_FW_BUILD_NVIDIA && 214 214 + uc->fw_version <= CCG_OLD_FW_VERSION) { 215 215 + mutex_lock(&uc->lock); 216 216 + /* 217 217 + * Do not schedule pm_work to run ISR in 218 218 + * ucsi_ccg_runtime_resume() after pm_runtime_get_sync() 219 219 + * since we are already in ISR path. 220 220 + */ 221 221 + uc->run_isr = false; 222 222 + mutex_unlock(&uc->lock); 223 223 + } 224 224 + 225 225 + pm_runtime_get_sync(uc->dev); 227 226 while (rem_len > 0) { 228 227 msgs[1].buf = &data[len - rem_len]; 229 228 rlen = min_t(u16, rem_len, max_read_len); ··· 245 218 status = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 246 219 if (status < 0) { 247 220 dev_err(uc->dev, "i2c_transfer failed %d\n", status); 221 221 + pm_runtime_put_sync(uc->dev); 248 222 return status; 249 223 } 250 224 rab += rlen; 251 225 rem_len -= rlen; 252 226 } 253 227 228 228 + pm_runtime_put_sync(uc->dev); 254 229 return 0; 255 230 } 256 231 ··· 278 249 msgs[0].len = len + sizeof(rab); 279 250 msgs[0].buf = buf; 280 251 252 252 + if (uc->fw_build == CCG_FW_BUILD_NVIDIA && 253 253 + uc->fw_version <= CCG_OLD_FW_VERSION) { 254 254 + mutex_lock(&uc->lock); 255 255 + /* 256 256 + * Do not schedule pm_work to run ISR in 257 257 + * ucsi_ccg_runtime_resume() after pm_runtime_get_sync() 258 258 + * since we are already in ISR path. 259 259 + */ 260 260 + uc->run_isr = false; 261 261 + mutex_unlock(&uc->lock); 262 262 + } 263 263 + 264 264 + pm_runtime_get_sync(uc->dev); 281 265 status = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 282 266 if (status < 0) { 283 267 dev_err(uc->dev, "i2c_transfer failed %d\n", status); 268 268 + pm_runtime_put_sync(uc->dev); 284 269 kfree(buf); 285 270 return status; 286 271 } 287 272 273 273 + pm_runtime_put_sync(uc->dev); 288 274 kfree(buf); 289 275 return 0; 290 276 } ··· 419 375 return IRQ_HANDLED; 420 376 } 421 377 378 378 + static void ccg_pm_workaround_work(struct work_struct *pm_work) 379 379 + { 380 380 + struct ucsi_ccg *uc = container_of(pm_work, struct ucsi_ccg, pm_work); 381 381 + 382 382 + ucsi_notify(uc->ucsi); 383 383 + } 384 384 + 422 385 static int get_fw_info(struct ucsi_ccg *uc) 423 386 { 424 387 int err; ··· 434 383 sizeof(uc->version)); 435 384 if (err < 0) 436 385 return err; 386 386 + 387 387 + uc->fw_version = CCG_VERSION(uc->version[FW2].app.ver) | 388 388 + CCG_VERSION_PATCH(uc->version[FW2].app.patch); 437 389 438 390 err = ccg_read(uc, CCGX_RAB_DEVICE_MODE, (u8 *)(&uc->info), 439 391 sizeof(uc->info)); ··· 786 732 } 787 733 788 734 /* compare input version with FWCT version */ 789 789 - cur_version = le16_to_cpu(app->build) | app->patch << 16 | 790 790 - app->ver << 24; 735 735 + cur_version = le16_to_cpu(app->build) | CCG_VERSION_PATCH(app->patch) | 736 736 + CCG_VERSION(app->ver); 791 737 792 792 - new_version = le16_to_cpu(fw_cfg.app.build) | fw_cfg.app.patch << 16 | 793 793 - fw_cfg.app.ver << 24; 738 738 + new_version = le16_to_cpu(fw_cfg.app.build) | 739 739 + CCG_VERSION_PATCH(fw_cfg.app.patch) | 740 740 + CCG_VERSION(fw_cfg.app.ver); 794 741 795 742 if (!ccg_check_vendor_version(uc, app, &fw_cfg)) 796 743 goto out_release_firmware; ··· 1133 1078 uc->ppm.sync = ucsi_ccg_sync; 1134 1079 uc->dev = dev; 1135 1080 uc->client = client; 1081 1081 + uc->run_isr = true; 1136 1082 mutex_init(&uc->lock); 1137 1083 INIT_WORK(&uc->work, ccg_update_firmware); 1084 1084 + INIT_WORK(&uc->pm_work, ccg_pm_workaround_work); 1138 1085 1139 1086 /* Only fail FW flashing when FW build information is not provided */ 1140 1087 status = device_property_read_u16(dev, "ccgx,firmware-build", ··· 1193 1136 if (status) 1194 1137 dev_err(uc->dev, "cannot create sysfs group: %d\n", status); 1195 1138 1139 1139 + pm_runtime_set_active(uc->dev); 1140 1140 + pm_runtime_enable(uc->dev); 1141 1141 + pm_runtime_idle(uc->dev); 1142 1142 + 1196 1143 return 0; 1197 1144 } 1198 1145 ··· 1204 1143 { 1205 1144 struct ucsi_ccg *uc = i2c_get_clientdata(client); 1206 1145 1146 1146 + cancel_work_sync(&uc->pm_work); 1207 1147 cancel_work_sync(&uc->work); 1208 1148 ucsi_unregister_ppm(uc->ucsi); 1149 1149 + pm_runtime_disable(uc->dev); 1209 1150 free_irq(uc->irq, uc); 1210 1151 sysfs_remove_group(&uc->dev->kobj, &ucsi_ccg_attr_group); 1211 1152 ··· 1220 1157 }; 1221 1158 MODULE_DEVICE_TABLE(i2c, ucsi_ccg_device_id); 1222 1159 1160 1160 + static int ucsi_ccg_resume(struct device *dev) 1161 1161 + { 1162 1162 + struct i2c_client *client = to_i2c_client(dev); 1163 1163 + struct ucsi_ccg *uc = i2c_get_clientdata(client); 1164 1164 + 1165 1165 + return ucsi_resume(uc->ucsi); 1166 1166 + } 1167 1167 + 1168 1168 + static int ucsi_ccg_runtime_suspend(struct device *dev) 1169 1169 + { 1170 1170 + return 0; 1171 1171 + } 1172 1172 + 1173 1173 + static int ucsi_ccg_runtime_resume(struct device *dev) 1174 1174 + { 1175 1175 + struct i2c_client *client = to_i2c_client(dev); 1176 1176 + struct ucsi_ccg *uc = i2c_get_clientdata(client); 1177 1177 + bool schedule = true; 1178 1178 + 1179 1179 + /* 1180 1180 + * Firmware version 3.1.10 or earlier, built for NVIDIA has known issue 1181 1181 + * of missing interrupt when a device is connected for runtime resume. 1182 1182 + * Schedule a work to call ISR as a workaround. 1183 1183 + */ 1184 1184 + if (uc->fw_build == CCG_FW_BUILD_NVIDIA && 1185 1185 + uc->fw_version <= CCG_OLD_FW_VERSION) { 1186 1186 + mutex_lock(&uc->lock); 1187 1187 + if (!uc->run_isr) { 1188 1188 + uc->run_isr = true; 1189 1189 + schedule = false; 1190 1190 + } 1191 1191 + mutex_unlock(&uc->lock); 1192 1192 + 1193 1193 + if (schedule) 1194 1194 + schedule_work(&uc->pm_work); 1195 1195 + } 1196 1196 + 1197 1197 + return 0; 1198 1198 + } 1199 1199 + 1200 1200 + static const struct dev_pm_ops ucsi_ccg_pm = { 1201 1201 + .resume = ucsi_ccg_resume, 1202 1202 + .runtime_suspend = ucsi_ccg_runtime_suspend, 1203 1203 + .runtime_resume = ucsi_ccg_runtime_resume, 1204 1204 + }; 1205 1205 + 1223 1206 static struct i2c_driver ucsi_ccg_driver = { 1224 1207 .driver = { 1225 1208 .name = "ucsi_ccg", 1209 1209 + .pm = &ucsi_ccg_pm, 1226 1210 }, 1227 1211 .probe = ucsi_ccg_probe, 1228 1212 .remove = ucsi_ccg_remove,

+47 -46

include/linux/i2c.h

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 2 - /* ------------------------------------------------------------------------- */ 3 3 - /* */ 4 4 - /* i2c.h - definitions for the i2c-bus interface */ 5 5 - /* */ 6 6 - /* ------------------------------------------------------------------------- */ 7 7 - /* Copyright (C) 1995-2000 Simon G. Vogl 8 8 - 2 2 + /* 3 3 + * i2c.h - definitions for the Linux i2c bus interface 4 4 + * Copyright (C) 1995-2000 Simon G. Vogl 5 5 + * Copyright (C) 2013-2019 Wolfram Sang <wsa@the-dreams.de> 6 6 + * 7 7 + * With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and 8 8 + * Frodo Looijaard <frodol@dds.nl> 9 9 */ 10 10 - /* ------------------------------------------------------------------------- */ 11 11 - 12 12 - /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and 13 13 - Frodo Looijaard <frodol@dds.nl> */ 14 10 #ifndef _LINUX_I2C_H 15 11 #define _LINUX_I2C_H 16 12 ··· 36 40 union i2c_smbus_data; 37 41 struct i2c_board_info; 38 42 enum i2c_slave_event; 39 39 - typedef int (*i2c_slave_cb_t)(struct i2c_client *, enum i2c_slave_event, u8 *); 43 43 + typedef int (*i2c_slave_cb_t)(struct i2c_client *client, 44 44 + enum i2c_slave_event event, u8 *val); 40 45 41 46 struct module; 42 47 struct property_entry; ··· 254 257 unsigned int class; 255 258 256 259 /* Standard driver model interfaces */ 257 257 - int (*probe)(struct i2c_client *, const struct i2c_device_id *); 258 258 - int (*remove)(struct i2c_client *); 260 260 + int (*probe)(struct i2c_client *client, const struct i2c_device_id *id); 261 261 + int (*remove)(struct i2c_client *client); 259 262 260 263 /* New driver model interface to aid the seamless removal of the 261 264 * current probe()'s, more commonly unused than used second parameter. 262 265 */ 263 263 - int (*probe_new)(struct i2c_client *); 266 266 + int (*probe_new)(struct i2c_client *client); 264 267 265 268 /* driver model interfaces that don't relate to enumeration */ 266 266 - void (*shutdown)(struct i2c_client *); 269 269 + void (*shutdown)(struct i2c_client *client); 267 270 268 271 /* Alert callback, for example for the SMBus alert protocol. 269 272 * The format and meaning of the data value depends on the protocol. ··· 272 275 * For the SMBus Host Notify protocol, the data corresponds to the 273 276 * 16-bit payload data reported by the slave device acting as master. 274 277 */ 275 275 - void (*alert)(struct i2c_client *, enum i2c_alert_protocol protocol, 278 278 + void (*alert)(struct i2c_client *client, enum i2c_alert_protocol protocol, 276 279 unsigned int data); 277 280 278 281 /* a ioctl like command that can be used to perform specific functions ··· 284 287 const struct i2c_device_id *id_table; 285 288 286 289 /* Device detection callback for automatic device creation */ 287 287 - int (*detect)(struct i2c_client *, struct i2c_board_info *); 290 290 + int (*detect)(struct i2c_client *client, struct i2c_board_info *info); 288 291 const unsigned short *address_list; 289 292 struct list_head clients; 290 293 ··· 294 297 295 298 /** 296 299 * struct i2c_client - represent an I2C slave device 297 297 - * @flags: I2C_CLIENT_TEN indicates the device uses a ten bit chip address; 298 298 - * I2C_CLIENT_PEC indicates it uses SMBus Packet Error Checking 300 300 + * @flags: see I2C_CLIENT_* for possible flags 299 301 * @addr: Address used on the I2C bus connected to the parent adapter. 300 302 * @name: Indicates the type of the device, usually a chip name that's 301 303 * generic enough to hide second-sourcing and compatible revisions. ··· 312 316 */ 313 317 struct i2c_client { 314 318 unsigned short flags; /* div., see below */ 319 319 + #define I2C_CLIENT_PEC 0x04 /* Use Packet Error Checking */ 320 320 + #define I2C_CLIENT_TEN 0x10 /* we have a ten bit chip address */ 321 321 + /* Must equal I2C_M_TEN below */ 322 322 + #define I2C_CLIENT_SLAVE 0x20 /* we are the slave */ 323 323 + #define I2C_CLIENT_HOST_NOTIFY 0x40 /* We want to use I2C host notify */ 324 324 + #define I2C_CLIENT_WAKE 0x80 /* for board_info; true iff can wake */ 325 325 + #define I2C_CLIENT_SCCB 0x9000 /* Use Omnivision SCCB protocol */ 326 326 + /* Must match I2C_M_STOP|IGNORE_NAK */ 327 327 + 315 328 unsigned short addr; /* chip address - NOTE: 7bit */ 316 329 /* addresses are stored in the */ 317 330 /* _LOWER_ 7 bits */ ··· 442 437 extern struct i2c_client * 443 438 i2c_new_device(struct i2c_adapter *adap, struct i2c_board_info const *info); 444 439 440 440 + extern struct i2c_client * 441 441 + i2c_new_client_device(struct i2c_adapter *adap, struct i2c_board_info const *info); 442 442 + 445 443 /* If you don't know the exact address of an I2C device, use this variant 446 444 * instead, which can probe for device presence in a list of possible 447 445 * addresses. The "probe" callback function is optional. If it is provided, ··· 455 447 i2c_new_probed_device(struct i2c_adapter *adap, 456 448 struct i2c_board_info *info, 457 449 unsigned short const *addr_list, 458 458 - int (*probe)(struct i2c_adapter *, unsigned short addr)); 450 450 + int (*probe)(struct i2c_adapter *adap, unsigned short addr)); 459 451 460 452 /* Common custom probe functions */ 461 461 - extern int i2c_probe_func_quick_read(struct i2c_adapter *, unsigned short addr); 453 453 + extern int i2c_probe_func_quick_read(struct i2c_adapter *adap, unsigned short addr); 462 454 463 455 /* For devices that use several addresses, use i2c_new_dummy() to make 464 456 * client handles for the extra addresses. 465 457 */ 466 458 extern struct i2c_client * 467 459 i2c_new_dummy(struct i2c_adapter *adap, u16 address); 460 460 + 461 461 + extern struct i2c_client * 462 462 + i2c_new_dummy_device(struct i2c_adapter *adapter, u16 address); 468 463 469 464 extern struct i2c_client * 470 465 devm_i2c_new_dummy_device(struct device *dev, struct i2c_adapter *adap, u16 address); ··· 477 466 const char *name, 478 467 u16 default_addr); 479 468 480 480 - extern void i2c_unregister_device(struct i2c_client *); 469 469 + extern void i2c_unregister_device(struct i2c_client *client); 481 470 #endif /* I2C */ 482 471 483 472 /* Mainboard arch_initcall() code should register all its I2C devices. ··· 562 551 * The main operations are wrapped by i2c_lock_bus and i2c_unlock_bus. 563 552 */ 564 553 struct i2c_lock_operations { 565 565 - void (*lock_bus)(struct i2c_adapter *, unsigned int flags); 566 566 - int (*trylock_bus)(struct i2c_adapter *, unsigned int flags); 567 567 - void (*unlock_bus)(struct i2c_adapter *, unsigned int flags); 554 554 + void (*lock_bus)(struct i2c_adapter *adapter, unsigned int flags); 555 555 + int (*trylock_bus)(struct i2c_adapter *adapter, unsigned int flags); 556 556 + void (*unlock_bus)(struct i2c_adapter *adapter, unsigned int flags); 568 557 }; 569 558 570 559 /** ··· 714 703 }; 715 704 #define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev) 716 705 717 717 - static inline void *i2c_get_adapdata(const struct i2c_adapter *dev) 706 706 + static inline void *i2c_get_adapdata(const struct i2c_adapter *adap) 718 707 { 719 719 - return dev_get_drvdata(&dev->dev); 708 708 + return dev_get_drvdata(&adap->dev); 720 709 } 721 710 722 722 - static inline void i2c_set_adapdata(struct i2c_adapter *dev, void *data) 711 711 + static inline void i2c_set_adapdata(struct i2c_adapter *adap, void *data) 723 712 { 724 724 - dev_set_drvdata(&dev->dev, data); 713 713 + dev_set_drvdata(&adap->dev, data); 725 714 } 726 715 727 716 static inline struct i2c_adapter * ··· 737 726 return NULL; 738 727 } 739 728 740 740 - int i2c_for_each_dev(void *data, int (*fn)(struct device *, void *)); 729 729 + int i2c_for_each_dev(void *data, int (*fn)(struct device *dev, void *data)); 741 730 742 731 /* Adapter locking functions, exported for shared pin cases */ 743 732 #define I2C_LOCK_ROOT_ADAPTER BIT(0) ··· 813 802 i2c_unlock_bus(adap, I2C_LOCK_ROOT_ADAPTER); 814 803 } 815 804 816 816 - /*flags for the client struct: */ 817 817 - #define I2C_CLIENT_PEC 0x04 /* Use Packet Error Checking */ 818 818 - #define I2C_CLIENT_TEN 0x10 /* we have a ten bit chip address */ 819 819 - /* Must equal I2C_M_TEN below */ 820 820 - #define I2C_CLIENT_SLAVE 0x20 /* we are the slave */ 821 821 - #define I2C_CLIENT_HOST_NOTIFY 0x40 /* We want to use I2C host notify */ 822 822 - #define I2C_CLIENT_WAKE 0x80 /* for board_info; true iff can wake */ 823 823 - #define I2C_CLIENT_SCCB 0x9000 /* Use Omnivision SCCB protocol */ 824 824 - /* Must match I2C_M_STOP|IGNORE_NAK */ 825 825 - 826 805 /* i2c adapter classes (bitmask) */ 827 806 #define I2C_CLASS_HWMON (1<<0) /* lm_sensors, ... */ 828 807 #define I2C_CLASS_DDC (1<<3) /* DDC bus on graphics adapters */ ··· 833 832 /* administration... 834 833 */ 835 834 #if IS_ENABLED(CONFIG_I2C) 836 836 - extern int i2c_add_adapter(struct i2c_adapter *); 837 837 - extern void i2c_del_adapter(struct i2c_adapter *); 838 838 - extern int i2c_add_numbered_adapter(struct i2c_adapter *); 835 835 + extern int i2c_add_adapter(struct i2c_adapter *adap); 836 836 + extern void i2c_del_adapter(struct i2c_adapter *adap); 837 837 + extern int i2c_add_numbered_adapter(struct i2c_adapter *adap); 839 838 840 840 - extern int i2c_register_driver(struct module *, struct i2c_driver *); 841 841 - extern void i2c_del_driver(struct i2c_driver *); 839 839 + extern int i2c_register_driver(struct module *owner, struct i2c_driver *driver); 840 840 + extern void i2c_del_driver(struct i2c_driver *driver); 842 841 843 842 /* use a define to avoid include chaining to get THIS_MODULE */ 844 843 #define i2c_add_driver(driver) \

-7

include/linux/platform_data/i2c-mux-gpio.h

reviewed

··· 19 19 * position 20 20 * @n_values: Number of multiplexer positions (busses to instantiate) 21 21 * @classes: Optional I2C auto-detection classes 22 22 - * @gpio_chip: Optional GPIO chip name; if set, GPIO pin numbers are given 23 23 - * relative to the base GPIO number of that chip 24 24 - * @gpios: Array of GPIO numbers used to control MUX 25 25 - * @n_gpios: Number of GPIOs used to control MUX 26 22 * @idle: Bitmask to write to MUX when idle or GPIO_I2CMUX_NO_IDLE if not used 27 23 */ 28 24 struct i2c_mux_gpio_platform_data { ··· 27 31 const unsigned *values; 28 32 int n_values; 29 33 const unsigned *classes; 30 30 - char *gpio_chip; 31 31 - const unsigned *gpios; 32 32 - int n_gpios; 33 34 unsigned idle; 34 35 }; 35 36