phy: qcom-qmp-pcie: shorten function prefixes

+63 -74

1 changed file

expand all

drivers

phy

qualcomm

phy-qcom-qmp-pcie.c

+63 -74

drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

··· 1891 1891 .pwrdn_delay_max = 1005, /* us */ 1892 1892 }; 1893 1893 1894 - static void qcom_qmp_phy_pcie_configure_lane(void __iomem *base, 1894 + static void qmp_pcie_configure_lane(void __iomem *base, 1895 1895 const unsigned int *regs, 1896 1896 const struct qmp_phy_init_tbl tbl[], 1897 1897 int num, ··· 1914 1914 } 1915 1915 } 1916 1916 1917 - static void qcom_qmp_phy_pcie_configure(void __iomem *base, 1918 - const unsigned int *regs, 1919 - const struct qmp_phy_init_tbl tbl[], 1920 - int num) 1917 + static void qmp_pcie_configure(void __iomem *base, 1918 + const unsigned int *regs, 1919 + const struct qmp_phy_init_tbl tbl[], 1920 + int num) 1921 1921 { 1922 - qcom_qmp_phy_pcie_configure_lane(base, regs, tbl, num, 0xff); 1922 + qmp_pcie_configure_lane(base, regs, tbl, num, 0xff); 1923 1923 } 1924 1924 1925 - static int qcom_qmp_phy_pcie_serdes_init(struct qmp_phy *qphy) 1925 + static int qmp_pcie_serdes_init(struct qmp_phy *qphy) 1926 1926 { 1927 1927 const struct qmp_phy_cfg *cfg = qphy->cfg; 1928 1928 void __iomem *serdes = qphy->serdes; 1929 1929 const struct qmp_phy_init_tbl *serdes_tbl = cfg->serdes_tbl; 1930 1930 int serdes_tbl_num = cfg->serdes_tbl_num; 1931 1931 1932 - qcom_qmp_phy_pcie_configure(serdes, cfg->regs, serdes_tbl, serdes_tbl_num); 1933 - qcom_qmp_phy_pcie_configure(serdes, cfg->regs, cfg->serdes_tbl_sec, 1934 - cfg->serdes_tbl_num_sec); 1932 + qmp_pcie_configure(serdes, cfg->regs, serdes_tbl, serdes_tbl_num); 1933 + qmp_pcie_configure(serdes, cfg->regs, cfg->serdes_tbl_sec, cfg->serdes_tbl_num_sec); 1935 1934 1936 1935 return 0; 1937 1936 } 1938 1937 1939 - static int qcom_qmp_phy_pcie_com_init(struct qmp_phy *qphy) 1938 + static int qmp_pcie_com_init(struct qmp_phy *qphy) 1940 1939 { 1941 1940 struct qcom_qmp *qmp = qphy->qmp; 1942 1941 const struct qmp_phy_cfg *cfg = qphy->cfg; ··· 1983 1984 return ret; 1984 1985 } 1985 1986 1986 - static int qcom_qmp_phy_pcie_com_exit(struct qmp_phy *qphy) 1987 + static int qmp_pcie_com_exit(struct qmp_phy *qphy) 1987 1988 { 1988 1989 struct qcom_qmp *qmp = qphy->qmp; 1989 1990 const struct qmp_phy_cfg *cfg = qphy->cfg; ··· 1997 1998 return 0; 1998 1999 } 1999 2000 2000 - static int qcom_qmp_phy_pcie_init(struct phy *phy) 2001 + static int qmp_pcie_init(struct phy *phy) 2001 2002 { 2002 2003 struct qmp_phy *qphy = phy_get_drvdata(phy); 2003 2004 struct qcom_qmp *qmp = qphy->qmp; 2004 2005 int ret; 2005 2006 dev_vdbg(qmp->dev, "Initializing QMP phy\n"); 2006 2007 2007 - ret = qcom_qmp_phy_pcie_com_init(qphy); 2008 + ret = qmp_pcie_com_init(qphy); 2008 2009 if (ret) 2009 2010 return ret; 2010 2011 2011 2012 return 0; 2012 2013 } 2013 2014 2014 - static int qcom_qmp_phy_pcie_power_on(struct phy *phy) 2015 + static int qmp_pcie_power_on(struct phy *phy) 2015 2016 { 2016 2017 struct qmp_phy *qphy = phy_get_drvdata(phy); 2017 2018 struct qcom_qmp *qmp = qphy->qmp; ··· 2024 2025 unsigned int mask, val, ready; 2025 2026 int ret; 2026 2027 2027 - qcom_qmp_phy_pcie_serdes_init(qphy); 2028 + qmp_pcie_serdes_init(qphy); 2028 2029 2029 2030 ret = clk_prepare_enable(qphy->pipe_clk); 2030 2031 if (ret) { ··· 2033 2034 } 2034 2035 2035 2036 /* Tx, Rx, and PCS configurations */ 2036 - qcom_qmp_phy_pcie_configure_lane(tx, cfg->regs, 2037 - cfg->tx_tbl, cfg->tx_tbl_num, 1); 2038 - qcom_qmp_phy_pcie_configure_lane(tx, cfg->regs, cfg->tx_tbl_sec, 2039 - cfg->tx_tbl_num_sec, 1); 2037 + qmp_pcie_configure_lane(tx, cfg->regs, cfg->tx_tbl, cfg->tx_tbl_num, 1); 2038 + qmp_pcie_configure_lane(tx, cfg->regs, cfg->tx_tbl_sec, cfg->tx_tbl_num_sec, 1); 2040 2039 2041 2040 /* Configuration for other LANE for USB-DP combo PHY */ 2042 2041 if (cfg->is_dual_lane_phy) { 2043 - qcom_qmp_phy_pcie_configure_lane(qphy->tx2, cfg->regs, 2044 - cfg->tx_tbl, cfg->tx_tbl_num, 2); 2045 - qcom_qmp_phy_pcie_configure_lane(qphy->tx2, cfg->regs, 2046 - cfg->tx_tbl_sec, 2047 - cfg->tx_tbl_num_sec, 2); 2042 + qmp_pcie_configure_lane(qphy->tx2, cfg->regs, cfg->tx_tbl, 2043 + cfg->tx_tbl_num, 2); 2044 + qmp_pcie_configure_lane(qphy->tx2, cfg->regs, cfg->tx_tbl_sec, 2045 + cfg->tx_tbl_num_sec, 2); 2048 2046 } 2049 2047 2050 - qcom_qmp_phy_pcie_configure_lane(rx, cfg->regs, 2051 - cfg->rx_tbl, cfg->rx_tbl_num, 1); 2052 - qcom_qmp_phy_pcie_configure_lane(rx, cfg->regs, 2053 - cfg->rx_tbl_sec, cfg->rx_tbl_num_sec, 1); 2048 + qmp_pcie_configure_lane(rx, cfg->regs, cfg->rx_tbl, cfg->rx_tbl_num, 1); 2049 + qmp_pcie_configure_lane(rx, cfg->regs, cfg->rx_tbl_sec, cfg->rx_tbl_num_sec, 1); 2054 2050 2055 2051 if (cfg->is_dual_lane_phy) { 2056 - qcom_qmp_phy_pcie_configure_lane(qphy->rx2, cfg->regs, 2057 - cfg->rx_tbl, cfg->rx_tbl_num, 2); 2058 - qcom_qmp_phy_pcie_configure_lane(qphy->rx2, cfg->regs, 2059 - cfg->rx_tbl_sec, 2060 - cfg->rx_tbl_num_sec, 2); 2052 + qmp_pcie_configure_lane(qphy->rx2, cfg->regs, cfg->rx_tbl, 2053 + cfg->rx_tbl_num, 2); 2054 + qmp_pcie_configure_lane(qphy->rx2, cfg->regs, cfg->rx_tbl_sec, 2055 + cfg->rx_tbl_num_sec, 2); 2061 2056 } 2062 2057 2063 - qcom_qmp_phy_pcie_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num); 2064 - qcom_qmp_phy_pcie_configure(pcs, cfg->regs, cfg->pcs_tbl_sec, 2065 - cfg->pcs_tbl_num_sec); 2058 + qmp_pcie_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num); 2059 + qmp_pcie_configure(pcs, cfg->regs, cfg->pcs_tbl_sec, cfg->pcs_tbl_num_sec); 2066 2060 2067 - qcom_qmp_phy_pcie_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl, 2068 - cfg->pcs_misc_tbl_num); 2069 - qcom_qmp_phy_pcie_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl_sec, 2070 - cfg->pcs_misc_tbl_num_sec); 2061 + qmp_pcie_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl, cfg->pcs_misc_tbl_num); 2062 + qmp_pcie_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl_sec, cfg->pcs_misc_tbl_num_sec); 2071 2063 2072 2064 /* 2073 2065 * Pull out PHY from POWER DOWN state. ··· 2094 2104 return ret; 2095 2105 } 2096 2106 2097 - static int qcom_qmp_phy_pcie_power_off(struct phy *phy) 2107 + static int qmp_pcie_power_off(struct phy *phy) 2098 2108 { 2099 2109 struct qmp_phy *qphy = phy_get_drvdata(phy); 2100 2110 const struct qmp_phy_cfg *cfg = qphy->cfg; ··· 2119 2129 return 0; 2120 2130 } 2121 2131 2122 - static int qcom_qmp_phy_pcie_exit(struct phy *phy) 2132 + static int qmp_pcie_exit(struct phy *phy) 2123 2133 { 2124 2134 struct qmp_phy *qphy = phy_get_drvdata(phy); 2125 2135 2126 - qcom_qmp_phy_pcie_com_exit(qphy); 2136 + qmp_pcie_com_exit(qphy); 2127 2137 2128 2138 return 0; 2129 2139 } 2130 2140 2131 - static int qcom_qmp_phy_pcie_enable(struct phy *phy) 2141 + static int qmp_pcie_enable(struct phy *phy) 2132 2142 { 2133 2143 int ret; 2134 2144 2135 - ret = qcom_qmp_phy_pcie_init(phy); 2145 + ret = qmp_pcie_init(phy); 2136 2146 if (ret) 2137 2147 return ret; 2138 2148 2139 - ret = qcom_qmp_phy_pcie_power_on(phy); 2149 + ret = qmp_pcie_power_on(phy); 2140 2150 if (ret) 2141 - qcom_qmp_phy_pcie_exit(phy); 2151 + qmp_pcie_exit(phy); 2142 2152 2143 2153 return ret; 2144 2154 } 2145 2155 2146 - static int qcom_qmp_phy_pcie_disable(struct phy *phy) 2156 + static int qmp_pcie_disable(struct phy *phy) 2147 2157 { 2148 2158 int ret; 2149 2159 2150 - ret = qcom_qmp_phy_pcie_power_off(phy); 2160 + ret = qmp_pcie_power_off(phy); 2151 2161 if (ret) 2152 2162 return ret; 2153 - return qcom_qmp_phy_pcie_exit(phy); 2163 + 2164 + return qmp_pcie_exit(phy); 2154 2165 } 2155 2166 2156 - static int qcom_qmp_phy_pcie_set_mode(struct phy *phy, 2157 - enum phy_mode mode, int submode) 2167 + static int qmp_pcie_set_mode(struct phy *phy, enum phy_mode mode, int submode) 2158 2168 { 2159 2169 struct qmp_phy *qphy = phy_get_drvdata(phy); 2160 2170 ··· 2163 2173 return 0; 2164 2174 } 2165 2175 2166 - static int qcom_qmp_phy_pcie_vreg_init(struct device *dev, const struct qmp_phy_cfg *cfg) 2176 + static int qmp_pcie_vreg_init(struct device *dev, const struct qmp_phy_cfg *cfg) 2167 2177 { 2168 2178 struct qcom_qmp *qmp = dev_get_drvdata(dev); 2169 2179 int num = cfg->num_vregs; ··· 2179 2189 return devm_regulator_bulk_get(dev, num, qmp->vregs); 2180 2190 } 2181 2191 2182 - static int qcom_qmp_phy_pcie_reset_init(struct device *dev, const struct qmp_phy_cfg *cfg) 2192 + static int qmp_pcie_reset_init(struct device *dev, const struct qmp_phy_cfg *cfg) 2183 2193 { 2184 2194 struct qcom_qmp *qmp = dev_get_drvdata(dev); 2185 2195 int i; ··· 2200 2210 return 0; 2201 2211 } 2202 2212 2203 - static int qcom_qmp_phy_pcie_clk_init(struct device *dev, const struct qmp_phy_cfg *cfg) 2213 + static int qmp_pcie_clk_init(struct device *dev, const struct qmp_phy_cfg *cfg) 2204 2214 { 2205 2215 struct qcom_qmp *qmp = dev_get_drvdata(dev); 2206 2216 int num = cfg->num_clks; ··· 2283 2293 return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); 2284 2294 } 2285 2295 2286 - static const struct phy_ops qcom_qmp_phy_pcie_ops = { 2287 - .power_on = qcom_qmp_phy_pcie_enable, 2288 - .power_off = qcom_qmp_phy_pcie_disable, 2289 - .set_mode = qcom_qmp_phy_pcie_set_mode, 2296 + static const struct phy_ops qmp_pcie_ops = { 2297 + .power_on = qmp_pcie_enable, 2298 + .power_off = qmp_pcie_disable, 2299 + .set_mode = qmp_pcie_set_mode, 2290 2300 .owner = THIS_MODULE, 2291 2301 }; 2292 2302 2293 - static 2294 - int qcom_qmp_phy_pcie_create(struct device *dev, struct device_node *np, int id, 2303 + static int qmp_pcie_create(struct device *dev, struct device_node *np, int id, 2295 2304 void __iomem *serdes, const struct qmp_phy_cfg *cfg) 2296 2305 { 2297 2306 struct qcom_qmp *qmp = dev_get_drvdata(dev); ··· 2361 2372 "failed to get lane%d pipe clock\n", id); 2362 2373 } 2363 2374 2364 - generic_phy = devm_phy_create(dev, np, &qcom_qmp_phy_pcie_ops); 2375 + generic_phy = devm_phy_create(dev, np, &qmp_pcie_ops); 2365 2376 if (IS_ERR(generic_phy)) { 2366 2377 ret = PTR_ERR(generic_phy); 2367 2378 dev_err(dev, "failed to create qphy %d\n", ret); ··· 2377 2388 return 0; 2378 2389 } 2379 2390 2380 - static const struct of_device_id qcom_qmp_phy_pcie_of_match_table[] = { 2391 + static const struct of_device_id qmp_pcie_of_match_table[] = { 2381 2392 { 2382 2393 .compatible = "qcom,msm8998-qmp-pcie-phy", 2383 2394 .data = &msm8998_pciephy_cfg, ··· 2420 2431 }, 2421 2432 { }, 2422 2433 }; 2423 - MODULE_DEVICE_TABLE(of, qcom_qmp_phy_pcie_of_match_table); 2434 + MODULE_DEVICE_TABLE(of, qmp_pcie_of_match_table); 2424 2435 2425 - static int qcom_qmp_phy_pcie_probe(struct platform_device *pdev) 2436 + static int qmp_pcie_probe(struct platform_device *pdev) 2426 2437 { 2427 2438 struct qcom_qmp *qmp; 2428 2439 struct device *dev = &pdev->dev; ··· 2450 2461 if (IS_ERR(serdes)) 2451 2462 return PTR_ERR(serdes); 2452 2463 2453 - ret = qcom_qmp_phy_pcie_clk_init(dev, cfg); 2464 + ret = qmp_pcie_clk_init(dev, cfg); 2454 2465 if (ret) 2455 2466 return ret; 2456 2467 2457 - ret = qcom_qmp_phy_pcie_reset_init(dev, cfg); 2468 + ret = qmp_pcie_reset_init(dev, cfg); 2458 2469 if (ret) 2459 2470 return ret; 2460 2471 2461 - ret = qcom_qmp_phy_pcie_vreg_init(dev, cfg); 2472 + ret = qmp_pcie_vreg_init(dev, cfg); 2462 2473 if (ret) { 2463 2474 if (ret != -EPROBE_DEFER) 2464 2475 dev_err(dev, "failed to get regulator supplies: %d\n", ··· 2486 2497 id = 0; 2487 2498 for_each_available_child_of_node(dev->of_node, child) { 2488 2499 /* Create per-lane phy */ 2489 - ret = qcom_qmp_phy_pcie_create(dev, child, id, serdes, cfg); 2500 + ret = qmp_pcie_create(dev, child, id, serdes, cfg); 2490 2501 if (ret) { 2491 2502 dev_err(dev, "failed to create lane%d phy, %d\n", 2492 2503 id, ret); ··· 2521 2532 return ret; 2522 2533 } 2523 2534 2524 - static struct platform_driver qcom_qmp_phy_pcie_driver = { 2525 - .probe = qcom_qmp_phy_pcie_probe, 2535 + static struct platform_driver qmp_pcie_driver = { 2536 + .probe = qmp_pcie_probe, 2526 2537 .driver = { 2527 2538 .name = "qcom-qmp-pcie-phy", 2528 - .of_match_table = qcom_qmp_phy_pcie_of_match_table, 2539 + .of_match_table = qmp_pcie_of_match_table, 2529 2540 }, 2530 2541 }; 2531 2542 2532 - module_platform_driver(qcom_qmp_phy_pcie_driver); 2543 + module_platform_driver(qmp_pcie_driver); 2533 2544 2534 2545 MODULE_AUTHOR("Vivek Gautam <vivek.gautam@codeaurora.org>"); 2535 2546 MODULE_DESCRIPTION("Qualcomm QMP PCIe PHY driver");

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