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firmware: google: Pack structures for coreboot table entries

Pack the fields in the coreboot table entries. These entries are part of
the coreboot ABI, so they don't follow regular calling conventions. Fields
of type u64 are aligned to boundaries of 4 bytes instead of 8. [1]

So far this has not been a problem. In the future, padding bytes should
be added where explicit alignment is required.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://github.com/coreboot/coreboot/blob/main/payloads/libpayload/include/coreboot_tables.h#L96 # [1]
Suggested-by: Julius Werner <jwerner@chromium.org>
Acked-by: Julius Werner <jwerner@chromium.org>
Acked-by: Tzung-Bi Shih <tzungbi@kernel.org>
Link: https://patch.msgid.link/20260217155836.96267-10-tzimmermann@suse.de

+6 -3
+6 -3
include/linux/coreboot.h
··· 12 12 #ifndef _LINUX_COREBOOT_H 13 13 #define _LINUX_COREBOOT_H 14 14 15 + #include <linux/compiler_attributes.h> 15 16 #include <linux/types.h> 17 + 18 + typedef __aligned(4) u64 cb_u64; 16 19 17 20 /* List of coreboot entry structures that is used */ 18 21 ··· 33 30 u32 tag; 34 31 u32 size; 35 32 36 - u64 cbmem_addr; 33 + cb_u64 cbmem_addr; 37 34 }; 38 35 39 36 /* Corresponds to LB_TAG_CBMEM_ENTRY */ ··· 41 38 u32 tag; 42 39 u32 size; 43 40 44 - u64 address; 41 + cb_u64 address; 45 42 u32 entry_size; 46 43 u32 id; 47 44 }; ··· 51 48 u32 tag; 52 49 u32 size; 53 50 54 - u64 physical_address; 51 + cb_u64 physical_address; 55 52 u32 x_resolution; 56 53 u32 y_resolution; 57 54 u32 bytes_per_line;