tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'drm-fixes-2021-03-05' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
"More may show up but this is what I have at this stage: just a single
nouveau regression fix, and a bunch of amdgpu fixes.

amdgpu:
- S0ix fix
- Handle new NV12 SKU
- Misc power fixes
- Display uninitialized value fix
- PCIE debugfs register access fix

nouveau:
- regression fix for gk104"

* tag 'drm-fixes-2021-03-05' of git://anongit.freedesktop.org/drm/drm:
drm/amdgpu: fix parameter error of RREG32_PCIE() in amdgpu_regs_pcie
drm/amd/display: fix the return of the uninitialized value in ret
drm/amdgpu: enable BACO runpm by default on sienna cichlid and navy flounder
drm/amd/pm: correct Arcturus mmTHM_BACO_CNTL register address
drm/amdgpu/swsmu/vangogh: Only use RLCPowerNotify msg for disable
drm/amdgpu/pm: make unsupported power profile messages debug
drm/amdgpu:disable VCN for Navi12 SKU
drm/amdgpu: Only check for S0ix if AMD_PMC is configured
drm/nouveau/fifo/gk104-gp1xx: fix creation of sw class

Linus Torvalds 280d542f 44195bd7

+29 -16
+2 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
··· 903 903 */ 904 904 bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev) 905 905 { 906 + #if defined(CONFIG_AMD_PMC) 906 907 if (acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0) { 907 908 if (adev->flags & AMD_IS_APU) 908 909 return true; 909 910 } 910 - 911 + #endif 911 912 return false; 912 913 }
+2 -2
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
··· 357 357 while (size) { 358 358 uint32_t value; 359 359 360 - value = RREG32_PCIE(*pos >> 2); 360 + value = RREG32_PCIE(*pos); 361 361 r = put_user(value, (uint32_t *)buf); 362 362 if (r) { 363 363 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); ··· 424 424 return r; 425 425 } 426 426 427 - WREG32_PCIE(*pos >> 2, value); 427 + WREG32_PCIE(*pos, value); 428 428 429 429 result += 4; 430 430 buf += 4;
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
··· 173 173 switch (adev->asic_type) { 174 174 case CHIP_VEGA20: 175 175 case CHIP_ARCTURUS: 176 - case CHIP_SIENNA_CICHLID: 177 - case CHIP_NAVY_FLOUNDER: 178 176 /* enable runpm if runpm=1 */ 179 177 if (amdgpu_runtime_pm > 0) 180 178 adev->runpm = true;
+4 -2
drivers/gpu/drm/amd/amdgpu/nv.c
··· 558 558 { 559 559 if ((pdev->device == 0x731E && 560 560 (pdev->revision == 0xC6 || pdev->revision == 0xC7)) || 561 - (pdev->device == 0x7340 && pdev->revision == 0xC9)) 561 + (pdev->device == 0x7340 && pdev->revision == 0xC9) || 562 + (pdev->device == 0x7360 && pdev->revision == 0xC7)) 562 563 return true; 563 564 return false; 564 565 } ··· 635 634 if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT && 636 635 !amdgpu_sriov_vf(adev)) 637 636 amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); 638 - amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); 637 + if (!nv_is_headless_sku(adev->pdev)) 638 + amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); 639 639 if (!amdgpu_sriov_vf(adev)) 640 640 amdgpu_device_ip_block_add(adev, &jpeg_v2_0_ip_block); 641 641 break;
+1 -1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
··· 530 530 { 531 531 uint8_t enable_dsc = enable ? 1 : 0; 532 532 struct amdgpu_dm_connector *aconnector; 533 - uint8_t ret; 533 + uint8_t ret = 0; 534 534 535 535 if (!stream) 536 536 return false;
+1 -1
drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
··· 1322 1322 CMN2ASIC_MAPPING_WORKLOAD, 1323 1323 profile_mode); 1324 1324 if (workload_type < 0) { 1325 - dev_err(smu->adev->dev, "Unsupported power profile mode %d on arcturus\n", profile_mode); 1325 + dev_dbg(smu->adev->dev, "Unsupported power profile mode %d on arcturus\n", profile_mode); 1326 1326 return -EINVAL; 1327 1327 } 1328 1328
+12 -3
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
··· 78 78 #define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK 0xC000 79 79 #define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT 0xE 80 80 81 + #define mmTHM_BACO_CNTL_ARCT 0xA7 82 + #define mmTHM_BACO_CNTL_ARCT_BASE_IDX 0 83 + 81 84 static int link_width[] = {0, 1, 2, 4, 8, 12, 16}; 82 85 static int link_speed[] = {25, 50, 80, 160}; 83 86 ··· 1535 1532 break; 1536 1533 default: 1537 1534 if (!ras || !ras->supported) { 1538 - data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL); 1539 - data |= 0x80000000; 1540 - WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data); 1535 + if (adev->asic_type == CHIP_ARCTURUS) { 1536 + data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL_ARCT); 1537 + data |= 0x80000000; 1538 + WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL_ARCT, data); 1539 + } else { 1540 + data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL); 1541 + data |= 0x80000000; 1542 + WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data); 1543 + } 1541 1544 1542 1545 ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 0, NULL); 1543 1546 } else {
+3 -3
drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
··· 810 810 CMN2ASIC_MAPPING_WORKLOAD, 811 811 profile_mode); 812 812 if (workload_type < 0) { 813 - dev_err_once(smu->adev->dev, "Unsupported power profile mode %d on VANGOGH\n", 813 + dev_dbg(smu->adev->dev, "Unsupported power profile mode %d on VANGOGH\n", 814 814 profile_mode); 815 815 return -EINVAL; 816 816 } ··· 1685 1685 uint32_t feature_mask[2]; 1686 1686 int ret = 0; 1687 1687 1688 - if (adev->pm.fw_version >= 0x43f1700) 1688 + if (adev->pm.fw_version >= 0x43f1700 && !en) 1689 1689 ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_RlcPowerNotify, 1690 - en ? RLC_STATUS_NORMAL : RLC_STATUS_OFF, NULL); 1690 + RLC_STATUS_OFF, NULL); 1691 1691 1692 1692 bitmap_zero(feature->enabled, feature->feature_num); 1693 1693 bitmap_zero(feature->supported, feature->feature_num);
+1 -1
drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
··· 844 844 * TODO: If some case need switch to powersave/default power mode 845 845 * then can consider enter WORKLOAD_COMPUTE/WORKLOAD_CUSTOM for power saving. 846 846 */ 847 - dev_err_once(smu->adev->dev, "Unsupported power profile mode %d on RENOIR\n", profile_mode); 847 + dev_dbg(smu->adev->dev, "Unsupported power profile mode %d on RENOIR\n", profile_mode); 848 848 return -EINVAL; 849 849 } 850 850
+3
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
··· 261 261 struct nvkm_engine * 262 262 gk104_fifo_id_engine(struct nvkm_fifo *base, int engi) 263 263 { 264 + if (engi == GK104_FIFO_ENGN_SW) 265 + return nvkm_device_engine(base->engine.subdev.device, NVKM_ENGINE_SW, 0); 266 + 264 267 return gk104_fifo(base)->engine[engi].engine; 265 268 } 266 269