Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'platform-drivers-x86-v6.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86

Pull x86 platform driver fixes from Hans de Goede:

- Asus thermal profile fix, fixing performance issues on Lunar Lake

- Intel PMC: one revert for a lockdep issue and one bugfix

- Dell WMI: Ignore some WMI events on suspend/resume to silence warnings

* tag 'platform-drivers-x86-v6.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86:
platform/x86: asus-wmi: Fix thermal profile initialization
platform/x86: dell-wmi: Ignore suspend notifications
platform/x86/intel/pmc: Fix pmc_core_iounmap to call iounmap for valid addresses
platform/x86:intel/pmc: Revert "Enable the ACPI PM Timer to be turned off when suspended"

+22 -65
+10
drivers/platform/x86/asus-wmi.c
··· 3908 3908 if (!asus->throttle_thermal_policy_dev) 3909 3909 return 0; 3910 3910 3911 + /* 3912 + * We need to set the default thermal profile during probe or otherwise 3913 + * the system will often remain in silent mode, causing low performance. 3914 + */ 3915 + err = throttle_thermal_policy_set_default(asus); 3916 + if (err < 0) { 3917 + pr_warn("Failed to set default thermal profile\n"); 3918 + return err; 3919 + } 3920 + 3911 3921 dev_info(dev, "Using throttle_thermal_policy for platform_profile support\n"); 3912 3922 3913 3923 asus->platform_profile_handler.profile_get = asus_wmi_platform_profile_get;
+9
drivers/platform/x86/dell/dell-wmi-base.c
··· 264 264 /*Speaker Mute*/ 265 265 { KE_KEY, 0x109, { KEY_MUTE} }, 266 266 267 + /* S2Idle screen off */ 268 + { KE_IGNORE, 0x120, { KEY_RESERVED }}, 269 + 270 + /* Leaving S4 or S2Idle suspend */ 271 + { KE_IGNORE, 0x130, { KEY_RESERVED }}, 272 + 273 + /* Entering S2Idle suspend */ 274 + { KE_IGNORE, 0x140, { KEY_RESERVED }}, 275 + 267 276 /* Mic mute */ 268 277 { KE_KEY, 0x150, { KEY_MICMUTE } }, 269 278
-2
drivers/platform/x86/intel/pmc/adl.c
··· 295 295 .ppfear_buckets = CNP_PPFEAR_NUM_ENTRIES, 296 296 .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, 297 297 .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, 298 - .acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET, 299 - .acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE, 300 298 .ltr_ignore_max = ADL_NUM_IP_IGN_ALLOWED, 301 299 .lpm_num_modes = ADL_LPM_NUM_MODES, 302 300 .lpm_num_maps = ADL_LPM_NUM_MAPS,
-2
drivers/platform/x86/intel/pmc/cnp.c
··· 200 200 .ppfear_buckets = CNP_PPFEAR_NUM_ENTRIES, 201 201 .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, 202 202 .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, 203 - .acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET, 204 - .acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE, 205 203 .ltr_ignore_max = CNP_NUM_IP_IGN_ALLOWED, 206 204 .etr3_offset = ETR3_OFFSET, 207 205 };
-46
drivers/platform/x86/intel/pmc/core.c
··· 11 11 12 12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 13 13 14 - #include <linux/acpi_pmtmr.h> 15 14 #include <linux/bitfield.h> 16 15 #include <linux/debugfs.h> 17 16 #include <linux/delay.h> ··· 1257 1258 return val == 1; 1258 1259 } 1259 1260 1260 - /* 1261 - * Enable or disable ACPI PM Timer 1262 - * 1263 - * This function is intended to be a callback for ACPI PM suspend/resume event. 1264 - * The ACPI PM Timer is enabled on resume only if it was enabled during suspend. 1265 - */ 1266 - static void pmc_core_acpi_pm_timer_suspend_resume(void *data, bool suspend) 1267 - { 1268 - struct pmc_dev *pmcdev = data; 1269 - struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; 1270 - const struct pmc_reg_map *map = pmc->map; 1271 - bool enabled; 1272 - u32 reg; 1273 - 1274 - if (!map->acpi_pm_tmr_ctl_offset) 1275 - return; 1276 - 1277 - guard(mutex)(&pmcdev->lock); 1278 - 1279 - if (!suspend && !pmcdev->enable_acpi_pm_timer_on_resume) 1280 - return; 1281 - 1282 - reg = pmc_core_reg_read(pmc, map->acpi_pm_tmr_ctl_offset); 1283 - enabled = !(reg & map->acpi_pm_tmr_disable_bit); 1284 - if (suspend) 1285 - reg |= map->acpi_pm_tmr_disable_bit; 1286 - else 1287 - reg &= ~map->acpi_pm_tmr_disable_bit; 1288 - pmc_core_reg_write(pmc, map->acpi_pm_tmr_ctl_offset, reg); 1289 - 1290 - pmcdev->enable_acpi_pm_timer_on_resume = suspend && enabled; 1291 - } 1292 - 1293 1261 static void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev) 1294 1262 { 1295 1263 debugfs_remove_recursive(pmcdev->dbgfs_dir); ··· 1452 1486 struct pmc_dev *pmcdev; 1453 1487 const struct x86_cpu_id *cpu_id; 1454 1488 int (*core_init)(struct pmc_dev *pmcdev); 1455 - const struct pmc_reg_map *map; 1456 1489 struct pmc *primary_pmc; 1457 1490 int ret; 1458 1491 ··· 1510 1545 pm_report_max_hw_sleep(FIELD_MAX(SLP_S0_RES_COUNTER_MASK) * 1511 1546 pmc_core_adjust_slp_s0_step(primary_pmc, 1)); 1512 1547 1513 - map = primary_pmc->map; 1514 - if (map->acpi_pm_tmr_ctl_offset) 1515 - acpi_pmtmr_register_suspend_resume_callback(pmc_core_acpi_pm_timer_suspend_resume, 1516 - pmcdev); 1517 - 1518 1548 device_initialized = true; 1519 1549 dev_info(&pdev->dev, " initialized\n"); 1520 1550 ··· 1519 1559 static void pmc_core_remove(struct platform_device *pdev) 1520 1560 { 1521 1561 struct pmc_dev *pmcdev = platform_get_drvdata(pdev); 1522 - const struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; 1523 - const struct pmc_reg_map *map = pmc->map; 1524 - 1525 - if (map->acpi_pm_tmr_ctl_offset) 1526 - acpi_pmtmr_unregister_suspend_resume_callback(); 1527 - 1528 1562 pmc_core_dbgfs_unregister(pmcdev); 1529 1563 pmc_core_clean_structure(pdev); 1530 1564 }
-8
drivers/platform/x86/intel/pmc/core.h
··· 68 68 #define SPT_PMC_LTR_SCC 0x3A0 69 69 #define SPT_PMC_LTR_ISH 0x3A4 70 70 71 - #define SPT_PMC_ACPI_PM_TMR_CTL_OFFSET 0x18FC 72 - 73 71 /* Sunrise Point: PGD PFET Enable Ack Status Registers */ 74 72 enum ppfear_regs { 75 73 SPT_PMC_XRAM_PPFEAR0A = 0x590, ··· 147 149 148 150 #define SPT_PMC_VRIC1_SLPS0LVEN BIT(13) 149 151 #define SPT_PMC_VRIC1_XTALSDQDIS BIT(22) 150 - 151 - #define SPT_PMC_BIT_ACPI_PM_TMR_DISABLE BIT(1) 152 152 153 153 /* Cannonlake Power Management Controller register offsets */ 154 154 #define CNP_PMC_SLPS0_DBG_OFFSET 0x10B4 ··· 351 355 const u8 *lpm_reg_index; 352 356 const u32 pson_residency_offset; 353 357 const u32 pson_residency_counter_step; 354 - const u32 acpi_pm_tmr_ctl_offset; 355 - const u32 acpi_pm_tmr_disable_bit; 356 358 }; 357 359 358 360 /** ··· 426 432 u32 die_c6_offset; 427 433 struct telem_endpoint *punit_ep; 428 434 struct pmc_info *regmap_list; 429 - 430 - bool enable_acpi_pm_timer_on_resume; 431 435 }; 432 436 433 437 enum pmc_index {
+3 -1
drivers/platform/x86/intel/pmc/core_ssram.c
··· 29 29 #define LPM_REG_COUNT 28 30 30 #define LPM_MODE_OFFSET 1 31 31 32 - DEFINE_FREE(pmc_core_iounmap, void __iomem *, iounmap(_T)); 32 + DEFINE_FREE(pmc_core_iounmap, void __iomem *, if (_T) iounmap(_T)) 33 33 34 34 static u32 pmc_core_find_guid(struct pmc_info *list, const struct pmc_reg_map *map) 35 35 { ··· 262 262 263 263 ssram_base = ssram_pcidev->resource[0].start; 264 264 tmp_ssram = ioremap(ssram_base, SSRAM_HDR_SIZE); 265 + if (!tmp_ssram) 266 + return -ENOMEM; 265 267 266 268 if (pmc_idx != PMC_IDX_MAIN) { 267 269 /*
-2
drivers/platform/x86/intel/pmc/icl.c
··· 46 46 .ppfear_buckets = ICL_PPFEAR_NUM_ENTRIES, 47 47 .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, 48 48 .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, 49 - .acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET, 50 - .acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE, 51 49 .ltr_ignore_max = ICL_NUM_IP_IGN_ALLOWED, 52 50 .etr3_offset = ETR3_OFFSET, 53 51 };
-2
drivers/platform/x86/intel/pmc/mtl.c
··· 462 462 .ppfear_buckets = MTL_SOCM_PPFEAR_NUM_ENTRIES, 463 463 .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, 464 464 .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, 465 - .acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET, 466 - .acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE, 467 465 .lpm_num_maps = ADL_LPM_NUM_MAPS, 468 466 .ltr_ignore_max = MTL_SOCM_NUM_IP_IGN_ALLOWED, 469 467 .lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,
-2
drivers/platform/x86/intel/pmc/tgl.c
··· 197 197 .ppfear_buckets = ICL_PPFEAR_NUM_ENTRIES, 198 198 .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, 199 199 .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, 200 - .acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET, 201 - .acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE, 202 200 .ltr_ignore_max = TGL_NUM_IP_IGN_ALLOWED, 203 201 .lpm_num_maps = TGL_LPM_NUM_MAPS, 204 202 .lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,