tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/i915/vrr: Add compute config for DC Balance params

Compute DC Balance parameters and tunable params based on
experiments.

--v2:
- Document tunable params. (Ankit)

--v3:
- Add line spaces to compute config. (Ankit)
- Remove redundancy checks.

--v4:
- Separate out conpute config to separate function.
- As all the valuse are being computed in scanlines, and slope
is still in usec, convert and store it to scanlines.

--v5:
- Update and add comments for slope calculation. (Ankit)
- Update early return conditions for dc balance compute. (Ankit)

--v6:
- Early return condition simplified for dc balance compute config. (Ankit)
- Make use of pipe restrictions to this patch. (Ankit)

--v7:
- Separate out PIPE_A and PIPE_B restrictions to other patch.(Ankit)

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20251223104542.2688548-8-mitulkumar.ajitkumar.golani@intel.com

authored by

Mitul Golani and committed by
Ankit Nautiyal 2873c8ea c09112ca

+45
+45
drivers/gpu/drm/i915/display/intel_vrr.c
··· 6 6 7 7 #include <drm/drm_print.h> 8 8 9 + #include "intel_crtc.h" 9 10 #include "intel_de.h" 10 11 #include "intel_display_regs.h" 11 12 #include "intel_display_types.h" ··· 20 19 21 20 #define FIXED_POINT_PRECISION 100 22 21 #define CMRR_PRECISION_TOLERANCE 10 22 + 23 + /* 24 + * Tunable parameters for DC Balance correction. 25 + * These are captured based on experimentations. 26 + */ 27 + #define DCB_CORRECTION_SENSITIVITY 30 28 + #define DCB_CORRECTION_AGGRESSIVENESS 1000 /* ms × 100; 10 ms */ 29 + #define DCB_BLANK_TARGET 50 23 30 24 31 bool intel_vrr_is_capable(struct intel_connector *connector) 25 32 { ··· 351 342 return vmax; 352 343 } 353 344 345 + static void 346 + intel_vrr_dc_balance_compute_config(struct intel_crtc_state *crtc_state) 347 + { 348 + int guardband_usec, adjustment_usec; 349 + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 350 + 351 + if (!HAS_VRR_DC_BALANCE(display) || !crtc_state->vrr.enable) 352 + return; 353 + 354 + crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax; 355 + crtc_state->vrr.dc_balance.vmin = crtc_state->vrr.vmin; 356 + crtc_state->vrr.dc_balance.max_increase = 357 + crtc_state->vrr.vmax - crtc_state->vrr.vmin; 358 + crtc_state->vrr.dc_balance.max_decrease = 359 + crtc_state->vrr.vmax - crtc_state->vrr.vmin; 360 + crtc_state->vrr.dc_balance.guardband = 361 + DIV_ROUND_UP(crtc_state->vrr.dc_balance.vmax * 362 + DCB_CORRECTION_SENSITIVITY, 100); 363 + guardband_usec = 364 + intel_scanlines_to_usecs(adjusted_mode, 365 + crtc_state->vrr.dc_balance.guardband); 366 + /* 367 + * The correction_aggressiveness/100 is the number of milliseconds to 368 + * adjust by when the balance is at twice the guardband. 369 + * guardband_slope = correction_aggressiveness / (guardband * 100) 370 + */ 371 + adjustment_usec = DCB_CORRECTION_AGGRESSIVENESS * 10; 372 + crtc_state->vrr.dc_balance.slope = 373 + DIV_ROUND_UP(adjustment_usec, guardband_usec); 374 + crtc_state->vrr.dc_balance.vblank_target = 375 + DIV_ROUND_UP((crtc_state->vrr.vmax - crtc_state->vrr.vmin) * 376 + DCB_BLANK_TARGET, 100); 377 + } 378 + 354 379 void 355 380 intel_vrr_compute_config(struct intel_crtc_state *crtc_state, 356 381 struct drm_connector_state *conn_state) ··· 442 399 (crtc_state->hw.adjusted_mode.crtc_vtotal - 443 400 crtc_state->hw.adjusted_mode.crtc_vsync_end); 444 401 } 402 + 403 + intel_vrr_dc_balance_compute_config(crtc_state); 445 404 } 446 405 447 406 static int