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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
media: rcar-csi2: Abstract PHTW and PHYPLL register offsets
Most of the registers used on the R-Car V4M CSI-2 IP are shared with the
devices already supported by the rcar-csi2 driver. Two registers which
function and layout are the same are however found on different offsets.
Prepare for adding support for R-Car V4M by storing the offset to these
two registers offsets in the device information structured. This way the
code, which is shared between the devices, can be reused when V4M
support is added.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
authored by
Niklas Söderlund
and committed by
Mauro Carvalho Chehab
28a034da
b230ddd8
+24
-3
+24
-3
drivers/media/platform/renesas/rcar-csi2.c
+24
-3
drivers/media/platform/renesas/rcar-csi2.c
···
584
584
NR_OF_RCAR_CSI2_PAD,
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};
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586
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+
struct rcsi2_register_layout {
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+
unsigned int phtw;
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+
unsigned int phypll;
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+
};
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+
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struct rcar_csi2_info {
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+
const struct rcsi2_register_layout *regs;
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int (*init_phtw)(struct rcar_csi2 *priv, unsigned int mbps);
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int (*phy_post_init)(struct rcar_csi2 *priv);
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int (*start_receiver)(struct rcar_csi2 *priv,
···
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((mbps - hsfreq_prev->mbps) <= (hsfreq->mbps - mbps)))
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hsfreq = hsfreq_prev;
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732
739
-
rcsi2_write(priv, PHYPLL_REG, PHYPLL_HSFREQRANGE(hsfreq->reg));
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+
rcsi2_write(priv, priv->info->regs->phypll, PHYPLL_HSFREQRANGE(hsfreq->reg));
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734
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return 0;
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}
···
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{
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unsigned int timeout;
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-
rcsi2_write(priv, PHTW_REG,
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+
rcsi2_write(priv, priv->info->regs->phtw,
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PHTW_DWEN | PHTW_TESTDIN_DATA(data) |
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PHTW_CWEN | PHTW_TESTDIN_CODE(code));
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/* Wait for DWEN and CWEN to be cleared by hardware. */
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for (timeout = 0; timeout <= 20; timeout++) {
1470
-
if (!(rcsi2_read(priv, PHTW_REG) & (PHTW_DWEN | PHTW_CWEN)))
1464
+
if (!(rcsi2_read(priv, priv->info->regs->phtw) & (PHTW_DWEN | PHTW_CWEN)))
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return 0;
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usleep_range(1000, 2000);
···
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return PTR_ERR_OR_ZERO(priv->rstc);
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}
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+
static const struct rcsi2_register_layout rcsi2_registers_gen3 = {
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+
.phtw = PHTW_REG,
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+
.phypll = PHYPLL_REG,
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+
};
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+
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static const struct rcar_csi2_info rcar_csi2_info_r8a7795 = {
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+
.regs = &rcsi2_registers_gen3,
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.init_phtw = rcsi2_init_phtw_h3_v3h_m3n,
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.start_receiver = rcsi2_start_receiver_gen3,
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.enter_standby = rcsi2_enter_standby_gen3,
···
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};
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static const struct rcar_csi2_info rcar_csi2_info_r8a7795es2 = {
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+
.regs = &rcsi2_registers_gen3,
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.init_phtw = rcsi2_init_phtw_h3es2,
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.start_receiver = rcsi2_start_receiver_gen3,
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.enter_standby = rcsi2_enter_standby_gen3,
···
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};
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static const struct rcar_csi2_info rcar_csi2_info_r8a7796 = {
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.regs = &rcsi2_registers_gen3,
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.start_receiver = rcsi2_start_receiver_gen3,
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.enter_standby = rcsi2_enter_standby_gen3,
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.hsfreqrange = hsfreqrange_m3w,
···
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};
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static const struct rcar_csi2_info rcar_csi2_info_r8a77961 = {
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+
.regs = &rcsi2_registers_gen3,
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.start_receiver = rcsi2_start_receiver_gen3,
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.enter_standby = rcsi2_enter_standby_gen3,
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.hsfreqrange = hsfreqrange_m3w,
···
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};
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static const struct rcar_csi2_info rcar_csi2_info_r8a77965 = {
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+
.regs = &rcsi2_registers_gen3,
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.init_phtw = rcsi2_init_phtw_h3_v3h_m3n,
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.start_receiver = rcsi2_start_receiver_gen3,
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.enter_standby = rcsi2_enter_standby_gen3,
···
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};
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static const struct rcar_csi2_info rcar_csi2_info_r8a77970 = {
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+
.regs = &rcsi2_registers_gen3,
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.init_phtw = rcsi2_init_phtw_v3m_e3,
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.phy_post_init = rcsi2_phy_post_init_v3m_e3,
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.start_receiver = rcsi2_start_receiver_gen3,
···
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};
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static const struct rcar_csi2_info rcar_csi2_info_r8a77980 = {
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+
.regs = &rcsi2_registers_gen3,
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.init_phtw = rcsi2_init_phtw_h3_v3h_m3n,
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.start_receiver = rcsi2_start_receiver_gen3,
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.enter_standby = rcsi2_enter_standby_gen3,
···
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};
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static const struct rcar_csi2_info rcar_csi2_info_r8a77990 = {
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+
.regs = &rcsi2_registers_gen3,
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.init_phtw = rcsi2_init_phtw_v3m_e3,
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.phy_post_init = rcsi2_phy_post_init_v3m_e3,
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.start_receiver = rcsi2_start_receiver_gen3,
···
1804
1785
};
1805
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static const struct rcar_csi2_info rcar_csi2_info_r8a779a0 = {
1788
+
.regs = &rcsi2_registers_gen3,
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.init_phtw = rcsi2_init_phtw_v3u,
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.start_receiver = rcsi2_start_receiver_gen3,
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.enter_standby = rcsi2_enter_standby_gen3,
···
1816
1796
};
1817
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static const struct rcar_csi2_info rcar_csi2_info_r8a779g0 = {
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+
.regs = &rcsi2_registers_gen3,
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.start_receiver = rcsi2_start_receiver_v4h,
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1801
.use_isp = true,
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.support_cphy = true,