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drm/amdgpu: Revert setting up Retry based Thrashing on GFX 12.1

Bug found with retry based thrashing mechanism. Revert to the old
thrashing method.

Signed-off-by: Sreekant Somasekharan <Sreekant.Somasekharan@amd.com>
Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Sreekant Somasekharan and committed by
Alex Deucher 29756a75 370deb69

-19
-19
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
··· 2631 2631 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCPG_PSP_DEBUG, data); 2632 2632 } 2633 2633 2634 - static void gfx_v12_1_xcc_setup_tcp_thrashing_ctrl(struct amdgpu_device *adev, 2635 - int xcc_id) 2636 - { 2637 - uint32_t val; 2638 - 2639 - /* Set the TCP UTCL0 register to enable atomics */ 2640 - val = RREG32_SOC15(GC, GET_INST(GC, xcc_id), 2641 - regTCP_UTCL0_THRASHING_CTRL); 2642 - val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL, THRASHING_EN, 0x2); 2643 - val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL, 2644 - RETRY_FRAGMENT_THRESHOLD_UP_EN, 0x1); 2645 - val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL, 2646 - RETRY_FRAGMENT_THRESHOLD_DOWN_EN, 0x1); 2647 - 2648 - WREG32_SOC15(GC, GET_INST(GC, xcc_id), 2649 - regTCP_UTCL0_THRASHING_CTRL, val); 2650 - } 2651 - 2652 2634 static void gfx_v12_1_xcc_enable_atomics(struct amdgpu_device *adev, 2653 2635 int xcc_id) 2654 2636 { ··· 2679 2697 for (i = 0; i < NUM_XCC(adev->gfx.xcc_mask); i++) { 2680 2698 gfx_v12_1_xcc_disable_burst(adev, i); 2681 2699 gfx_v12_1_xcc_enable_atomics(adev, i); 2682 - gfx_v12_1_xcc_setup_tcp_thrashing_ctrl(adev, i); 2683 2700 gfx_v12_1_xcc_disable_early_write_ack(adev, i); 2684 2701 gfx_v12_1_xcc_disable_tcp_spill_cache(adev, i); 2685 2702 }