Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ASoC: rt722-sdca: Make use of new expanded MBQ regmap
Now the MBQ regmap implementation handles multiple sizes, this driver
can combine its two register maps into one. So remove mbq_regmap and
combine all the registers into regmap.
Also as rt722_sdca_adc_mux_get/put() only exist to access mbq_regmap,
rather than doing any processing, these can now be dropped and the
normal DAPM helpers used.
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.dev>
Link: https://patch.msgid.link/20250107154408.814455-7-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Charles Keepax
and committed by
Mark Brown
299ce4be
f9a5c4b6
+105
-214
+26
-55
sound/soc/codecs/rt722-sdca-sdw.c
+26
-55
sound/soc/codecs/rt722-sdca-sdw.c
···
16
16
#include "rt722-sdca.h"
17
17
#include "rt722-sdca-sdw.h"
18
18
19
-
static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg)
19
+
static int rt722_sdca_mbq_size(struct device *dev, unsigned int reg)
20
20
{
21
21
switch (reg) {
22
22
case 0x2f01 ... 0x2f0a:
···
73
73
case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31,
74
74
RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0):
75
75
case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
76
-
return true;
77
-
default:
78
-
return false;
79
-
}
80
-
}
81
-
82
-
static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg)
83
-
{
84
-
switch (reg) {
85
-
case 0x2f01:
86
-
case 0x2f54:
87
-
case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
88
-
0):
89
-
case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER,
90
-
0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
91
-
RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
92
-
case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
93
-
return true;
94
-
default:
95
-
return false;
96
-
}
97
-
}
98
-
99
-
static bool rt722_sdca_mbq_readable_register(struct device *dev, unsigned int reg)
100
-
{
101
-
switch (reg) {
76
+
return 1;
102
77
case 0x2000000 ... 0x2000024:
103
78
case 0x2000029 ... 0x200004a:
104
79
case 0x2000051 ... 0x2000052:
···
126
151
RT722_SDCA_CTL_FU_CH_GAIN, CH_L):
127
152
case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
128
153
RT722_SDCA_CTL_FU_CH_GAIN, CH_R):
129
-
return true;
154
+
return 2;
130
155
default:
131
-
return false;
156
+
return 0;
132
157
}
133
158
}
134
159
135
-
static bool rt722_sdca_mbq_volatile_register(struct device *dev, unsigned int reg)
160
+
static struct regmap_sdw_mbq_cfg rt722_mbq_config = {
161
+
.mbq_size = rt722_sdca_mbq_size,
162
+
};
163
+
164
+
static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg)
165
+
{
166
+
return rt722_sdca_mbq_size(dev, reg) > 0;
167
+
}
168
+
169
+
static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg)
136
170
{
137
171
switch (reg) {
172
+
case 0x2f01:
173
+
case 0x2f54:
174
+
case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
175
+
0):
176
+
case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER,
177
+
0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
178
+
RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
179
+
case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
138
180
case 0x2000000:
139
181
case 0x200000d:
140
182
case 0x2000019:
···
170
178
171
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static const struct regmap_config rt722_sdca_regmap = {
172
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.reg_bits = 32,
173
-
.val_bits = 8,
181
+
.val_bits = 16,
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.readable_reg = rt722_sdca_readable_register,
175
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.volatile_reg = rt722_sdca_volatile_register,
176
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.max_register = 0x44ffffff,
177
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.reg_defaults = rt722_sdca_reg_defaults,
178
186
.num_reg_defaults = ARRAY_SIZE(rt722_sdca_reg_defaults),
179
-
.cache_type = REGCACHE_MAPLE,
180
-
.use_single_read = true,
181
-
.use_single_write = true,
182
-
};
183
-
184
-
static const struct regmap_config rt722_sdca_mbq_regmap = {
185
-
.name = "sdw-mbq",
186
-
.reg_bits = 32,
187
-
.val_bits = 16,
188
-
.readable_reg = rt722_sdca_mbq_readable_register,
189
-
.volatile_reg = rt722_sdca_mbq_volatile_register,
190
-
.max_register = 0x41000312,
191
-
.reg_defaults = rt722_sdca_mbq_defaults,
192
-
.num_reg_defaults = ARRAY_SIZE(rt722_sdca_mbq_defaults),
193
187
.cache_type = REGCACHE_MAPLE,
194
188
.use_single_read = true,
195
189
.use_single_write = true,
···
390
412
static int rt722_sdca_sdw_probe(struct sdw_slave *slave,
391
413
const struct sdw_device_id *id)
392
414
{
393
-
struct regmap *regmap, *mbq_regmap;
415
+
struct regmap *regmap;
394
416
395
417
/* Regmap Initialization */
396
-
mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt722_sdca_mbq_regmap);
397
-
if (IS_ERR(mbq_regmap))
398
-
return PTR_ERR(mbq_regmap);
399
-
400
-
regmap = devm_regmap_init_sdw(slave, &rt722_sdca_regmap);
418
+
regmap = devm_regmap_init_sdw_mbq_cfg(slave, &rt722_sdca_regmap, &rt722_mbq_config);
401
419
if (IS_ERR(regmap))
402
420
return PTR_ERR(regmap);
403
421
404
-
return rt722_sdca_init(&slave->dev, regmap, mbq_regmap, slave);
422
+
return rt722_sdca_init(&slave->dev, regmap, slave);
405
423
}
406
424
407
425
static int rt722_sdca_sdw_remove(struct sdw_slave *slave)
···
435
461
cancel_delayed_work_sync(&rt722->jack_btn_check_work);
436
462
437
463
regcache_cache_only(rt722->regmap, true);
438
-
regcache_cache_only(rt722->mbq_regmap, true);
439
464
440
465
return 0;
441
466
}
···
504
531
slave->unattach_request = 0;
505
532
regcache_cache_only(rt722->regmap, false);
506
533
regcache_sync(rt722->regmap);
507
-
regcache_cache_only(rt722->mbq_regmap, false);
508
-
regcache_sync(rt722->mbq_regmap);
509
534
return 0;
510
535
}
511
536
+48
-51
sound/soc/codecs/rt722-sdca-sdw.h
+48
-51
sound/soc/codecs/rt722-sdca-sdw.h
···
31
31
{ 0x2f5b, 0x07 },
32
32
{ 0x2f5c, 0x27 },
33
33
{ 0x2f5d, 0x07 },
34
-
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
35
-
0), 0x09 },
36
-
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
37
-
0), 0x09 },
38
-
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, RT722_SDCA_CTL_REQ_POWER_STATE,
39
-
0), 0x03 },
40
-
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, RT722_SDCA_CTL_REQ_POWER_STATE,
41
-
0), 0x03 },
42
-
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_MUTE, CH_L),
43
-
0x01 },
44
-
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_MUTE, CH_R),
45
-
0x01 },
46
-
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_MUTE, CH_L),
47
-
0x01 },
48
-
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_MUTE, CH_R),
49
-
0x01 },
50
-
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
51
-
0), 0x09 },
52
-
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_01),
53
-
0x01 },
54
-
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_02),
55
-
0x01 },
56
-
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_03),
57
-
0x01 },
58
-
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_04),
59
-
0x01 },
60
-
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, RT722_SDCA_CTL_REQ_POWER_STATE, 0),
61
-
0x03 },
62
-
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26, RT722_SDCA_CTL_VENDOR_DEF, 0),
63
-
0x00 },
64
-
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
65
-
0x09 },
66
-
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_MUTE, CH_L),
67
-
0x01 },
68
-
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_MUTE, CH_R),
69
-
0x01 },
70
-
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, RT722_SDCA_CTL_REQ_POWER_STATE, 0),
71
-
0x03 },
72
-
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23, RT722_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
73
-
};
74
-
75
-
static const struct reg_default rt722_sdca_mbq_defaults[] = {
76
34
{ 0x200003c, 0xc214 },
77
35
{ 0x2000046, 0x8004 },
36
+
{ 0x5810000, 0x702d },
78
37
{ 0x6100006, 0x0005 },
79
38
{ 0x6100010, 0x2630 },
80
39
{ 0x6100011, 0x152f },
···
45
86
{ 0x6100028, 0x2a2a },
46
87
{ 0x6100029, 0x4141 },
47
88
{ 0x6100055, 0x0000 },
48
-
{ 0x5810000, 0x702d },
89
+
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_MUTE, CH_L),
90
+
0x01 },
91
+
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_MUTE, CH_R),
92
+
0x01 },
49
93
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
50
94
CH_L), 0x0000 },
51
95
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
52
96
CH_R), 0x0000 },
97
+
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_MUTE, CH_L),
98
+
0x01 },
99
+
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_MUTE, CH_R),
100
+
0x01 },
53
101
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
54
102
CH_L), 0x0000 },
55
103
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
56
104
CH_R), 0x0000 },
105
+
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, RT722_SDCA_CTL_REQ_POWER_STATE,
106
+
0), 0x03 },
107
+
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
108
+
0), 0x09 },
109
+
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
110
+
0), 0x09 },
111
+
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, RT722_SDCA_CTL_REQ_POWER_STATE,
112
+
0), 0x03 },
57
113
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, RT722_SDCA_CTL_FU_CH_GAIN,
58
114
CH_L), 0x0000 },
59
115
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, RT722_SDCA_CTL_FU_CH_GAIN,
60
116
CH_R), 0x0000 },
61
-
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
62
-
CH_01), 0x0000 },
63
-
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
64
-
CH_02), 0x0000 },
65
-
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
66
-
CH_03), 0x0000 },
67
-
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
68
-
CH_04), 0x0000 },
69
117
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, CH_01),
70
118
0x0000 },
71
119
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, CH_02),
···
81
115
0x0000 },
82
116
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, CH_04),
83
117
0x0000 },
118
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_01),
119
+
0x01 },
120
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_02),
121
+
0x01 },
122
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_03),
123
+
0x01 },
124
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_MUTE, CH_04),
125
+
0x01 },
126
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
127
+
CH_01), 0x0000 },
128
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
129
+
CH_02), 0x0000 },
130
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
131
+
CH_03), 0x0000 },
132
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
133
+
CH_04), 0x0000 },
134
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, RT722_SDCA_CTL_REQ_POWER_STATE, 0),
135
+
0x03 },
136
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX,
137
+
0), 0x09 },
138
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26, RT722_SDCA_CTL_VENDOR_DEF, 0),
139
+
0x00 },
140
+
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_MUTE, CH_L),
141
+
0x01 },
142
+
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_MUTE, CH_R),
143
+
0x01 },
84
144
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_L),
85
145
0x0000 },
86
146
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_R),
87
147
0x0000 },
148
+
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, RT722_SDCA_CTL_REQ_POWER_STATE, 0),
149
+
0x03 },
150
+
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
151
+
0x09 },
152
+
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23, RT722_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
88
153
};
89
154
90
155
#endif /* __RT722_SDW_H__ */
+30
-105
sound/soc/codecs/rt722-sdca.c
+30
-105
sound/soc/codecs/rt722-sdca.c
···
25
25
26
26
#include "rt722-sdca.h"
27
27
28
+
#define RT722_NID_ADDR(nid, reg) ((nid) << 20 | (reg))
29
+
28
30
int rt722_sdca_index_write(struct rt722_sdca_priv *rt722,
29
31
unsigned int nid, unsigned int reg, unsigned int value)
30
32
{
31
-
struct regmap *regmap = rt722->mbq_regmap;
32
-
unsigned int addr = (nid << 20) | reg;
33
+
struct regmap *regmap = rt722->regmap;
34
+
unsigned int addr = RT722_NID_ADDR(nid, reg);
33
35
int ret;
34
36
35
37
ret = regmap_write(regmap, addr, value);
···
47
45
unsigned int nid, unsigned int reg, unsigned int *value)
48
46
{
49
47
int ret;
50
-
struct regmap *regmap = rt722->mbq_regmap;
51
-
unsigned int addr = (nid << 20) | reg;
48
+
struct regmap *regmap = rt722->regmap;
49
+
unsigned int addr = RT722_NID_ADDR(nid, reg);
52
50
53
51
ret = regmap_read(regmap, addr, value);
54
52
if (ret < 0)
···
363
361
strstr(ucontrol->id.name, "FU0F Capture Volume"))
364
362
adc_vol_flag = 1;
365
363
366
-
regmap_read(rt722->mbq_regmap, mc->reg, &lvalue);
367
-
regmap_read(rt722->mbq_regmap, mc->rreg, &rvalue);
364
+
regmap_read(rt722->regmap, mc->reg, &lvalue);
365
+
regmap_read(rt722->regmap, mc->rreg, &rvalue);
368
366
369
367
/* L Channel */
370
368
gain_l_val = ucontrol->value.integer.value[0];
···
404
402
return 0;
405
403
406
404
/* Lch*/
407
-
regmap_write(rt722->mbq_regmap, mc->reg, gain_l_val);
405
+
regmap_write(rt722->regmap, mc->reg, gain_l_val);
408
406
409
407
/* Rch */
410
-
regmap_write(rt722->mbq_regmap, mc->rreg, gain_r_val);
408
+
regmap_write(rt722->regmap, mc->rreg, gain_r_val);
411
409
412
-
regmap_read(rt722->mbq_regmap, mc->reg, &read_l);
413
-
regmap_read(rt722->mbq_regmap, mc->rreg, &read_r);
410
+
regmap_read(rt722->regmap, mc->reg, &read_l);
411
+
regmap_read(rt722->regmap, mc->rreg, &read_r);
414
412
if (read_r == gain_r_val && read_l == gain_l_val)
415
413
return changed;
416
414
···
433
431
strstr(ucontrol->id.name, "FU0F Capture Volume"))
434
432
adc_vol_flag = 1;
435
433
436
-
regmap_read(rt722->mbq_regmap, mc->reg, &read_l);
437
-
regmap_read(rt722->mbq_regmap, mc->rreg, &read_r);
434
+
regmap_read(rt722->regmap, mc->reg, &read_l);
435
+
regmap_read(rt722->regmap, mc->rreg, &read_r);
438
436
439
437
if (mc->shift == 8) /* boost gain */
440
438
ctl_l = read_l / tendB;
···
606
604
607
605
/* check all channels */
608
606
for (i = 0; i < p->count; i++) {
609
-
regmap_read(rt722->mbq_regmap, p->reg_base + i, ®value);
607
+
regmap_read(rt722->regmap, p->reg_base + i, ®value);
610
608
611
609
if (!adc_vol_flag) /* boost gain */
612
610
ctl = regvalue / boost_step;
···
639
637
640
638
/* check all channels */
641
639
for (i = 0; i < p->count; i++) {
642
-
regmap_read(rt722->mbq_regmap, p->reg_base + i, ®value[i]);
640
+
regmap_read(rt722->regmap, p->reg_base + i, ®value[i]);
643
641
644
642
gain_val[i] = ucontrol->value.integer.value[i];
645
643
if (gain_val[i] > p->max)
···
660
658
return 0;
661
659
662
660
for (i = 0; i < p->count; i++) {
663
-
err = regmap_write(rt722->mbq_regmap, p->reg_base + i, gain_val[i]);
661
+
err = regmap_write(rt722->regmap, p->reg_base + i, gain_val[i]);
664
662
if (err < 0)
665
663
dev_err(&rt722->slave->dev, "%s: %#08x can't be set\n",
666
664
__func__, p->reg_base + i);
···
741
739
4, 3, boost_vol_tlv),
742
740
};
743
741
744
-
static int rt722_sdca_adc_mux_get(struct snd_kcontrol *kcontrol,
745
-
struct snd_ctl_elem_value *ucontrol)
746
-
{
747
-
struct snd_soc_component *component =
748
-
snd_soc_dapm_kcontrol_component(kcontrol);
749
-
struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
750
-
unsigned int val = 0, mask_sft;
751
-
752
-
if (strstr(ucontrol->id.name, "ADC 22 Mux"))
753
-
mask_sft = 12;
754
-
else if (strstr(ucontrol->id.name, "ADC 24 Mux"))
755
-
mask_sft = 4;
756
-
else if (strstr(ucontrol->id.name, "ADC 25 Mux"))
757
-
mask_sft = 0;
758
-
else
759
-
return -EINVAL;
760
-
761
-
rt722_sdca_index_read(rt722, RT722_VENDOR_HDA_CTL,
762
-
RT722_HDA_LEGACY_MUX_CTL0, &val);
763
-
764
-
ucontrol->value.enumerated.item[0] = (val >> mask_sft) & 0x7;
765
-
766
-
return 0;
767
-
}
768
-
769
-
static int rt722_sdca_adc_mux_put(struct snd_kcontrol *kcontrol,
770
-
struct snd_ctl_elem_value *ucontrol)
771
-
{
772
-
struct snd_soc_component *component =
773
-
snd_soc_dapm_kcontrol_component(kcontrol);
774
-
struct snd_soc_dapm_context *dapm =
775
-
snd_soc_dapm_kcontrol_dapm(kcontrol);
776
-
struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
777
-
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
778
-
unsigned int *item = ucontrol->value.enumerated.item;
779
-
unsigned int val, val2 = 0, change, mask_sft;
780
-
781
-
if (item[0] >= e->items)
782
-
return -EINVAL;
783
-
784
-
if (strstr(ucontrol->id.name, "ADC 22 Mux"))
785
-
mask_sft = 12;
786
-
else if (strstr(ucontrol->id.name, "ADC 24 Mux"))
787
-
mask_sft = 4;
788
-
else if (strstr(ucontrol->id.name, "ADC 25 Mux"))
789
-
mask_sft = 0;
790
-
else
791
-
return -EINVAL;
792
-
793
-
val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
794
-
795
-
rt722_sdca_index_read(rt722, RT722_VENDOR_HDA_CTL,
796
-
RT722_HDA_LEGACY_MUX_CTL0, &val2);
797
-
val2 = (0x7 << mask_sft) & val2;
798
-
799
-
if (val == val2)
800
-
change = 0;
801
-
else
802
-
change = 1;
803
-
804
-
if (change)
805
-
rt722_sdca_index_update_bits(rt722, RT722_VENDOR_HDA_CTL,
806
-
RT722_HDA_LEGACY_MUX_CTL0, 0x7 << mask_sft,
807
-
val << mask_sft);
808
-
809
-
snd_soc_dapm_mux_update_power(dapm, kcontrol,
810
-
item[0], e, NULL);
811
-
812
-
return change;
813
-
}
814
-
815
742
static const char * const adc22_mux_text[] = {
816
743
"MIC2",
817
744
"LINE1",
···
752
821
"DMIC2",
753
822
};
754
823
755
-
static SOC_ENUM_SINGLE_DECL(
756
-
rt722_adc22_enum, SND_SOC_NOPM, 0, adc22_mux_text);
824
+
static SOC_ENUM_SINGLE_DECL(rt722_adc22_enum,
825
+
RT722_NID_ADDR(RT722_VENDOR_HDA_CTL, RT722_HDA_LEGACY_MUX_CTL0),
826
+
12, adc22_mux_text);
757
827
758
-
static SOC_ENUM_SINGLE_DECL(
759
-
rt722_adc24_enum, SND_SOC_NOPM, 0, adc07_10_mux_text);
828
+
static SOC_ENUM_SINGLE_DECL(rt722_adc24_enum,
829
+
RT722_NID_ADDR(RT722_VENDOR_HDA_CTL, RT722_HDA_LEGACY_MUX_CTL0),
830
+
4, adc07_10_mux_text);
760
831
761
-
static SOC_ENUM_SINGLE_DECL(
762
-
rt722_adc25_enum, SND_SOC_NOPM, 0, adc07_10_mux_text);
832
+
static SOC_ENUM_SINGLE_DECL(rt722_adc25_enum,
833
+
RT722_NID_ADDR(RT722_VENDOR_HDA_CTL, RT722_HDA_LEGACY_MUX_CTL0),
834
+
0, adc07_10_mux_text);
763
835
764
836
static const struct snd_kcontrol_new rt722_sdca_adc22_mux =
765
-
SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt722_adc22_enum,
766
-
rt722_sdca_adc_mux_get, rt722_sdca_adc_mux_put);
837
+
SOC_DAPM_ENUM("ADC 22 Mux", rt722_adc22_enum);
767
838
768
839
static const struct snd_kcontrol_new rt722_sdca_adc24_mux =
769
-
SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt722_adc24_enum,
770
-
rt722_sdca_adc_mux_get, rt722_sdca_adc_mux_put);
840
+
SOC_DAPM_ENUM("ADC 24 Mux", rt722_adc24_enum);
771
841
772
842
static const struct snd_kcontrol_new rt722_sdca_adc25_mux =
773
-
SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt722_adc25_enum,
774
-
rt722_sdca_adc_mux_get, rt722_sdca_adc_mux_put);
843
+
SOC_DAPM_ENUM("ADC 25 Mux", rt722_adc25_enum);
775
844
776
845
static int rt722_sdca_fu42_event(struct snd_soc_dapm_widget *w,
777
846
struct snd_kcontrol *kcontrol, int event)
···
1266
1335
}
1267
1336
};
1268
1337
1269
-
int rt722_sdca_init(struct device *dev, struct regmap *regmap,
1270
-
struct regmap *mbq_regmap, struct sdw_slave *slave)
1338
+
int rt722_sdca_init(struct device *dev, struct regmap *regmap, struct sdw_slave *slave)
1271
1339
{
1272
1340
struct rt722_sdca_priv *rt722;
1273
1341
···
1277
1347
dev_set_drvdata(dev, rt722);
1278
1348
rt722->slave = slave;
1279
1349
rt722->regmap = regmap;
1280
-
rt722->mbq_regmap = mbq_regmap;
1281
1350
1282
1351
mutex_init(&rt722->calibrate_mutex);
1283
1352
mutex_init(&rt722->disable_irq_lock);
···
1450
1521
if (rt722->first_hw_init) {
1451
1522
regcache_cache_only(rt722->regmap, false);
1452
1523
regcache_cache_bypass(rt722->regmap, true);
1453
-
regcache_cache_only(rt722->mbq_regmap, false);
1454
-
regcache_cache_bypass(rt722->mbq_regmap, true);
1455
1524
} else {
1456
1525
/*
1457
1526
* PM runtime is only enabled when a Slave reports as Attached
···
1477
1550
if (rt722->first_hw_init) {
1478
1551
regcache_cache_bypass(rt722->regmap, false);
1479
1552
regcache_mark_dirty(rt722->regmap);
1480
-
regcache_cache_bypass(rt722->mbq_regmap, false);
1481
-
regcache_mark_dirty(rt722->mbq_regmap);
1482
1553
} else
1483
1554
rt722->first_hw_init = true;
1484
1555
+1
-3
sound/soc/codecs/rt722-sdca.h
+1
-3
sound/soc/codecs/rt722-sdca.h
···
17
17
18
18
struct rt722_sdca_priv {
19
19
struct regmap *regmap;
20
-
struct regmap *mbq_regmap;
21
20
struct snd_soc_component *component;
22
21
struct sdw_slave *slave;
23
22
struct sdw_bus_params params;
···
228
229
};
229
230
230
231
int rt722_sdca_io_init(struct device *dev, struct sdw_slave *slave);
231
-
int rt722_sdca_init(struct device *dev, struct regmap *regmap,
232
-
struct regmap *mbq_regmap, struct sdw_slave *slave);
232
+
int rt722_sdca_init(struct device *dev, struct regmap *regmap, struct sdw_slave *slave);
233
233
int rt722_sdca_index_write(struct rt722_sdca_priv *rt722,
234
234
unsigned int nid, unsigned int reg, unsigned int value);
235
235
int rt722_sdca_index_read(struct rt722_sdca_priv *rt722,