Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915: Clean up PCI config space reg defines
The PCI config space register defines in i915_drm.h are
a bit of a mess; Whitespace is all over the place, register
masks and values are defined in inconsistent ways.
Clean it up a bit.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251208182637.334-19-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
+34
-36
+34
-36
include/drm/intel/i915_drm.h
+34
-36
include/drm/intel/i915_drm.h
···
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* cares about the vga bit for the vga arbiter.
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*/
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#define SNB_GMCH_CTRL 0x50
48
-
#define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */
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#define SNB_GMCH_GGMS_MASK 0x3
50
-
#define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */
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#define SNB_GMCH_GMS_MASK 0x1f
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#define BDW_GMCH_GGMS_SHIFT 6
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#define BDW_GMCH_GGMS_MASK 0x3
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#define BDW_GMCH_GMS_SHIFT 8
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#define BDW_GMCH_GMS_MASK 0xff
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+
#define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */
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#define SNB_GMCH_GGMS_MASK 0x3
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#define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */
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#define SNB_GMCH_GMS_MASK 0x1f
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#define BDW_GMCH_GGMS_SHIFT 6
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#define BDW_GMCH_GGMS_MASK 0x3
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#define BDW_GMCH_GMS_SHIFT 8
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#define BDW_GMCH_GMS_MASK 0xff
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#define I830_GMCH_CTRL 0x52
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-
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#define I830_GMCH_GMS_MASK 0x70
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#define I830_GMCH_GMS_LOCAL 0x10
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#define I830_GMCH_GMS_STOLEN_512 0x20
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#define I830_GMCH_GMS_STOLEN_1024 0x30
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#define I830_GMCH_GMS_STOLEN_8192 0x40
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#define I855_GMCH_GMS_MASK 0xF0
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#define I855_GMCH_GMS_STOLEN_0M 0x0
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#define I855_GMCH_GMS_STOLEN_1M (0x1 << 4)
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#define I855_GMCH_GMS_STOLEN_4M (0x2 << 4)
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#define I855_GMCH_GMS_STOLEN_8M (0x3 << 4)
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#define I855_GMCH_GMS_STOLEN_16M (0x4 << 4)
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#define I855_GMCH_GMS_STOLEN_32M (0x5 << 4)
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#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4)
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#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4)
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#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4)
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#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4)
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#define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4)
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#define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4)
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#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4)
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#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4)
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#define I830_GMCH_GMS_MASK (0x7 << 4)
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#define I830_GMCH_GMS_LOCAL (0x1 << 4)
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#define I830_GMCH_GMS_STOLEN_512 (0x2 << 4)
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#define I830_GMCH_GMS_STOLEN_1024 (0x3 << 4)
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#define I830_GMCH_GMS_STOLEN_8192 (0x4 << 4)
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#define I855_GMCH_GMS_MASK (0xF << 4)
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#define I855_GMCH_GMS_STOLEN_0M (0x0 << 4)
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#define I855_GMCH_GMS_STOLEN_1M (0x1 << 4)
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#define I855_GMCH_GMS_STOLEN_4M (0x2 << 4)
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#define I855_GMCH_GMS_STOLEN_8M (0x3 << 4)
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#define I855_GMCH_GMS_STOLEN_16M (0x4 << 4)
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#define I855_GMCH_GMS_STOLEN_32M (0x5 << 4)
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#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4)
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#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4)
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#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4)
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#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4)
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#define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4)
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#define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4)
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#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4)
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#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4)
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/* valid for both I830_GMCH_CTRL and SNB_GMCH_CTRL */
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#define INTEL_GMCH_VGA_DISABLE (1 << 1)
···
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#define I830_ESMRAMC 0x91
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#define I845_ESMRAMC 0x9e
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#define I85X_ESMRAMC 0x61
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#define TSEG_ENABLE (1 << 0)
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#define I830_TSEG_SIZE_512K (0 << 1)
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#define I830_TSEG_SIZE_1M (1 << 1)
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#define I845_TSEG_SIZE_MASK (3 << 1)
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#define I845_TSEG_SIZE_512K (2 << 1)
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#define I845_TSEG_SIZE_1M (3 << 1)
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#define TSEG_ENABLE (1 << 0)
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#define I830_TSEG_SIZE_512K (0 << 1)
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#define I830_TSEG_SIZE_1M (1 << 1)
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#define I845_TSEG_SIZE_MASK (3 << 1)
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#define I845_TSEG_SIZE_512K (2 << 1)
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#define I845_TSEG_SIZE_1M (3 << 1)
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#define INTEL_BSM 0x5c
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#define INTEL_GEN11_BSM_DW0 0xc0