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drm/{i915,xe}/hdcp: use parent interface for HDCP GSC calls

The HDCP GSC implementation is different for both i915 and xe. Add it to
the display parent interface, and call the hooks via the parent
interface.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/e397073e91f8aa7518754b3b79f65c1936be91ad.1764090990.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

+140 -82
+2 -2
drivers/gpu/drm/i915/display/intel_hdcp.c
··· 29 29 #include "intel_display_types.h" 30 30 #include "intel_dp_mst.h" 31 31 #include "intel_hdcp.h" 32 - #include "intel_hdcp_gsc.h" 33 32 #include "intel_hdcp_gsc_message.h" 34 33 #include "intel_hdcp_regs.h" 35 34 #include "intel_hdcp_shim.h" 35 + #include "intel_parent.h" 36 36 #include "intel_pcode.h" 37 37 #include "intel_step.h" 38 38 ··· 258 258 259 259 /* If MTL+ make sure gsc is loaded and proxy is setup */ 260 260 if (USE_HDCP_GSC(display)) { 261 - if (!intel_hdcp_gsc_check_status(display->drm)) 261 + if (!intel_parent_hdcp_gsc_check_status(display)) 262 262 return false; 263 263 } 264 264
-22
drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
··· 1 - /* SPDX-License-Identifier: MIT */ 2 - /* 3 - * Copyright © 2023 Intel Corporation 4 - */ 5 - 6 - #ifndef __INTEL_HDCP_GSC_H__ 7 - #define __INTEL_HDCP_GSC_H__ 8 - 9 - #include <linux/types.h> 10 - 11 - struct drm_device; 12 - struct intel_hdcp_gsc_context; 13 - 14 - ssize_t intel_hdcp_gsc_msg_send(struct intel_hdcp_gsc_context *gsc_context, 15 - void *msg_in, size_t msg_in_len, 16 - void *msg_out, size_t msg_out_len); 17 - bool intel_hdcp_gsc_check_status(struct drm_device *drm); 18 - 19 - struct intel_hdcp_gsc_context *intel_hdcp_gsc_context_alloc(struct drm_device *drm); 20 - void intel_hdcp_gsc_context_free(struct intel_hdcp_gsc_context *gsc_context); 21 - 22 - #endif /* __INTEL_HDCP_GCS_H__ */
+36 -42
drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c
··· 10 10 11 11 #include "intel_display_core.h" 12 12 #include "intel_display_types.h" 13 - #include "intel_hdcp_gsc.h" 14 13 #include "intel_hdcp_gsc_message.h" 14 + #include "intel_parent.h" 15 15 16 16 static int 17 17 intel_hdcp_gsc_initiate_session(struct device *dev, struct hdcp_port_data *data, ··· 44 44 session_init_in.port.attached_transcoder = (u8)data->hdcp_transcoder; 45 45 session_init_in.protocol = data->protocol; 46 46 47 - byte = intel_hdcp_gsc_msg_send(gsc_context, &session_init_in, 48 - sizeof(session_init_in), 49 - &session_init_out, 50 - sizeof(session_init_out)); 47 + byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, 48 + &session_init_in, sizeof(session_init_in), 49 + &session_init_out, sizeof(session_init_out)); 51 50 if (byte < 0) { 52 51 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); 53 52 return byte; ··· 105 106 memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN); 106 107 memcpy(verify_rxcert_in.rx_caps, rx_cert->rx_caps, HDCP_2_2_RXCAPS_LEN); 107 108 108 - byte = intel_hdcp_gsc_msg_send(gsc_context, &verify_rxcert_in, 109 - sizeof(verify_rxcert_in), 110 - &verify_rxcert_out, 111 - sizeof(verify_rxcert_out)); 109 + byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, 110 + &verify_rxcert_in, sizeof(verify_rxcert_in), 111 + &verify_rxcert_out, sizeof(verify_rxcert_out)); 112 112 if (byte < 0) { 113 113 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed: %zd\n", byte); 114 114 return byte; ··· 167 169 memcpy(send_hprime_in.h_prime, rx_hprime->h_prime, 168 170 HDCP_2_2_H_PRIME_LEN); 169 171 170 - byte = intel_hdcp_gsc_msg_send(gsc_context, &send_hprime_in, 171 - sizeof(send_hprime_in), 172 - &send_hprime_out, 173 - sizeof(send_hprime_out)); 172 + byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, 173 + &send_hprime_in, sizeof(send_hprime_in), 174 + &send_hprime_out, sizeof(send_hprime_out)); 174 175 if (byte < 0) { 175 176 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); 176 177 return byte; ··· 217 220 memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km, 218 221 HDCP_2_2_E_KH_KM_LEN); 219 222 220 - byte = intel_hdcp_gsc_msg_send(gsc_context, &pairing_info_in, 221 - sizeof(pairing_info_in), 222 - &pairing_info_out, 223 - sizeof(pairing_info_out)); 223 + byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, 224 + &pairing_info_in, sizeof(pairing_info_in), 225 + &pairing_info_out, sizeof(pairing_info_out)); 224 226 if (byte < 0) { 225 227 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); 226 228 return byte; ··· 265 269 lc_init_in.port.physical_port = (u8)data->hdcp_ddi; 266 270 lc_init_in.port.attached_transcoder = (u8)data->hdcp_transcoder; 267 271 268 - byte = intel_hdcp_gsc_msg_send(gsc_context, &lc_init_in, sizeof(lc_init_in), 269 - &lc_init_out, sizeof(lc_init_out)); 272 + byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, 273 + &lc_init_in, sizeof(lc_init_in), 274 + &lc_init_out, sizeof(lc_init_out)); 270 275 if (byte < 0) { 271 276 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); 272 277 return byte; ··· 318 321 memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime, 319 322 HDCP_2_2_L_PRIME_LEN); 320 323 321 - byte = intel_hdcp_gsc_msg_send(gsc_context, &verify_lprime_in, 322 - sizeof(verify_lprime_in), 323 - &verify_lprime_out, 324 - sizeof(verify_lprime_out)); 324 + byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, 325 + &verify_lprime_in, sizeof(verify_lprime_in), 326 + &verify_lprime_out, sizeof(verify_lprime_out)); 325 327 if (byte < 0) { 326 328 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); 327 329 return byte; ··· 366 370 get_skey_in.port.physical_port = (u8)data->hdcp_ddi; 367 371 get_skey_in.port.attached_transcoder = (u8)data->hdcp_transcoder; 368 372 369 - byte = intel_hdcp_gsc_msg_send(gsc_context, &get_skey_in, sizeof(get_skey_in), 370 - &get_skey_out, sizeof(get_skey_out)); 373 + byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, 374 + &get_skey_in, sizeof(get_skey_in), 375 + &get_skey_out, sizeof(get_skey_out)); 371 376 if (byte < 0) { 372 377 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); 373 378 return byte; ··· 431 434 memcpy(verify_repeater_in.receiver_ids, rep_topology->receiver_ids, 432 435 HDCP_2_2_RECEIVER_IDS_MAX_LEN); 433 436 434 - byte = intel_hdcp_gsc_msg_send(gsc_context, &verify_repeater_in, 435 - sizeof(verify_repeater_in), 436 - &verify_repeater_out, 437 - sizeof(verify_repeater_out)); 437 + byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, 438 + &verify_repeater_in, sizeof(verify_repeater_in), 439 + &verify_repeater_out, sizeof(verify_repeater_out)); 438 440 if (byte < 0) { 439 441 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); 440 442 return byte; ··· 500 504 501 505 verify_mprime_in->k = cpu_to_be16(data->k); 502 506 503 - byte = intel_hdcp_gsc_msg_send(gsc_context, verify_mprime_in, cmd_size, 504 - &verify_mprime_out, 505 - sizeof(verify_mprime_out)); 507 + byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, 508 + verify_mprime_in, cmd_size, 509 + &verify_mprime_out, sizeof(verify_mprime_out)); 506 510 kfree(verify_mprime_in); 507 511 if (byte < 0) { 508 512 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); ··· 548 552 enable_auth_in.port.attached_transcoder = (u8)data->hdcp_transcoder; 549 553 enable_auth_in.stream_type = data->streams[0].stream_type; 550 554 551 - byte = intel_hdcp_gsc_msg_send(gsc_context, &enable_auth_in, 552 - sizeof(enable_auth_in), 553 - &enable_auth_out, 554 - sizeof(enable_auth_out)); 555 + byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, 556 + &enable_auth_in, sizeof(enable_auth_in), 557 + &enable_auth_out, sizeof(enable_auth_out)); 555 558 if (byte < 0) { 556 559 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); 557 560 return byte; ··· 594 599 session_close_in.port.physical_port = (u8)data->hdcp_ddi; 595 600 session_close_in.port.attached_transcoder = (u8)data->hdcp_transcoder; 596 601 597 - byte = intel_hdcp_gsc_msg_send(gsc_context, &session_close_in, 598 - sizeof(session_close_in), 599 - &session_close_out, 600 - sizeof(session_close_out)); 602 + byte = intel_parent_hdcp_gsc_msg_send(display, gsc_context, 603 + &session_close_in, sizeof(session_close_in), 604 + &session_close_out, sizeof(session_close_out)); 601 605 if (byte < 0) { 602 606 drm_dbg_kms(display->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte); 603 607 return byte; ··· 639 645 640 646 mutex_lock(&display->hdcp.hdcp_mutex); 641 647 642 - gsc_context = intel_hdcp_gsc_context_alloc(display->drm); 648 + gsc_context = intel_parent_hdcp_gsc_context_alloc(display); 643 649 if (IS_ERR(gsc_context)) { 644 650 ret = PTR_ERR(gsc_context); 645 651 kfree(arbiter); ··· 659 665 660 666 void intel_hdcp_gsc_fini(struct intel_display *display) 661 667 { 662 - intel_hdcp_gsc_context_free(display->hdcp.gsc_context); 668 + intel_parent_hdcp_gsc_context_free(display, display->hdcp.gsc_context); 663 669 display->hdcp.gsc_context = NULL; 664 670 kfree(display->hdcp.arbiter); 665 671 display->hdcp.arbiter = NULL;
+24
drivers/gpu/drm/i915/display/intel_parent.c
··· 22 22 #include "intel_display_core.h" 23 23 #include "intel_parent.h" 24 24 25 + ssize_t intel_parent_hdcp_gsc_msg_send(struct intel_display *display, 26 + struct intel_hdcp_gsc_context *gsc_context, 27 + void *msg_in, size_t msg_in_len, 28 + void *msg_out, size_t msg_out_len) 29 + { 30 + return display->parent->hdcp->gsc_msg_send(gsc_context, msg_in, msg_in_len, msg_out, msg_out_len); 31 + } 32 + 33 + bool intel_parent_hdcp_gsc_check_status(struct intel_display *display) 34 + { 35 + return display->parent->hdcp->gsc_check_status(display->drm); 36 + } 37 + 38 + struct intel_hdcp_gsc_context *intel_parent_hdcp_gsc_context_alloc(struct intel_display *display) 39 + { 40 + return display->parent->hdcp->gsc_context_alloc(display->drm); 41 + } 42 + 43 + void intel_parent_hdcp_gsc_context_free(struct intel_display *display, 44 + struct intel_hdcp_gsc_context *gsc_context) 45 + { 46 + display->parent->hdcp->gsc_context_free(gsc_context); 47 + } 48 + 25 49 bool intel_parent_irq_enabled(struct intel_display *display) 26 50 { 27 51 return display->parent->irq->enabled(display->drm);
+10
drivers/gpu/drm/i915/display/intel_parent.h
··· 8 8 9 9 struct dma_fence; 10 10 struct intel_display; 11 + struct intel_hdcp_gsc_context; 12 + 13 + ssize_t intel_parent_hdcp_gsc_msg_send(struct intel_display *display, 14 + struct intel_hdcp_gsc_context *gsc_context, 15 + void *msg_in, size_t msg_in_len, 16 + void *msg_out, size_t msg_out_len); 17 + bool intel_parent_hdcp_gsc_check_status(struct intel_display *display); 18 + struct intel_hdcp_gsc_context *intel_parent_hdcp_gsc_context_alloc(struct intel_display *display); 19 + void intel_parent_hdcp_gsc_context_free(struct intel_display *display, 20 + struct intel_hdcp_gsc_context *gsc_context); 11 21 12 22 bool intel_parent_irq_enabled(struct intel_display *display); 13 23 void intel_parent_irq_synchronize(struct intel_display *display);
+2
drivers/gpu/drm/i915/i915_driver.c
··· 96 96 #include "i915_file_private.h" 97 97 #include "i915_getparam.h" 98 98 #include "i915_gmch.h" 99 + #include "i915_hdcp_gsc.h" 99 100 #include "i915_hwmon.h" 100 101 #include "i915_ioc32.h" 101 102 #include "i915_ioctl.h" ··· 758 757 } 759 758 760 759 static const struct intel_display_parent_interface parent = { 760 + .hdcp = &i915_display_hdcp_interface, 761 761 .rpm = &i915_display_rpm_interface, 762 762 .irq = &i915_display_irq_interface, 763 763 .rps = &i915_display_rps_interface,
+15 -7
drivers/gpu/drm/i915/i915_hdcp_gsc.c
··· 4 4 */ 5 5 6 6 #include <drm/drm_print.h> 7 + #include <drm/intel/display_parent_interface.h> 7 8 #include <drm/intel/i915_hdcp_interface.h> 8 9 9 - #include "display/intel_hdcp_gsc.h" 10 10 #include "gem/i915_gem_region.h" 11 11 #include "gt/intel_gt.h" 12 12 #include "gt/uc/intel_gsc_uc_heci_cmd_submit.h" 13 13 #include "i915_drv.h" 14 + #include "i915_hdcp_gsc.h" 14 15 15 16 struct intel_hdcp_gsc_context { 16 17 struct drm_i915_private *i915; ··· 20 19 void *hdcp_cmd_out; 21 20 }; 22 21 23 - bool intel_hdcp_gsc_check_status(struct drm_device *drm) 22 + static bool intel_hdcp_gsc_check_status(struct drm_device *drm) 24 23 { 25 24 struct drm_i915_private *i915 = to_i915(drm); 26 25 struct intel_gt *gt = i915->media_gt; ··· 88 87 return err; 89 88 } 90 89 91 - struct intel_hdcp_gsc_context *intel_hdcp_gsc_context_alloc(struct drm_device *drm) 90 + static struct intel_hdcp_gsc_context *intel_hdcp_gsc_context_alloc(struct drm_device *drm) 92 91 { 93 92 struct drm_i915_private *i915 = to_i915(drm); 94 93 struct intel_hdcp_gsc_context *gsc_context; ··· 112 111 return gsc_context; 113 112 } 114 113 115 - void intel_hdcp_gsc_context_free(struct intel_hdcp_gsc_context *gsc_context) 114 + static void intel_hdcp_gsc_context_free(struct intel_hdcp_gsc_context *gsc_context) 116 115 { 117 116 if (!gsc_context) 118 117 return; ··· 169 168 * gsc cs memory header as stated in specs after which the normal HDCP payload 170 169 * will follow 171 170 */ 172 - ssize_t intel_hdcp_gsc_msg_send(struct intel_hdcp_gsc_context *gsc_context, 173 - void *msg_in, size_t msg_in_len, 174 - void *msg_out, size_t msg_out_len) 171 + static ssize_t intel_hdcp_gsc_msg_send(struct intel_hdcp_gsc_context *gsc_context, 172 + void *msg_in, size_t msg_in_len, 173 + void *msg_out, size_t msg_out_len) 175 174 { 176 175 struct drm_i915_private *i915 = gsc_context->i915; 177 176 struct intel_gt *gt = i915->media_gt; ··· 238 237 err: 239 238 return ret; 240 239 } 240 + 241 + const struct intel_display_hdcp_interface i915_display_hdcp_interface = { 242 + .gsc_msg_send = intel_hdcp_gsc_msg_send, 243 + .gsc_check_status = intel_hdcp_gsc_check_status, 244 + .gsc_context_alloc = intel_hdcp_gsc_context_alloc, 245 + .gsc_context_free = intel_hdcp_gsc_context_free, 246 + };
+9
drivers/gpu/drm/i915/i915_hdcp_gsc.h
··· 1 + /* SPDX-License-Identifier: MIT */ 2 + /* Copyright © 2025 Intel Corporation */ 3 + 4 + #ifndef __I915_HDCP_GSC_H__ 5 + #define __I915_HDCP_GSC_H__ 6 + 7 + extern const struct intel_display_hdcp_interface i915_display_hdcp_interface; 8 + 9 + #endif /* __I915_HDCP_GSC_H__ */
+2
drivers/gpu/drm/xe/display/xe_display.c
··· 37 37 #include "skl_watermark.h" 38 38 #include "xe_display_rpm.h" 39 39 #include "xe_module.h" 40 + #include "xe_hdcp_gsc.h" 40 41 41 42 /* Ensure drm and display members are placed properly. */ 42 43 INTEL_DISPLAY_MEMBER_STATIC_ASSERT(struct xe_device, drm, display); ··· 535 534 }; 536 535 537 536 static const struct intel_display_parent_interface parent = { 537 + .hdcp = &xe_display_hdcp_interface, 538 538 .rpm = &xe_display_rpm_interface, 539 539 .irq = &xe_display_irq_interface, 540 540 };
+18 -9
drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
··· 3 3 * Copyright 2023, Intel Corporation. 4 4 */ 5 5 6 - #include <drm/drm_print.h> 7 - #include <drm/intel/i915_hdcp_interface.h> 8 6 #include <linux/delay.h> 9 7 8 + #include <drm/drm_print.h> 9 + #include <drm/intel/display_parent_interface.h> 10 + #include <drm/intel/i915_hdcp_interface.h> 11 + 10 12 #include "abi/gsc_command_header_abi.h" 11 - #include "intel_hdcp_gsc.h" 12 13 #include "xe_bo.h" 13 14 #include "xe_device.h" 14 15 #include "xe_device_types.h" 15 16 #include "xe_force_wake.h" 16 17 #include "xe_gsc_proxy.h" 17 18 #include "xe_gsc_submit.h" 19 + #include "xe_hdcp_gsc.h" 18 20 #include "xe_map.h" 19 21 #include "xe_pm.h" 20 22 #include "xe_uc_fw.h" ··· 32 30 33 31 #define HDCP_GSC_HEADER_SIZE sizeof(struct intel_gsc_mtl_header) 34 32 35 - bool intel_hdcp_gsc_check_status(struct drm_device *drm) 33 + static bool intel_hdcp_gsc_check_status(struct drm_device *drm) 36 34 { 37 35 struct xe_device *xe = to_xe_device(drm); 38 36 struct xe_tile *tile = xe_device_get_root_tile(xe); ··· 98 96 return ret; 99 97 } 100 98 101 - struct intel_hdcp_gsc_context *intel_hdcp_gsc_context_alloc(struct drm_device *drm) 99 + static struct intel_hdcp_gsc_context *intel_hdcp_gsc_context_alloc(struct drm_device *drm) 102 100 { 103 101 struct xe_device *xe = to_xe_device(drm); 104 102 struct intel_hdcp_gsc_context *gsc_context; ··· 122 120 return gsc_context; 123 121 } 124 122 125 - void intel_hdcp_gsc_context_free(struct intel_hdcp_gsc_context *gsc_context) 123 + static void intel_hdcp_gsc_context_free(struct intel_hdcp_gsc_context *gsc_context) 126 124 { 127 125 if (!gsc_context) 128 126 return; ··· 157 155 return ret; 158 156 } 159 157 160 - ssize_t intel_hdcp_gsc_msg_send(struct intel_hdcp_gsc_context *gsc_context, 161 - void *msg_in, size_t msg_in_len, 162 - void *msg_out, size_t msg_out_len) 158 + static ssize_t intel_hdcp_gsc_msg_send(struct intel_hdcp_gsc_context *gsc_context, 159 + void *msg_in, size_t msg_in_len, 160 + void *msg_out, size_t msg_out_len) 163 161 { 164 162 struct xe_device *xe = gsc_context->xe; 165 163 const size_t max_msg_size = PAGE_SIZE - HDCP_GSC_HEADER_SIZE; ··· 213 211 xe_pm_runtime_put(xe); 214 212 return ret; 215 213 } 214 + 215 + const struct intel_display_hdcp_interface xe_display_hdcp_interface = { 216 + .gsc_msg_send = intel_hdcp_gsc_msg_send, 217 + .gsc_check_status = intel_hdcp_gsc_check_status, 218 + .gsc_context_alloc = intel_hdcp_gsc_context_alloc, 219 + .gsc_context_free = intel_hdcp_gsc_context_free, 220 + };
+9
drivers/gpu/drm/xe/display/xe_hdcp_gsc.h
··· 1 + /* SPDX-License-Identifier: MIT */ 2 + /* Copyright © 2025 Intel Corporation */ 3 + 4 + #ifndef __XE_HDCP_GSC_H__ 5 + #define __XE_HDCP_GSC_H__ 6 + 7 + extern const struct intel_display_hdcp_interface xe_display_hdcp_interface; 8 + 9 + #endif
+13
include/drm/intel/display_parent_interface.h
··· 8 8 9 9 struct dma_fence; 10 10 struct drm_device; 11 + struct intel_hdcp_gsc_context; 11 12 struct ref_tracker; 12 13 13 14 struct intel_display_rpm_interface { ··· 25 24 void (*assert_held)(const struct drm_device *drm); 26 25 void (*assert_block)(const struct drm_device *drm); 27 26 void (*assert_unblock)(const struct drm_device *drm); 27 + }; 28 + 29 + struct intel_display_hdcp_interface { 30 + ssize_t (*gsc_msg_send)(struct intel_hdcp_gsc_context *gsc_context, 31 + void *msg_in, size_t msg_in_len, 32 + void *msg_out, size_t msg_out_len); 33 + bool (*gsc_check_status)(struct drm_device *drm); 34 + struct intel_hdcp_gsc_context *(*gsc_context_alloc)(struct drm_device *drm); 35 + void (*gsc_context_free)(struct intel_hdcp_gsc_context *gsc_context); 28 36 }; 29 37 30 38 struct intel_display_irq_interface { ··· 60 50 * check the optional pointers. 61 51 */ 62 52 struct intel_display_parent_interface { 53 + /** @hdcp: HDCP GSC interface */ 54 + const struct intel_display_hdcp_interface *hdcp; 55 + 63 56 /** @rpm: Runtime PM functions */ 64 57 const struct intel_display_rpm_interface *rpm; 65 58