Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Two more fixes for 4.5:
- One is a fix for OMAP that is urgently needed to avoid DRA7xx chips
from premature aging, by always keeping the Ethernet clock enabled.
- The other solves a I/O memory layout issue on Armada, where SROM
and PCI memory windows were conflicting in some configurations"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: mvebu: fix overlap of Crypto SRAM with PCIe memory window
ARM: dts: dra7: do not gate cpsw clock due to errata i877
ARM: OMAP2+: hwmod: Introduce ti,no-idle dt property
+41
-20
+1
Documentation/devicetree/bindings/arm/omap/omap.txt
+1
Documentation/devicetree/bindings/arm/omap/omap.txt
+2
-2
arch/arm/boot/dts/armada-xp-axpwifiap.dts
+2
-2
arch/arm/boot/dts/armada-xp-axpwifiap.dts
···
70
70
soc {
71
71
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
72
72
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
73
-
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
74
-
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
73
+
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
74
+
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
75
75
76
76
pcie-controller {
77
77
status = "okay";
+2
-2
arch/arm/boot/dts/armada-xp-db.dts
+2
-2
arch/arm/boot/dts/armada-xp-db.dts
···
76
76
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
77
77
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
78
78
MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
79
-
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
80
-
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
79
+
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
80
+
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
81
81
82
82
devbus-bootcs {
83
83
status = "okay";
+2
-2
arch/arm/boot/dts/armada-xp-gp.dts
+2
-2
arch/arm/boot/dts/armada-xp-gp.dts
···
95
95
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
96
96
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
97
97
MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
98
-
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
99
-
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
98
+
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
99
+
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
100
100
101
101
devbus-bootcs {
102
102
status = "okay";
+2
-2
arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+2
-2
arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
···
65
65
soc {
66
66
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
67
67
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
68
-
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
69
-
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
68
+
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
69
+
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
70
70
71
71
pcie-controller {
72
72
status = "okay";
+2
-2
arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+2
-2
arch/arm/boot/dts/armada-xp-linksys-mamba.dts
···
70
70
soc {
71
71
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
72
72
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
73
-
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
74
-
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
73
+
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
74
+
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
75
75
76
76
pcie-controller {
77
77
status = "okay";
+2
-2
arch/arm/boot/dts/armada-xp-matrix.dts
+2
-2
arch/arm/boot/dts/armada-xp-matrix.dts
···
68
68
soc {
69
69
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
70
70
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
71
-
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
72
-
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
71
+
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
72
+
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
73
73
74
74
internal-regs {
75
75
serial@12000 {
+2
-2
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
+2
-2
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
···
64
64
soc {
65
65
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
66
66
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
67
-
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
68
-
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
67
+
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
68
+
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
69
69
70
70
pcie-controller {
71
71
status = "okay";
+3
-3
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+3
-3
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
···
65
65
soc {
66
66
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
67
67
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
68
-
MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000
69
-
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
70
-
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
68
+
MBUS_ID(0x01, 0x2f) 0 0 0xe8000000 0x8000000
69
+
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
70
+
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
71
71
72
72
devbus-bootcs {
73
73
status = "okay";
+2
-2
arch/arm/boot/dts/armada-xp-synology-ds414.dts
+2
-2
arch/arm/boot/dts/armada-xp-synology-ds414.dts
···
78
78
soc {
79
79
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
80
80
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
81
-
MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
82
-
MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
81
+
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
82
+
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
83
83
84
84
pcie-controller {
85
85
status = "okay";
+10
arch/arm/boot/dts/dra7.dtsi
+10
arch/arm/boot/dts/dra7.dtsi
···
1500
1500
0x48485200 0x2E00>;
1501
1501
#address-cells = <1>;
1502
1502
#size-cells = <1>;
1503
+
1504
+
/*
1505
+
* Do not allow gating of cpsw clock as workaround
1506
+
* for errata i877. Keeping internal clock disabled
1507
+
* causes the device switching characteristics
1508
+
* to degrade over time and eventually fail to meet
1509
+
* the data manual delay time/skew specs.
1510
+
*/
1511
+
ti,no-idle;
1512
+
1503
1513
/*
1504
1514
* rx_thresh_pend
1505
1515
* rx_pend
+8
-1
arch/arm/mach-omap2/omap_hwmod.c
+8
-1
arch/arm/mach-omap2/omap_hwmod.c
···
2200
2200
*/
2201
2201
static int _idle(struct omap_hwmod *oh)
2202
2202
{
2203
+
if (oh->flags & HWMOD_NO_IDLE) {
2204
+
oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2205
+
return 0;
2206
+
}
2207
+
2203
2208
pr_debug("omap_hwmod: %s: idling\n", oh->name);
2204
2209
2205
2210
if (oh->_state != _HWMOD_STATE_ENABLED) {
···
2509
2504
oh->flags |= HWMOD_INIT_NO_RESET;
2510
2505
if (of_find_property(np, "ti,no-idle-on-init", NULL))
2511
2506
oh->flags |= HWMOD_INIT_NO_IDLE;
2507
+
if (of_find_property(np, "ti,no-idle", NULL))
2508
+
oh->flags |= HWMOD_NO_IDLE;
2512
2509
}
2513
2510
2514
2511
oh->_state = _HWMOD_STATE_INITIALIZED;
···
2637
2630
* XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2638
2631
* it should be set by the core code as a runtime flag during startup
2639
2632
*/
2640
-
if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
2633
+
if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2641
2634
(postsetup_state == _HWMOD_STATE_IDLE)) {
2642
2635
oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2643
2636
postsetup_state = _HWMOD_STATE_ENABLED;
+3
arch/arm/mach-omap2/omap_hwmod.h
+3
arch/arm/mach-omap2/omap_hwmod.h
···
525
525
* or idled.
526
526
* HWMOD_OPT_CLKS_NEEDED: The optional clocks are needed for the module to
527
527
* operate and they need to be handled at the same time as the main_clk.
528
+
* HWMOD_NO_IDLE: Do not idle the hwmod at all. Useful to handle certain
529
+
* IPs like CPSW on DRA7, where clocks to this module cannot be disabled.
528
530
*/
529
531
#define HWMOD_SWSUP_SIDLE (1 << 0)
530
532
#define HWMOD_SWSUP_MSTANDBY (1 << 1)
···
543
541
#define HWMOD_SWSUP_SIDLE_ACT (1 << 12)
544
542
#define HWMOD_RECONFIG_IO_CHAIN (1 << 13)
545
543
#define HWMOD_OPT_CLKS_NEEDED (1 << 14)
544
+
#define HWMOD_NO_IDLE (1 << 15)
546
545
547
546
/*
548
547
* omap_hwmod._int_flags definitions