tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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RDMA/bnxt_re: Simplify bnxt_re_init_depth() callers and implementation

All callers of bnxt_re_init_depth() compute the minimum between its return
value and another internal variable, often mixing variable types in the
process. Clean this up by making the logic simpler and more readable.

Acked-by: Selvin Xavier <selvin.xavier@broadcom.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>

authored by

Leon Romanovsky and committed by
Leon Romanovsky 2b2f0782 b247ed6f

+42 -47
+36 -44
drivers/infiniband/hw/bnxt_re/ib_verbs.c
··· 1442 1442 struct bnxt_qplib_qp *qplqp; 1443 1443 struct bnxt_re_dev *rdev; 1444 1444 struct bnxt_qplib_q *rq; 1445 - int entries; 1446 1445 1447 1446 rdev = qp->rdev; 1448 1447 qplqp = &qp->qplib_qp; ··· 1464 1465 /* Allocate 1 more than what's provided so posting max doesn't 1465 1466 * mean empty. 1466 1467 */ 1467 - entries = bnxt_re_init_depth(init_attr->cap.max_recv_wr + 1, uctx); 1468 - rq->max_wqe = min_t(u32, entries, dev_attr->max_qp_wqes + 1); 1468 + rq->max_wqe = bnxt_re_init_depth(init_attr->cap.max_recv_wr + 1, 1469 + dev_attr->max_qp_wqes + 1, 1470 + uctx); 1469 1471 rq->max_sw_wqe = rq->max_wqe; 1470 1472 rq->q_full_delta = 0; 1471 1473 rq->sg_info.pgsize = PAGE_SIZE; ··· 1504 1504 struct bnxt_re_dev *rdev; 1505 1505 struct bnxt_qplib_q *sq; 1506 1506 int diff = 0; 1507 - int entries; 1508 1507 int rc; 1509 1508 1510 1509 rdev = qp->rdev; ··· 1512 1513 dev_attr = rdev->dev_attr; 1513 1514 1514 1515 sq->max_sge = init_attr->cap.max_send_sge; 1515 - entries = init_attr->cap.max_send_wr; 1516 1516 if (uctx && qplqp->wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE) { 1517 1517 sq->max_wqe = ureq->sq_slots; 1518 1518 sq->max_sw_wqe = ureq->sq_slots; ··· 1527 1529 return rc; 1528 1530 1529 1531 /* Allocate 128 + 1 more than what's provided */ 1530 - diff = (qplqp->wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE) ? 1531 - 0 : BNXT_QPLIB_RESERVED_QP_WRS; 1532 - entries = bnxt_re_init_depth(entries + diff + 1, uctx); 1533 - sq->max_wqe = min_t(u32, entries, dev_attr->max_qp_wqes + diff + 1); 1532 + if (qplqp->wqe_mode != BNXT_QPLIB_WQE_MODE_VARIABLE) 1533 + diff = BNXT_QPLIB_RESERVED_QP_WRS; 1534 + sq->max_wqe = bnxt_re_init_depth( 1535 + init_attr->cap.max_send_wr + diff + 1, 1536 + dev_attr->max_qp_wqes + diff + 1, uctx); 1534 1537 if (qplqp->wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE) 1535 1538 sq->max_sw_wqe = bnxt_qplib_get_depth(sq, qplqp->wqe_mode, true); 1536 1539 else ··· 1558 1559 struct bnxt_qplib_dev_attr *dev_attr; 1559 1560 struct bnxt_qplib_qp *qplqp; 1560 1561 struct bnxt_re_dev *rdev; 1561 - int entries; 1562 1562 1563 1563 rdev = qp->rdev; 1564 1564 qplqp = &qp->qplib_qp; 1565 1565 dev_attr = rdev->dev_attr; 1566 1566 1567 1567 if (!bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx)) { 1568 - entries = bnxt_re_init_depth(init_attr->cap.max_send_wr + 1, uctx); 1569 - qplqp->sq.max_wqe = min_t(u32, entries, 1570 - dev_attr->max_qp_wqes + 1); 1568 + qplqp->sq.max_wqe = 1569 + bnxt_re_init_depth(init_attr->cap.max_send_wr + 1, 1570 + dev_attr->max_qp_wqes + 1, uctx); 1571 1571 qplqp->sq.q_full_delta = qplqp->sq.max_wqe - 1572 1572 init_attr->cap.max_send_wr; 1573 1573 qplqp->sq.max_sge++; /* Need one extra sge to put UD header */ ··· 2084 2086 struct bnxt_re_pd *pd; 2085 2087 struct ib_pd *ib_pd; 2086 2088 u32 active_srqs; 2087 - int rc, entries; 2089 + int rc; 2088 2090 2089 2091 ib_pd = ib_srq->pd; 2090 2092 pd = container_of(ib_pd, struct bnxt_re_pd, ib_pd); ··· 2110 2112 /* Allocate 1 more than what's provided so posting max doesn't 2111 2113 * mean empty 2112 2114 */ 2113 - entries = bnxt_re_init_depth(srq_init_attr->attr.max_wr + 1, uctx); 2114 - if (entries > dev_attr->max_srq_wqes + 1) 2115 - entries = dev_attr->max_srq_wqes + 1; 2116 - srq->qplib_srq.max_wqe = entries; 2115 + srq->qplib_srq.max_wqe = 2116 + bnxt_re_init_depth(srq_init_attr->attr.max_wr + 1, 2117 + dev_attr->max_srq_wqes + 1, uctx); 2117 2118 2118 2119 srq->qplib_srq.max_sge = srq_init_attr->attr.max_sge; 2119 2120 /* 128 byte wqe size for SRQ . So use max sges */ ··· 2293 2296 struct bnxt_re_dev *rdev = qp->rdev; 2294 2297 struct bnxt_qplib_dev_attr *dev_attr = rdev->dev_attr; 2295 2298 enum ib_qp_state curr_qp_state, new_qp_state; 2296 - int rc, entries; 2299 + int rc; 2297 2300 unsigned int flags; 2298 2301 u8 nw_type; 2299 2302 ··· 2507 2510 "Create QP failed - max exceeded"); 2508 2511 return -EINVAL; 2509 2512 } 2510 - entries = bnxt_re_init_depth(qp_attr->cap.max_send_wr, uctx); 2511 - qp->qplib_qp.sq.max_wqe = min_t(u32, entries, 2512 - dev_attr->max_qp_wqes + 1); 2513 + qp->qplib_qp.sq.max_wqe = 2514 + bnxt_re_init_depth(qp_attr->cap.max_send_wr, 2515 + dev_attr->max_qp_wqes + 1, uctx); 2513 2516 qp->qplib_qp.sq.q_full_delta = qp->qplib_qp.sq.max_wqe - 2514 2517 qp_attr->cap.max_send_wr; 2515 2518 /* ··· 2520 2523 qp->qplib_qp.sq.q_full_delta -= 1; 2521 2524 qp->qplib_qp.sq.max_sge = qp_attr->cap.max_send_sge; 2522 2525 if (qp->qplib_qp.rq.max_wqe) { 2523 - entries = bnxt_re_init_depth(qp_attr->cap.max_recv_wr, uctx); 2524 - qp->qplib_qp.rq.max_wqe = 2525 - min_t(u32, entries, dev_attr->max_qp_wqes + 1); 2526 + qp->qplib_qp.rq.max_wqe = bnxt_re_init_depth( 2527 + qp_attr->cap.max_recv_wr, 2528 + dev_attr->max_qp_wqes + 1, uctx); 2526 2529 qp->qplib_qp.rq.max_sw_wqe = qp->qplib_qp.rq.max_wqe; 2527 2530 qp->qplib_qp.rq.q_full_delta = qp->qplib_qp.rq.max_wqe - 2528 2531 qp_attr->cap.max_recv_wr; ··· 3378 3381 struct bnxt_re_cq_resp resp = {}; 3379 3382 struct bnxt_re_cq_req req; 3380 3383 int cqe = attr->cqe; 3381 - int rc, entries; 3382 - u32 active_cqs; 3384 + int rc; 3385 + u32 active_cqs, entries; 3383 3386 3384 3387 if (attr->flags) 3385 3388 return -EOPNOTSUPP; ··· 3394 3397 cctx = rdev->chip_ctx; 3395 3398 cq->qplib_cq.cq_handle = (u64)(unsigned long)(&cq->qplib_cq); 3396 3399 3397 - entries = bnxt_re_init_depth(cqe + 1, uctx); 3398 - if (entries > dev_attr->max_cq_wqes + 1) 3399 - entries = dev_attr->max_cq_wqes + 1; 3400 - 3401 3400 rc = ib_copy_validate_udata_in_cm(udata, req, cq_handle, 3402 3401 BNXT_RE_CQ_FIXED_NUM_CQE_ENABLE); 3403 3402 if (rc) 3404 3403 return rc; 3405 3404 3406 3405 if (req.comp_mask & BNXT_RE_CQ_FIXED_NUM_CQE_ENABLE) 3407 - entries = cqe; 3406 + entries = attr->cqe; 3407 + else 3408 + entries = bnxt_re_init_depth(attr->cqe + 1, 3409 + dev_attr->max_cq_wqes + 1, uctx); 3408 3410 3409 3411 if (!ibcq->umem) { 3410 3412 ibcq->umem = ib_umem_get(&rdev->ibdev, req.cq_va, ··· 3476 3480 rdma_udata_to_drv_context(udata, struct bnxt_re_ucontext, ib_uctx); 3477 3481 struct bnxt_qplib_dev_attr *dev_attr = rdev->dev_attr; 3478 3482 int cqe = attr->cqe; 3479 - int rc, entries; 3483 + int rc; 3480 3484 u32 active_cqs; 3481 3485 3482 3486 if (udata) ··· 3494 3498 cq->rdev = rdev; 3495 3499 cq->qplib_cq.cq_handle = (u64)(unsigned long)(&cq->qplib_cq); 3496 3500 3497 - entries = bnxt_re_init_depth(cqe + 1, uctx); 3498 - if (entries > dev_attr->max_cq_wqes + 1) 3499 - entries = dev_attr->max_cq_wqes + 1; 3500 - 3501 - cq->max_cql = min_t(u32, entries, MAX_CQL_PER_POLL); 3501 + cq->max_cql = bnxt_re_init_depth(attr->cqe + 1, 3502 + dev_attr->max_cq_wqes + 1, uctx); 3502 3503 cq->cql = kcalloc(cq->max_cql, sizeof(struct bnxt_qplib_cqe), 3503 3504 GFP_KERNEL); 3504 3505 if (!cq->cql) ··· 3504 3511 cq->qplib_cq.sg_info.pgsize = SZ_4K; 3505 3512 cq->qplib_cq.sg_info.pgshft = __builtin_ctz(SZ_4K); 3506 3513 cq->qplib_cq.dpi = &rdev->dpi_privileged; 3507 - cq->qplib_cq.max_wqe = entries; 3514 + cq->qplib_cq.max_wqe = cq->max_cql; 3508 3515 cq->qplib_cq.coalescing = &rdev->cq_coalescing; 3509 3516 cq->qplib_cq.nq = bnxt_re_get_nq(rdev); 3510 3517 cq->qplib_cq.cnq_hw_ring_id = cq->qplib_cq.nq->ring_id; ··· 3515 3522 goto fail; 3516 3523 } 3517 3524 3518 - cq->ib_cq.cqe = entries; 3525 + cq->ib_cq.cqe = cq->max_cql; 3519 3526 cq->cq_period = cq->qplib_cq.period; 3520 3527 active_cqs = atomic_inc_return(&rdev->stats.res.cq_count); 3521 3528 if (active_cqs > rdev->stats.res.cq_watermark) ··· 3554 3561 struct bnxt_re_resize_cq_req req; 3555 3562 struct bnxt_re_dev *rdev; 3556 3563 struct bnxt_re_cq *cq; 3557 - int rc, entries; 3564 + int rc; 3565 + u32 entries; 3558 3566 3559 3567 cq = container_of(ibcq, struct bnxt_re_cq, ib_cq); 3560 3568 rdev = cq->rdev; ··· 3576 3582 return -EINVAL; 3577 3583 3578 3584 uctx = rdma_udata_to_drv_context(udata, struct bnxt_re_ucontext, ib_uctx); 3579 - entries = bnxt_re_init_depth(cqe + 1, uctx); 3580 - if (entries > dev_attr->max_cq_wqes + 1) 3581 - entries = dev_attr->max_cq_wqes + 1; 3585 + entries = bnxt_re_init_depth(cqe + 1, dev_attr->max_cq_wqes + 1, uctx); 3582 3586 3583 3587 /* uverbs consumer */ 3584 3588 rc = ib_copy_validate_udata_in(udata, req, cq_va);
+6 -3
drivers/infiniband/hw/bnxt_re/ib_verbs.h
··· 190 190 BNXT_RE_UCNTX_CAP_VAR_WQE_ENABLED = 0x2ULL, 191 191 }; 192 192 193 - static inline u32 bnxt_re_init_depth(u32 ent, struct bnxt_re_ucontext *uctx) 193 + static inline u32 bnxt_re_init_depth(u32 ent, u32 max, 194 + struct bnxt_re_ucontext *uctx) 194 195 { 195 - return uctx ? (uctx->cmask & BNXT_RE_UCNTX_CAP_POW2_DISABLED) ? 196 - ent : roundup_pow_of_two(ent) : ent; 196 + if (uctx && !(uctx->cmask & BNXT_RE_UCNTX_CAP_POW2_DISABLED)) 197 + return min(roundup_pow_of_two(ent), max); 198 + 199 + return ent; 197 200 } 198 201 199 202 static inline bool bnxt_re_is_var_size_supported(struct bnxt_re_dev *rdev,