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Merge tag 'asm-generic-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic

Pull asm-generic header updates from Arnd Bergmann:
"A series from Thomas Weißschuh cleans up the UAPI header files to no
longer contain any references to Kconfig symbols, as these make no
sense in userspace.

The build-time check for these was originally added by Sam Ravnborg in
linux-2.6.28, and a later version started warning for all newly added
CONFIG_* checks here but kept a list of known exceptions. With the
last exceptions gone from that list, the warning is now unconditional
in 'make headers_install'.

John Garry contributed a cleanup of cpumask_of_node()"

* tag 'asm-generic-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
scripts: headers_install.sh: Remove config leak ignore machinery
x86/uapi: Stop leaking kconfig references to userspace
nios2: uapi: Remove custom asm/swab.h from UAPI
ARM: uapi: Drop PSR_ENDSTATE
ARC: Always use SWAPE instructions for __arch_swab32()
include/asm-generic/topology.h: Remove unused definition of cpumask_of_node()

+10 -116
-5
arch/arc/Kconfig
··· 121 121 config ARC_CPU_770 122 122 bool "ARC770" 123 123 depends on ISA_ARCOMPACT 124 - select ARC_HAS_SWAPE 125 124 help 126 125 Support for ARC770 core introduced with Rel 4.10 (Summer 2011) 127 126 This core has a bunch of cool new features: ··· 338 339 bool "Insn: LLOCK/SCOND (efficient atomic ops)" 339 340 default y 340 341 depends on !ARC_CANT_LLSC 341 - 342 - config ARC_HAS_SWAPE 343 - bool "Insn: SWAPE (endian-swap)" 344 - default y 345 342 346 343 if ISA_ARCV2 347 344
+1 -2
arch/arc/Makefile
··· 9 9 CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux- arc-linux-gnu-) 10 10 endif 11 11 12 - cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__ 12 + cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -mswape -D__linux__ 13 13 14 14 tune-mcpu-def-$(CONFIG_ISA_ARCOMPACT) := -mcpu=arc700 15 15 tune-mcpu-def-$(CONFIG_ISA_ARCV2) := -mcpu=hs38 ··· 41 41 cflags-y += -fsection-anchors 42 42 43 43 cflags-$(CONFIG_ARC_HAS_LLSC) += -mlock 44 - cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape 45 44 46 45 ifdef CONFIG_ISA_ARCV2 47 46
-63
arch/arc/include/uapi/asm/swab.h
··· 19 19 20 20 #include <linux/types.h> 21 21 22 - /* Native single cycle endian swap insn */ 23 - #ifdef CONFIG_ARC_HAS_SWAPE 24 - 25 22 #define __arch_swab32(x) \ 26 23 ({ \ 27 24 unsigned int tmp = x; \ ··· 28 31 : "r" (tmp)); \ 29 32 tmp; \ 30 33 }) 31 - 32 - #else 33 - 34 - /* Several ways of Endian-Swap Emulation for ARC 35 - * 0: kernel generic 36 - * 1: ARC optimised "C" 37 - * 2: ARC Custom instruction 38 - */ 39 - #define ARC_BSWAP_TYPE 1 40 - 41 - #if (ARC_BSWAP_TYPE == 1) /******* Software only ********/ 42 - 43 - /* The kernel default implementation of htonl is 44 - * return x<<24 | x>>24 | 45 - * (x & (__u32)0x0000ff00UL)<<8 | (x & (__u32)0x00ff0000UL)>>8; 46 - * 47 - * This generates 9 instructions on ARC (excluding the ld/st) 48 - * 49 - * 8051fd8c: ld r3,[r7,20] ; Mem op : Get the value to be swapped 50 - * 8051fd98: asl r5,r3,24 ; get 3rd Byte 51 - * 8051fd9c: lsr r2,r3,24 ; get 0th Byte 52 - * 8051fda0: and r4,r3,0xff00 53 - * 8051fda8: asl r4,r4,8 ; get 1st Byte 54 - * 8051fdac: and r3,r3,0x00ff0000 55 - * 8051fdb4: or r2,r2,r5 ; combine 0th and 3rd Bytes 56 - * 8051fdb8: lsr r3,r3,8 ; 2nd Byte at correct place in Dst Reg 57 - * 8051fdbc: or r2,r2,r4 ; combine 0,3 Bytes with 1st Byte 58 - * 8051fdc0: or r2,r2,r3 ; combine 0,3,1 Bytes with 2nd Byte 59 - * 8051fdc4: st r2,[r1,20] ; Mem op : save result back to mem 60 - * 61 - * Joern suggested a better "C" algorithm which is great since 62 - * (1) It is portable to any architecture 63 - * (2) At the same time it takes advantage of ARC ISA (rotate intrns) 64 - */ 65 - 66 - #define __arch_swab32(x) \ 67 - ({ unsigned long __in = (x), __tmp; \ 68 - __tmp = __in << 8 | __in >> 24; /* ror tmp,in,24 */ \ 69 - __in = __in << 24 | __in >> 8; /* ror in,in,8 */ \ 70 - __tmp ^= __in; \ 71 - __tmp &= 0xff00ff; \ 72 - __tmp ^ __in; \ 73 - }) 74 - 75 - #elif (ARC_BSWAP_TYPE == 2) /* Custom single cycle bswap instruction */ 76 - 77 - #define __arch_swab32(x) \ 78 - ({ \ 79 - unsigned int tmp = x; \ 80 - __asm__( \ 81 - " .extInstruction bswap, 7, 0x00, SUFFIX_NONE, SYNTAX_2OP \n"\ 82 - " bswap %0, %1 \n"\ 83 - : "=r" (tmp) \ 84 - : "r" (tmp)); \ 85 - tmp; \ 86 - }) 87 - 88 - #endif /* ARC_BSWAP_TYPE=zzz */ 89 - 90 - #endif /* CONFIG_ARC_HAS_SWAPE */ 91 34 92 35 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) 93 36 #define __SWAB_64_THRU_32__
+2 -1
arch/arm/include/asm/processor.h
··· 73 73 regs->ARM_cpsr = USR26_MODE; \ 74 74 if (elf_hwcap & HWCAP_THUMB && pc & 1) \ 75 75 regs->ARM_cpsr |= PSR_T_BIT; \ 76 - regs->ARM_cpsr |= PSR_ENDSTATE; \ 76 + if (IS_ENABLED(CONFIG_CPU_ENDIAN_BE8)) \ 77 + regs->ARM_cpsr |= PSR_E_BIT; \ 77 78 regs->ARM_pc = pc & ~1; /* pc */ \ 78 79 regs->ARM_sp = sp; /* sp */ \ 79 80 })
-9
arch/arm/include/uapi/asm/ptrace.h
··· 102 102 #define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */ 103 103 #define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */ 104 104 105 - /* 106 - * Default endianness state 107 - */ 108 - #ifdef CONFIG_CPU_ENDIAN_BE8 109 - #define PSR_ENDSTATE PSR_E_BIT 110 - #else 111 - #define PSR_ENDSTATE 0 112 - #endif 113 - 114 105 /* 115 106 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a 116 107 * process is located in memory.
+2 -1
arch/arm/kernel/signal.c
··· 337 337 return 1; 338 338 } 339 339 340 - cpsr |= PSR_ENDSTATE; 340 + if (IS_ENABLED(CONFIG_CPU_ENDIAN_BE8)) 341 + cpsr |= PSR_E_BIT; 341 342 342 343 /* 343 344 * Maybe we need to deliver a 32-bit signal to a 26-bit task.
arch/nios2/include/uapi/asm/swab.h arch/nios2/include/asm/swab.h
+1 -1
arch/x86/include/uapi/asm/auxvec.h
··· 11 11 #define AT_SYSINFO_EHDR 33 12 12 13 13 /* entries in ARCH_DLINFO: */ 14 - #if defined(CONFIG_IA32_EMULATION) || !defined(CONFIG_X86_64) 14 + #if defined(__KERNEL__) && (defined(CONFIG_IA32_EMULATION) || !defined(CONFIG_X86_64)) 15 15 # define AT_VECTOR_SIZE_ARCH 3 16 16 #else /* else it's non-compat x86-64 */ 17 17 # define AT_VECTOR_SIZE_ARCH 2
+2 -6
include/asm-generic/topology.h
··· 45 45 #endif 46 46 47 47 #ifndef cpumask_of_node 48 - #ifdef CONFIG_NUMA 49 - #define cpumask_of_node(node) ((node) == 0 ? cpu_online_mask : cpu_none_mask) 50 - #else 51 - #define cpumask_of_node(node) ((void)(node), cpu_online_mask) 52 - #endif 48 + #define cpumask_of_node(node) ((void)(node), cpu_online_mask) 53 49 #endif 54 50 #ifndef pcibus_to_node 55 51 #define pcibus_to_node(bus) ((void)(bus), -1) ··· 57 61 cpumask_of_node(pcibus_to_node(bus))) 58 62 #endif 59 63 60 - #endif /* CONFIG_NUMA */ 64 + #endif /* !CONFIG_NUMA */ 61 65 62 66 #if !defined(CONFIG_NUMA) || !defined(CONFIG_HAVE_MEMORYLESS_NODES) 63 67
+2 -28
scripts/headers_install.sh
··· 64 64 d 65 65 ' $OUTFILE) 66 66 67 - # The entries in the following list do not result in an error. 68 - # Please do not add a new entry. This list is only for existing ones. 69 - # The list will be reduced gradually, and deleted eventually. (hopefully) 70 - # 71 - # The format is <file-name>:<CONFIG-option> in each line. 72 - config_leak_ignores=" 73 - arch/arc/include/uapi/asm/swab.h:CONFIG_ARC_HAS_SWAPE 74 - arch/arm/include/uapi/asm/ptrace.h:CONFIG_CPU_ENDIAN_BE8 75 - arch/nios2/include/uapi/asm/swab.h:CONFIG_NIOS2_CI_SWAB_NO 76 - arch/nios2/include/uapi/asm/swab.h:CONFIG_NIOS2_CI_SWAB_SUPPORT 77 - arch/x86/include/uapi/asm/auxvec.h:CONFIG_IA32_EMULATION 78 - arch/x86/include/uapi/asm/auxvec.h:CONFIG_X86_64 79 - " 80 - 81 67 for c in $configs 82 68 do 83 - leak_error=1 84 - 85 - for ignore in $config_leak_ignores 86 - do 87 - if echo "$INFILE:$c" | grep -q "$ignore$"; then 88 - leak_error= 89 - break 90 - fi 91 - done 92 - 93 - if [ "$leak_error" = 1 ]; then 94 - echo "error: $INFILE: leak $c to user-space" >&2 95 - exit 1 96 - fi 69 + echo "error: $INFILE: leak $c to user-space" >&2 70 + exit 1 97 71 done 98 72 99 73 rm -f $TMPFILE