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Merge tag 'hwmon-for-v6.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging

Pull hmon updates from Guenter Roeck:
"New drivers:
- ISL28022 power monitor
- Nuvoton NCT7363Y

Added support for new chips to existing drivers:
- The tmp180 driver now supports NXP p3t1085, including its I3C mode
- The ina2xx driver now supports SY24655 and INA260
- The amc6821 driver now supports tsd,mule

Other notable improvements:
- The sht4x driver now supports the chip heater
- The pmbus/isl68137 driver now supports a voltage divider on Vout
- The cros_ec driver registers with the thermal framework
- The pmbus/ltc2978 driver now supports LTC7841
- The PMBus core now allow drivers to override WRITE_PROTECT

Various other minor improvements and cleanups"

* tag 'hwmon-for-v6.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: (51 commits)
hwmon: (pmbus/isl68137) add support for voltage divider on Vout
dt-bindings: hwmon: isl68137: add bindings to support voltage dividers
hwmon: tmp108: fix I3C dependency
hwmon: (cros_ec) register thermal sensors to thermal framework
hwmon: (tmp108) Add support for I3C device
hwmon: (tmp108) Add helper function tmp108_common_probe() to prepare I3C support
hwmon: (acpi_power_meter) Fix fail to load module on platform without _PMD method
hwmon: (nct6775-core) Fix overflows seen when writing limit attributes
hwmon: (pwm-fan) Introduce start from stopped state handling
dt-bindings: hwmon: pwm-fan: Document start from stopped state properties
hwmon: (tmp108) Add NXP p3t1085 support
dt-bindings: hwmon: ti,tmp108: Add nxp,p3t1085 compatible string
hwmon: (sch5627, max31827) Fix typos in driver documentation
hwmon: (jc42) Drop of_match_ptr() protection
hwmon: (f71882fg) Fix grammar in fan speed trip points explanation
dt-bindings: hwmon: pmbus: add ti tps25990 support
hwmon: (pmbus/core) clear faults after setting smbalert mask
hwmon: (pmbus/core) allow drivers to override WRITE_PROTECT
hwmon: (pmbus) add documentation for existing flags
hwmon: (ina226) Add support for SY24655
...

+2620 -250
+2
Documentation/devicetree/bindings/hwmon/lltc,ltc2978.yaml
··· 26 26 - lltc,ltc3886 27 27 - lltc,ltc3887 28 28 - lltc,ltc3889 29 + - lltc,ltc7841 29 30 - lltc,ltc7880 30 31 - lltc,ltm2987 31 32 - lltc,ltm4664 ··· 51 50 * ltc2977, ltc2979, ltc2980, ltm2987 : vout0 - vout7 52 51 * ltc2978 : vout0 - vout7 53 52 * ltc3880, ltc3882, ltc3884, ltc3886, ltc3887, ltc3889 : vout0 - vout1 53 + * ltc7841 : vout0 54 54 * ltc7880 : vout0 - vout1 55 55 * ltc3883 : vout0 56 56 * ltm4664 : vout0 - vout1
+66
Documentation/devicetree/bindings/hwmon/nuvoton,nct7363.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + 5 + $id: http://devicetree.org/schemas/hwmon/nuvoton,nct7363.yaml# 6 + $schema: http://devicetree.org/meta-schemas/core.yaml# 7 + 8 + title: Nuvoton NCT7363Y Hardware Monitoring IC 9 + 10 + maintainers: 11 + - Ban Feng <kcfeng0@nuvoton.com> 12 + 13 + description: | 14 + The NCT7363Y is a fan controller which provides up to 16 independent 15 + FAN input monitors, and up to 16 independent PWM outputs with SMBus interface. 16 + 17 + Datasheets: Available from Nuvoton upon request 18 + 19 + properties: 20 + compatible: 21 + enum: 22 + - nuvoton,nct7363 23 + - nuvoton,nct7362 24 + 25 + reg: 26 + maxItems: 1 27 + 28 + "#pwm-cells": 29 + const: 2 30 + 31 + patternProperties: 32 + "^fan-[0-9]+$": 33 + $ref: fan-common.yaml# 34 + unevaluatedProperties: false 35 + required: 36 + - pwms 37 + - tach-ch 38 + 39 + required: 40 + - compatible 41 + - reg 42 + - "#pwm-cells" 43 + 44 + additionalProperties: false 45 + 46 + examples: 47 + - | 48 + i2c { 49 + #address-cells = <1>; 50 + #size-cells = <0>; 51 + 52 + hwmon: hwmon@22 { 53 + compatible = "nuvoton,nct7363"; 54 + reg = <0x22>; 55 + #pwm-cells = <2>; 56 + 57 + fan-0 { 58 + pwms = <&hwmon 0 50000>; 59 + tach-ch = /bits/ 8 <0x00>; 60 + }; 61 + fan-1 { 62 + pwms = <&hwmon 1 50000>; 63 + tach-ch = /bits/ 8 <0x01>; 64 + }; 65 + }; 66 + };
+148
Documentation/devicetree/bindings/hwmon/pmbus/isil,isl68137.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + 5 + $id: http://devicetree.org/schemas/hwmon/pmbus/isil,isl68137.yaml# 6 + $schema: http://devicetree.org/meta-schemas/core.yaml# 7 + 8 + title: Renesas Digital Multiphase Voltage Regulators with PMBus 9 + 10 + maintainers: 11 + - Grant Peltier <grant.peltier.jg@renesas.com> 12 + 13 + description: | 14 + Renesas digital multiphase voltage regulators with PMBus. 15 + https://www.renesas.com/en/products/power-management/multiphase-power/multiphase-dcdc-switching-controllers 16 + 17 + properties: 18 + compatible: 19 + enum: 20 + - isil,isl68137 21 + - renesas,isl68220 22 + - renesas,isl68221 23 + - renesas,isl68222 24 + - renesas,isl68223 25 + - renesas,isl68224 26 + - renesas,isl68225 27 + - renesas,isl68226 28 + - renesas,isl68227 29 + - renesas,isl68229 30 + - renesas,isl68233 31 + - renesas,isl68239 32 + - renesas,isl69222 33 + - renesas,isl69223 34 + - renesas,isl69224 35 + - renesas,isl69225 36 + - renesas,isl69227 37 + - renesas,isl69228 38 + - renesas,isl69234 39 + - renesas,isl69236 40 + - renesas,isl69239 41 + - renesas,isl69242 42 + - renesas,isl69243 43 + - renesas,isl69247 44 + - renesas,isl69248 45 + - renesas,isl69254 46 + - renesas,isl69255 47 + - renesas,isl69256 48 + - renesas,isl69259 49 + - isil,isl69260 50 + - renesas,isl69268 51 + - isil,isl69269 52 + - renesas,isl69298 53 + - renesas,raa228000 54 + - renesas,raa228004 55 + - renesas,raa228006 56 + - renesas,raa228228 57 + - renesas,raa229001 58 + - renesas,raa229004 59 + 60 + reg: 61 + maxItems: 1 62 + 63 + '#address-cells': 64 + const: 1 65 + 66 + '#size-cells': 67 + const: 0 68 + 69 + patternProperties: 70 + "^channel@([0-3])$": 71 + type: object 72 + description: 73 + Container for properties specific to a particular channel (rail). 74 + 75 + properties: 76 + reg: 77 + description: The channel (rail) index. 78 + items: 79 + minimum: 0 80 + maximum: 3 81 + 82 + vout-voltage-divider: 83 + description: | 84 + Resistances of a voltage divider placed between Vout and the voltage 85 + sense (Vsense) pin for the given channel (rail). It has two numbers 86 + representing the resistances of the voltage divider provided as 87 + <Rout Rtotal> which yields an adjusted Vout as 88 + Vout_adj = Vout * Rtotal / Rout given the original Vout as reported 89 + by the Vsense pin. Given a circuit configuration similar to the one 90 + below, Rtotal = R1 + Rout. 91 + 92 + Vout ----. 93 + | 94 + .-----. 95 + | R1 | 96 + '-----' 97 + | 98 + +---- Vsense 99 + | 100 + .-----. 101 + | Rout| 102 + '-----' 103 + | 104 + GND 105 + 106 + $ref: /schemas/types.yaml#/definitions/uint32-array 107 + minItems: 2 108 + maxItems: 2 109 + 110 + required: 111 + - reg 112 + 113 + additionalProperties: false 114 + 115 + required: 116 + - compatible 117 + - reg 118 + 119 + additionalProperties: false 120 + 121 + examples: 122 + - | 123 + i2c { 124 + #address-cells = <1>; 125 + #size-cells = <0>; 126 + 127 + isl68239@60 { 128 + compatible = "isil,isl68137"; 129 + reg = <0x60>; 130 + }; 131 + }; 132 + - | 133 + i2c { 134 + #address-cells = <1>; 135 + #size-cells = <0>; 136 + 137 + isl68239@60 { 138 + compatible = "renesas,isl68239"; 139 + reg = <0x60>; 140 + #address-cells = <1>; 141 + #size-cells = <0>; 142 + 143 + channel@0 { 144 + reg = <0>; 145 + vout-voltage-divider = <1000 2000>; // Reported Vout/Pout would be scaled by 2 146 + }; 147 + }; 148 + };
+75
Documentation/devicetree/bindings/hwmon/pmbus/mps,mp2975.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/hwmon/pmbus/mps,mp2975.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: MPS MP2975 Synchronous Buck Regulator 8 + 9 + maintainers: 10 + - Naresh Solanki <naresh.solanki@9elements.com> 11 + 12 + description: 13 + The MPS MP2971, MP2973 & MP2975 is a multi-phase voltage regulator 14 + designed for use in high-performance computing and server 15 + applications. It supports I2C/PMBus for control and monitoring. 16 + 17 + properties: 18 + compatible: 19 + enum: 20 + - mps,mp2971 21 + - mps,mp2973 22 + - mps,mp2975 23 + 24 + reg: 25 + maxItems: 1 26 + 27 + interrupts: 28 + maxItems: 1 29 + 30 + regulators: 31 + type: object 32 + description: 33 + List of regulators provided by this controller. 34 + 35 + patternProperties: 36 + "^vout[0-1]$": 37 + $ref: /schemas/regulator/regulator.yaml# 38 + type: object 39 + unevaluatedProperties: false 40 + 41 + additionalProperties: false 42 + 43 + required: 44 + - compatible 45 + - reg 46 + 47 + additionalProperties: false 48 + 49 + examples: 50 + - | 51 + #include <dt-bindings/interrupt-controller/irq.h> 52 + i2c { 53 + #address-cells = <1>; 54 + #size-cells = <0>; 55 + 56 + regulator@58 { 57 + compatible = "mps,mp2973"; 58 + reg = <0x58>; 59 + 60 + interrupt-parent = <&smb_pex_cpu1_event>; 61 + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 62 + 63 + regulators { 64 + vout0 { 65 + regulator-name = "pvccin_cpu1"; 66 + regulator-enable-ramp-delay = <200>; 67 + }; 68 + vout1 { 69 + regulator-name = "pvccfa_ehv_fivra_cpu1"; 70 + regulator-enable-ramp-delay = <200>; 71 + }; 72 + }; 73 + }; 74 + }; 75 +
+83
Documentation/devicetree/bindings/hwmon/pmbus/ti,tps25990.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + 5 + $id: http://devicetree.org/schemas/hwmon/pmbus/ti,tps25990.yaml# 6 + $schema: http://devicetree.org/meta-schemas/core.yaml# 7 + 8 + title: Texas Instruments TPS25990 Stackable eFuse 9 + 10 + maintainers: 11 + - Jerome Brunet <jbrunet@baylibre.com> 12 + 13 + description: 14 + The TI TPS25990 is an integrated, high-current circuit 15 + protection and power management device with PMBUS interface 16 + 17 + properties: 18 + compatible: 19 + const: ti,tps25990 20 + 21 + reg: 22 + maxItems: 1 23 + 24 + ti,rimon-micro-ohms: 25 + description: 26 + micro Ohms value of the resistance installed between the Imon pin 27 + and the ground reference. 28 + 29 + interrupts: 30 + description: PMBUS SMB Alert Interrupt. 31 + maxItems: 1 32 + 33 + regulators: 34 + type: object 35 + description: 36 + list of regulators provided by this controller. 37 + 38 + properties: 39 + vout: 40 + $ref: /schemas/regulator/regulator.yaml# 41 + type: object 42 + unevaluatedProperties: false 43 + 44 + gpdac1: 45 + $ref: /schemas/regulator/regulator.yaml# 46 + type: object 47 + unevaluatedProperties: false 48 + 49 + gpdac2: 50 + $ref: /schemas/regulator/regulator.yaml# 51 + type: object 52 + unevaluatedProperties: false 53 + additionalProperties: false 54 + 55 + required: 56 + - compatible 57 + - reg 58 + - ti,rimon-micro-ohms 59 + 60 + additionalProperties: false 61 + 62 + examples: 63 + - | 64 + #include <dt-bindings/interrupt-controller/irq.h> 65 + i2c { 66 + #address-cells = <1>; 67 + #size-cells = <0>; 68 + 69 + hw-monitor@46 { 70 + compatible = "ti,tps25990"; 71 + reg = <0x46>; 72 + 73 + interrupt-parent = <&gpio>; 74 + interrupts = <42 IRQ_TYPE_LEVEL_LOW>; 75 + ti,rimon-micro-ohms = <1370000000>; 76 + 77 + regulators { 78 + cpu0_vout: vout { 79 + regulator-name = "main_cpu0"; 80 + }; 81 + }; 82 + }; 83 + };
+62
Documentation/devicetree/bindings/hwmon/pmbus/vicor,pli1209bc.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/hwmon/pmbus/vicor,pli1209bc.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Vicor PLI1209BC Power Regulator 8 + 9 + maintainers: 10 + - Marcello Sylvester Bauer <sylv@sylv.io> 11 + - Naresh Solanki <naresh.solanki@9elements.com> 12 + 13 + description: 14 + The Vicor PLI1209BC is a Digital Supervisor with Isolation for use 15 + with BCM Bus Converter Modules. 16 + 17 + properties: 18 + compatible: 19 + enum: 20 + - vicor,pli1209bc 21 + 22 + reg: 23 + maxItems: 1 24 + 25 + regulators: 26 + type: object 27 + description: 28 + List of regulators provided by this controller. 29 + 30 + properties: 31 + vout2: 32 + $ref: /schemas/regulator/regulator.yaml# 33 + type: object 34 + unevaluatedProperties: false 35 + 36 + additionalProperties: false 37 + 38 + required: 39 + - compatible 40 + - reg 41 + 42 + additionalProperties: false 43 + 44 + examples: 45 + - | 46 + i2c { 47 + #address-cells = <1>; 48 + #size-cells = <0>; 49 + 50 + regulator@5f { 51 + compatible = "vicor,pli1209bc"; 52 + reg = <0x5f>; 53 + 54 + regulators { 55 + p12v_d: vout2 { 56 + regulator-name = "bcm3"; 57 + regulator-boot-on; 58 + }; 59 + }; 60 + }; 61 + }; 62 +
+10
Documentation/devicetree/bindings/hwmon/pwm-fan.yaml
··· 31 31 it must be self resetting edge interrupts. 32 32 maxItems: 1 33 33 34 + fan-stop-to-start-percent: 35 + description: 36 + Minimum fan RPM in percent to start when stopped. 37 + minimum: 0 38 + maximum: 100 39 + 40 + fan-stop-to-start-us: 41 + description: 42 + Time to wait in microseconds after start when stopped. 43 + 34 44 pulses-per-revolution: 35 45 description: 36 46 Define the number of pulses per fan revolution for each tachometer
+64
Documentation/devicetree/bindings/hwmon/renesas,isl28022.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/hwmon/renesas,isl28022.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Renesas ISL28022 power monitor 8 + 9 + maintainers: 10 + - Carsten Spieß <mail@carsten-spiess.de> 11 + 12 + description: | 13 + The ISL28022 is a power monitor with I2C interface. The device monitors 14 + voltage, current via shunt resistor and calculated power. 15 + 16 + Datasheets: 17 + https://www.renesas.com/us/en/www/doc/datasheet/isl28022.pdf 18 + 19 + properties: 20 + compatible: 21 + const: renesas,isl28022 22 + 23 + reg: 24 + maxItems: 1 25 + 26 + shunt-resistor-micro-ohms: 27 + description: 28 + Shunt resistor value in micro-Ohm 29 + minimum: 800 30 + default: 10000 31 + 32 + renesas,shunt-range-microvolt: 33 + description: 34 + Maximal shunt voltage range of +/- 40 mV, 80 mV, 160 mV or 320 mV 35 + default: 320000 36 + enum: [40000, 80000, 160000, 320000] 37 + 38 + renesas,average-samples: 39 + description: 40 + Number of samples to be used to report voltage, current and power values. 41 + default: 1 42 + $ref: /schemas/types.yaml#/definitions/uint32 43 + enum: [1, 2, 4, 8, 16, 32, 64, 128] 44 + 45 + required: 46 + - compatible 47 + - reg 48 + 49 + additionalProperties: false 50 + 51 + examples: 52 + - | 53 + i2c { 54 + #address-cells = <1>; 55 + #size-cells = <0>; 56 + 57 + power-monitor@40 { 58 + compatible = "renesas,isl28022"; 59 + reg = <0x40>; 60 + shunt-resistor-micro-ohms = <8000>; 61 + renesas,shunt-range-microvolt = <40000>; 62 + renesas,average-samples = <128>; 63 + }; 64 + };
+86
Documentation/devicetree/bindings/hwmon/ti,amc6821.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/hwmon/ti,amc6821.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: AMC6821 Intelligent Temperature Monitor and PWM Fan Controller 8 + 9 + maintainers: 10 + - Farouk Bouabid <farouk.bouabid@cherry.de> 11 + - Quentin Schulz <quentin.schulz@cherry.de> 12 + 13 + description: 14 + Intelligent temperature monitor and pulse-width modulation (PWM) fan 15 + controller. 16 + 17 + properties: 18 + compatible: 19 + oneOf: 20 + - items: 21 + - const: tsd,mule 22 + - const: ti,amc6821 23 + - const: ti,amc6821 24 + 25 + reg: 26 + maxItems: 1 27 + 28 + i2c-mux: 29 + type: object 30 + 31 + required: 32 + - compatible 33 + - reg 34 + 35 + if: 36 + properties: 37 + compatible: 38 + contains: 39 + const: tsd,mule 40 + 41 + then: 42 + required: 43 + - i2c-mux 44 + 45 + additionalProperties: false 46 + 47 + examples: 48 + - | 49 + i2c { 50 + #address-cells = <1>; 51 + #size-cells = <0>; 52 + 53 + fan@18 { 54 + compatible = "ti,amc6821"; 55 + reg = <0x18>; 56 + }; 57 + }; 58 + 59 + - | 60 + i2c { 61 + #address-cells = <1>; 62 + #size-cells = <0>; 63 + 64 + fan@18 { 65 + compatible = "tsd,mule", "ti,amc6821"; 66 + reg = <0x18>; 67 + 68 + i2c-mux { 69 + compatible = "tsd,mule-i2c-mux"; 70 + #address-cells = <1>; 71 + #size-cells = <0>; 72 + 73 + i2c@0 { 74 + reg = <0x0>; 75 + #address-cells = <1>; 76 + #size-cells = <0>; 77 + 78 + rtc@6f { 79 + compatible = "isil,isl1208"; 80 + reg = <0x6f>; 81 + }; 82 + }; 83 + }; 84 + }; 85 + }; 86 + ...
+1
Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
··· 20 20 properties: 21 21 compatible: 22 22 enum: 23 + - silergy,sy24655 23 24 - ti,ina209 24 25 - ti,ina219 25 26 - ti,ina220
+6 -2
Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml
··· 4 4 $id: http://devicetree.org/schemas/hwmon/ti,tmp108.yaml# 5 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 - title: TMP108 temperature sensor 7 + title: TMP108/P3T1085(NXP) temperature sensor 8 8 9 9 maintainers: 10 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 - The TMP108 is a digital-output temperature sensor with a 13 + The TMP108/P3T1085(NXP) is a digital-output temperature sensor with a 14 14 dynamically-programmable limit window, and under- and overtemperature 15 15 alert functions. 16 16 17 + P3T1085(NXP) support I3C. 18 + 17 19 Datasheets: 18 20 https://www.ti.com/product/TMP108 21 + https://www.nxp.com/docs/en/data-sheet/P3T1085UK.pdf 19 22 20 23 properties: 21 24 compatible: 22 25 enum: 26 + - nxp,p3t1085 23 27 - ti,tmp108 24 28 25 29 interrupts:
-16
Documentation/devicetree/bindings/trivial-devices.yaml
··· 153 153 - isil,isl29028 154 154 # Intersil ISL29030 Ambient Light and Proximity Sensor 155 155 - isil,isl29030 156 - # Intersil ISL68137 Digital Output Configurable PWM Controller 157 - - isil,isl68137 158 - # Intersil ISL69260 PMBus Voltage Regulator 159 - - isil,isl69260 160 - # Intersil ISL69269 PMBus Voltage Regulator 161 - - isil,isl69269 162 156 # Intersil ISL76682 Ambient Light Sensor 163 157 - isil,isl76682 164 158 # JEDEC JESD300 (SPD5118) Hub and Serial Presence Detect ··· 273 279 - mps,mp2888 274 280 # Monolithic Power Systems Inc. multi-phase controller mp2891 275 281 - mps,mp2891 276 - # Monolithic Power Systems Inc. multi-phase controller mp2971 277 - - mps,mp2971 278 - # Monolithic Power Systems Inc. multi-phase controller mp2973 279 - - mps,mp2973 280 - # Monolithic Power Systems Inc. multi-phase controller mp2975 281 - - mps,mp2975 282 282 # Monolithic Power Systems Inc. multi-phase controller mp2993 283 283 - mps,mp2993 284 284 # Monolithic Power Systems Inc. multi-phase hot-swap controller mp5920 ··· 345 357 - swir,mangoh-iotport-spi 346 358 # Ambient Light Sensor with SMBUS/Two Wire Serial Interface 347 359 - taos,tsl2550 348 - # Temperature Monitoring and Fan Control 349 - - ti,amc6821 350 360 # Temperature and humidity sensor with i2c interface 351 361 - ti,hdc1000 352 362 # Temperature and humidity sensor with i2c interface ··· 386 400 - ti,tps546d24 387 401 # I2C Touch-Screen Controller 388 402 - ti,tsc2003 389 - # Vicor Corporation Digital Supervisor 390 - - vicor,pli1209bc 391 403 # Winbond/Nuvoton H/W Monitor 392 404 - winbond,w83793 393 405
+5 -4
Documentation/hwmon/f71882fg.rst
··· 178 178 available on the F71858FG / F8000 if the fan channel is in RPM mode. 179 179 180 180 * 2: Normal auto mode 181 - You can define a number of temperature/fan speed trip points, which % the 182 - fan should run at at this temp and which temp a fan should follow using the 183 - standard sysfs interface. The number and type of trip points is chip 184 - depended, see which files are available in sysfs. 181 + You can define a number of temperature/fan speed trip points that specify 182 + the percentage at which the fan should run at each temperature, and which 183 + temperature sensor a fan should follow, using the standard sysfs interface. 184 + The number and type of trip points are chip dependent - see the available 185 + files in sysfs. 185 186 Fan/PWM channel 3 of the F8000 is always in this mode! 186 187 187 188 * 3: Thermostat mode (Only available on the F8000 when in duty cycle mode)
+41 -5
Documentation/hwmon/ina2xx.rst
··· 53 53 54 54 https://www.ti.com/ 55 55 56 + * Texas Instruments INA260 57 + 58 + Prefix: 'ina260' 59 + 60 + Addresses: I2C 0x40 - 0x4f 61 + 62 + Datasheet: Publicly available at the Texas Instruments website 63 + 64 + https://www.ti.com/ 65 + 66 + * Silergy SY24655 67 + 68 + Prefix: 'sy24655' 69 + 70 + Addresses: I2C 0x40 - 0x4f 71 + 72 + Datasheet: Publicly available at the Silergy website 73 + 74 + https://us1.silergy.com/ 75 + 76 + 56 77 Author: Lothar Felten <lothar.felten@gmail.com> 57 78 58 79 Description ··· 93 72 with an I2C interface. The chips monitor both a shunt voltage drop and 94 73 bus supply voltage. 95 74 75 + INA260 is a high or low side current and power monitor with integrated shunt 76 + resistor. 77 + 78 + The SY24655 is a high- and low-side current shunt and power monitor with an I2C 79 + interface. The SY24655 supports both shunt drop and supply voltage, with 80 + programmable calibration value and conversion times. The SY24655 can also 81 + calculate average power for use in energy conversion. 82 + 96 83 The shunt value in micro-ohms can be set via platform data or device tree at 97 84 compile-time or via the shunt_resistor attribute in sysfs at run-time. Please 98 85 refer to the Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml for bindings ··· 116 87 General sysfs entries 117 88 --------------------- 118 89 119 - ======================= =============================== 90 + ======================= =============================================== 120 91 in0_input Shunt voltage(mV) channel 121 92 in1_input Bus voltage(mV) channel 122 93 curr1_input Current(mA) measurement channel 123 94 power1_input Power(uW) measurement channel 124 - shunt_resistor Shunt resistance(uOhm) channel 125 - ======================= =============================== 95 + shunt_resistor Shunt resistance(uOhm) channel (not for ina260) 96 + ======================= =============================================== 126 97 127 - Sysfs entries for ina226, ina230 and ina231 only 128 - ------------------------------------------------ 98 + Additional sysfs entries for ina226, ina230, ina231, ina260, and sy24655 99 + ------------------------------------------------------------------------ 129 100 130 101 ======================= ==================================================== 131 102 curr1_lcrit Critical low current ··· 144 115 power1_crit_alarm Power critical high alarm 145 116 update_interval data conversion time; affects number of samples used 146 117 to average results for shunt and bus voltages. 118 + ======================= ==================================================== 119 + 120 + Sysfs entries for sy24655 only 121 + ------------------------------ 122 + 123 + ======================= ==================================================== 124 + power1_average average power from last reading to the present. 147 125 ======================= ==================================================== 148 126 149 127 .. note::
+2
Documentation/hwmon/index.rst
··· 96 96 ir35221 97 97 ir38064 98 98 ir36021 99 + isl28022 99 100 isl68137 100 101 it87 101 102 jc42 ··· 175 174 mpq8785 176 175 nct6683 177 176 nct6775 177 + nct7363 178 178 nct7802 179 179 nct7904 180 180 npcm750-pwm-fan
+63
Documentation/hwmon/isl28022.rst
··· 1 + .. SPDX-License-Identifier: GPL-2.0-or-later 2 + 3 + Kernel driver isl28022 4 + ====================== 5 + 6 + Supported chips: 7 + 8 + * Renesas ISL28022 9 + 10 + Prefix: 'isl28022' 11 + 12 + Addresses scanned: none 13 + 14 + Datasheet: Publicly available at the Renesas website 15 + 16 + https://www.renesas.com/us/en/www/doc/datasheet/isl28022.pdf 17 + 18 + Author: 19 + Carsten Spieß <mail@carsten-spiess.de> 20 + 21 + Description 22 + ----------- 23 + 24 + The ISL28022 is a power monitor with I2C interface. The device monitors 25 + voltage, current via shunt resistor and calculated power. 26 + 27 + Usage Notes 28 + ----------- 29 + 30 + This driver does not auto-detect devices. You will have to instantiate the 31 + device explicitly. Please see Documentation/i2c/instantiating-devices.rst for 32 + details. 33 + 34 + The shunt value in micro-ohms, shunt voltage range and averaging can be set 35 + with device properties. 36 + Please refer to the Documentation/devicetree/bindings/hwmon/isl,isl28022.yaml 37 + for bindings if the device tree is used. 38 + 39 + The driver supports only shunt and bus continuous ADC mode at 15bit resolution. 40 + Averaging can be set from 1 to 128 samples (power of 2) on both channels. 41 + Shunt voltage range of 40, 80, 160 or 320mV is allowed 42 + The bus voltage range is 60V fixed. 43 + 44 + Sysfs entries 45 + ------------- 46 + 47 + The following attributes are supported. All attributes are read-only. 48 + 49 + ======================= ======================================================= 50 + in0_input bus voltage (milli Volt) 51 + 52 + curr1_input current (milli Ampere) 53 + power1_input power (micro Watt) 54 + ======================= ======================================================= 55 + 56 + Debugfs entries 57 + --------------- 58 + 59 + The following attributes are supported. All attributes are read-only. 60 + 61 + ======================= ======================================================= 62 + shunt_voltage shunt voltage (micro Volt) 63 + ======================= =======================================================
+12
Documentation/hwmon/ltc2978.rst
··· 1 + .. SPDX-License-Identifier: GPL-2.0 2 + 1 3 Kernel driver ltc2978 2 4 ===================== 3 5 ··· 118 116 Addresses scanned: - 119 117 120 118 Datasheet: https://www.analog.com/en/products/ltc3889 119 + 120 + * Linear Technology LTC7841 121 + 122 + Prefix: 'ltc7841' 123 + 124 + Addresses scanned: - 125 + 126 + Datasheet: https://www.analog.com/en/products/ltc7841 121 127 122 128 * Linear Technology LTC7880 123 129 ··· 300 290 LTC7880, LTM4644, LTM4675, LTM4676, LTM4677, LTM4678, 301 291 LTM4680, LTM4700: N=2-3 302 292 - LTC3883: N=2 293 + - LTC7841: N=2 303 294 304 295 in[N]_input Measured output voltage. 305 296 ··· 431 420 LTM4664, LTM4675, LTM4676, LTM4677, LTM4678, LTM4680, 432 421 LTM4700: N=2-3 433 422 - LTC3883: N=2 423 + - LTC7841: N=2 434 424 435 425 curr[N]_input Measured output current. 436 426
+1 -1
Documentation/hwmon/max31827.rst
··· 136 136 137 137 When reading a register value, the PEC byte is computed and sent by the chip. 138 138 139 - PEC on word data transaction respresents a signifcant increase in bandwitdh 139 + PEC on word data transaction represents a significant increase in bandwidth 140 140 usage (+33% for both write and reads) in normal conditions. 141 141 142 142 Since this operation implies there will be an extra delay to each
+35
Documentation/hwmon/nct7363.rst
··· 1 + .. SPDX-License-Identifier: GPL-2.0 2 + 3 + Kernel driver nct7363 4 + ===================== 5 + 6 + Supported chip: 7 + 8 + * Nuvoton NCT7363Y 9 + 10 + Prefix: nct7363 11 + 12 + Addresses: I2C 0x20, 0x21, 0x22, 0x23 13 + 14 + Author: Ban Feng <kcfeng0@nuvoton.com> 15 + 16 + 17 + Description 18 + ----------- 19 + 20 + The NCT7363Y is a fan controller which provides up to 16 independent 21 + FAN input monitors, and up to 16 independent PWM outputs with SMBus interface. 22 + 23 + 24 + Sysfs entries 25 + ------------- 26 + 27 + Currently, the driver supports the following features: 28 + 29 + ========== ========================================== 30 + fanX_input provide current fan rotation value in RPM 31 + fanX_alarm report fan low speed real status 32 + fanX_min get or set fan count threshold 33 + 34 + pwmX get or set PWM fan control value. 35 + ========== ==========================================
+15
Documentation/hwmon/pmbus-core.rst
··· 308 308 309 309 #define PMBUS_READ_STATUS_AFTER_FAILED_CHECK BIT(3) 310 310 311 + #define PMBUS_NO_WRITE_PROTECT BIT(4) 312 + 313 + #define PMBUS_USE_COEFFICIENTS_CMD BIT(5) 314 + 311 315 struct pmbus_platform_data { 312 316 u32 flags; /* Device specific flags */ 313 317 ··· 362 358 driver will try to read the STATUS register after each failed 363 359 register check. This read may fail, but it will put the chip into a 364 360 known state. 361 + 362 + PMBUS_NO_WRITE_PROTECT 363 + 364 + Some PMBus chips respond with invalid data when reading the WRITE_PROTECT 365 + register. For such chips, this flag should be set so that the PMBus core 366 + driver doesn't use the WRITE_PROTECT command to determine its behavior. 367 + 368 + PMBUS_USE_COEFFICIENTS_CMD 369 + 370 + When this flag is set the PMBus core driver will use the COEFFICIENTS 371 + register to initialize the coefficients for the direct mode format.
+1 -1
Documentation/hwmon/sch5627.rst
··· 39 39 --------------------- 40 40 41 41 The SCH5627 allows for partially controlling the fan speed. If a temperature 42 - channel excedes tempX_max, all fans are forced to maximum speed. The same is not 42 + channel exceeds tempX_max, all fans are forced to maximum speed. The same is not 43 43 true for tempX_crit, presumably some other measures to cool down the system are 44 44 take in this case. 45 45 In which way the value of fanX_min affects the fan speed is currently unknown.
+14
Documentation/hwmon/sht4x.rst
··· 42 42 update_interval The minimum interval for polling the sensor, 43 43 in milliseconds. Writable. Must be at least 44 44 2000. 45 + heater_power The requested heater power, in milliwatts. 46 + Available values: 20, 110, 200 (default: 200). 47 + heater_time The requested operating time of the heater, 48 + in milliseconds. 49 + Available values: 100, 1000 (default 1000). 50 + heater_enable Enable the heater with the selected power 51 + and for the selected time in order to remove 52 + condensed water from the sensor surface. The 53 + heater cannot be manually turned off once 54 + enabled (it will automatically turn off 55 + after completing its operation). 56 + 57 + - 0: turned off (read-only value) 58 + - 1: turn on 45 59 =============== ============================================
+8
Documentation/hwmon/tmp108.rst
··· 3 3 4 4 Supported chips: 5 5 6 + * NXP P3T1085 7 + 8 + Prefix: 'p3t1085' 9 + 10 + Addresses scanned: none 11 + 12 + Datasheet: https://www.nxp.com/docs/en/data-sheet/P3T1085UK.pdf 13 + 6 14 * Texas Instruments TMP108 7 15 8 16 Prefix: 'tmp108'
+22 -7
MAINTAINERS
··· 12104 12104 F: drivers/isdn/hardware/ 12105 12105 F: drivers/isdn/mISDN/ 12106 12106 12107 + ISL28022 HARDWARE MONITORING DRIVER 12108 + M: Carsten Spieß <mail@carsten-spiess.de> 12109 + L: linux-hwmon@vger.kernel.org 12110 + S: Maintained 12111 + F: Documentation/devicetree/bindings/hwmon/renesas,isl28022.yaml 12112 + F: Documentation/hwmon/isl28022.rst 12113 + F: drivers/hwmon/isl28022.c 12114 + 12107 12115 ISOFS FILESYSTEM 12108 12116 M: Jan Kara <jack@suse.cz> 12109 12117 L: linux-fsdevel@vger.kernel.org ··· 15955 15947 F: Documentation/devicetree/bindings/hwmon/nuvoton,nct6775.yaml 15956 15948 F: drivers/hwmon/nct6775-i2c.c 15957 15949 15950 + NCT7363 HARDWARE MONITOR DRIVER 15951 + M: Ban Feng <kcfeng0@nuvoton.com> 15952 + L: linux-hwmon@vger.kernel.org 15953 + S: Maintained 15954 + F: Documentation/devicetree/bindings/hwmon/nuvoton,nct7363.yaml 15955 + F: Documentation/hwmon/nct7363.rst 15956 + F: drivers/hwmon/nct7363.c 15957 + 15958 15958 NETCONSOLE 15959 15959 M: Breno Leitao <leitao@debian.org> 15960 15960 S: Maintained ··· 16758 16742 S: Maintained 16759 16743 F: Documentation/hwmon/nzxt-kraken3.rst 16760 16744 F: drivers/hwmon/nzxt-kraken3.c 16761 - 16762 - NZXT-SMART2 HARDWARE MONITORING DRIVER 16763 - M: Aleksandr Mezin <mezin.alexander@gmail.com> 16764 - L: linux-hwmon@vger.kernel.org 16765 - S: Maintained 16766 - F: Documentation/hwmon/nzxt-smart2.rst 16767 - F: drivers/hwmon/nzxt-smart2.c 16768 16745 16769 16746 OBJAGG 16770 16747 M: Jiri Pirko <jiri@resnulli.us> ··· 22936 22927 F: include/linux/dma/k3-udma-glue.h 22937 22928 F: include/linux/dma/ti-cppi5.h 22938 22929 X: drivers/dma/ti/cppi41.c 22930 + 22931 + TEXAS INSTRUMENTS TPS25990 HARDWARE MONITOR DRIVER 22932 + M: Jerome Brunet <jbrunet@baylibre.com> 22933 + L: linux-hwmon@vger.kernel.org 22934 + S: Maintained 22935 + F: Documentation/devicetree/bindings/hwmon/pmbus/ti,tps25990.yaml 22939 22936 22940 22937 TEXAS INSTRUMENTS TPS23861 PoE PSE DRIVER 22941 22938 M: Robert Marko <robert.marko@sartura.hr>
+28 -3
drivers/hwmon/Kconfig
··· 855 855 sensor inside your CPU. Most of the family 6 CPUs 856 856 are supported. Check Documentation/hwmon/coretemp.rst for details. 857 857 858 + config SENSORS_ISL28022 859 + tristate "Renesas ISL28022" 860 + depends on I2C 861 + select REGMAP_I2C 862 + help 863 + If you say yes here you get support for ISL28022 power monitor. 864 + Check Documentation/hwmon/isl28022.rst for details. 865 + 866 + This driver can also be built as a module. If so, the module 867 + will be called isl28022. 868 + 858 869 config SENSORS_IT87 859 870 tristate "ITE IT87xx and compatibles" 860 871 depends on HAS_IOPORT ··· 1681 1670 This driver can also be built as a module. If so, the module 1682 1671 will be called nct6775-i2c. 1683 1672 1673 + config SENSORS_NCT7363 1674 + tristate "Nuvoton NCT7363Y" 1675 + depends on I2C 1676 + select REGMAP_I2C 1677 + help 1678 + If you say yes here you get support for the Nuvoton NCT7363Y 1679 + hardware monitoring chip. 1680 + 1681 + This driver can also be built as a module. If so, the module 1682 + will be called nct7363. 1683 + 1684 1684 config SENSORS_NCT7802 1685 1685 tristate "Nuvoton NCT7802Y" 1686 1686 depends on I2C ··· 2189 2167 select REGMAP_I2C 2190 2168 help 2191 2169 If you say yes here you get support for INA219, INA220, INA226, 2192 - INA230, and INA231 power monitor chips. 2170 + INA230, INA231, INA260, and SY24655 power monitor chips. 2193 2171 2194 2172 The INA2xx driver is configured for the default configuration of 2195 2173 the part as described in the datasheet. 2196 - Default value for Rshunt is 10 mOhms. 2174 + Default value for Rshunt is 10 mOhms except for INA260 which has an 2175 + internal 2 mOhm shunt resistor. 2197 2176 This driver can also be built as a module. If so, the module 2198 2177 will be called ina2xx. 2199 2178 ··· 2297 2274 config SENSORS_TMP108 2298 2275 tristate "Texas Instruments TMP108" 2299 2276 depends on I2C 2277 + depends on I3C || !I3C 2300 2278 select REGMAP_I2C 2279 + select REGMAP_I3C if I3C 2301 2280 help 2302 2281 If you say yes here you get support for Texas Instruments TMP108 2303 - sensor chips. 2282 + sensor chips and NXP P3T1085. 2304 2283 2305 2284 This driver can also be built as a module. If so, the module 2306 2285 will be called tmp108.
+2
drivers/hwmon/Makefile
··· 103 103 obj-$(CONFIG_SENSORS_INA238) += ina238.o 104 104 obj-$(CONFIG_SENSORS_INA3221) += ina3221.o 105 105 obj-$(CONFIG_SENSORS_INTEL_M10_BMC_HWMON) += intel-m10-bmc-hwmon.o 106 + obj-$(CONFIG_SENSORS_ISL28022) += isl28022.o 106 107 obj-$(CONFIG_SENSORS_IT87) += it87.o 107 108 obj-$(CONFIG_SENSORS_JC42) += jc42.o 108 109 obj-$(CONFIG_SENSORS_K8TEMP) += k8temp.o ··· 172 171 nct6775-objs := nct6775-platform.o 173 172 obj-$(CONFIG_SENSORS_NCT6775) += nct6775.o 174 173 obj-$(CONFIG_SENSORS_NCT6775_I2C) += nct6775-i2c.o 174 + obj-$(CONFIG_SENSORS_NCT7363) += nct7363.o 175 175 obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o 176 176 obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o 177 177 obj-$(CONFIG_SENSORS_NPCM7XX) += npcm750-pwm-fan.o
+1 -1
drivers/hwmon/abituguru.c
··· 1531 1531 .pm = pm_sleep_ptr(&abituguru_pm), 1532 1532 }, 1533 1533 .probe = abituguru_probe, 1534 - .remove_new = abituguru_remove, 1534 + .remove = abituguru_remove, 1535 1535 }; 1536 1536 1537 1537 static int __init abituguru_detect(void)
+2 -2
drivers/hwmon/abituguru3.c
··· 1147 1147 static DEFINE_SIMPLE_DEV_PM_OPS(abituguru3_pm, abituguru3_suspend, abituguru3_resume); 1148 1148 1149 1149 static struct platform_driver abituguru3_driver = { 1150 - .driver = { 1150 + .driver = { 1151 1151 .name = ABIT_UGURU3_NAME, 1152 1152 .pm = pm_sleep_ptr(&abituguru3_pm), 1153 1153 }, 1154 1154 .probe = abituguru3_probe, 1155 - .remove_new = abituguru3_remove, 1155 + .remove = abituguru3_remove, 1156 1156 }; 1157 1157 1158 1158 static int __init abituguru3_dmi_detect(void)
+2 -1
drivers/hwmon/acpi_power_meter.c
··· 680 680 { 681 681 int res = 0; 682 682 683 + /* _PMD method is optional. */ 683 684 res = read_domain_devices(resource); 684 - if (res) 685 + if (res != -ENODEV) 685 686 return res; 686 687 687 688 if (resource->caps.flags & POWER_METER_CAN_MEASURE) {
+12 -2
drivers/hwmon/amc6821.c
··· 22 22 #include <linux/minmax.h> 23 23 #include <linux/module.h> 24 24 #include <linux/mutex.h> 25 + #include <linux/of_platform.h> 25 26 #include <linux/regmap.h> 26 27 #include <linux/slab.h> 27 28 ··· 894 893 static const struct regmap_config amc6821_regmap_config = { 895 894 .reg_bits = 8, 896 895 .val_bits = 8, 897 - .max_register = AMC6821_REG_CONF3, 898 896 .volatile_reg = amc6821_volatile_reg, 899 897 .cache_type = REGCACHE_MAPLE, 900 898 }; ··· 920 920 if (err) 921 921 return err; 922 922 923 + if (of_device_is_compatible(dev->of_node, "tsd,mule")) { 924 + err = devm_of_platform_populate(dev); 925 + if (err) 926 + return dev_err_probe(dev, err, 927 + "Failed to create sub-devices\n"); 928 + } 929 + 923 930 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 924 931 data, &amc6821_chip_info, 925 932 amc6821_groups); ··· 934 927 } 935 928 936 929 static const struct i2c_device_id amc6821_id[] = { 937 - { "amc6821", 0 }, 930 + { "amc6821" }, 938 931 { } 939 932 }; 940 933 ··· 943 936 static const struct of_device_id __maybe_unused amc6821_of_match[] = { 944 937 { 945 938 .compatible = "ti,amc6821", 939 + }, 940 + { 941 + .compatible = "tsd,mule", 946 942 }, 947 943 { } 948 944 };
+1 -1
drivers/hwmon/aspeed-g6-pwm-tach.c
··· 534 534 535 535 static struct platform_driver aspeed_pwm_tach_driver = { 536 536 .probe = aspeed_pwm_tach_probe, 537 - .remove_new = aspeed_pwm_tach_remove, 537 + .remove = aspeed_pwm_tach_remove, 538 538 .driver = { 539 539 .name = "aspeed-g6-pwm-tach", 540 540 .of_match_table = aspeed_pwm_tach_match,
+1
drivers/hwmon/cros_ec_hwmon.c
··· 141 141 } 142 142 143 143 static const struct hwmon_channel_info * const cros_ec_hwmon_info[] = { 144 + HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ), 144 145 HWMON_CHANNEL_INFO(fan, 145 146 HWMON_F_INPUT | HWMON_F_FAULT, 146 147 HWMON_F_INPUT | HWMON_F_FAULT,
+1 -1
drivers/hwmon/da9052-hwmon.c
··· 473 473 474 474 static struct platform_driver da9052_hwmon_driver = { 475 475 .probe = da9052_hwmon_probe, 476 - .remove_new = da9052_hwmon_remove, 476 + .remove = da9052_hwmon_remove, 477 477 .driver = { 478 478 .name = "da9052-hwmon", 479 479 },
+1 -1
drivers/hwmon/dme1737.c
··· 2721 2721 .name = "dme1737", 2722 2722 }, 2723 2723 .probe = dme1737_isa_probe, 2724 - .remove_new = dme1737_isa_remove, 2724 + .remove = dme1737_isa_remove, 2725 2725 }; 2726 2726 2727 2727 /* ---------------------------------------------------------------------
+1 -1
drivers/hwmon/f71805f.c
··· 1497 1497 .name = DRVNAME, 1498 1498 }, 1499 1499 .probe = f71805f_probe, 1500 - .remove_new = f71805f_remove, 1500 + .remove = f71805f_remove, 1501 1501 }; 1502 1502 1503 1503 static int __init f71805f_device_add(unsigned short address,
+1 -1
drivers/hwmon/f71882fg.c
··· 2658 2658 .name = DRVNAME, 2659 2659 }, 2660 2660 .probe = f71882fg_probe, 2661 - .remove_new = f71882fg_remove, 2661 + .remove = f71882fg_remove, 2662 2662 }; 2663 2663 2664 2664 static int __init f71882fg_init(void)
+1 -8
drivers/hwmon/gsc-hwmon.c
··· 231 231 return 0; 232 232 } 233 233 234 - static umode_t 235 - gsc_hwmon_is_visible(const void *_data, enum hwmon_sensor_types type, u32 attr, 236 - int ch) 237 - { 238 - return 0444; 239 - } 240 - 241 234 static const struct hwmon_ops gsc_hwmon_ops = { 242 - .is_visible = gsc_hwmon_is_visible, 235 + .visible = 0444, 243 236 .read = gsc_hwmon_read, 244 237 .read_string = gsc_hwmon_read_string, 245 238 };
+15 -4
drivers/hwmon/hwmon.c
··· 145 145 146 146 static DEFINE_IDA(hwmon_ida); 147 147 148 + static umode_t hwmon_is_visible(const struct hwmon_ops *ops, 149 + const void *drvdata, 150 + enum hwmon_sensor_types type, 151 + u32 attr, int channel) 152 + { 153 + if (ops->visible) 154 + return ops->visible; 155 + 156 + return ops->is_visible(drvdata, type, attr, channel); 157 + } 158 + 148 159 /* Thermal zone handling */ 149 160 150 161 /* ··· 278 267 int err; 279 268 280 269 if (!(info[i]->config[j] & HWMON_T_INPUT) || 281 - !chip->ops->is_visible(drvdata, hwmon_temp, 282 - hwmon_temp_input, j)) 270 + !hwmon_is_visible(chip->ops, drvdata, hwmon_temp, 271 + hwmon_temp_input, j)) 283 272 continue; 284 273 285 274 err = hwmon_thermal_add_sensor(dev, j); ··· 517 506 const char *name; 518 507 bool is_string = is_string_attr(type, attr); 519 508 520 - mode = ops->is_visible(drvdata, type, attr, index); 509 + mode = hwmon_is_visible(ops, drvdata, type, attr, index); 521 510 if (!mode) 522 511 return ERR_PTR(-ENOENT); 523 512 ··· 1044 1033 if (!dev || !name || !chip) 1045 1034 return ERR_PTR(-EINVAL); 1046 1035 1047 - if (!chip->ops || !chip->ops->is_visible || !chip->info) 1036 + if (!chip->ops || !(chip->ops->visible || chip->ops->is_visible) || !chip->info) 1048 1037 return ERR_PTR(-EINVAL); 1049 1038 1050 1039 return __hwmon_device_register(dev, name, drvdata, chip, extra_groups);
+1 -7
drivers/hwmon/i5500_temp.c
··· 29 29 #define REG_CTCTRL 0xF7 30 30 #define REG_TSTIMER 0xF8 31 31 32 - static umode_t i5500_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr, 33 - int channel) 34 - { 35 - return 0444; 36 - } 37 - 38 32 static int i5500_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, 39 33 long *val) 40 34 { ··· 78 84 } 79 85 80 86 static const struct hwmon_ops i5500_ops = { 81 - .is_visible = i5500_is_visible, 87 + .visible = 0444, 82 88 .read = i5500_read, 83 89 }; 84 90
+1 -1
drivers/hwmon/i5k_amb.c
··· 568 568 .name = DRVNAME, 569 569 }, 570 570 .probe = i5k_amb_probe, 571 - .remove_new = i5k_amb_remove, 571 + .remove = i5k_amb_remove, 572 572 }; 573 573 574 574 static int __init i5k_amb_init(void)
+138 -14
drivers/hwmon/ina2xx.c
··· 51 51 #define INA226_ALERT_LIMIT 0x07 52 52 #define INA226_DIE_ID 0xFF 53 53 54 - #define INA2XX_MAX_REGISTERS 8 54 + /* SY24655 register definitions */ 55 + #define SY24655_EIN 0x0A 56 + #define SY24655_ACCUM_CONFIG 0x0D 57 + #define INA2XX_MAX_REGISTERS 0x0D 55 58 56 59 /* settings - depend on use case */ 57 60 #define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */ 58 61 #define INA226_CONFIG_DEFAULT 0x4527 /* averages=16 */ 62 + #define INA260_CONFIG_DEFAULT 0x6527 /* averages=16 */ 63 + #define SY24655_CONFIG_DEFAULT 0x4527 /* averages=16 */ 64 + 65 + /* (only for sy24655) */ 66 + #define SY24655_ACCUM_CONFIG_DEFAULT 0x044C /* continuous mode, clear after read*/ 59 67 60 68 /* worst case is 68.10 ms (~14.6Hz, ina219) */ 61 69 #define INA2XX_CONVERSION_RATE 15 62 70 #define INA2XX_MAX_DELAY 69 /* worst case delay in ms */ 63 71 64 72 #define INA2XX_RSHUNT_DEFAULT 10000 73 + #define INA260_RSHUNT 2000 65 74 66 75 /* bit mask for reading the averaging setting in the configuration register */ 67 76 #define INA226_AVG_RD_MASK GENMASK(11, 9) ··· 104 95 case INA2XX_CALIBRATION: 105 96 case INA226_MASK_ENABLE: 106 97 case INA226_ALERT_LIMIT: 98 + case SY24655_ACCUM_CONFIG: 107 99 return true; 108 100 default: 109 101 return false; ··· 135 125 .writeable_reg = ina2xx_writeable_reg, 136 126 }; 137 127 138 - enum ina2xx_ids { ina219, ina226 }; 128 + enum ina2xx_ids { ina219, ina226, ina260, sy24655 }; 139 129 140 130 struct ina2xx_config { 141 131 u16 config_default; 132 + bool has_alerts; /* chip supports alerts and limits */ 133 + bool has_ishunt; /* chip has internal shunt resistor */ 134 + bool has_power_average; /* chip has internal shunt resistor */ 142 135 int calibration_value; 143 136 int shunt_div; 144 137 int bus_voltage_shift; ··· 158 145 long power_lsb_uW; 159 146 struct mutex config_lock; 160 147 struct regmap *regmap; 148 + struct i2c_client *client; 161 149 }; 162 150 163 151 static const struct ina2xx_config ina2xx_config[] = { ··· 169 155 .bus_voltage_shift = 3, 170 156 .bus_voltage_lsb = 4000, 171 157 .power_lsb_factor = 20, 158 + .has_alerts = false, 159 + .has_ishunt = false, 160 + .has_power_average = false, 172 161 }, 173 162 [ina226] = { 174 163 .config_default = INA226_CONFIG_DEFAULT, ··· 180 163 .bus_voltage_shift = 0, 181 164 .bus_voltage_lsb = 1250, 182 165 .power_lsb_factor = 25, 166 + .has_alerts = true, 167 + .has_ishunt = false, 168 + .has_power_average = false, 169 + }, 170 + [ina260] = { 171 + .config_default = INA260_CONFIG_DEFAULT, 172 + .shunt_div = 400, 173 + .bus_voltage_shift = 0, 174 + .bus_voltage_lsb = 1250, 175 + .power_lsb_factor = 8, 176 + .has_alerts = true, 177 + .has_ishunt = true, 178 + .has_power_average = false, 179 + }, 180 + [sy24655] = { 181 + .config_default = SY24655_CONFIG_DEFAULT, 182 + .calibration_value = 4096, 183 + .shunt_div = 400, 184 + .bus_voltage_shift = 0, 185 + .bus_voltage_lsb = 1250, 186 + .power_lsb_factor = 25, 187 + .has_alerts = true, 188 + .has_ishunt = false, 189 + .has_power_average = true, 183 190 }, 184 191 }; 185 192 ··· 294 253 struct regmap *regmap = data->regmap; 295 254 unsigned int regval; 296 255 int ret, retry; 256 + 257 + if (data->config->has_ishunt) { 258 + /* No calibration needed */ 259 + ret = regmap_read(regmap, reg, &regval); 260 + if (ret < 0) 261 + return ret; 262 + *val = ina2xx_get_value(data, reg, regval); 263 + return 0; 264 + } 297 265 298 266 for (retry = 5; retry; retry--) { 299 267 ret = regmap_read(regmap, reg, &regval); ··· 509 459 return 0; 510 460 } 511 461 462 + /* 463 + * Configuring the READ_EIN (bit 10) of the ACCUM_CONFIG register to 1 464 + * can clear accumulator and sample_count after reading the EIN register. 465 + * This way, the average power between the last read and the current 466 + * read can be obtained. By combining with accurate time data from 467 + * outside, the energy consumption during that period can be calculated. 468 + */ 469 + static int sy24655_average_power_read(struct ina2xx_data *data, u8 reg, long *val) 470 + { 471 + u8 template[6]; 472 + int ret; 473 + long accumulator_24, sample_count; 474 + 475 + /* 48-bit register read */ 476 + ret = i2c_smbus_read_i2c_block_data(data->client, reg, 6, template); 477 + if (ret < 0) 478 + return ret; 479 + if (ret != 6) 480 + return -EIO; 481 + accumulator_24 = ((template[3] << 16) | 482 + (template[4] << 8) | 483 + template[5]); 484 + sample_count = ((template[0] << 16) | 485 + (template[1] << 8) | 486 + template[2]); 487 + if (sample_count <= 0) { 488 + *val = 0; 489 + return 0; 490 + } 491 + 492 + *val = DIV_ROUND_CLOSEST(accumulator_24, sample_count) * data->power_lsb_uW; 493 + 494 + return 0; 495 + } 496 + 512 497 static int ina2xx_power_read(struct device *dev, u32 attr, long *val) 513 498 { 514 499 struct ina2xx_data *data = dev_get_drvdata(dev); ··· 551 466 switch (attr) { 552 467 case hwmon_power_input: 553 468 return ina2xx_read_init(dev, INA2XX_POWER, val); 469 + case hwmon_power_average: 470 + return sy24655_average_power_read(data, SY24655_EIN, val); 554 471 case hwmon_power_crit: 555 472 return ina226_alert_limit_read(data, INA226_POWER_OVER_LIMIT_MASK, 556 473 INA2XX_POWER, val); ··· 711 624 u32 attr, int channel) 712 625 { 713 626 const struct ina2xx_data *data = _data; 627 + bool has_alerts = data->config->has_alerts; 628 + bool has_power_average = data->config->has_power_average; 714 629 enum ina2xx_ids chip = data->chip; 715 630 716 631 switch (type) { ··· 722 633 return 0444; 723 634 case hwmon_in_lcrit: 724 635 case hwmon_in_crit: 725 - if (chip == ina226) 636 + if (has_alerts) 726 637 return 0644; 727 638 break; 728 639 case hwmon_in_lcrit_alarm: 729 640 case hwmon_in_crit_alarm: 730 - if (chip == ina226) 641 + if (has_alerts) 731 642 return 0444; 732 643 break; 733 644 default: ··· 740 651 return 0444; 741 652 case hwmon_curr_lcrit: 742 653 case hwmon_curr_crit: 743 - if (chip == ina226) 654 + if (has_alerts) 744 655 return 0644; 745 656 break; 746 657 case hwmon_curr_lcrit_alarm: 747 658 case hwmon_curr_crit_alarm: 748 - if (chip == ina226) 659 + if (has_alerts) 749 660 return 0444; 750 661 break; 751 662 default: ··· 757 668 case hwmon_power_input: 758 669 return 0444; 759 670 case hwmon_power_crit: 760 - if (chip == ina226) 671 + if (has_alerts) 761 672 return 0644; 762 673 break; 763 674 case hwmon_power_crit_alarm: 764 - if (chip == ina226) 675 + if (has_alerts) 676 + return 0444; 677 + break; 678 + case hwmon_power_average: 679 + if (has_power_average) 765 680 return 0444; 766 681 break; 767 682 default: ··· 775 682 case hwmon_chip: 776 683 switch (attr) { 777 684 case hwmon_chip_update_interval: 778 - if (chip == ina226) 685 + if (chip == ina226 || chip == ina260) 779 686 return 0644; 780 687 break; 781 688 default: ··· 800 707 HWMON_CHANNEL_INFO(curr, HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM | 801 708 HWMON_C_LCRIT | HWMON_C_LCRIT_ALARM), 802 709 HWMON_CHANNEL_INFO(power, 803 - HWMON_P_INPUT | HWMON_P_CRIT | HWMON_P_CRIT_ALARM), 710 + HWMON_P_INPUT | HWMON_P_CRIT | HWMON_P_CRIT_ALARM | 711 + HWMON_P_AVERAGE), 804 712 NULL 805 713 }; 806 714 ··· 885 791 u32 shunt; 886 792 int ret; 887 793 888 - if (device_property_read_u32(dev, "shunt-resistor", &shunt) < 0) 794 + if (data->config->has_ishunt) 795 + shunt = INA260_RSHUNT; 796 + else if (device_property_read_u32(dev, "shunt-resistor", &shunt) < 0) 889 797 shunt = INA2XX_RSHUNT_DEFAULT; 890 798 891 799 ret = ina2xx_set_shunt(data, shunt); ··· 898 802 if (ret < 0) 899 803 return ret; 900 804 901 - if (data->chip == ina226) { 805 + if (data->config->has_alerts) { 902 806 bool active_high = device_property_read_bool(dev, "ti,alert-polarity-active-high"); 903 807 904 808 regmap_update_bits(regmap, INA226_MASK_ENABLE, ··· 906 810 INA226_ALERT_LATCH_ENABLE | 907 811 FIELD_PREP(INA226_ALERT_POLARITY, active_high)); 908 812 } 813 + if (data->config->has_power_average) { 814 + if (data->chip == sy24655) { 815 + /* 816 + * Initialize the power accumulation method to continuous 817 + * mode and clear the EIN register after each read of the 818 + * EIN register 819 + */ 820 + ret = regmap_write(regmap, SY24655_ACCUM_CONFIG, 821 + SY24655_ACCUM_CONFIG_DEFAULT); 822 + if (ret < 0) 823 + return ret; 824 + } 825 + } 826 + 827 + if (data->config->has_ishunt) 828 + return 0; 909 829 910 830 /* 911 831 * Calibration register is set to the best value, which eliminates ··· 948 836 return -ENOMEM; 949 837 950 838 /* set the device type */ 839 + data->client = client; 951 840 data->config = &ina2xx_config[chip]; 952 841 data->chip = chip; 953 842 mutex_init(&data->config_lock); ··· 969 856 970 857 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 971 858 data, &ina2xx_chip_info, 972 - ina2xx_groups); 859 + data->config->has_ishunt ? 860 + NULL : ina2xx_groups); 973 861 if (IS_ERR(hwmon_dev)) 974 862 return PTR_ERR(hwmon_dev); 975 863 ··· 986 872 { "ina226", ina226 }, 987 873 { "ina230", ina226 }, 988 874 { "ina231", ina226 }, 875 + { "ina260", ina260 }, 876 + { "sy24655", sy24655 }, 989 877 { } 990 878 }; 991 879 MODULE_DEVICE_TABLE(i2c, ina2xx_id); 992 880 993 881 static const struct of_device_id __maybe_unused ina2xx_of_match[] = { 882 + { 883 + .compatible = "silergy,sy24655", 884 + .data = (void *)sy24655 885 + }, 994 886 { 995 887 .compatible = "ti,ina219", 996 888 .data = (void *)ina219 ··· 1017 897 .compatible = "ti,ina231", 1018 898 .data = (void *)ina226 1019 899 }, 1020 - { }, 900 + { 901 + .compatible = "ti,ina260", 902 + .data = (void *)ina260 903 + }, 904 + { } 1021 905 }; 1022 906 MODULE_DEVICE_TABLE(of, ina2xx_of_match); 1023 907
+1 -8
drivers/hwmon/intel-m10-bmc-hwmon.c
··· 565 565 .hinfo = n6000bmc_hinfo, 566 566 }; 567 567 568 - static umode_t 569 - m10bmc_hwmon_is_visible(const void *data, enum hwmon_sensor_types type, 570 - u32 attr, int channel) 571 - { 572 - return 0444; 573 - } 574 - 575 568 static const struct m10bmc_sdata * 576 569 find_sensor_data(struct m10bmc_hwmon *hw, enum hwmon_sensor_types type, 577 570 int channel) ··· 722 729 } 723 730 724 731 static const struct hwmon_ops m10bmc_hwmon_ops = { 725 - .is_visible = m10bmc_hwmon_is_visible, 732 + .visible = 0444, 726 733 .read = m10bmc_hwmon_read, 727 734 .read_string = m10bmc_hwmon_read_string, 728 735 };
+535
drivers/hwmon/isl28022.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * isl28022.c - driver for Renesas ISL28022 power monitor chip monitoring 4 + * 5 + * Copyright (c) 2023 Carsten Spieß <mail@carsten-spiess.de> 6 + */ 7 + 8 + #include <linux/debugfs.h> 9 + #include <linux/err.h> 10 + #include <linux/hwmon.h> 11 + #include <linux/i2c.h> 12 + #include <linux/module.h> 13 + #include <linux/regmap.h> 14 + 15 + /* ISL28022 registers */ 16 + #define ISL28022_REG_CONFIG 0x00 17 + #define ISL28022_REG_SHUNT 0x01 18 + #define ISL28022_REG_BUS 0x02 19 + #define ISL28022_REG_POWER 0x03 20 + #define ISL28022_REG_CURRENT 0x04 21 + #define ISL28022_REG_CALIB 0x05 22 + #define ISL28022_REG_SHUNT_THR 0x06 23 + #define ISL28022_REG_BUS_THR 0x07 24 + #define ISL28022_REG_INT 0x08 25 + #define ISL28022_REG_AUX 0x09 26 + #define ISL28022_REG_MAX ISL28022_REG_AUX 27 + 28 + /* ISL28022 config flags */ 29 + /* mode flags */ 30 + #define ISL28022_MODE_SHIFT 0 31 + #define ISL28022_MODE_MASK 0x0007 32 + 33 + #define ISL28022_MODE_PWR_DOWN 0x0 34 + #define ISL28022_MODE_TRG_S 0x1 35 + #define ISL28022_MODE_TRG_B 0x2 36 + #define ISL28022_MODE_TRG_SB 0x3 37 + #define ISL28022_MODE_ADC_OFF 0x4 38 + #define ISL28022_MODE_CONT_S 0x5 39 + #define ISL28022_MODE_CONT_B 0x6 40 + #define ISL28022_MODE_CONT_SB 0x7 41 + 42 + /* shunt ADC settings */ 43 + #define ISL28022_SADC_SHIFT 3 44 + #define ISL28022_SADC_MASK 0x0078 45 + 46 + #define ISL28022_BADC_SHIFT 7 47 + #define ISL28022_BADC_MASK 0x0780 48 + 49 + #define ISL28022_ADC_12 0x0 /* 12 bit ADC */ 50 + #define ISL28022_ADC_13 0x1 /* 13 bit ADC */ 51 + #define ISL28022_ADC_14 0x2 /* 14 bit ADC */ 52 + #define ISL28022_ADC_15 0x3 /* 15 bit ADC */ 53 + #define ISL28022_ADC_15_1 0x8 /* 15 bit ADC, 1 sample */ 54 + #define ISL28022_ADC_15_2 0x9 /* 15 bit ADC, 2 samples */ 55 + #define ISL28022_ADC_15_4 0xA /* 15 bit ADC, 4 samples */ 56 + #define ISL28022_ADC_15_8 0xB /* 15 bit ADC, 8 samples */ 57 + #define ISL28022_ADC_15_16 0xC /* 15 bit ADC, 16 samples */ 58 + #define ISL28022_ADC_15_32 0xD /* 15 bit ADC, 32 samples */ 59 + #define ISL28022_ADC_15_64 0xE /* 15 bit ADC, 64 samples */ 60 + #define ISL28022_ADC_15_128 0xF /* 15 bit ADC, 128 samples */ 61 + 62 + /* shunt voltage range */ 63 + #define ISL28022_PG_SHIFT 11 64 + #define ISL28022_PG_MASK 0x1800 65 + 66 + #define ISL28022_PG_40 0x0 /* +/-40 mV */ 67 + #define ISL28022_PG_80 0x1 /* +/-80 mV */ 68 + #define ISL28022_PG_160 0x2 /* +/-160 mV */ 69 + #define ISL28022_PG_320 0x3 /* +/-3200 mV */ 70 + 71 + /* bus voltage range */ 72 + #define ISL28022_BRNG_SHIFT 13 73 + #define ISL28022_BRNG_MASK 0x6000 74 + 75 + #define ISL28022_BRNG_16 0x0 /* 16 V */ 76 + #define ISL28022_BRNG_32 0x1 /* 32 V */ 77 + #define ISL28022_BRNG_60 0x3 /* 60 V */ 78 + 79 + /* reset */ 80 + #define ISL28022_RESET 0x8000 81 + 82 + struct isl28022_data { 83 + struct regmap *regmap; 84 + u32 shunt; 85 + u32 gain; 86 + u32 average; 87 + }; 88 + 89 + static int isl28022_read_in(struct device *dev, u32 attr, int channel, long *val) 90 + { 91 + struct isl28022_data *data = dev_get_drvdata(dev); 92 + unsigned int regval; 93 + int err; 94 + u16 sign_bit; 95 + 96 + switch (channel) { 97 + case 0: 98 + switch (attr) { 99 + case hwmon_in_input: 100 + err = regmap_read(data->regmap, 101 + ISL28022_REG_BUS, &regval); 102 + if (err < 0) 103 + return err; 104 + /* driver supports only 60V mode (BRNG 11) */ 105 + *val = (long)(((u16)regval) & 0xFFFC); 106 + break; 107 + default: 108 + return -EOPNOTSUPP; 109 + } 110 + break; 111 + case 1: 112 + switch (attr) { 113 + case hwmon_in_input: 114 + err = regmap_read(data->regmap, 115 + ISL28022_REG_SHUNT, &regval); 116 + if (err < 0) 117 + return err; 118 + switch (data->gain) { 119 + case 8: 120 + sign_bit = (regval >> 15) & 0x01; 121 + *val = (long)((((u16)regval) & 0x7FFF) - 122 + (sign_bit * 32768)) / 100; 123 + break; 124 + case 4: 125 + sign_bit = (regval >> 14) & 0x01; 126 + *val = (long)((((u16)regval) & 0x3FFF) - 127 + (sign_bit * 16384)) / 100; 128 + break; 129 + case 2: 130 + sign_bit = (regval >> 13) & 0x01; 131 + *val = (long)((((u16)regval) & 0x1FFF) - 132 + (sign_bit * 8192)) / 100; 133 + break; 134 + case 1: 135 + sign_bit = (regval >> 12) & 0x01; 136 + *val = (long)((((u16)regval) & 0x0FFF) - 137 + (sign_bit * 4096)) / 100; 138 + break; 139 + } 140 + break; 141 + default: 142 + return -EOPNOTSUPP; 143 + } 144 + break; 145 + default: 146 + return -EOPNOTSUPP; 147 + } 148 + 149 + return 0; 150 + } 151 + 152 + static int isl28022_read_current(struct device *dev, u32 attr, long *val) 153 + { 154 + struct isl28022_data *data = dev_get_drvdata(dev); 155 + unsigned int regval; 156 + int err; 157 + 158 + switch (attr) { 159 + case hwmon_curr_input: 160 + err = regmap_read(data->regmap, 161 + ISL28022_REG_CURRENT, &regval); 162 + if (err < 0) 163 + return err; 164 + *val = ((long)regval * 1250L * (long)data->gain) / 165 + (long)data->shunt; 166 + break; 167 + default: 168 + return -EOPNOTSUPP; 169 + } 170 + 171 + return 0; 172 + } 173 + 174 + static int isl28022_read_power(struct device *dev, u32 attr, long *val) 175 + { 176 + struct isl28022_data *data = dev_get_drvdata(dev); 177 + unsigned int regval; 178 + int err; 179 + 180 + switch (attr) { 181 + case hwmon_power_input: 182 + err = regmap_read(data->regmap, 183 + ISL28022_REG_POWER, &regval); 184 + if (err < 0) 185 + return err; 186 + *val = ((51200000L * ((long)data->gain)) / 187 + (long)data->shunt) * (long)regval; 188 + break; 189 + default: 190 + return -EOPNOTSUPP; 191 + } 192 + 193 + return 0; 194 + } 195 + 196 + static int isl28022_read(struct device *dev, enum hwmon_sensor_types type, 197 + u32 attr, int channel, long *val) 198 + { 199 + switch (type) { 200 + case hwmon_in: 201 + return isl28022_read_in(dev, attr, channel, val); 202 + case hwmon_curr: 203 + return isl28022_read_current(dev, attr, val); 204 + case hwmon_power: 205 + return isl28022_read_power(dev, attr, val); 206 + default: 207 + return -EOPNOTSUPP; 208 + } 209 + return 0; 210 + } 211 + 212 + static umode_t isl28022_is_visible(const void *data, enum hwmon_sensor_types type, 213 + u32 attr, int channel) 214 + { 215 + switch (type) { 216 + case hwmon_in: 217 + switch (attr) { 218 + case hwmon_in_input: 219 + return 0444; 220 + default: 221 + break; 222 + } 223 + break; 224 + case hwmon_curr: 225 + switch (attr) { 226 + case hwmon_curr_input: 227 + return 0444; 228 + default: 229 + break; 230 + } 231 + break; 232 + case hwmon_power: 233 + switch (attr) { 234 + case hwmon_power_input: 235 + return 0444; 236 + default: 237 + break; 238 + } 239 + break; 240 + default: 241 + break; 242 + } 243 + return 0; 244 + } 245 + 246 + static const struct hwmon_channel_info *isl28022_info[] = { 247 + HWMON_CHANNEL_INFO(in, 248 + HWMON_I_INPUT, /* channel 0: bus voltage (mV) */ 249 + HWMON_I_INPUT), /* channel 1: shunt voltage (mV) */ 250 + HWMON_CHANNEL_INFO(curr, 251 + HWMON_C_INPUT), /* channel 1: current (mA) */ 252 + HWMON_CHANNEL_INFO(power, 253 + HWMON_P_INPUT), /* channel 1: power (µW) */ 254 + NULL 255 + }; 256 + 257 + static const struct hwmon_ops isl28022_hwmon_ops = { 258 + .is_visible = isl28022_is_visible, 259 + .read = isl28022_read, 260 + }; 261 + 262 + static const struct hwmon_chip_info isl28022_chip_info = { 263 + .ops = &isl28022_hwmon_ops, 264 + .info = isl28022_info, 265 + }; 266 + 267 + static bool isl28022_is_writeable_reg(struct device *dev, unsigned int reg) 268 + { 269 + switch (reg) { 270 + case ISL28022_REG_CONFIG: 271 + case ISL28022_REG_CALIB: 272 + case ISL28022_REG_SHUNT_THR: 273 + case ISL28022_REG_BUS_THR: 274 + case ISL28022_REG_INT: 275 + case ISL28022_REG_AUX: 276 + return true; 277 + } 278 + 279 + return false; 280 + } 281 + 282 + static bool isl28022_is_volatile_reg(struct device *dev, unsigned int reg) 283 + { 284 + switch (reg) { 285 + case ISL28022_REG_CONFIG: 286 + case ISL28022_REG_SHUNT: 287 + case ISL28022_REG_BUS: 288 + case ISL28022_REG_POWER: 289 + case ISL28022_REG_CURRENT: 290 + case ISL28022_REG_INT: 291 + case ISL28022_REG_AUX: 292 + return true; 293 + } 294 + return true; 295 + } 296 + 297 + static const struct regmap_config isl28022_regmap_config = { 298 + .reg_bits = 8, 299 + .val_bits = 16, 300 + .max_register = ISL28022_REG_MAX, 301 + .writeable_reg = isl28022_is_writeable_reg, 302 + .volatile_reg = isl28022_is_volatile_reg, 303 + .val_format_endian = REGMAP_ENDIAN_BIG, 304 + .cache_type = REGCACHE_RBTREE, 305 + .use_single_read = true, 306 + .use_single_write = true, 307 + }; 308 + 309 + static int shunt_voltage_show(struct seq_file *seqf, void *unused) 310 + { 311 + struct isl28022_data *data = seqf->private; 312 + unsigned int regval; 313 + int err; 314 + 315 + err = regmap_read(data->regmap, 316 + ISL28022_REG_SHUNT, &regval); 317 + if (err) 318 + return err; 319 + 320 + /* print shunt voltage in micro volt */ 321 + seq_printf(seqf, "%d\n", regval * 10); 322 + 323 + return 0; 324 + } 325 + DEFINE_SHOW_ATTRIBUTE(shunt_voltage); 326 + 327 + static struct dentry *isl28022_debugfs_root; 328 + 329 + static void isl28022_debugfs_remove(void *res) 330 + { 331 + debugfs_remove_recursive(res); 332 + } 333 + 334 + static void isl28022_debugfs_init(struct i2c_client *client, struct isl28022_data *data) 335 + { 336 + char name[16]; 337 + struct dentry *debugfs; 338 + 339 + scnprintf(name, sizeof(name), "%d-%04hx", client->adapter->nr, client->addr); 340 + 341 + debugfs = debugfs_create_dir(name, isl28022_debugfs_root); 342 + debugfs_create_file("shunt_voltage", 0444, debugfs, data, &shunt_voltage_fops); 343 + 344 + devm_add_action_or_reset(&client->dev, isl28022_debugfs_remove, debugfs); 345 + } 346 + 347 + /* 348 + * read property values and make consistency checks. 349 + * 350 + * following values for shunt range and resistor are allowed: 351 + * 40 mV -> gain 1, shunt min. 800 micro ohms 352 + * 80 mV -> gain 2, shunt min. 1600 micro ohms 353 + * 160 mV -> gain 4, shunt min. 3200 micro ohms 354 + * 320 mV -> gain 8, shunt min. 6400 micro ohms 355 + */ 356 + static int isl28022_read_properties(struct device *dev, struct isl28022_data *data) 357 + { 358 + u32 val; 359 + int err; 360 + 361 + err = device_property_read_u32(dev, "shunt-resistor-micro-ohms", &val); 362 + if (err == -EINVAL) 363 + val = 10000; 364 + else if (err < 0) 365 + return err; 366 + data->shunt = val; 367 + 368 + err = device_property_read_u32(dev, "renesas,shunt-range-microvolt", &val); 369 + if (err == -EINVAL) 370 + val = 320000; 371 + else if (err < 0) 372 + return err; 373 + 374 + switch (val) { 375 + case 40000: 376 + data->gain = 1; 377 + if (data->shunt < 800) 378 + goto shunt_invalid; 379 + break; 380 + case 80000: 381 + data->gain = 2; 382 + if (data->shunt < 1600) 383 + goto shunt_invalid; 384 + break; 385 + case 160000: 386 + data->gain = 4; 387 + if (data->shunt < 3200) 388 + goto shunt_invalid; 389 + break; 390 + case 320000: 391 + data->gain = 8; 392 + if (data->shunt < 6400) 393 + goto shunt_invalid; 394 + break; 395 + default: 396 + return dev_err_probe(dev, -EINVAL, 397 + "renesas,shunt-range-microvolt invalid value %d\n", 398 + val); 399 + } 400 + 401 + err = device_property_read_u32(dev, "renesas,average-samples", &val); 402 + if (err == -EINVAL) 403 + val = 1; 404 + else if (err < 0) 405 + return err; 406 + if (val > 128 || hweight32(val) != 1) 407 + return dev_err_probe(dev, -EINVAL, 408 + "renesas,average-samples invalid value %d\n", 409 + val); 410 + 411 + data->average = val; 412 + 413 + return 0; 414 + 415 + shunt_invalid: 416 + return dev_err_probe(dev, -EINVAL, 417 + "renesas,shunt-resistor-microvolt invalid value %d\n", 418 + data->shunt); 419 + } 420 + 421 + /* 422 + * write configuration and calibration registers 423 + * 424 + * The driver supports only shunt and bus continuous ADC mode at 15bit resolution 425 + * with averaging from 1 to 128 samples (pow of 2) on both channels. 426 + * Shunt voltage gain 1,2,4 or 8 is allowed. 427 + * The bus voltage range is 60V fixed. 428 + */ 429 + static int isl28022_config(struct isl28022_data *data) 430 + { 431 + int err; 432 + u16 config; 433 + u16 calib; 434 + 435 + config = (ISL28022_MODE_CONT_SB << ISL28022_MODE_SHIFT) | 436 + (ISL28022_BRNG_60 << ISL28022_BRNG_SHIFT) | 437 + (__ffs(data->gain) << ISL28022_PG_SHIFT) | 438 + ((ISL28022_ADC_15_1 + __ffs(data->average)) << ISL28022_SADC_SHIFT) | 439 + ((ISL28022_ADC_15_1 + __ffs(data->average)) << ISL28022_BADC_SHIFT); 440 + 441 + calib = data->shunt ? 0x8000 / data->gain : 0; 442 + 443 + err = regmap_write(data->regmap, ISL28022_REG_CONFIG, config); 444 + if (err < 0) 445 + return err; 446 + 447 + return regmap_write(data->regmap, ISL28022_REG_CALIB, calib); 448 + } 449 + 450 + static int isl28022_probe(struct i2c_client *client) 451 + { 452 + struct device *dev = &client->dev; 453 + struct device *hwmon_dev; 454 + struct isl28022_data *data; 455 + int err; 456 + 457 + if (!i2c_check_functionality(client->adapter, 458 + I2C_FUNC_SMBUS_BYTE_DATA | 459 + I2C_FUNC_SMBUS_WORD_DATA)) 460 + return -ENODEV; 461 + 462 + data = devm_kzalloc(dev, sizeof(struct isl28022_data), GFP_KERNEL); 463 + if (!data) 464 + return -ENOMEM; 465 + 466 + err = isl28022_read_properties(dev, data); 467 + if (err) 468 + return err; 469 + 470 + data->regmap = devm_regmap_init_i2c(client, &isl28022_regmap_config); 471 + if (IS_ERR(data->regmap)) 472 + return PTR_ERR(data->regmap); 473 + 474 + err = isl28022_config(data); 475 + if (err) 476 + return err; 477 + 478 + isl28022_debugfs_init(client, data); 479 + 480 + hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 481 + data, &isl28022_chip_info, NULL); 482 + if (IS_ERR(hwmon_dev)) 483 + return PTR_ERR(hwmon_dev); 484 + 485 + return 0; 486 + } 487 + 488 + static const struct i2c_device_id isl28022_ids[] = { 489 + { "isl28022", 0}, 490 + { /* LIST END */ } 491 + }; 492 + MODULE_DEVICE_TABLE(i2c, isl28022_ids); 493 + 494 + static const struct of_device_id __maybe_unused isl28022_of_match[] = { 495 + { .compatible = "renesas,isl28022"}, 496 + { /* LIST END */ } 497 + }; 498 + MODULE_DEVICE_TABLE(of, isl28022_of_match); 499 + 500 + static struct i2c_driver isl28022_driver = { 501 + .class = I2C_CLASS_HWMON, 502 + .driver = { 503 + .name = "isl28022", 504 + }, 505 + .probe = isl28022_probe, 506 + .id_table = isl28022_ids, 507 + }; 508 + 509 + static int __init 510 + isl28022_init(void) 511 + { 512 + int err; 513 + 514 + isl28022_debugfs_root = debugfs_create_dir("isl28022", NULL); 515 + err = i2c_add_driver(&isl28022_driver); 516 + if (!err) 517 + return 0; 518 + 519 + debugfs_remove_recursive(isl28022_debugfs_root); 520 + return err; 521 + } 522 + 523 + static void __exit 524 + isl28022_exit(void) 525 + { 526 + i2c_del_driver(&isl28022_driver); 527 + debugfs_remove_recursive(isl28022_debugfs_root); 528 + } 529 + 530 + module_init(isl28022_init); 531 + module_exit(isl28022_exit); 532 + 533 + MODULE_AUTHOR("Carsten Spieß <mail@carsten-spiess.de>"); 534 + MODULE_DESCRIPTION("ISL28022 driver"); 535 + MODULE_LICENSE("GPL");
+2 -4
drivers/hwmon/jc42.c
··· 11 11 12 12 #include <linux/bitops.h> 13 13 #include <linux/bitfield.h> 14 + #include <linux/mod_devicetable.h> 14 15 #include <linux/module.h> 15 16 #include <linux/init.h> 16 17 #include <linux/slab.h> ··· 20 19 #include <linux/hwmon.h> 21 20 #include <linux/err.h> 22 21 #include <linux/mutex.h> 23 - #include <linux/of.h> 24 22 #include <linux/regmap.h> 25 23 26 24 /* Addresses to scan */ ··· 595 595 }; 596 596 MODULE_DEVICE_TABLE(i2c, jc42_id); 597 597 598 - #ifdef CONFIG_OF 599 598 static const struct of_device_id jc42_of_ids[] = { 600 599 { .compatible = "jedec,jc-42.4-temp", }, 601 600 { } 602 601 }; 603 602 MODULE_DEVICE_TABLE(of, jc42_of_ids); 604 - #endif 605 603 606 604 static struct i2c_driver jc42_driver = { 607 605 .class = I2C_CLASS_HWMON, 608 606 .driver = { 609 607 .name = "jc42", 610 608 .pm = JC42_DEV_PM_OPS, 611 - .of_match_table = of_match_ptr(jc42_of_ids), 609 + .of_match_table = jc42_of_ids, 612 610 }, 613 611 .probe = jc42_probe, 614 612 .remove = jc42_remove,
+1 -1
drivers/hwmon/max197.c
··· 332 332 .name = "max197", 333 333 }, 334 334 .probe = max197_probe, 335 - .remove_new = max197_remove, 335 + .remove = max197_remove, 336 336 .id_table = max197_device_ids, 337 337 }; 338 338 module_platform_driver(max197_driver);
+60 -23
drivers/hwmon/max6639.c
··· 19 19 #include <linux/hwmon-sysfs.h> 20 20 #include <linux/err.h> 21 21 #include <linux/mutex.h> 22 - #include <linux/platform_data/max6639.h> 23 22 #include <linux/regmap.h> 24 23 #include <linux/util_macros.h> 25 24 ··· 530 531 return 1; /* default: 4000 RPM */ 531 532 } 532 533 534 + static int max6639_probe_child_from_dt(struct i2c_client *client, 535 + struct device_node *child, 536 + struct max6639_data *data) 537 + 538 + { 539 + struct device *dev = &client->dev; 540 + u32 i; 541 + int err, val; 542 + 543 + err = of_property_read_u32(child, "reg", &i); 544 + if (err) { 545 + dev_err(dev, "missing reg property of %pOFn\n", child); 546 + return err; 547 + } 548 + 549 + if (i > 1) { 550 + dev_err(dev, "Invalid fan index reg %d\n", i); 551 + return -EINVAL; 552 + } 553 + 554 + err = of_property_read_u32(child, "pulses-per-revolution", &val); 555 + if (!err) { 556 + if (val < 1 || val > 5) { 557 + dev_err(dev, "invalid pulses-per-revolution %d of %pOFn\n", val, child); 558 + return -EINVAL; 559 + } 560 + data->ppr[i] = val; 561 + } 562 + 563 + err = of_property_read_u32(child, "max-rpm", &val); 564 + if (!err) 565 + data->rpm_range[i] = rpm_range_to_reg(val); 566 + 567 + return 0; 568 + } 569 + 533 570 static int max6639_init_client(struct i2c_client *client, 534 571 struct max6639_data *data) 535 572 { 536 - struct max6639_platform_data *max6639_info = 537 - dev_get_platdata(&client->dev); 538 - int i; 539 - int rpm_range = 1; /* default: 4000 RPM */ 540 - int err, ppr; 573 + struct device *dev = &client->dev; 574 + const struct device_node *np = dev->of_node; 575 + struct device_node *child; 576 + int i, err; 541 577 542 578 /* Reset chip to default values, see below for GCONFIG setup */ 543 579 err = regmap_write(data->regmap, MAX6639_REG_GCONFIG, MAX6639_GCONFIG_POR); ··· 580 546 return err; 581 547 582 548 /* Fans pulse per revolution is 2 by default */ 583 - if (max6639_info && max6639_info->ppr > 0 && 584 - max6639_info->ppr < 5) 585 - ppr = max6639_info->ppr; 586 - else 587 - ppr = 2; 549 + data->ppr[0] = 2; 550 + data->ppr[1] = 2; 588 551 589 - data->ppr[0] = ppr; 590 - data->ppr[1] = ppr; 552 + /* default: 4000 RPM */ 553 + data->rpm_range[0] = 1; 554 + data->rpm_range[1] = 1; 591 555 592 - if (max6639_info) 593 - rpm_range = rpm_range_to_reg(max6639_info->rpm_range); 594 - data->rpm_range[0] = rpm_range; 595 - data->rpm_range[1] = rpm_range; 556 + for_each_child_of_node(np, child) { 557 + if (strcmp(child->name, "fan")) 558 + continue; 559 + 560 + err = max6639_probe_child_from_dt(client, child, data); 561 + if (err) { 562 + of_node_put(child); 563 + return err; 564 + } 565 + } 596 566 597 567 for (i = 0; i < MAX6639_NUM_CHANNELS; i++) { 568 + err = regmap_set_bits(data->regmap, MAX6639_REG_OUTPUT_MASK, BIT(1 - i)); 569 + if (err) 570 + return err; 571 + 598 572 /* Set Fan pulse per revolution */ 599 573 err = max6639_set_ppr(data, i, data->ppr[i]); 600 574 if (err) ··· 615 573 return err; 616 574 617 575 /* Fans PWM polarity high by default */ 618 - if (max6639_info) { 619 - if (max6639_info->pwm_polarity == 0) 620 - err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG2a(i), 0x00); 621 - else 622 - err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG2a(i), 0x02); 623 - } 576 + err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG2a(i), 0x00); 624 577 if (err) 625 578 return err; 626 579
+1 -1
drivers/hwmon/mc13783-adc.c
··· 315 315 MODULE_DEVICE_TABLE(platform, mc13783_adc_idtable); 316 316 317 317 static struct platform_driver mc13783_adc_driver = { 318 - .remove_new = mc13783_adc_remove, 318 + .remove = mc13783_adc_remove, 319 319 .driver = { 320 320 .name = DRIVER_NAME, 321 321 },
+3 -4
drivers/hwmon/nct6775-core.c
··· 2878 2878 if (err < 0) 2879 2879 return err; 2880 2880 2881 - val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 2882 - data->target_temp_mask); 2881 + val = DIV_ROUND_CLOSEST(clamp_val(val, 0, data->target_temp_mask * 1000), 1000); 2883 2882 2884 2883 mutex_lock(&data->update_lock); 2885 2884 data->target_temp[nr] = val; ··· 2958 2959 return err; 2959 2960 2960 2961 /* Limit tolerance as needed */ 2961 - val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask); 2962 + val = DIV_ROUND_CLOSEST(clamp_val(val, 0, data->tolerance_mask * 1000), 1000); 2962 2963 2963 2964 mutex_lock(&data->update_lock); 2964 2965 data->temp_tolerance[index][nr] = val; ··· 3084 3085 if (err < 0) 3085 3086 return err; 3086 3087 3087 - val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255); 3088 + val = DIV_ROUND_CLOSEST(clamp_val(val, 0, 255000), 1000); 3088 3089 3089 3090 mutex_lock(&data->update_lock); 3090 3091 data->weight_temp[index][nr] = val;
+2
drivers/hwmon/nct6775-platform.c
··· 1350 1350 "Pro H610M-CT D4", 1351 1351 "Pro H610T D4", 1352 1352 "Pro Q670M-C", 1353 + "Pro WS 600M-CL", 1354 + "Pro WS 665-ACE", 1353 1355 "Pro WS W680-ACE", 1354 1356 "Pro WS W680-ACE IPMI", 1355 1357 "Pro WS W790-ACE",
+447
drivers/hwmon/nct7363.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (c) 2023 Nuvoton Technology corporation. 4 + */ 5 + 6 + #include <linux/bitfield.h> 7 + #include <linux/bits.h> 8 + #include <linux/err.h> 9 + #include <linux/hwmon.h> 10 + #include <linux/hwmon-sysfs.h> 11 + #include <linux/i2c.h> 12 + #include <linux/module.h> 13 + #include <linux/mutex.h> 14 + #include <linux/regmap.h> 15 + #include <linux/slab.h> 16 + 17 + #define NCT7363_REG_FUNC_CFG_BASE(x) (0x20 + (x)) 18 + #define NCT7363_REG_LSRS(x) (0x34 + ((x) / 8)) 19 + #define NCT7363_REG_PWMEN_BASE(x) (0x38 + (x)) 20 + #define NCT7363_REG_FANINEN_BASE(x) (0x41 + (x)) 21 + #define NCT7363_REG_FANINX_HVAL(x) (0x48 + ((x) * 2)) 22 + #define NCT7363_REG_FANINX_LVAL(x) (0x49 + ((x) * 2)) 23 + #define NCT7363_REG_FANINX_HL(x) (0x6C + ((x) * 2)) 24 + #define NCT7363_REG_FANINX_LL(x) (0x6D + ((x) * 2)) 25 + #define NCT7363_REG_FSCPXDUTY(x) (0x90 + ((x) * 2)) 26 + #define NCT7363_REG_FSCPXDIV(x) (0x91 + ((x) * 2)) 27 + 28 + #define PWM_SEL(x) (BIT(0) << ((x) * 2)) 29 + #define FANIN_SEL(_x) ({typeof(_x) (x) = (_x); \ 30 + BIT(1) << (((x) < 8) ? \ 31 + (((x) + 8) * 2) : \ 32 + (((x) % 8) * 2)); }) 33 + #define ALARM_SEL(x, y) ((x) & (BIT((y) % 8))) 34 + #define VALUE_TO_REG(x, y) (((x) >> ((y) * 8)) & 0xFF) 35 + 36 + #define NCT7363_FANINX_LVAL_MASK GENMASK(4, 0) 37 + #define NCT7363_FANIN_MASK GENMASK(12, 0) 38 + 39 + #define NCT7363_PWM_COUNT 16 40 + 41 + static inline unsigned int fan_from_reg(u16 val) 42 + { 43 + if (val == NCT7363_FANIN_MASK || val == 0) 44 + return 0; 45 + 46 + return (1350000UL / val); 47 + } 48 + 49 + static const struct of_device_id nct7363_of_match[] = { 50 + { .compatible = "nuvoton,nct7363", }, 51 + { .compatible = "nuvoton,nct7362", }, 52 + { } 53 + }; 54 + MODULE_DEVICE_TABLE(of, nct7363_of_match); 55 + 56 + struct nct7363_data { 57 + struct regmap *regmap; 58 + 59 + u16 fanin_mask; 60 + u16 pwm_mask; 61 + }; 62 + 63 + static int nct7363_read_fan(struct device *dev, u32 attr, int channel, 64 + long *val) 65 + { 66 + struct nct7363_data *data = dev_get_drvdata(dev); 67 + unsigned int reg; 68 + u8 regval[2]; 69 + int ret; 70 + u16 cnt; 71 + 72 + switch (attr) { 73 + case hwmon_fan_input: 74 + /* 75 + * High-byte register should be read first to latch 76 + * synchronous low-byte value 77 + */ 78 + ret = regmap_bulk_read(data->regmap, 79 + NCT7363_REG_FANINX_HVAL(channel), 80 + &regval, 2); 81 + if (ret) 82 + return ret; 83 + 84 + cnt = (regval[0] << 5) | (regval[1] & NCT7363_FANINX_LVAL_MASK); 85 + *val = fan_from_reg(cnt); 86 + return 0; 87 + case hwmon_fan_min: 88 + ret = regmap_bulk_read(data->regmap, 89 + NCT7363_REG_FANINX_HL(channel), 90 + &regval, 2); 91 + if (ret) 92 + return ret; 93 + 94 + cnt = (regval[0] << 5) | (regval[1] & NCT7363_FANINX_LVAL_MASK); 95 + *val = fan_from_reg(cnt); 96 + return 0; 97 + case hwmon_fan_alarm: 98 + ret = regmap_read(data->regmap, 99 + NCT7363_REG_LSRS(channel), &reg); 100 + if (ret) 101 + return ret; 102 + 103 + *val = (long)ALARM_SEL(reg, channel) > 0 ? 1 : 0; 104 + return 0; 105 + default: 106 + return -EOPNOTSUPP; 107 + } 108 + } 109 + 110 + static int nct7363_write_fan(struct device *dev, u32 attr, int channel, 111 + long val) 112 + { 113 + struct nct7363_data *data = dev_get_drvdata(dev); 114 + u8 regval[2]; 115 + int ret; 116 + 117 + if (val <= 0) 118 + return -EINVAL; 119 + 120 + switch (attr) { 121 + case hwmon_fan_min: 122 + val = clamp_val(DIV_ROUND_CLOSEST(1350000, val), 123 + 1, NCT7363_FANIN_MASK); 124 + regval[0] = val >> 5; 125 + regval[1] = val & NCT7363_FANINX_LVAL_MASK; 126 + 127 + ret = regmap_bulk_write(data->regmap, 128 + NCT7363_REG_FANINX_HL(channel), 129 + regval, 2); 130 + return ret; 131 + default: 132 + return -EOPNOTSUPP; 133 + } 134 + } 135 + 136 + static umode_t nct7363_fan_is_visible(const void *_data, u32 attr, int channel) 137 + { 138 + const struct nct7363_data *data = _data; 139 + 140 + switch (attr) { 141 + case hwmon_fan_input: 142 + case hwmon_fan_alarm: 143 + if (data->fanin_mask & BIT(channel)) 144 + return 0444; 145 + break; 146 + case hwmon_fan_min: 147 + if (data->fanin_mask & BIT(channel)) 148 + return 0644; 149 + break; 150 + default: 151 + break; 152 + } 153 + 154 + return 0; 155 + } 156 + 157 + static int nct7363_read_pwm(struct device *dev, u32 attr, int channel, 158 + long *val) 159 + { 160 + struct nct7363_data *data = dev_get_drvdata(dev); 161 + unsigned int regval; 162 + int ret; 163 + 164 + switch (attr) { 165 + case hwmon_pwm_input: 166 + ret = regmap_read(data->regmap, 167 + NCT7363_REG_FSCPXDUTY(channel), &regval); 168 + if (ret) 169 + return ret; 170 + 171 + *val = (long)regval; 172 + return 0; 173 + default: 174 + return -EOPNOTSUPP; 175 + } 176 + } 177 + 178 + static int nct7363_write_pwm(struct device *dev, u32 attr, int channel, 179 + long val) 180 + { 181 + struct nct7363_data *data = dev_get_drvdata(dev); 182 + int ret; 183 + 184 + switch (attr) { 185 + case hwmon_pwm_input: 186 + if (val < 0 || val > 255) 187 + return -EINVAL; 188 + 189 + ret = regmap_write(data->regmap, 190 + NCT7363_REG_FSCPXDUTY(channel), val); 191 + 192 + return ret; 193 + 194 + default: 195 + return -EOPNOTSUPP; 196 + } 197 + } 198 + 199 + static umode_t nct7363_pwm_is_visible(const void *_data, u32 attr, int channel) 200 + { 201 + const struct nct7363_data *data = _data; 202 + 203 + switch (attr) { 204 + case hwmon_pwm_input: 205 + if (data->pwm_mask & BIT(channel)) 206 + return 0644; 207 + break; 208 + default: 209 + break; 210 + } 211 + 212 + return 0; 213 + } 214 + 215 + static int nct7363_read(struct device *dev, enum hwmon_sensor_types type, 216 + u32 attr, int channel, long *val) 217 + { 218 + switch (type) { 219 + case hwmon_fan: 220 + return nct7363_read_fan(dev, attr, channel, val); 221 + case hwmon_pwm: 222 + return nct7363_read_pwm(dev, attr, channel, val); 223 + default: 224 + return -EOPNOTSUPP; 225 + } 226 + } 227 + 228 + static int nct7363_write(struct device *dev, enum hwmon_sensor_types type, 229 + u32 attr, int channel, long val) 230 + { 231 + switch (type) { 232 + case hwmon_fan: 233 + return nct7363_write_fan(dev, attr, channel, val); 234 + case hwmon_pwm: 235 + return nct7363_write_pwm(dev, attr, channel, val); 236 + default: 237 + return -EOPNOTSUPP; 238 + } 239 + } 240 + 241 + static umode_t nct7363_is_visible(const void *data, 242 + enum hwmon_sensor_types type, 243 + u32 attr, int channel) 244 + { 245 + switch (type) { 246 + case hwmon_fan: 247 + return nct7363_fan_is_visible(data, attr, channel); 248 + case hwmon_pwm: 249 + return nct7363_pwm_is_visible(data, attr, channel); 250 + default: 251 + return 0; 252 + } 253 + } 254 + 255 + static const struct hwmon_channel_info *nct7363_info[] = { 256 + HWMON_CHANNEL_INFO(fan, 257 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 258 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 259 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 260 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 261 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 262 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 263 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 264 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 265 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 266 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 267 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 268 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 269 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 270 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 271 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM, 272 + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM), 273 + HWMON_CHANNEL_INFO(pwm, 274 + HWMON_PWM_INPUT, 275 + HWMON_PWM_INPUT, 276 + HWMON_PWM_INPUT, 277 + HWMON_PWM_INPUT, 278 + HWMON_PWM_INPUT, 279 + HWMON_PWM_INPUT, 280 + HWMON_PWM_INPUT, 281 + HWMON_PWM_INPUT, 282 + HWMON_PWM_INPUT, 283 + HWMON_PWM_INPUT, 284 + HWMON_PWM_INPUT, 285 + HWMON_PWM_INPUT, 286 + HWMON_PWM_INPUT, 287 + HWMON_PWM_INPUT, 288 + HWMON_PWM_INPUT, 289 + HWMON_PWM_INPUT), 290 + NULL 291 + }; 292 + 293 + static const struct hwmon_ops nct7363_hwmon_ops = { 294 + .is_visible = nct7363_is_visible, 295 + .read = nct7363_read, 296 + .write = nct7363_write, 297 + }; 298 + 299 + static const struct hwmon_chip_info nct7363_chip_info = { 300 + .ops = &nct7363_hwmon_ops, 301 + .info = nct7363_info, 302 + }; 303 + 304 + static int nct7363_init_chip(struct nct7363_data *data) 305 + { 306 + u32 func_config = 0; 307 + int i, ret; 308 + 309 + /* Pin Function Configuration */ 310 + for (i = 0; i < NCT7363_PWM_COUNT; i++) { 311 + if (data->pwm_mask & BIT(i)) 312 + func_config |= PWM_SEL(i); 313 + if (data->fanin_mask & BIT(i)) 314 + func_config |= FANIN_SEL(i); 315 + } 316 + 317 + for (i = 0; i < 4; i++) { 318 + ret = regmap_write(data->regmap, NCT7363_REG_FUNC_CFG_BASE(i), 319 + VALUE_TO_REG(func_config, i)); 320 + if (ret < 0) 321 + return ret; 322 + } 323 + 324 + /* PWM and FANIN Monitoring Enable */ 325 + for (i = 0; i < 2; i++) { 326 + ret = regmap_write(data->regmap, NCT7363_REG_PWMEN_BASE(i), 327 + VALUE_TO_REG(data->pwm_mask, i)); 328 + if (ret < 0) 329 + return ret; 330 + 331 + ret = regmap_write(data->regmap, NCT7363_REG_FANINEN_BASE(i), 332 + VALUE_TO_REG(data->fanin_mask, i)); 333 + if (ret < 0) 334 + return ret; 335 + } 336 + 337 + return 0; 338 + } 339 + 340 + static int nct7363_present_pwm_fanin(struct device *dev, 341 + struct device_node *child, 342 + struct nct7363_data *data) 343 + { 344 + u8 fanin_ch[NCT7363_PWM_COUNT]; 345 + struct of_phandle_args args; 346 + int ret, fanin_cnt; 347 + u8 ch, index; 348 + 349 + ret = of_parse_phandle_with_args(child, "pwms", "#pwm-cells", 350 + 0, &args); 351 + if (ret) 352 + return ret; 353 + 354 + if (args.args[0] >= NCT7363_PWM_COUNT) 355 + return -EINVAL; 356 + data->pwm_mask |= BIT(args.args[0]); 357 + 358 + fanin_cnt = of_property_count_u8_elems(child, "tach-ch"); 359 + if (fanin_cnt < 1 || fanin_cnt > NCT7363_PWM_COUNT) 360 + return -EINVAL; 361 + 362 + ret = of_property_read_u8_array(child, "tach-ch", fanin_ch, fanin_cnt); 363 + if (ret) 364 + return ret; 365 + 366 + for (ch = 0; ch < fanin_cnt; ch++) { 367 + index = fanin_ch[ch]; 368 + if (index >= NCT7363_PWM_COUNT) 369 + return -EINVAL; 370 + data->fanin_mask |= BIT(index); 371 + } 372 + 373 + return 0; 374 + } 375 + 376 + static bool nct7363_regmap_is_volatile(struct device *dev, unsigned int reg) 377 + { 378 + switch (reg) { 379 + case NCT7363_REG_LSRS(0) ... NCT7363_REG_LSRS(15): 380 + case NCT7363_REG_FANINX_HVAL(0) ... NCT7363_REG_FANINX_LVAL(15): 381 + case NCT7363_REG_FANINX_HL(0) ... NCT7363_REG_FANINX_LL(15): 382 + case NCT7363_REG_FSCPXDUTY(0) ... NCT7363_REG_FSCPXDIV(15): 383 + return true; 384 + default: 385 + return false; 386 + } 387 + } 388 + 389 + static const struct regmap_config nct7363_regmap_config = { 390 + .reg_bits = 8, 391 + .val_bits = 8, 392 + .use_single_read = true, 393 + .use_single_write = true, 394 + .cache_type = REGCACHE_RBTREE, 395 + .volatile_reg = nct7363_regmap_is_volatile, 396 + }; 397 + 398 + static int nct7363_probe(struct i2c_client *client) 399 + { 400 + struct device *dev = &client->dev; 401 + struct device_node *child; 402 + struct nct7363_data *data; 403 + struct device *hwmon_dev; 404 + int ret; 405 + 406 + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); 407 + if (!data) 408 + return -ENOMEM; 409 + 410 + data->regmap = devm_regmap_init_i2c(client, &nct7363_regmap_config); 411 + if (IS_ERR(data->regmap)) 412 + return PTR_ERR(data->regmap); 413 + 414 + for_each_child_of_node(dev->of_node, child) { 415 + ret = nct7363_present_pwm_fanin(dev, child, data); 416 + if (ret) { 417 + of_node_put(child); 418 + return ret; 419 + } 420 + } 421 + 422 + /* Initialize the chip */ 423 + ret = nct7363_init_chip(data); 424 + if (ret) 425 + return ret; 426 + 427 + hwmon_dev = 428 + devm_hwmon_device_register_with_info(dev, client->name, data, 429 + &nct7363_chip_info, NULL); 430 + return PTR_ERR_OR_ZERO(hwmon_dev); 431 + } 432 + 433 + static struct i2c_driver nct7363_driver = { 434 + .class = I2C_CLASS_HWMON, 435 + .driver = { 436 + .name = "nct7363", 437 + .of_match_table = nct7363_of_match, 438 + }, 439 + .probe = nct7363_probe, 440 + }; 441 + 442 + module_i2c_driver(nct7363_driver); 443 + 444 + MODULE_AUTHOR("CW Ho <cwho@nuvoton.com>"); 445 + MODULE_AUTHOR("Ban Feng <kcfeng0@nuvoton.com>"); 446 + MODULE_DESCRIPTION("NCT7363 Hardware Monitoring Driver"); 447 + MODULE_LICENSE("GPL");
+1 -8
drivers/hwmon/nzxt-kraken2.c
··· 35 35 unsigned long updated; /* jiffies */ 36 36 }; 37 37 38 - static umode_t kraken2_is_visible(const void *data, 39 - enum hwmon_sensor_types type, 40 - u32 attr, int channel) 41 - { 42 - return 0444; 43 - } 44 - 45 38 static int kraken2_read(struct device *dev, enum hwmon_sensor_types type, 46 39 u32 attr, int channel, long *val) 47 40 { ··· 74 81 } 75 82 76 83 static const struct hwmon_ops kraken2_hwmon_ops = { 77 - .is_visible = kraken2_is_visible, 84 + .visible = 0444, 78 85 .read = kraken2_read, 79 86 .read_string = kraken2_read_string, 80 87 };
+2 -2
drivers/hwmon/occ/p9_sbe.c
··· 192 192 .name = "occ-hwmon", 193 193 .of_match_table = p9_sbe_occ_of_match, 194 194 }, 195 - .probe = p9_sbe_occ_probe, 196 - .remove_new = p9_sbe_occ_remove, 195 + .probe = p9_sbe_occ_probe, 196 + .remove = p9_sbe_occ_remove, 197 197 }; 198 198 199 199 module_platform_driver(p9_sbe_occ_driver);
+1 -1
drivers/hwmon/pc87360.c
··· 1606 1606 .name = DRIVER_NAME, 1607 1607 }, 1608 1608 .probe = pc87360_probe, 1609 - .remove_new = pc87360_remove, 1609 + .remove = pc87360_remove, 1610 1610 }; 1611 1611 1612 1612 /*
+1 -1
drivers/hwmon/pc87427.c
··· 1129 1129 .name = DRVNAME, 1130 1130 }, 1131 1131 .probe = pc87427_probe, 1132 - .remove_new = pc87427_remove, 1132 + .remove = pc87427_remove, 1133 1133 }; 1134 1134 1135 1135 static int __init pc87427_device_add(const struct pc87427_sio_data *sio_data)
+3 -3
drivers/hwmon/pmbus/Kconfig
··· 224 224 depends on SENSORS_LTC2978 && REGULATOR 225 225 help 226 226 If you say yes here you get regulator support for Linear Technology 227 - LTC3880, LTC3883, LTC3884, LTC3886, LTC3887, LTC3889, LTC7880, 228 - LTM4644, LTM4675, LTM4676, LTM4677, LTM4678, LTM4680, LTM4686, 229 - and LTM4700. 227 + LTC3880, LTC3883, LTC3884, LTC3886, LTC3887, LTC3889, LTC7841, 228 + LTC7880, LTM4644, LTM4675, LTM4676, LTM4677, LTM4678, LTM4680, 229 + LTM4686, and LTM4700. 230 230 231 231 config SENSORS_LTC3815 232 232 tristate "Linear Technologies LTC3815"
+205 -5
drivers/hwmon/pmbus/isl68137.c
··· 13 13 #include <linux/init.h> 14 14 #include <linux/kernel.h> 15 15 #include <linux/module.h> 16 + #include <linux/of.h> 16 17 #include <linux/string.h> 17 18 #include <linux/sysfs.h> 18 19 ··· 21 20 22 21 #define ISL68137_VOUT_AVS 0x30 23 22 #define RAA_DMPVR2_READ_VMON 0xc8 23 + #define MAX_CHANNELS 4 24 24 25 25 enum chips { 26 26 isl68137, ··· 73 71 raa_dmpvr2_3rail, 74 72 raa_dmpvr2_hv, 75 73 }; 74 + 75 + struct isl68137_channel { 76 + u32 vout_voltage_divider[2]; 77 + }; 78 + 79 + struct isl68137_data { 80 + struct pmbus_driver_info info; 81 + struct isl68137_channel channel[MAX_CHANNELS]; 82 + }; 83 + 84 + #define to_isl68137_data(x) container_of(x, struct isl68137_data, info) 76 85 77 86 static const struct i2c_device_id raa_dmpvr_id[]; 78 87 ··· 176 163 static int raa_dmpvr2_read_word_data(struct i2c_client *client, int page, 177 164 int phase, int reg) 178 165 { 166 + const struct pmbus_driver_info *info = pmbus_get_driver_info(client); 167 + const struct isl68137_data *data = to_isl68137_data(info); 179 168 int ret; 169 + u64 temp; 180 170 181 171 switch (reg) { 182 172 case PMBUS_VIRT_READ_VMON: 183 173 ret = pmbus_read_word_data(client, page, phase, 184 174 RAA_DMPVR2_READ_VMON); 185 175 break; 176 + case PMBUS_READ_POUT: 177 + case PMBUS_READ_VOUT: 178 + /* 179 + * In cases where a voltage divider is attached to the target 180 + * rail between Vout and the Vsense pin, both Vout and Pout 181 + * should be scaled by the voltage divider scaling factor. 182 + * I.e. Vout = Vsense * Rtotal / Rout 183 + */ 184 + ret = pmbus_read_word_data(client, page, phase, reg); 185 + if (ret > 0) { 186 + temp = DIV_U64_ROUND_CLOSEST((u64)ret * 187 + data->channel[page].vout_voltage_divider[1], 188 + data->channel[page].vout_voltage_divider[0]); 189 + ret = clamp_val(temp, 0, 0xffff); 190 + } 191 + break; 186 192 default: 187 193 ret = -ENODATA; 188 194 break; 189 195 } 190 196 197 + return ret; 198 + } 199 + 200 + static int raa_dmpvr2_write_word_data(struct i2c_client *client, int page, 201 + int reg, u16 word) 202 + { 203 + const struct pmbus_driver_info *info = pmbus_get_driver_info(client); 204 + const struct isl68137_data *data = to_isl68137_data(info); 205 + int ret; 206 + u64 temp; 207 + 208 + switch (reg) { 209 + case PMBUS_VOUT_MAX: 210 + case PMBUS_VOUT_MARGIN_HIGH: 211 + case PMBUS_VOUT_MARGIN_LOW: 212 + case PMBUS_VOUT_OV_FAULT_LIMIT: 213 + case PMBUS_VOUT_UV_FAULT_LIMIT: 214 + case PMBUS_VOUT_COMMAND: 215 + /* 216 + * In cases where a voltage divider is attached to the target 217 + * rail between Vout and the Vsense pin, Vout related PMBus 218 + * commands should be scaled based on the expected voltage 219 + * at the Vsense pin. 220 + * I.e. Vsense = Vout * Rout / Rtotal 221 + */ 222 + temp = DIV_U64_ROUND_CLOSEST((u64)word * 223 + data->channel[page].vout_voltage_divider[0], 224 + data->channel[page].vout_voltage_divider[1]); 225 + ret = clamp_val(temp, 0, 0xffff); 226 + break; 227 + default: 228 + ret = -ENODATA; 229 + break; 230 + } 191 231 return ret; 192 232 } 193 233 ··· 286 220 | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT, 287 221 }; 288 222 223 + static int isl68137_probe_child_from_dt(struct device *dev, 224 + struct device_node *child, 225 + struct isl68137_data *data) 226 + { 227 + u32 channel, rout, rtotal; 228 + int err; 229 + 230 + err = of_property_read_u32(child, "reg", &channel); 231 + if (err) { 232 + dev_err(dev, "missing reg property of %pOFn\n", child); 233 + return err; 234 + } 235 + if (channel >= data->info.pages) { 236 + dev_err(dev, "invalid reg %d of %pOFn\n", channel, child); 237 + return -EINVAL; 238 + } 239 + 240 + err = of_property_read_u32_array(child, "vout-voltage-divider", 241 + data->channel[channel].vout_voltage_divider, 242 + ARRAY_SIZE(data->channel[channel].vout_voltage_divider)); 243 + if (err && err != -EINVAL) { 244 + dev_err(dev, 245 + "malformed vout-voltage-divider value for channel %d\n", 246 + channel); 247 + return err; 248 + } 249 + 250 + rout = data->channel[channel].vout_voltage_divider[0]; 251 + rtotal = data->channel[channel].vout_voltage_divider[1]; 252 + if (rout == 0) { 253 + dev_err(dev, 254 + "Voltage divider output resistance must be greater than 0\n"); 255 + return -EINVAL; 256 + } 257 + if (rtotal < rout) { 258 + dev_err(dev, 259 + "Voltage divider total resistance is less than output resistance\n"); 260 + return -EINVAL; 261 + } 262 + 263 + return 0; 264 + } 265 + 266 + static int isl68137_probe_from_dt(struct device *dev, 267 + struct isl68137_data *data) 268 + { 269 + const struct device_node *np = dev->of_node; 270 + struct device_node *child; 271 + int err; 272 + 273 + for_each_child_of_node(np, child) { 274 + if (strcmp(child->name, "channel")) 275 + continue; 276 + 277 + err = isl68137_probe_child_from_dt(dev, child, data); 278 + if (err) 279 + return err; 280 + } 281 + 282 + return 0; 283 + } 284 + 289 285 static int isl68137_probe(struct i2c_client *client) 290 286 { 287 + struct device *dev = &client->dev; 291 288 struct pmbus_driver_info *info; 289 + struct isl68137_data *data; 290 + int i, err; 292 291 293 - info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL); 294 - if (!info) 292 + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); 293 + if (!data) 295 294 return -ENOMEM; 296 - memcpy(info, &raa_dmpvr_info, sizeof(*info)); 295 + 296 + /* 297 + * Initialize all voltage dividers to Rout=1 and Rtotal=1 to simplify 298 + * logic in PMBus word read/write functions 299 + */ 300 + for (i = 0; i < MAX_CHANNELS; i++) 301 + memset(data->channel[i].vout_voltage_divider, 302 + 1, 303 + sizeof(data->channel[i].vout_voltage_divider)); 304 + 305 + memcpy(&data->info, &raa_dmpvr_info, sizeof(data->info)); 306 + info = &data->info; 297 307 298 308 switch (i2c_match_id(raa_dmpvr_id, client)->driver_data) { 299 309 case raa_dmpvr1_2rail: ··· 379 237 info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT 380 238 | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT 381 239 | PMBUS_HAVE_POUT; 240 + info->read_word_data = raa_dmpvr2_read_word_data; 241 + info->write_word_data = raa_dmpvr2_write_word_data; 382 242 info->groups = isl68137_attribute_groups; 383 243 break; 384 244 case raa_dmpvr2_1rail: 385 245 info->pages = 1; 386 246 info->read_word_data = raa_dmpvr2_read_word_data; 247 + info->write_word_data = raa_dmpvr2_write_word_data; 387 248 break; 388 249 case raa_dmpvr2_2rail_nontc: 389 250 info->func[0] &= ~PMBUS_HAVE_TEMP3; ··· 395 250 case raa_dmpvr2_2rail: 396 251 info->pages = 2; 397 252 info->read_word_data = raa_dmpvr2_read_word_data; 253 + info->write_word_data = raa_dmpvr2_write_word_data; 398 254 break; 399 255 case raa_dmpvr2_3rail: 400 256 info->read_word_data = raa_dmpvr2_read_word_data; 257 + info->write_word_data = raa_dmpvr2_write_word_data; 401 258 break; 402 259 case raa_dmpvr2_hv: 403 260 info->pages = 1; ··· 410 263 info->m[PSC_POWER] = 2; 411 264 info->R[PSC_POWER] = -1; 412 265 info->read_word_data = raa_dmpvr2_read_word_data; 266 + info->write_word_data = raa_dmpvr2_write_word_data; 413 267 break; 414 268 default: 415 269 return -ENODEV; 416 270 } 271 + 272 + err = isl68137_probe_from_dt(dev, data); 273 + if (err) 274 + return err; 417 275 418 276 return pmbus_do_probe(client, info); 419 277 } ··· 470 318 471 319 MODULE_DEVICE_TABLE(i2c, raa_dmpvr_id); 472 320 321 + static const struct of_device_id isl68137_of_match[] = { 322 + { .compatible = "isil,isl68137", .data = (void *)raa_dmpvr1_2rail }, 323 + { .compatible = "renesas,isl68220", .data = (void *)raa_dmpvr2_2rail }, 324 + { .compatible = "renesas,isl68221", .data = (void *)raa_dmpvr2_3rail }, 325 + { .compatible = "renesas,isl68222", .data = (void *)raa_dmpvr2_2rail }, 326 + { .compatible = "renesas,isl68223", .data = (void *)raa_dmpvr2_2rail }, 327 + { .compatible = "renesas,isl68224", .data = (void *)raa_dmpvr2_3rail }, 328 + { .compatible = "renesas,isl68225", .data = (void *)raa_dmpvr2_2rail }, 329 + { .compatible = "renesas,isl68226", .data = (void *)raa_dmpvr2_3rail }, 330 + { .compatible = "renesas,isl68227", .data = (void *)raa_dmpvr2_1rail }, 331 + { .compatible = "renesas,isl68229", .data = (void *)raa_dmpvr2_3rail }, 332 + { .compatible = "renesas,isl68233", .data = (void *)raa_dmpvr2_2rail }, 333 + { .compatible = "renesas,isl68239", .data = (void *)raa_dmpvr2_3rail }, 334 + 335 + { .compatible = "renesas,isl69222", .data = (void *)raa_dmpvr2_2rail }, 336 + { .compatible = "renesas,isl69223", .data = (void *)raa_dmpvr2_3rail }, 337 + { .compatible = "renesas,isl69224", .data = (void *)raa_dmpvr2_2rail }, 338 + { .compatible = "renesas,isl69225", .data = (void *)raa_dmpvr2_2rail }, 339 + { .compatible = "renesas,isl69227", .data = (void *)raa_dmpvr2_3rail }, 340 + { .compatible = "renesas,isl69228", .data = (void *)raa_dmpvr2_3rail }, 341 + { .compatible = "renesas,isl69234", .data = (void *)raa_dmpvr2_2rail }, 342 + { .compatible = "renesas,isl69236", .data = (void *)raa_dmpvr2_2rail }, 343 + { .compatible = "renesas,isl69239", .data = (void *)raa_dmpvr2_3rail }, 344 + { .compatible = "renesas,isl69242", .data = (void *)raa_dmpvr2_2rail }, 345 + { .compatible = "renesas,isl69243", .data = (void *)raa_dmpvr2_1rail }, 346 + { .compatible = "renesas,isl69247", .data = (void *)raa_dmpvr2_2rail }, 347 + { .compatible = "renesas,isl69248", .data = (void *)raa_dmpvr2_2rail }, 348 + { .compatible = "renesas,isl69254", .data = (void *)raa_dmpvr2_2rail }, 349 + { .compatible = "renesas,isl69255", .data = (void *)raa_dmpvr2_2rail }, 350 + { .compatible = "renesas,isl69256", .data = (void *)raa_dmpvr2_2rail }, 351 + { .compatible = "renesas,isl69259", .data = (void *)raa_dmpvr2_2rail }, 352 + { .compatible = "isil,isl69260", .data = (void *)raa_dmpvr2_2rail }, 353 + { .compatible = "renesas,isl69268", .data = (void *)raa_dmpvr2_2rail }, 354 + { .compatible = "isil,isl69269", .data = (void *)raa_dmpvr2_3rail }, 355 + { .compatible = "renesas,isl69298", .data = (void *)raa_dmpvr2_2rail }, 356 + 357 + { .compatible = "renesas,raa228000", .data = (void *)raa_dmpvr2_hv }, 358 + { .compatible = "renesas,raa228004", .data = (void *)raa_dmpvr2_hv }, 359 + { .compatible = "renesas,raa228006", .data = (void *)raa_dmpvr2_hv }, 360 + { .compatible = "renesas,raa228228", .data = (void *)raa_dmpvr2_2rail_nontc }, 361 + { .compatible = "renesas,raa229001", .data = (void *)raa_dmpvr2_2rail }, 362 + { .compatible = "renesas,raa229004", .data = (void *)raa_dmpvr2_2rail }, 363 + { }, 364 + }; 365 + 366 + MODULE_DEVICE_TABLE(of, isl68137_of_match); 367 + 473 368 /* This is the driver that will be inserted */ 474 369 static struct i2c_driver isl68137_driver = { 475 370 .driver = { 476 - .name = "isl68137", 477 - }, 371 + .name = "isl68137", 372 + .of_match_table = isl68137_of_match, 373 + }, 478 374 .probe = isl68137_probe, 479 375 .id_table = raa_dmpvr_id, 480 376 };
+18 -2
drivers/hwmon/pmbus/ltc2978.c
··· 23 23 /* Managers */ 24 24 ltc2972, ltc2974, ltc2975, ltc2977, ltc2978, ltc2979, ltc2980, 25 25 /* Controllers */ 26 - ltc3880, ltc3882, ltc3883, ltc3884, ltc3886, ltc3887, ltc3889, ltc7132, ltc7880, 26 + ltc3880, ltc3882, ltc3883, ltc3884, ltc3886, ltc3887, ltc3889, ltc7132, 27 + ltc7841, ltc7880, 27 28 /* Modules */ 28 29 ltm2987, ltm4664, ltm4675, ltm4676, ltm4677, ltm4678, ltm4680, ltm4686, 29 30 ltm4700, ··· 51 50 #define LTC3880_MFR_CLEAR_PEAKS 0xe3 52 51 #define LTC3880_MFR_TEMPERATURE2_PEAK 0xf4 53 52 54 - /* LTC3883, LTC3884, LTC3886, LTC3889, LTC7132, LTC7880 */ 53 + /* LTC3883, LTC3884, LTC3886, LTC3889, LTC7132, LTC7841 and LTC7880 only */ 55 54 #define LTC3883_MFR_IIN_PEAK 0xe1 56 55 57 56 /* LTC2975 only */ ··· 81 80 #define LTC3887_ID 0x4700 82 81 #define LTC3889_ID 0x4900 83 82 #define LTC7132_ID 0x4CE0 83 + #define LTC7841_ID 0x40D0 84 84 #define LTC7880_ID 0x49E0 85 85 #define LTM2987_ID_A 0x8010 /* A/B for two die IDs */ 86 86 #define LTM2987_ID_B 0x8020 ··· 550 548 {"ltc3887", ltc3887}, 551 549 {"ltc3889", ltc3889}, 552 550 {"ltc7132", ltc7132}, 551 + {"ltc7841", ltc7841}, 553 552 {"ltc7880", ltc7880}, 554 553 {"ltm2987", ltm2987}, 555 554 {"ltm4664", ltm4664}, ··· 657 654 return ltc3889; 658 655 else if (chip_id == LTC7132_ID) 659 656 return ltc7132; 657 + else if (chip_id == LTC7841_ID) 658 + return ltc7841; 660 659 else if (chip_id == LTC7880_ID) 661 660 return ltc7880; 662 661 else if (chip_id == LTM2987_ID_A || chip_id == LTM2987_ID_B) ··· 859 854 | PMBUS_HAVE_POUT 860 855 | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP; 861 856 break; 857 + case ltc7841: 858 + data->features |= FEAT_CLEAR_PEAKS; 859 + info->read_word_data = ltc3883_read_word_data; 860 + info->pages = LTC3883_NUM_PAGES; 861 + info->func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN 862 + | PMBUS_HAVE_STATUS_INPUT 863 + | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT 864 + | PMBUS_HAVE_IOUT 865 + | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP; 866 + break; 862 867 default: 863 868 return -ENODEV; 864 869 } ··· 922 907 { .compatible = "lltc,ltc3887" }, 923 908 { .compatible = "lltc,ltc3889" }, 924 909 { .compatible = "lltc,ltc7132" }, 910 + { .compatible = "lltc,ltc7841" }, 925 911 { .compatible = "lltc,ltc7880" }, 926 912 { .compatible = "lltc,ltm2987" }, 927 913 { .compatible = "lltc,ltm4664" },
+2 -2
drivers/hwmon/pmbus/mp2891.c
··· 572 572 } 573 573 574 574 static const struct i2c_device_id mp2891_id[] = { 575 - {"mp2891", 0}, 576 - {} 575 + { "mp2891" }, 576 + { } 577 577 }; 578 578 MODULE_DEVICE_TABLE(i2c, mp2891_id); 579 579
+2 -2
drivers/hwmon/pmbus/mp2993.c
··· 233 233 } 234 234 235 235 static const struct i2c_device_id mp2993_id[] = { 236 - {"mp2993", 0}, 237 - {} 236 + { "mp2993" }, 237 + { } 238 238 }; 239 239 MODULE_DEVICE_TABLE(i2c, mp2993_id); 240 240
+2 -2
drivers/hwmon/pmbus/mp9941.c
··· 291 291 } 292 292 293 293 static const struct i2c_device_id mp9941_id[] = { 294 - {"mp9941", 0}, 295 - {} 294 + { "mp9941" }, 295 + { } 296 296 }; 297 297 MODULE_DEVICE_TABLE(i2c, mp9941_id); 298 298
+1 -1
drivers/hwmon/pmbus/mpq8785.c
··· 22 22 break; 23 23 case 1: 24 24 case 2: 25 - info->format[PSC_VOLTAGE_OUT] = direct, 25 + info->format[PSC_VOLTAGE_OUT] = direct; 26 26 info->m[PSC_VOLTAGE_OUT] = 64; 27 27 info->b[PSC_VOLTAGE_OUT] = 0; 28 28 info->R[PSC_VOLTAGE_OUT] = 1;
+12 -4
drivers/hwmon/pmbus/pmbus_core.c
··· 2719 2719 * limit registers need to be disabled. 2720 2720 */ 2721 2721 if (!(data->flags & PMBUS_NO_WRITE_PROTECT)) { 2722 - pmbus_wait(client); 2723 - ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT); 2724 - pmbus_update_ts(client, false); 2722 + ret = _pmbus_read_byte_data(client, -1, PMBUS_WRITE_PROTECT); 2725 2723 2726 2724 if (ret > 0 && (ret & PB_WP_ANY)) 2727 2725 data->flags |= PMBUS_WRITE_PROTECTED | PMBUS_SKIP_STATUS_CHECK; ··· 3277 3279 3278 3280 static int pmbus_write_smbalert_mask(struct i2c_client *client, u8 page, u8 reg, u8 val) 3279 3281 { 3280 - return _pmbus_write_word_data(client, page, PMBUS_SMBALERT_MASK, reg | (val << 8)); 3282 + int ret; 3283 + 3284 + ret = _pmbus_write_word_data(client, page, PMBUS_SMBALERT_MASK, reg | (val << 8)); 3285 + 3286 + /* 3287 + * Clear fault systematically in case writing PMBUS_SMBALERT_MASK 3288 + * is not supported by the chip. 3289 + */ 3290 + pmbus_clear_fault_page(client, page); 3291 + 3292 + return ret; 3281 3293 } 3282 3294 3283 3295 static irqreturn_t pmbus_fault_handler(int irq, void *pdata)
+1 -7
drivers/hwmon/powerz.c
··· 54 54 NULL 55 55 }; 56 56 57 - static umode_t powerz_is_visible(const void *data, enum hwmon_sensor_types type, 58 - u32 attr, int channel) 59 - { 60 - return 0444; 61 - } 62 - 63 57 static int powerz_read_string(struct device *dev, enum hwmon_sensor_types type, 64 58 u32 attr, int channel, const char **str) 65 59 { ··· 195 201 } 196 202 197 203 static const struct hwmon_ops powerz_hwmon_ops = { 198 - .is_visible = powerz_is_visible, 204 + .visible = 0444, 199 205 .read = powerz_read, 200 206 .read_string = powerz_read_string, 201 207 };
+32 -1
drivers/hwmon/pwm-fan.c
··· 7 7 * Author: Kamil Debski <k.debski@samsung.com> 8 8 */ 9 9 10 + #include <linux/delay.h> 10 11 #include <linux/hwmon.h> 11 12 #include <linux/interrupt.h> 12 13 #include <linux/mod_devicetable.h> ··· 61 60 62 61 struct hwmon_chip_info info; 63 62 struct hwmon_channel_info fan_channel; 63 + 64 + u64 pwm_duty_cycle_from_stopped; 65 + u32 pwm_usec_from_stopped; 64 66 }; 65 67 66 68 /* This handler assumes self resetting edge triggered interrupt. */ ··· 203 199 static int __set_pwm(struct pwm_fan_ctx *ctx, unsigned long pwm) 204 200 { 205 201 struct pwm_state *state = &ctx->pwm_state; 202 + unsigned long final_pwm = pwm; 206 203 unsigned long period; 204 + bool update = false; 207 205 int ret = 0; 208 206 209 207 if (pwm > 0) { ··· 214 208 return 0; 215 209 216 210 period = state->period; 217 - state->duty_cycle = DIV_ROUND_UP(pwm * (period - 1), MAX_PWM); 211 + update = state->duty_cycle < ctx->pwm_duty_cycle_from_stopped; 212 + if (update) 213 + state->duty_cycle = ctx->pwm_duty_cycle_from_stopped; 214 + else 215 + state->duty_cycle = DIV_ROUND_UP(pwm * (period - 1), MAX_PWM); 218 216 ret = pwm_apply_might_sleep(ctx->pwm, state); 219 217 if (ret) 220 218 return ret; 221 219 ret = pwm_fan_power_on(ctx); 220 + if (!ret && update) { 221 + pwm = final_pwm; 222 + state->duty_cycle = DIV_ROUND_UP(pwm * (period - 1), MAX_PWM); 223 + usleep_range(ctx->pwm_usec_from_stopped, 224 + ctx->pwm_usec_from_stopped * 2); 225 + ret = pwm_apply_might_sleep(ctx->pwm, state); 226 + } 222 227 } else { 223 228 ret = pwm_fan_power_off(ctx, false); 224 229 } ··· 497 480 struct device *hwmon; 498 481 int ret; 499 482 const struct hwmon_channel_info **channels; 483 + u32 pwm_min_from_stopped = 0; 500 484 u32 *fan_channel_config; 501 485 int channel_count = 1; /* We always have a PWM channel. */ 502 486 int i; ··· 637 619 638 620 channels[1] = &ctx->fan_channel; 639 621 } 622 + 623 + ret = of_property_read_u32(dev->of_node, "fan-stop-to-start-percent", 624 + &pwm_min_from_stopped); 625 + if (!ret && pwm_min_from_stopped) { 626 + ctx->pwm_duty_cycle_from_stopped = 627 + DIV_ROUND_UP_ULL(pwm_min_from_stopped * 628 + (ctx->pwm_state.period - 1), 629 + 100); 630 + } 631 + ret = of_property_read_u32(dev->of_node, "fan-stop-to-start-us", 632 + &ctx->pwm_usec_from_stopped); 633 + if (ret) 634 + ctx->pwm_usec_from_stopped = 250000; 640 635 641 636 ctx->info.ops = &pwm_fan_hwmon_ops; 642 637 ctx->info.info = channels;
+1 -7
drivers/hwmon/raspberrypi-hwmon.c
··· 81 81 return 0; 82 82 } 83 83 84 - static umode_t rpi_is_visible(const void *_data, enum hwmon_sensor_types type, 85 - u32 attr, int channel) 86 - { 87 - return 0444; 88 - } 89 - 90 84 static const struct hwmon_channel_info * const rpi_info[] = { 91 85 HWMON_CHANNEL_INFO(in, 92 86 HWMON_I_LCRIT_ALARM), ··· 88 94 }; 89 95 90 96 static const struct hwmon_ops rpi_hwmon_ops = { 91 - .is_visible = rpi_is_visible, 97 + .visible = 0444, 92 98 .read = rpi_read, 93 99 }; 94 100
+1 -1
drivers/hwmon/sch5636.c
··· 512 512 .name = DRVNAME, 513 513 }, 514 514 .probe = sch5636_probe, 515 - .remove_new = sch5636_remove, 515 + .remove = sch5636_remove, 516 516 .id_table = sch5636_device_id, 517 517 }; 518 518
+2 -2
drivers/hwmon/sg2042-mcu.c
··· 346 346 } 347 347 348 348 static const struct i2c_device_id sg2042_mcu_id[] = { 349 - { "sg2042-hwmon-mcu", 0 }, 350 - {}, 349 + { "sg2042-hwmon-mcu" }, 350 + { } 351 351 }; 352 352 MODULE_DEVICE_TABLE(i2c, sg2042_mcu_id); 353 353
+1 -1
drivers/hwmon/sht15.c
··· 1051 1051 .of_match_table = of_match_ptr(sht15_dt_match), 1052 1052 }, 1053 1053 .probe = sht15_probe, 1054 - .remove_new = sht15_remove, 1054 + .remove = sht15_remove, 1055 1055 .id_table = sht15_device_ids, 1056 1056 }; 1057 1057 module_platform_driver(sht15_driver);
+175 -9
drivers/hwmon/sht4x.c
··· 11 11 #include <linux/crc8.h> 12 12 #include <linux/delay.h> 13 13 #include <linux/hwmon.h> 14 + #include <linux/hwmon-sysfs.h> 14 15 #include <linux/i2c.h> 15 16 #include <linux/jiffies.h> 16 17 #include <linux/module.h> ··· 32 31 */ 33 32 #define SHT4X_CMD_MEASURE_HPM 0b11111101 34 33 #define SHT4X_CMD_RESET 0b10010100 34 + #define SHT4X_CMD_HEATER_20_1 0b00011110 35 + #define SHT4X_CMD_HEATER_20_01 0b00010101 36 + #define SHT4X_CMD_HEATER_110_1 0b00101111 37 + #define SHT4X_CMD_HEATER_110_01 0b00100100 38 + #define SHT4X_CMD_HEATER_200_1 0b00111001 39 + #define SHT4X_CMD_HEATER_200_01 0b00110010 35 40 36 41 #define SHT4X_CMD_LEN 1 37 42 #define SHT4X_CRC8_LEN 1 ··· 56 49 * struct sht4x_data - All the data required to operate an SHT4X chip 57 50 * @client: the i2c client associated with the SHT4X 58 51 * @lock: a mutex that is used to prevent parallel access to the i2c client 52 + * @heating_complete: the time that the last heating finished 53 + * @data_pending: true if and only if there are measurements to retrieve after heating 54 + * @heater_power: the power at which the heater will be started 55 + * @heater_time: the time for which the heater will remain turned on 59 56 * @valid: validity of fields below 60 57 * @update_interval: the minimum poll interval 61 58 * @last_updated: the previous time that the SHT4X was polled ··· 69 58 struct sht4x_data { 70 59 struct i2c_client *client; 71 60 struct mutex lock; /* atomic read data updates */ 61 + unsigned long heating_complete; /* in jiffies */ 62 + bool data_pending; 63 + u32 heater_power; /* in milli-watts */ 64 + u32 heater_time; /* in milli-seconds */ 72 65 bool valid; /* validity of fields below */ 73 66 long update_interval; /* in milli-seconds */ 74 67 long last_updated; /* in jiffies */ ··· 94 79 u8 crc; 95 80 u8 cmd[SHT4X_CMD_LEN] = {SHT4X_CMD_MEASURE_HPM}; 96 81 u8 raw_data[SHT4X_RESPONSE_LENGTH]; 82 + unsigned long curr_jiffies; 97 83 98 84 mutex_lock(&data->lock); 99 - next_update = data->last_updated + 100 - msecs_to_jiffies(data->update_interval); 101 85 102 - if (data->valid && time_before_eq(jiffies, next_update)) 103 - goto unlock; 86 + curr_jiffies = jiffies; 87 + if (time_before(curr_jiffies, data->heating_complete)) 88 + msleep(jiffies_to_msecs(data->heating_complete - curr_jiffies)); 104 89 105 - ret = i2c_master_send(client, cmd, SHT4X_CMD_LEN); 106 - if (ret < 0) 107 - goto unlock; 90 + if (data->data_pending && 91 + time_before(jiffies, data->heating_complete + data->update_interval)) { 92 + data->data_pending = false; 93 + } else { 94 + next_update = data->last_updated + 95 + msecs_to_jiffies(data->update_interval); 108 96 109 - usleep_range(SHT4X_MEAS_DELAY_HPM, SHT4X_MEAS_DELAY_HPM + SHT4X_DELAY_EXTRA); 97 + if (data->valid && time_before_eq(jiffies, next_update)) 98 + goto unlock; 99 + 100 + ret = i2c_master_send(client, cmd, SHT4X_CMD_LEN); 101 + if (ret < 0) 102 + goto unlock; 103 + 104 + usleep_range(SHT4X_MEAS_DELAY_HPM, SHT4X_MEAS_DELAY_HPM + SHT4X_DELAY_EXTRA); 105 + } 110 106 111 107 ret = i2c_master_recv(client, raw_data, SHT4X_RESPONSE_LENGTH); 112 108 if (ret != SHT4X_RESPONSE_LENGTH) { ··· 241 215 } 242 216 } 243 217 218 + static ssize_t heater_enable_show(struct device *dev, 219 + struct device_attribute *attr, 220 + char *buf) 221 + { 222 + struct sht4x_data *data = dev_get_drvdata(dev); 223 + 224 + return sysfs_emit(buf, "%u\n", time_before(jiffies, data->heating_complete)); 225 + } 226 + 227 + static ssize_t heater_enable_store(struct device *dev, 228 + struct device_attribute *attr, 229 + const char *buf, 230 + size_t count) 231 + { 232 + struct sht4x_data *data = dev_get_drvdata(dev); 233 + bool status; 234 + ssize_t ret; 235 + u8 cmd; 236 + u32 heating_time_bound; 237 + 238 + ret = kstrtobool(buf, &status); 239 + if (ret) 240 + return ret; 241 + if (!status) 242 + return -EINVAL; 243 + 244 + if (data->heater_time == 100) { 245 + if (data->heater_power == 20) 246 + cmd = SHT4X_CMD_HEATER_20_01; 247 + else if (data->heater_power == 110) 248 + cmd = SHT4X_CMD_HEATER_110_01; 249 + else /* data->heater_power == 200 */ 250 + cmd = SHT4X_CMD_HEATER_200_01; 251 + 252 + heating_time_bound = 110; 253 + } else { /* data->heater_time == 1000 */ 254 + if (data->heater_power == 20) 255 + cmd = SHT4X_CMD_HEATER_20_1; 256 + else if (data->heater_power == 110) 257 + cmd = SHT4X_CMD_HEATER_110_1; 258 + else /* data->heater_power == 200 */ 259 + cmd = SHT4X_CMD_HEATER_200_1; 260 + 261 + heating_time_bound = 1100; 262 + } 263 + 264 + mutex_lock(&data->lock); 265 + 266 + if (time_before(jiffies, data->heating_complete)) { 267 + ret = -EBUSY; 268 + goto unlock; 269 + } 270 + 271 + ret = i2c_master_send(data->client, &cmd, SHT4X_CMD_LEN); 272 + if (ret < 0) 273 + goto unlock; 274 + 275 + data->heating_complete = jiffies + msecs_to_jiffies(heating_time_bound); 276 + data->data_pending = true; 277 + unlock: 278 + mutex_unlock(&data->lock); 279 + return ret; 280 + } 281 + 282 + static ssize_t heater_power_show(struct device *dev, 283 + struct device_attribute *attr, 284 + char *buf) 285 + { 286 + struct sht4x_data *data = dev_get_drvdata(dev); 287 + 288 + return sysfs_emit(buf, "%u\n", data->heater_power); 289 + } 290 + 291 + static ssize_t heater_power_store(struct device *dev, 292 + struct device_attribute *attr, 293 + const char *buf, 294 + size_t count) 295 + { 296 + struct sht4x_data *data = dev_get_drvdata(dev); 297 + u32 power; 298 + ssize_t ret; 299 + 300 + ret = kstrtou32(buf, 10, &power); 301 + if (ret) 302 + return ret; 303 + 304 + if (power != 20 && power != 110 && power != 200) 305 + return -EINVAL; 306 + 307 + data->heater_power = power; 308 + 309 + return count; 310 + } 311 + 312 + static ssize_t heater_time_show(struct device *dev, 313 + struct device_attribute *attr, 314 + char *buf) 315 + { 316 + struct sht4x_data *data = dev_get_drvdata(dev); 317 + 318 + return sysfs_emit(buf, "%u\n", data->heater_time); 319 + } 320 + 321 + static ssize_t heater_time_store(struct device *dev, 322 + struct device_attribute *attr, 323 + const char *buf, 324 + size_t count) 325 + { 326 + struct sht4x_data *data = dev_get_drvdata(dev); 327 + u32 time; 328 + ssize_t ret; 329 + 330 + ret = kstrtou32(buf, 10, &time); 331 + if (ret) 332 + return ret; 333 + 334 + if (time != 100 && time != 1000) 335 + return -EINVAL; 336 + 337 + data->heater_time = time; 338 + 339 + return count; 340 + } 341 + 342 + static DEVICE_ATTR_RW(heater_enable); 343 + static DEVICE_ATTR_RW(heater_power); 344 + static DEVICE_ATTR_RW(heater_time); 345 + 346 + static struct attribute *sht4x_attrs[] = { 347 + &dev_attr_heater_enable.attr, 348 + &dev_attr_heater_power.attr, 349 + &dev_attr_heater_time.attr, 350 + NULL 351 + }; 352 + 353 + ATTRIBUTE_GROUPS(sht4x); 354 + 244 355 static const struct hwmon_channel_info * const sht4x_info[] = { 245 356 HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL), 246 357 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT), ··· 418 255 419 256 data->update_interval = SHT4X_MIN_POLL_INTERVAL; 420 257 data->client = client; 258 + data->heater_power = 200; 259 + data->heater_time = 1000; 260 + data->heating_complete = jiffies; 421 261 422 262 mutex_init(&data->lock); 423 263 ··· 436 270 client->name, 437 271 data, 438 272 &sht4x_chip_info, 439 - NULL); 273 + sht4x_groups); 440 274 441 275 return PTR_ERR_OR_ZERO(hwmon_dev); 442 276 }
+1 -1
drivers/hwmon/sis5595.c
··· 784 784 .name = DRIVER_NAME, 785 785 }, 786 786 .probe = sis5595_probe, 787 - .remove_new = sis5595_remove, 787 + .remove = sis5595_remove, 788 788 }; 789 789 790 790 static int sis5595_pci_probe(struct pci_dev *dev,
+1 -8
drivers/hwmon/sl28cpld-hwmon.c
··· 23 23 u32 offset; 24 24 }; 25 25 26 - static umode_t sl28cpld_hwmon_is_visible(const void *data, 27 - enum hwmon_sensor_types type, 28 - u32 attr, int channel) 29 - { 30 - return 0444; 31 - } 32 - 33 26 static int sl28cpld_hwmon_read(struct device *dev, 34 27 enum hwmon_sensor_types type, u32 attr, 35 28 int channel, long *input) ··· 66 73 }; 67 74 68 75 static const struct hwmon_ops sl28cpld_hwmon_ops = { 69 - .is_visible = sl28cpld_hwmon_is_visible, 76 + .visible = 0444, 70 77 .read = sl28cpld_hwmon_read, 71 78 }; 72 79
+1 -1
drivers/hwmon/smsc47m1.c
··· 858 858 .driver = { 859 859 .name = DRVNAME, 860 860 }, 861 - .remove_new = __exit_p(smsc47m1_remove), 861 + .remove = __exit_p(smsc47m1_remove), 862 862 }; 863 863 864 864 static int __init smsc47m1_device_add(unsigned short address,
+1 -1
drivers/hwmon/spd5118.c
··· 671 671 static DEFINE_SIMPLE_DEV_PM_OPS(spd5118_pm_ops, spd5118_suspend, spd5118_resume); 672 672 673 673 static const struct i2c_device_id spd5118_id[] = { 674 - { "spd5118", 0 }, 674 + { "spd5118" }, 675 675 { } 676 676 }; 677 677 MODULE_DEVICE_TABLE(i2c, spd5118_id);
+1 -9
drivers/hwmon/surface_fan.c
··· 18 18 .command_id = 0x01, 19 19 }); 20 20 21 - // hwmon 22 - static umode_t surface_fan_hwmon_is_visible(const void *drvdata, 23 - enum hwmon_sensor_types type, u32 attr, 24 - int channel) 25 - { 26 - return 0444; 27 - } 28 - 29 21 static int surface_fan_hwmon_read(struct device *dev, 30 22 enum hwmon_sensor_types type, u32 attr, 31 23 int channel, long *val) ··· 41 49 }; 42 50 43 51 static const struct hwmon_ops surface_fan_hwmon_ops = { 44 - .is_visible = surface_fan_hwmon_is_visible, 52 + .visible = 0444, 45 53 .read = surface_fan_hwmon_read, 46 54 }; 47 55
+56 -19
drivers/hwmon/tmp108.c
··· 13 13 #include <linux/mutex.h> 14 14 #include <linux/of.h> 15 15 #include <linux/i2c.h> 16 + #include <linux/i3c/device.h> 16 17 #include <linux/init.h> 17 18 #include <linux/jiffies.h> 18 19 #include <linux/regmap.h> ··· 324 323 .use_single_write = true, 325 324 }; 326 325 327 - static int tmp108_probe(struct i2c_client *client) 326 + static int tmp108_common_probe(struct device *dev, struct regmap *regmap, char *name) 328 327 { 329 - struct device *dev = &client->dev; 330 328 struct device *hwmon_dev; 331 329 struct tmp108 *tmp108; 332 - int err; 333 330 u32 config; 334 - 335 - if (!i2c_check_functionality(client->adapter, 336 - I2C_FUNC_SMBUS_WORD_DATA)) { 337 - dev_err(dev, 338 - "adapter doesn't support SMBus word transactions\n"); 339 - return -ENODEV; 340 - } 331 + int err; 341 332 342 333 tmp108 = devm_kzalloc(dev, sizeof(*tmp108), GFP_KERNEL); 343 334 if (!tmp108) 344 335 return -ENOMEM; 345 336 346 337 dev_set_drvdata(dev, tmp108); 347 - 348 - tmp108->regmap = devm_regmap_init_i2c(client, &tmp108_regmap_config); 349 - if (IS_ERR(tmp108->regmap)) { 350 - err = PTR_ERR(tmp108->regmap); 351 - dev_err(dev, "regmap init failed: %d", err); 352 - return err; 353 - } 338 + tmp108->regmap = regmap; 354 339 355 340 err = regmap_read(tmp108->regmap, TMP108_REG_CONF, &config); 356 341 if (err < 0) { ··· 370 383 return err; 371 384 } 372 385 373 - hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 386 + hwmon_dev = devm_hwmon_device_register_with_info(dev, name, 374 387 tmp108, 375 388 &tmp108_chip_info, 376 389 NULL); 377 390 return PTR_ERR_OR_ZERO(hwmon_dev); 391 + } 392 + 393 + static int tmp108_probe(struct i2c_client *client) 394 + { 395 + struct device *dev = &client->dev; 396 + struct regmap *regmap; 397 + 398 + if (!i2c_check_functionality(client->adapter, 399 + I2C_FUNC_SMBUS_WORD_DATA)) 400 + return dev_err_probe(dev, -ENODEV, 401 + "adapter doesn't support SMBus word transactions\n"); 402 + 403 + regmap = devm_regmap_init_i2c(client, &tmp108_regmap_config); 404 + if (IS_ERR(regmap)) 405 + return dev_err_probe(dev, PTR_ERR(regmap), "regmap init failed"); 406 + 407 + return tmp108_common_probe(dev, regmap, client->name); 378 408 } 379 409 380 410 static int tmp108_suspend(struct device *dev) ··· 424 420 425 421 #ifdef CONFIG_OF 426 422 static const struct of_device_id tmp108_of_ids[] = { 423 + { .compatible = "nxp,p3t1085", }, 427 424 { .compatible = "ti,tmp108", }, 428 425 {} 429 426 }; ··· 441 436 .id_table = tmp108_i2c_ids, 442 437 }; 443 438 444 - module_i2c_driver(tmp108_driver); 439 + static const struct i3c_device_id p3t1085_i3c_ids[] = { 440 + I3C_DEVICE(0x011b, 0x1529, NULL), 441 + {} 442 + }; 443 + MODULE_DEVICE_TABLE(i3c, p3t1085_i3c_ids); 444 + 445 + static int p3t1085_i3c_probe(struct i3c_device *i3cdev) 446 + { 447 + struct device *dev = i3cdev_to_dev(i3cdev); 448 + struct regmap *regmap; 449 + 450 + #ifdef CONFIG_REGMAP_I3C 451 + regmap = devm_regmap_init_i3c(i3cdev, &tmp108_regmap_config); 452 + #else 453 + regmap = ERR_PTR(-ENODEV); 454 + #endif 455 + 456 + if (IS_ERR(regmap)) 457 + return dev_err_probe(dev, PTR_ERR(regmap), 458 + "Failed to register i3c regmap\n"); 459 + 460 + return tmp108_common_probe(dev, regmap, "p3t1085_i3c"); 461 + } 462 + 463 + static struct i3c_driver p3t1085_driver = { 464 + .driver = { 465 + .name = "p3t1085_i3c", 466 + }, 467 + .probe = p3t1085_i3c_probe, 468 + .id_table = p3t1085_i3c_ids, 469 + }; 470 + 471 + module_i3c_i2c_driver(p3t1085_driver, &tmp108_driver) 445 472 446 473 MODULE_AUTHOR("John Muir <john@jmuir.com>"); 447 474 MODULE_DESCRIPTION("Texas Instruments TMP108 temperature sensor driver");
+1 -1
drivers/hwmon/ultra45_env.c
··· 317 317 .of_match_table = env_match, 318 318 }, 319 319 .probe = env_probe, 320 - .remove_new = env_remove, 320 + .remove = env_remove, 321 321 }; 322 322 323 323 module_platform_driver(env_driver);
+1 -1
drivers/hwmon/via-cputemp.c
··· 197 197 .name = DRVNAME, 198 198 }, 199 199 .probe = via_cputemp_probe, 200 - .remove_new = via_cputemp_remove, 200 + .remove = via_cputemp_remove, 201 201 }; 202 202 203 203 struct pdev_entry {
+1 -1
drivers/hwmon/via686a.c
··· 799 799 .name = DRIVER_NAME, 800 800 }, 801 801 .probe = via686a_probe, 802 - .remove_new = via686a_remove, 802 + .remove = via686a_remove, 803 803 }; 804 804 805 805 static const struct pci_device_id via686a_pci_ids[] = {
+1 -1
drivers/hwmon/vt1211.c
··· 1221 1221 .name = DRVNAME, 1222 1222 }, 1223 1223 .probe = vt1211_probe, 1224 - .remove_new = vt1211_remove, 1224 + .remove = vt1211_remove, 1225 1225 }; 1226 1226 1227 1227 static int __init vt1211_device_add(unsigned short address)
+2 -2
drivers/hwmon/vt8231.c
··· 910 910 911 911 912 912 static struct platform_driver vt8231_driver = { 913 - .driver = { 913 + .driver = { 914 914 .name = DRIVER_NAME, 915 915 }, 916 916 .probe = vt8231_probe, 917 - .remove_new = vt8231_remove, 917 + .remove = vt8231_remove, 918 918 }; 919 919 920 920 static const struct pci_device_id vt8231_pci_ids[] = {
+1 -1
drivers/hwmon/w83627hf.c
··· 1844 1844 .pm = W83627HF_DEV_PM_OPS, 1845 1845 }, 1846 1846 .probe = w83627hf_probe, 1847 - .remove_new = w83627hf_remove, 1847 + .remove = w83627hf_remove, 1848 1848 }; 1849 1849 1850 1850 static int __init w83627hf_find(int sioaddr, unsigned short *addr,
+1 -1
drivers/hwmon/w83781d.c
··· 1828 1828 .name = "w83781d", 1829 1829 }, 1830 1830 .probe = w83781d_isa_probe, 1831 - .remove_new = w83781d_isa_remove, 1831 + .remove = w83781d_isa_remove, 1832 1832 }; 1833 1833 1834 1834 /* return 1 if a supported chip is found, 0 otherwise */
+1 -1
drivers/hwmon/xgene-hwmon.c
··· 772 772 773 773 static struct platform_driver xgene_hwmon_driver = { 774 774 .probe = xgene_hwmon_probe, 775 - .remove_new = xgene_hwmon_remove, 775 + .remove = xgene_hwmon_remove, 776 776 .driver = { 777 777 .name = "xgene-slimpro-hwmon", 778 778 .of_match_table = xgene_hwmon_of_match,
+4 -1
include/linux/hwmon.h
··· 368 368 369 369 /** 370 370 * struct hwmon_ops - hwmon device operations 371 - * @is_visible: Callback to return attribute visibility. Mandatory. 371 + * @visible: Static visibility. If non-zero, 'is_visible' is ignored. 372 + * @is_visible: Callback to return attribute visibility. Mandatory unless 373 + * 'visible' is non-zero. 372 374 * Parameters are: 373 375 * @const void *drvdata: 374 376 * Pointer to driver-private data structure passed ··· 414 412 * The function returns 0 on success or a negative error number. 415 413 */ 416 414 struct hwmon_ops { 415 + umode_t visible; 417 416 umode_t (*is_visible)(const void *drvdata, enum hwmon_sensor_types type, 418 417 u32 attr, int channel); 419 418 int (*read)(struct device *dev, enum hwmon_sensor_types type,
-15
include/linux/platform_data/max6639.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - #ifndef _LINUX_MAX6639_H 3 - #define _LINUX_MAX6639_H 4 - 5 - #include <linux/types.h> 6 - 7 - /* platform data for the MAX6639 temperature sensor and fan control */ 8 - 9 - struct max6639_platform_data { 10 - bool pwm_polarity; /* Polarity low (0) or high (1, default) */ 11 - int ppr; /* Pulses per rotation 1..4 (default == 2) */ 12 - int rpm_range; /* 2000, 4000 (default), 8000 or 16000 */ 13 - }; 14 - 15 - #endif /* _LINUX_MAX6639_H */