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spi: dt-bindings: cdns,qspi-nor: Add Renesas RZ/N1D400 to the list

Add support for the Renesas RZ/N1D400 QSPI controller.

This SoC is identified in the bindings with its other name: r9a06g032.
It is part of the RZ/N1 family, which contains a "D" and a "S"
variant. IPs in this SoC are typically described using 2 compatibles:
the SoC specific compatible and the family compatible. The original
Cadence IP compatible is dropped because it is unusable on its own.

Indirect accesses are not supported by this flavour of the Cadence IP,
which means several properties have no meaning in the scope of the
Renesas compatible. Let's make sure they are no longer expected nor
mandatory.

Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20260205-schneider-6-19-rc1-qspi-v5-1-843632b3c674@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Miquel Raynal (Schneider Electric) and committed by
Mark Brown 2b97f5cd 8ea39d96

+17 -2
+17 -2
Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
··· 61 61 cdns,fifo-depth: 62 62 enum: [ 128, 256 ] 63 63 default: 128 64 + - if: 65 + properties: 66 + compatible: 67 + contains: 68 + const: renesas,rzn1-qspi 69 + then: 70 + properties: 71 + cdns,trigger-address: false 72 + cdns,fifo-depth: false 73 + cdns,fifo-width: false 74 + else: 75 + required: 76 + - cdns,trigger-address 77 + - cdns,fifo-depth 64 78 65 79 properties: 66 80 compatible: ··· 94 80 # controllers are meant to be used with flashes of all kinds, 95 81 # ie. also NAND flashes, not only NOR flashes. 96 82 - const: cdns,qspi-nor 83 + - items: 84 + - const: renesas,r9a06g032-qspi 85 + - const: renesas,rzn1-qspi 97 86 - const: cdns,qspi-nor 98 87 deprecated: true 99 88 ··· 180 163 - reg 181 164 - interrupts 182 165 - clocks 183 - - cdns,fifo-width 184 - - cdns,trigger-address 185 166 - '#address-cells' 186 167 - '#size-cells' 187 168