Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
iio: adc: ad4695: add 2nd regmap for 16-bit registers
The AD4695 and similar chips have some multibyte registers that have
to be read/written in a single operation. So we need to add a 2nd regmap
for these registers.
These registers are removed from the 8-bit regmap allowable ranges and
AD4695_MAX_REG is dropped since it would be ambiguous now.
debugfs register access is also updated to automatically use the correct
regmap depending on the register address.
Signed-off-by: David Lechner <dlechner@baylibre.com>
Link: https://patch.msgid.link/20240820-ad4695-gain-offset-v1-1-c8f6e3b47551@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
authored by
David Lechner
and committed by
Jonathan Cameron
2ba49fc4
16531118
+68
-15
+68
-15
drivers/iio/adc/ad4695.c
+68
-15
drivers/iio/adc/ad4695.c
···
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/* AD4695 registers */
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#define AD4695_REG_SPI_CONFIG_A 0x0000
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#define AD4695_REG_SPI_CONFIG_A_SW_RST (BIT(7) | BIT(0))
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+
#define AD4695_REG_SPI_CONFIG_A_ADDR_DIR BIT(5)
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#define AD4695_REG_SPI_CONFIG_B 0x0001
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#define AD4695_REG_SPI_CONFIG_B_INST_MODE BIT(7)
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#define AD4695_REG_DEVICE_TYPE 0x0003
···
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#define AD4695_REG_GAIN_IN(n) (0x00C0 | (2 * (n)))
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#define AD4695_REG_AS_SLOT(n) (0x0100 | (n))
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#define AD4695_REG_AS_SLOT_INX GENMASK(3, 0)
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-
#define AD4695_MAX_REG 0x017F
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/* Conversion mode commands */
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#define AD4695_CMD_EXIT_CNV_MODE 0x0A
···
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struct ad4695_state {
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struct spi_device *spi;
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struct regmap *regmap;
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struct regmap *regmap16;
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struct gpio_desc *reset_gpio;
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/* voltages channels plus temperature and timestamp */
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struct iio_chan_spec iio_chan[AD4695_MAX_CHANNELS + 2];
···
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regmap_reg_range(AD4695_REG_SPI_CONFIG_C, AD4695_REG_SPI_STATUS),
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regmap_reg_range(AD4695_REG_STATUS, AD4695_REG_ALERT_STATUS2),
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regmap_reg_range(AD4695_REG_CLAMP_STATUS, AD4695_REG_CLAMP_STATUS),
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-
regmap_reg_range(AD4695_REG_SETUP, AD4695_REG_TEMP_CTRL),
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-
regmap_reg_range(AD4695_REG_CONFIG_IN(0), AD4695_MAX_REG),
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regmap_reg_range(AD4695_REG_SETUP, AD4695_REG_AC_CTRL),
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regmap_reg_range(AD4695_REG_GPIO_CTRL, AD4695_REG_TEMP_CTRL),
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regmap_reg_range(AD4695_REG_CONFIG_IN(0), AD4695_REG_CONFIG_IN(15)),
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regmap_reg_range(AD4695_REG_AS_SLOT(0), AD4695_REG_AS_SLOT(127)),
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};
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static const struct regmap_access_table ad4695_regmap_rd_table = {
···
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regmap_reg_range(AD4695_REG_SCRATCH_PAD, AD4695_REG_SCRATCH_PAD),
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regmap_reg_range(AD4695_REG_LOOP_MODE, AD4695_REG_LOOP_MODE),
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regmap_reg_range(AD4695_REG_SPI_CONFIG_C, AD4695_REG_SPI_STATUS),
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-
regmap_reg_range(AD4695_REG_SETUP, AD4695_REG_TEMP_CTRL),
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-
regmap_reg_range(AD4695_REG_CONFIG_IN(0), AD4695_MAX_REG),
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+
regmap_reg_range(AD4695_REG_SETUP, AD4695_REG_AC_CTRL),
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regmap_reg_range(AD4695_REG_GPIO_CTRL, AD4695_REG_TEMP_CTRL),
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regmap_reg_range(AD4695_REG_CONFIG_IN(0), AD4695_REG_CONFIG_IN(15)),
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regmap_reg_range(AD4695_REG_AS_SLOT(0), AD4695_REG_AS_SLOT(127)),
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};
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static const struct regmap_access_table ad4695_regmap_wr_table = {
···
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};
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static const struct regmap_config ad4695_regmap_config = {
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-
.name = "ad4695",
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.name = "ad4695-8",
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.reg_bits = 16,
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.val_bits = 8,
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.max_register = AD4695_MAX_REG,
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.max_register = AD4695_REG_AS_SLOT(127),
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.rd_table = &ad4695_regmap_rd_table,
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.wr_table = &ad4695_regmap_wr_table,
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.can_multi_write = true,
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};
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static const struct regmap_range ad4695_regmap16_rd_ranges[] = {
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regmap_reg_range(AD4695_REG_STD_SEQ_CONFIG, AD4695_REG_STD_SEQ_CONFIG),
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regmap_reg_range(AD4695_REG_UPPER_IN(0), AD4695_REG_GAIN_IN(15)),
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+
};
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+
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static const struct regmap_access_table ad4695_regmap16_rd_table = {
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.yes_ranges = ad4695_regmap16_rd_ranges,
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.n_yes_ranges = ARRAY_SIZE(ad4695_regmap16_rd_ranges),
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};
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+
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static const struct regmap_range ad4695_regmap16_wr_ranges[] = {
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regmap_reg_range(AD4695_REG_STD_SEQ_CONFIG, AD4695_REG_STD_SEQ_CONFIG),
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+
regmap_reg_range(AD4695_REG_UPPER_IN(0), AD4695_REG_GAIN_IN(15)),
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+
};
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static const struct regmap_access_table ad4695_regmap16_wr_table = {
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.yes_ranges = ad4695_regmap16_wr_ranges,
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.n_yes_ranges = ARRAY_SIZE(ad4695_regmap16_wr_ranges),
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};
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+
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static const struct regmap_config ad4695_regmap16_config = {
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.name = "ad4695-16",
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.reg_bits = 16,
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.reg_stride = 2,
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.val_bits = 16,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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.max_register = AD4695_REG_GAIN_IN(15),
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.rd_table = &ad4695_regmap16_rd_table,
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.wr_table = &ad4695_regmap16_wr_table,
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.can_multi_write = true,
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};
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···
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struct ad4695_state *st = iio_priv(indio_dev);
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iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
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-
if (readval)
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return regmap_read(st->regmap, reg, readval);
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-
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return regmap_write(st->regmap, reg, writeval);
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+
if (readval) {
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if (regmap_check_range_table(st->regmap, reg,
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&ad4695_regmap_rd_table))
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return regmap_read(st->regmap, reg, readval);
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if (regmap_check_range_table(st->regmap16, reg,
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&ad4695_regmap16_rd_table))
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+
return regmap_read(st->regmap16, reg, readval);
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} else {
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if (regmap_check_range_table(st->regmap, reg,
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&ad4695_regmap_wr_table))
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return regmap_write(st->regmap, reg, writeval);
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if (regmap_check_range_table(st->regmap16, reg,
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&ad4695_regmap16_wr_table))
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return regmap_write(st->regmap16, reg, writeval);
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}
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}
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-
unreachable();
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return -EINVAL;
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}
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695
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static const struct iio_info ad4695_info = {
···
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return dev_err_probe(dev, PTR_ERR(st->regmap),
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"Failed to initialize regmap\n");
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st->regmap16 = devm_regmap_init_spi(spi, &ad4695_regmap16_config);
811
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if (IS_ERR(st->regmap16))
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return dev_err_probe(dev, PTR_ERR(st->regmap16),
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"Failed to initialize regmap16\n");
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+
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ret = devm_regulator_bulk_get_enable(dev,
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ARRAY_SIZE(ad4695_power_supplies),
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ad4695_power_supplies);
···
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msleep(AD4695_T_WAKEUP_SW_MS);
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}
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-
/* Needed for debugfs since it only access registers 1 byte at a time. */
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ret = regmap_set_bits(st->regmap, AD4695_REG_SPI_CONFIG_C,
934
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AD4695_REG_SPI_CONFIG_C_MB_STRICT);
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/* Needed for regmap16 to be able to work correctly. */
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ret = regmap_set_bits(st->regmap, AD4695_REG_SPI_CONFIG_A,
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AD4695_REG_SPI_CONFIG_A_ADDR_DIR);
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if (ret)
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return ret;
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