Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/rockchip: analogix_dp: Use formalized struct definition for grf field
The formalized struct definition will makes grf field operations more
concise and easier to extend.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20250224081325.96724-2-damon.ding@rock-chips.com
authored by
Damon Ding
and committed by
Heiko Stuebner
2bf9f610
fd0141d1
+45
-32
+45
-32
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+45
-32
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
···
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#include "rockchip_drm_drv.h"
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#define RK3288_GRF_SOC_CON6 0x25c
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#define RK3288_EDP_LCDC_SEL BIT(5)
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#define RK3399_GRF_SOC_CON20 0x6250
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#define RK3399_EDP_LCDC_SEL BIT(5)
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#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
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#define PSR_WAIT_LINE_FLAG_TIMEOUT_MS 100
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#define GRF_REG_FIELD(_reg, _lsb, _msb) { \
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.reg = _reg, \
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.lsb = _lsb, \
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.msb = _msb, \
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.valid = true, \
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}
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struct rockchip_grf_reg_field {
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u32 reg;
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u32 lsb;
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u32 msb;
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bool valid;
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};
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/**
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* struct rockchip_dp_chip_data - splite the grf setting of kind of chips
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* @lcdsel_grf_reg: grf register offset of lcdc select
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* @lcdsel_big: reg value of selecting vop big for eDP
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* @lcdsel_lit: reg value of selecting vop little for eDP
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* @lcdc_sel: grf register field of lcdc_sel
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* @chip_type: specific chip type
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*/
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struct rockchip_dp_chip_data {
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u32 lcdsel_grf_reg;
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u32 lcdsel_big;
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u32 lcdsel_lit;
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const struct rockchip_grf_reg_field lcdc_sel;
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u32 chip_type;
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};
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···
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static struct rockchip_dp_device *pdata_encoder_to_dp(struct analogix_dp_plat_data *plat_data)
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{
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return container_of(plat_data, struct rockchip_dp_device, plat_data);
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}
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static int rockchip_grf_write(struct regmap *grf, u32 reg, u32 mask, u32 val)
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{
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return regmap_write(grf, reg, (mask << 16) | (val & mask));
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}
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static int rockchip_grf_field_write(struct regmap *grf,
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const struct rockchip_grf_reg_field *field,
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u32 val)
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{
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u32 mask;
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if (!field->valid)
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return 0;
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mask = GENMASK(field->msb, field->lsb);
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val <<= field->lsb;
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return rockchip_grf_write(grf, field->reg, mask, val);
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}
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static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
···
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struct drm_crtc *crtc;
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struct drm_crtc_state *old_crtc_state;
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int ret;
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u32 val;
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crtc = rockchip_dp_drm_get_new_crtc(encoder, state);
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if (!crtc)
···
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if (old_crtc_state && old_crtc_state->self_refresh_active)
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return;
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ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
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if (ret < 0)
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return;
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if (ret)
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val = dp->data->lcdsel_lit;
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else
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val = dp->data->lcdsel_big;
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DRM_DEV_DEBUG(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
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ret = clk_prepare_enable(dp->grfclk);
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if (ret < 0) {
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DRM_DEV_ERROR(dp->dev, "failed to enable grfclk %d\n", ret);
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return;
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}
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ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
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ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
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if (ret < 0)
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return;
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DRM_DEV_DEBUG(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
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ret = rockchip_grf_field_write(dp->grf, &dp->data->lcdc_sel, ret);
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if (ret != 0)
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DRM_DEV_ERROR(dp->dev, "Could not write to GRF: %d\n", ret);
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···
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rockchip_dp_resume, NULL);
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static const struct rockchip_dp_chip_data rk3399_edp = {
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.lcdsel_grf_reg = RK3399_GRF_SOC_CON20,
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.lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),
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.lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL),
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.lcdc_sel = GRF_REG_FIELD(0x6250, 5, 5),
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.chip_type = RK3399_EDP,
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};
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static const struct rockchip_dp_chip_data rk3288_dp = {
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.lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
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.lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
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.lcdsel_lit = HIWORD_UPDATE(RK3288_EDP_LCDC_SEL, RK3288_EDP_LCDC_SEL),
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.lcdc_sel = GRF_REG_FIELD(0x025c, 5, 5),
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.chip_type = RK3288_DP,
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};
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