Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"Not much happening, should have dequeued this lot earlier.
One amdgpu, one nouveau and one exynos fix"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/exynos: atomic check only enabled crtc states
drm/nouveau/bios/fan: hardcode the fan mode to linear
drm/amdgpu: fix user fence handling
+48
-22
+2
-1
drivers/gpu/drm/amd/amdgpu/amdgpu.h
+2
-1
drivers/gpu/drm/amd/amdgpu/amdgpu.h
+42
-21
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+42
-21
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
···
127
127
return 0;
128
128
}
129
129
130
+
static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
131
+
struct drm_amdgpu_cs_chunk_fence *fence_data)
132
+
{
133
+
struct drm_gem_object *gobj;
134
+
uint32_t handle;
135
+
136
+
handle = fence_data->handle;
137
+
gobj = drm_gem_object_lookup(p->adev->ddev, p->filp,
138
+
fence_data->handle);
139
+
if (gobj == NULL)
140
+
return -EINVAL;
141
+
142
+
p->uf.bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
143
+
p->uf.offset = fence_data->offset;
144
+
145
+
if (amdgpu_ttm_tt_has_userptr(p->uf.bo->tbo.ttm)) {
146
+
drm_gem_object_unreference_unlocked(gobj);
147
+
return -EINVAL;
148
+
}
149
+
150
+
p->uf_entry.robj = amdgpu_bo_ref(p->uf.bo);
151
+
p->uf_entry.prefered_domains = AMDGPU_GEM_DOMAIN_GTT;
152
+
p->uf_entry.allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
153
+
p->uf_entry.priority = 0;
154
+
p->uf_entry.tv.bo = &p->uf_entry.robj->tbo;
155
+
p->uf_entry.tv.shared = true;
156
+
157
+
drm_gem_object_unreference_unlocked(gobj);
158
+
return 0;
159
+
}
160
+
130
161
int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
131
162
{
132
163
union drm_amdgpu_cs *cs = data;
···
238
207
239
208
case AMDGPU_CHUNK_ID_FENCE:
240
209
size = sizeof(struct drm_amdgpu_cs_chunk_fence);
241
-
if (p->chunks[i].length_dw * sizeof(uint32_t) >= size) {
242
-
uint32_t handle;
243
-
struct drm_gem_object *gobj;
244
-
struct drm_amdgpu_cs_chunk_fence *fence_data;
245
-
246
-
fence_data = (void *)p->chunks[i].kdata;
247
-
handle = fence_data->handle;
248
-
gobj = drm_gem_object_lookup(p->adev->ddev,
249
-
p->filp, handle);
250
-
if (gobj == NULL) {
251
-
ret = -EINVAL;
252
-
goto free_partial_kdata;
253
-
}
254
-
255
-
p->uf.bo = gem_to_amdgpu_bo(gobj);
256
-
amdgpu_bo_ref(p->uf.bo);
257
-
drm_gem_object_unreference_unlocked(gobj);
258
-
p->uf.offset = fence_data->offset;
259
-
} else {
210
+
if (p->chunks[i].length_dw * sizeof(uint32_t) < size) {
260
211
ret = -EINVAL;
261
212
goto free_partial_kdata;
262
213
}
214
+
215
+
ret = amdgpu_cs_user_fence_chunk(p, (void *)p->chunks[i].kdata);
216
+
if (ret)
217
+
goto free_partial_kdata;
218
+
263
219
break;
264
220
265
221
case AMDGPU_CHUNK_ID_DEPENDENCIES:
···
409
391
p->vm_bos = amdgpu_vm_get_bos(p->adev, &fpriv->vm,
410
392
&p->validated);
411
393
394
+
if (p->uf.bo)
395
+
list_add(&p->uf_entry.tv.head, &p->validated);
396
+
412
397
if (need_mmap_lock)
413
398
down_read(¤t->mm->mmap_sem);
414
399
···
509
488
for (i = 0; i < parser->num_ibs; i++)
510
489
amdgpu_ib_free(parser->adev, &parser->ibs[i]);
511
490
kfree(parser->ibs);
512
-
if (parser->uf.bo)
513
-
amdgpu_bo_unref(&parser->uf.bo);
491
+
amdgpu_bo_unref(&parser->uf.bo);
492
+
amdgpu_bo_unref(&parser->uf_entry.robj);
514
493
}
515
494
516
495
static int amdgpu_bo_vm_update_pte(struct amdgpu_cs_parser *p,
+3
drivers/gpu/drm/exynos/exynos_drm_crtc.c
+3
drivers/gpu/drm/exynos/exynos_drm_crtc.c