Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'arc-4.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC updates from Vineet Gupta:
- Fix for atomic_fetch_#op [Will Deacon]
- Enable per device IOC [Eugeniy Paltsev]
- Remove redundant gcc version checks [Masahiro Yamada]
- Miscll platform config/DT updates [Alexey Brodkin]
* tag 'arc-4.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: don't check for HIGHMEM pages in arch_dma_alloc
ARC: IOC: panic if both IOC and ZONE_HIGHMEM enabled
ARC: dma [IOC] Enable per device io coherency
ARC: dma [IOC]: mark DMA devices connected as dma-coherent
ARC: atomics: unbork atomic_fetch_##op()
arc: remove redundant GCC version checks
ARC: sort Kconfig
ARC: cleanup show_faulting_vma()
ARC: [plat-axs*]: Enable SWAP
ARC: [plat-axs*/plat-hsdk]: Allow U-Boot to pass MAC-address to the kernel
ARC: configs: cleanup
+154
-113
+5
-5
arch/arc/Kconfig
+5
-5
arch/arc/Kconfig
···
9
9
config ARC
10
10
def_bool y
11
11
select ARC_TIMERS
12
+
select ARCH_HAS_PTE_SPECIAL
12
13
select ARCH_HAS_SYNC_DMA_FOR_CPU
13
14
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
14
15
select ARCH_HAS_SG_CHAIN
···
29
28
select GENERIC_SMP_IDLE_THREAD
30
29
select HAVE_ARCH_KGDB
31
30
select HAVE_ARCH_TRACEHOOK
31
+
select HAVE_DEBUG_STACKOVERFLOW
32
32
select HAVE_FUTEX_CMPXCHG if FUTEX
33
+
select HAVE_GENERIC_DMA_COHERENT
33
34
select HAVE_IOREMAP_PROT
35
+
select HAVE_KERNEL_GZIP
36
+
select HAVE_KERNEL_LZMA
34
37
select HAVE_KPROBES
35
38
select HAVE_KRETPROBES
36
39
select HAVE_MEMBLOCK
···
49
44
select OF_EARLY_FLATTREE
50
45
select OF_RESERVED_MEM
51
46
select PERF_USE_VMALLOC if ARC_CACHE_VIPT_ALIASING
52
-
select HAVE_DEBUG_STACKOVERFLOW
53
-
select HAVE_GENERIC_DMA_COHERENT
54
-
select HAVE_KERNEL_GZIP
55
-
select HAVE_KERNEL_LZMA
56
-
select ARCH_HAS_PTE_SPECIAL
57
47
58
48
config ARCH_HAS_CACHE_LINE_SIZE
59
49
def_bool y
+1
-9
arch/arc/Makefile
+1
-9
arch/arc/Makefile
···
43
43
LINUXINCLUDE += -include ${src}/arch/arc/include/asm/current.h
44
44
endif
45
45
46
-
upto_gcc44 := $(call cc-ifversion, -le, 0404, y)
47
-
atleast_gcc44 := $(call cc-ifversion, -ge, 0404, y)
48
-
49
-
cflags-$(atleast_gcc44) += -fsection-anchors
46
+
cflags-y += -fsection-anchors
50
47
51
48
cflags-$(CONFIG_ARC_HAS_LLSC) += -mlock
52
49
cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape
···
78
81
79
82
cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mbig-endian
80
83
ldflags-$(CONFIG_CPU_BIG_ENDIAN) += -EB
81
-
82
-
# STAR 9000518362: (fixed with binutils shipping with gcc 4.8)
83
-
# arc-linux-uclibc-ld (buildroot) or arceb-elf32-ld (EZChip) don't accept
84
-
# --build-id w/o "-marclinux". Default arc-elf32-ld is OK
85
-
ldflags-$(upto_gcc44) += -marclinux
86
84
87
85
LIBGCC := $(shell $(CC) $(cflags-y) --print-libgcc-file-name)
88
86
+26
arch/arc/boot/dts/axc003.dtsi
+26
arch/arc/boot/dts/axc003.dtsi
···
94
94
};
95
95
96
96
/*
97
+
* Mark DMA peripherals connected via IOC port as dma-coherent. We do
98
+
* it via overlay because peripherals defined in axs10x_mb.dtsi are
99
+
* used for both AXS101 and AXS103 boards and only AXS103 has IOC (so
100
+
* only AXS103 board has HW-coherent DMA peripherals)
101
+
* We don't need to mark pgu@17000 as dma-coherent because it uses
102
+
* external DMA buffer located outside of IOC aperture.
103
+
*/
104
+
axs10x_mb {
105
+
ethernet@0x18000 {
106
+
dma-coherent;
107
+
};
108
+
109
+
ehci@0x40000 {
110
+
dma-coherent;
111
+
};
112
+
113
+
ohci@0x60000 {
114
+
dma-coherent;
115
+
};
116
+
117
+
mmc@0x15000 {
118
+
dma-coherent;
119
+
};
120
+
};
121
+
122
+
/*
97
123
* The DW APB ICTL intc on MB is connected to CPU intc via a
98
124
* DT "invisible" DW APB GPIO block, configured to simply pass thru
99
125
* interrupts - setup accordinly in platform init (plat-axs10x/ax10x.c)
+26
arch/arc/boot/dts/axc003_idu.dtsi
+26
arch/arc/boot/dts/axc003_idu.dtsi
···
101
101
};
102
102
103
103
/*
104
+
* Mark DMA peripherals connected via IOC port as dma-coherent. We do
105
+
* it via overlay because peripherals defined in axs10x_mb.dtsi are
106
+
* used for both AXS101 and AXS103 boards and only AXS103 has IOC (so
107
+
* only AXS103 board has HW-coherent DMA peripherals)
108
+
* We don't need to mark pgu@17000 as dma-coherent because it uses
109
+
* external DMA buffer located outside of IOC aperture.
110
+
*/
111
+
axs10x_mb {
112
+
ethernet@0x18000 {
113
+
dma-coherent;
114
+
};
115
+
116
+
ehci@0x40000 {
117
+
dma-coherent;
118
+
};
119
+
120
+
ohci@0x60000 {
121
+
dma-coherent;
122
+
};
123
+
124
+
mmc@0x15000 {
125
+
dma-coherent;
126
+
};
127
+
};
128
+
129
+
/*
104
130
* This INTC is actually connected to DW APB GPIO
105
131
* which acts as a wire between MB INTC and CPU INTC.
106
132
* GPIO INTC is configured in platform init code
+6
-1
arch/arc/boot/dts/axs10x_mb.dtsi
+6
-1
arch/arc/boot/dts/axs10x_mb.dtsi
···
9
9
*/
10
10
11
11
/ {
12
+
aliases {
13
+
ethernet = &gmac;
14
+
};
15
+
12
16
axs10x_mb {
13
17
compatible = "simple-bus";
14
18
#address-cells = <1>;
···
72
68
};
73
69
};
74
70
75
-
ethernet@0x18000 {
71
+
gmac: ethernet@0x18000 {
76
72
#interrupt-cells = <1>;
77
73
compatible = "snps,dwmac";
78
74
reg = < 0x18000 0x2000 >;
···
85
81
max-speed = <100>;
86
82
resets = <&creg_rst 5>;
87
83
reset-names = "stmmaceth";
84
+
mac-address = [00 00 00 00 00 00]; /* Filled in by U-Boot */
88
85
};
89
86
90
87
ehci@0x40000 {
+10
-1
arch/arc/boot/dts/hsdk.dts
+10
-1
arch/arc/boot/dts/hsdk.dts
···
25
25
bootargs = "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
26
26
};
27
27
28
+
aliases {
29
+
ethernet = &gmac;
30
+
};
31
+
28
32
cpus {
29
33
#address-cells = <1>;
30
34
#size-cells = <0>;
···
167
163
#clock-cells = <0>;
168
164
};
169
165
170
-
ethernet@8000 {
166
+
gmac: ethernet@8000 {
171
167
#interrupt-cells = <1>;
172
168
compatible = "snps,dwmac";
173
169
reg = <0x8000 0x2000>;
···
180
176
phy-handle = <&phy0>;
181
177
resets = <&cgu_rst HSDK_ETH_RESET>;
182
178
reset-names = "stmmaceth";
179
+
mac-address = [00 00 00 00 00 00]; /* Filled in by U-Boot */
180
+
dma-coherent;
183
181
184
182
mdio {
185
183
#address-cells = <1>;
···
200
194
compatible = "snps,hsdk-v1.0-ohci", "generic-ohci";
201
195
reg = <0x60000 0x100>;
202
196
interrupts = <15>;
197
+
dma-coherent;
203
198
};
204
199
205
200
ehci@40000 {
206
201
compatible = "snps,hsdk-v1.0-ehci", "generic-ehci";
207
202
reg = <0x40000 0x100>;
208
203
interrupts = <15>;
204
+
dma-coherent;
209
205
};
210
206
211
207
mmc@a000 {
···
220
212
clock-names = "biu", "ciu";
221
213
interrupts = <12>;
222
214
bus-width = <4>;
215
+
dma-coherent;
223
216
};
224
217
};
225
218
-3
arch/arc/configs/axs101_defconfig
-3
arch/arc/configs/axs101_defconfig
···
1
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
2
-
# CONFIG_SWAP is not set
3
1
CONFIG_SYSVIPC=y
4
2
CONFIG_POSIX_MQUEUE=y
5
3
# CONFIG_CROSS_MEMORY_ATTACH is not set
···
61
63
CONFIG_MOUSE_SERIAL=y
62
64
CONFIG_MOUSE_SYNAPTICS_USB=y
63
65
# CONFIG_LEGACY_PTYS is not set
64
-
# CONFIG_DEVKMEM is not set
65
66
CONFIG_SERIAL_8250=y
66
67
CONFIG_SERIAL_8250_CONSOLE=y
67
68
CONFIG_SERIAL_8250_DW=y
-3
arch/arc/configs/axs103_defconfig
-3
arch/arc/configs/axs103_defconfig
···
1
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
2
-
# CONFIG_SWAP is not set
3
1
CONFIG_SYSVIPC=y
4
2
CONFIG_POSIX_MQUEUE=y
5
3
# CONFIG_CROSS_MEMORY_ATTACH is not set
···
62
64
CONFIG_MOUSE_SERIAL=y
63
65
CONFIG_MOUSE_SYNAPTICS_USB=y
64
66
# CONFIG_LEGACY_PTYS is not set
65
-
# CONFIG_DEVKMEM is not set
66
67
CONFIG_SERIAL_8250=y
67
68
CONFIG_SERIAL_8250_CONSOLE=y
68
69
CONFIG_SERIAL_8250_DW=y
-3
arch/arc/configs/axs103_smp_defconfig
-3
arch/arc/configs/axs103_smp_defconfig
···
1
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
2
-
# CONFIG_SWAP is not set
3
1
CONFIG_SYSVIPC=y
4
2
CONFIG_POSIX_MQUEUE=y
5
3
# CONFIG_CROSS_MEMORY_ATTACH is not set
···
63
65
CONFIG_MOUSE_SERIAL=y
64
66
CONFIG_MOUSE_SYNAPTICS_USB=y
65
67
# CONFIG_LEGACY_PTYS is not set
66
-
# CONFIG_DEVKMEM is not set
67
68
CONFIG_SERIAL_8250=y
68
69
CONFIG_SERIAL_8250_CONSOLE=y
69
70
CONFIG_SERIAL_8250_DW=y
-2
arch/arc/configs/haps_hs_defconfig
-2
arch/arc/configs/haps_hs_defconfig
···
1
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
2
1
# CONFIG_SWAP is not set
3
2
CONFIG_SYSVIPC=y
4
3
CONFIG_POSIX_MQUEUE=y
···
56
57
# CONFIG_SERIO_SERPORT is not set
57
58
CONFIG_SERIO_ARC_PS2=y
58
59
# CONFIG_LEGACY_PTYS is not set
59
-
# CONFIG_DEVKMEM is not set
60
60
CONFIG_SERIAL_8250=y
61
61
CONFIG_SERIAL_8250_CONSOLE=y
62
62
CONFIG_SERIAL_8250_NR_UARTS=1
-2
arch/arc/configs/haps_hs_smp_defconfig
-2
arch/arc/configs/haps_hs_smp_defconfig
···
1
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
2
1
# CONFIG_SWAP is not set
3
2
CONFIG_SYSVIPC=y
4
3
CONFIG_POSIX_MQUEUE=y
···
59
60
# CONFIG_SERIO_SERPORT is not set
60
61
CONFIG_SERIO_ARC_PS2=y
61
62
# CONFIG_LEGACY_PTYS is not set
62
-
# CONFIG_DEVKMEM is not set
63
63
CONFIG_SERIAL_8250=y
64
64
CONFIG_SERIAL_8250_CONSOLE=y
65
65
CONFIG_SERIAL_8250_NR_UARTS=1
-1
arch/arc/configs/hsdk_defconfig
-1
arch/arc/configs/hsdk_defconfig
-1
arch/arc/configs/nps_defconfig
-1
arch/arc/configs/nps_defconfig
-2
arch/arc/configs/nsim_700_defconfig
-2
arch/arc/configs/nsim_700_defconfig
···
1
1
# CONFIG_LOCALVERSION_AUTO is not set
2
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
3
2
# CONFIG_SWAP is not set
4
3
CONFIG_SYSVIPC=y
5
4
CONFIG_POSIX_MQUEUE=y
···
43
44
# CONFIG_INPUT_MOUSE is not set
44
45
# CONFIG_SERIO is not set
45
46
# CONFIG_LEGACY_PTYS is not set
46
-
# CONFIG_DEVKMEM is not set
47
47
CONFIG_SERIAL_ARC=y
48
48
CONFIG_SERIAL_ARC_CONSOLE=y
49
49
# CONFIG_HW_RANDOM is not set
-2
arch/arc/configs/nsim_hs_defconfig
-2
arch/arc/configs/nsim_hs_defconfig
···
1
1
# CONFIG_LOCALVERSION_AUTO is not set
2
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
3
2
# CONFIG_SWAP is not set
4
3
CONFIG_SYSVIPC=y
5
4
CONFIG_POSIX_MQUEUE=y
···
44
45
# CONFIG_INPUT_MOUSE is not set
45
46
# CONFIG_SERIO is not set
46
47
# CONFIG_LEGACY_PTYS is not set
47
-
# CONFIG_DEVKMEM is not set
48
48
CONFIG_SERIAL_ARC=y
49
49
CONFIG_SERIAL_ARC_CONSOLE=y
50
50
# CONFIG_HW_RANDOM is not set
-2
arch/arc/configs/nsim_hs_smp_defconfig
-2
arch/arc/configs/nsim_hs_smp_defconfig
···
1
1
# CONFIG_LOCALVERSION_AUTO is not set
2
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
3
2
# CONFIG_SWAP is not set
4
3
# CONFIG_CROSS_MEMORY_ATTACH is not set
5
4
CONFIG_HIGH_RES_TIMERS=y
···
43
44
# CONFIG_INPUT_MOUSE is not set
44
45
# CONFIG_SERIO is not set
45
46
# CONFIG_LEGACY_PTYS is not set
46
-
# CONFIG_DEVKMEM is not set
47
47
CONFIG_SERIAL_ARC=y
48
48
CONFIG_SERIAL_ARC_CONSOLE=y
49
49
# CONFIG_HW_RANDOM is not set
-2
arch/arc/configs/nsimosci_defconfig
-2
arch/arc/configs/nsimosci_defconfig
···
1
1
# CONFIG_LOCALVERSION_AUTO is not set
2
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
3
2
# CONFIG_SWAP is not set
4
3
CONFIG_SYSVIPC=y
5
4
# CONFIG_CROSS_MEMORY_ATTACH is not set
···
47
48
# CONFIG_SERIO_SERPORT is not set
48
49
CONFIG_SERIO_ARC_PS2=y
49
50
# CONFIG_LEGACY_PTYS is not set
50
-
# CONFIG_DEVKMEM is not set
51
51
CONFIG_SERIAL_8250=y
52
52
CONFIG_SERIAL_8250_CONSOLE=y
53
53
CONFIG_SERIAL_8250_NR_UARTS=1
-2
arch/arc/configs/nsimosci_hs_defconfig
-2
arch/arc/configs/nsimosci_hs_defconfig
···
1
1
# CONFIG_LOCALVERSION_AUTO is not set
2
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
3
2
# CONFIG_SWAP is not set
4
3
CONFIG_SYSVIPC=y
5
4
# CONFIG_CROSS_MEMORY_ATTACH is not set
···
46
47
# CONFIG_SERIO_SERPORT is not set
47
48
CONFIG_SERIO_ARC_PS2=y
48
49
# CONFIG_LEGACY_PTYS is not set
49
-
# CONFIG_DEVKMEM is not set
50
50
CONFIG_SERIAL_8250=y
51
51
CONFIG_SERIAL_8250_CONSOLE=y
52
52
CONFIG_SERIAL_8250_NR_UARTS=1
-2
arch/arc/configs/nsimosci_hs_smp_defconfig
-2
arch/arc/configs/nsimosci_hs_smp_defconfig
···
1
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
2
1
# CONFIG_SWAP is not set
3
2
CONFIG_SYSVIPC=y
4
3
# CONFIG_CROSS_MEMORY_ATTACH is not set
···
57
58
# CONFIG_SERIO_SERPORT is not set
58
59
CONFIG_SERIO_ARC_PS2=y
59
60
# CONFIG_LEGACY_PTYS is not set
60
-
# CONFIG_DEVKMEM is not set
61
61
CONFIG_SERIAL_8250=y
62
62
CONFIG_SERIAL_8250_CONSOLE=y
63
63
CONFIG_SERIAL_8250_NR_UARTS=1
-1
arch/arc/configs/tb10x_defconfig
-1
arch/arc/configs/tb10x_defconfig
-2
arch/arc/configs/vdk_hs38_defconfig
-2
arch/arc/configs/vdk_hs38_defconfig
···
1
1
# CONFIG_LOCALVERSION_AUTO is not set
2
-
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
3
2
# CONFIG_CROSS_MEMORY_ATTACH is not set
4
3
CONFIG_HIGH_RES_TIMERS=y
5
4
CONFIG_IKCONFIG=y
···
52
53
CONFIG_MOUSE_PS2_TOUCHKIT=y
53
54
CONFIG_SERIO_ARC_PS2=y
54
55
# CONFIG_LEGACY_PTYS is not set
55
-
# CONFIG_DEVKMEM is not set
56
56
CONFIG_SERIAL_8250=y
57
57
CONFIG_SERIAL_8250_CONSOLE=y
58
58
CONFIG_SERIAL_8250_DW=y
-1
arch/arc/configs/vdk_hs38_smp_defconfig
-1
arch/arc/configs/vdk_hs38_smp_defconfig
+1
-1
arch/arc/include/asm/atomic.h
+1
-1
arch/arc/include/asm/atomic.h
+13
arch/arc/include/asm/dma-mapping.h
+13
arch/arc/include/asm/dma-mapping.h
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
// (C) 2018 Synopsys, Inc. (www.synopsys.com)
3
+
4
+
#ifndef ASM_ARC_DMA_MAPPING_H
5
+
#define ASM_ARC_DMA_MAPPING_H
6
+
7
+
#include <asm-generic/dma-mapping.h>
8
+
9
+
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
10
+
const struct iommu_ops *iommu, bool coherent);
11
+
#define arch_setup_dma_ops arch_setup_dma_ops
12
+
13
+
#endif
+4
-9
arch/arc/kernel/troubleshoot.c
+4
-9
arch/arc/kernel/troubleshoot.c
···
83
83
static void show_faulting_vma(unsigned long address, char *buf)
84
84
{
85
85
struct vm_area_struct *vma;
86
-
struct inode *inode;
87
-
unsigned long ino = 0;
88
-
dev_t dev = 0;
89
86
char *nm = buf;
90
87
struct mm_struct *active_mm = current->active_mm;
91
88
···
96
99
* if the container VMA is not found
97
100
*/
98
101
if (vma && (vma->vm_start <= address)) {
99
-
struct file *file = vma->vm_file;
100
-
if (file) {
101
-
nm = file_path(file, buf, PAGE_SIZE - 1);
102
-
inode = file_inode(vma->vm_file);
103
-
dev = inode->i_sb->s_dev;
104
-
ino = inode->i_ino;
102
+
if (vma->vm_file) {
103
+
nm = file_path(vma->vm_file, buf, PAGE_SIZE - 1);
104
+
if (IS_ERR(nm))
105
+
nm = "?";
105
106
}
106
107
pr_info(" @off 0x%lx in [%s]\n"
107
108
" VMA: 0x%08lx to 0x%08lx\n",
+21
-15
arch/arc/mm/cache.c
+21
-15
arch/arc/mm/cache.c
···
65
65
66
66
n += scnprintf(buf + n, len - n, "Peripherals\t: %#lx%s%s\n",
67
67
perip_base,
68
-
IS_AVAIL3(ioc_exists, ioc_enable, ", IO-Coherency "));
68
+
IS_AVAIL3(ioc_exists, ioc_enable, ", IO-Coherency (per-device) "));
69
69
70
70
return buf;
71
71
}
···
897
897
}
898
898
899
899
/*
900
-
* DMA ops for systems with IOC
901
-
* IOC hardware snoops all DMA traffic keeping the caches consistent with
902
-
* memory - eliding need for any explicit cache maintenance of DMA buffers
903
-
*/
904
-
static void __dma_cache_wback_inv_ioc(phys_addr_t start, unsigned long sz) {}
905
-
static void __dma_cache_inv_ioc(phys_addr_t start, unsigned long sz) {}
906
-
static void __dma_cache_wback_ioc(phys_addr_t start, unsigned long sz) {}
907
-
908
-
/*
909
900
* Exported DMA API
910
901
*/
911
902
void dma_cache_wback_inv(phys_addr_t start, unsigned long sz)
···
1144
1153
{
1145
1154
unsigned int ioc_base, mem_sz;
1146
1155
1156
+
/*
1157
+
* As for today we don't support both IOC and ZONE_HIGHMEM enabled
1158
+
* simultaneously. This happens because as of today IOC aperture covers
1159
+
* only ZONE_NORMAL (low mem) and any dma transactions outside this
1160
+
* region won't be HW coherent.
1161
+
* If we want to use both IOC and ZONE_HIGHMEM we can use
1162
+
* bounce_buffer to handle dma transactions to HIGHMEM.
1163
+
* Also it is possible to modify dma_direct cache ops or increase IOC
1164
+
* aperture size if we are planning to use HIGHMEM without PAE.
1165
+
*/
1166
+
if (IS_ENABLED(CONFIG_HIGHMEM))
1167
+
panic("IOC and HIGHMEM can't be used simultaneously");
1168
+
1147
1169
/* Flush + invalidate + disable L1 dcache */
1148
1170
__dc_disable();
1149
1171
···
1268
1264
if (is_isa_arcv2() && ioc_enable)
1269
1265
arc_ioc_setup();
1270
1266
1271
-
if (is_isa_arcv2() && ioc_enable) {
1272
-
__dma_cache_wback_inv = __dma_cache_wback_inv_ioc;
1273
-
__dma_cache_inv = __dma_cache_inv_ioc;
1274
-
__dma_cache_wback = __dma_cache_wback_ioc;
1275
-
} else if (is_isa_arcv2() && l2_line_sz && slc_enable) {
1267
+
if (is_isa_arcv2() && l2_line_sz && slc_enable) {
1276
1268
__dma_cache_wback_inv = __dma_cache_wback_inv_slc;
1277
1269
__dma_cache_inv = __dma_cache_inv_slc;
1278
1270
__dma_cache_wback = __dma_cache_wback_slc;
···
1277
1277
__dma_cache_inv = __dma_cache_inv_l1;
1278
1278
__dma_cache_wback = __dma_cache_wback_l1;
1279
1279
}
1280
+
/*
1281
+
* In case of IOC (say IOC+SLC case), pointers above could still be set
1282
+
* but end up not being relevant as the first function in chain is not
1283
+
* called at all for @dma_direct_ops
1284
+
* arch_sync_dma_for_cpu() -> dma_cache_*() -> __dma_cache_*()
1285
+
*/
1280
1286
}
1281
1287
1282
1288
void __ref arc_cache_init(void)
+41
-41
arch/arc/mm/dma.c
+41
-41
arch/arc/mm/dma.c
···
6
6
* published by the Free Software Foundation.
7
7
*/
8
8
9
-
/*
10
-
* DMA Coherent API Notes
11
-
*
12
-
* I/O is inherently non-coherent on ARC. So a coherent DMA buffer is
13
-
* implemented by accessing it using a kernel virtual address, with
14
-
* Cache bit off in the TLB entry.
15
-
*
16
-
* The default DMA address == Phy address which is 0x8000_0000 based.
17
-
*/
18
-
19
9
#include <linux/dma-noncoherent.h>
20
10
#include <asm/cache.h>
21
11
#include <asm/cacheflush.h>
22
12
13
+
/*
14
+
* ARCH specific callbacks for generic noncoherent DMA ops (dma/noncoherent.c)
15
+
* - hardware IOC not available (or "dma-coherent" not set for device in DT)
16
+
* - But still handle both coherent and non-coherent requests from caller
17
+
*
18
+
* For DMA coherent hardware (IOC) generic code suffices
19
+
*/
23
20
void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
24
21
gfp_t gfp, unsigned long attrs)
25
22
{
···
24
27
struct page *page;
25
28
phys_addr_t paddr;
26
29
void *kvaddr;
27
-
int need_coh = 1, need_kvaddr = 0;
30
+
bool need_coh = !(attrs & DMA_ATTR_NON_CONSISTENT);
31
+
32
+
/*
33
+
* __GFP_HIGHMEM flag is cleared by upper layer functions
34
+
* (in include/linux/dma-mapping.h) so we should never get a
35
+
* __GFP_HIGHMEM here.
36
+
*/
37
+
BUG_ON(gfp & __GFP_HIGHMEM);
28
38
29
39
page = alloc_pages(gfp, order);
30
40
if (!page)
31
41
return NULL;
32
-
33
-
/*
34
-
* IOC relies on all data (even coherent DMA data) being in cache
35
-
* Thus allocate normal cached memory
36
-
*
37
-
* The gains with IOC are two pronged:
38
-
* -For streaming data, elides need for cache maintenance, saving
39
-
* cycles in flush code, and bus bandwidth as all the lines of a
40
-
* buffer need to be flushed out to memory
41
-
* -For coherent data, Read/Write to buffers terminate early in cache
42
-
* (vs. always going to memory - thus are faster)
43
-
*/
44
-
if ((is_isa_arcv2() && ioc_enable) ||
45
-
(attrs & DMA_ATTR_NON_CONSISTENT))
46
-
need_coh = 0;
47
-
48
-
/*
49
-
* - A coherent buffer needs MMU mapping to enforce non-cachability
50
-
* - A highmem page needs a virtual handle (hence MMU mapping)
51
-
* independent of cachability
52
-
*/
53
-
if (PageHighMem(page) || need_coh)
54
-
need_kvaddr = 1;
55
42
56
43
/* This is linear addr (0x8000_0000 based) */
57
44
paddr = page_to_phys(page);
58
45
59
46
*dma_handle = paddr;
60
47
61
-
/* This is kernel Virtual address (0x7000_0000 based) */
62
-
if (need_kvaddr) {
48
+
/*
49
+
* A coherent buffer needs MMU mapping to enforce non-cachability.
50
+
* kvaddr is kernel Virtual address (0x7000_0000 based).
51
+
*/
52
+
if (need_coh) {
63
53
kvaddr = ioremap_nocache(paddr, size);
64
54
if (kvaddr == NULL) {
65
55
__free_pages(page, order);
···
77
93
{
78
94
phys_addr_t paddr = dma_handle;
79
95
struct page *page = virt_to_page(paddr);
80
-
int is_non_coh = 1;
81
96
82
-
is_non_coh = (attrs & DMA_ATTR_NON_CONSISTENT) ||
83
-
(is_isa_arcv2() && ioc_enable);
84
-
85
-
if (PageHighMem(page) || !is_non_coh)
97
+
if (!(attrs & DMA_ATTR_NON_CONSISTENT))
86
98
iounmap((void __force __iomem *)vaddr);
87
99
88
100
__free_pages(page, get_order(size));
···
163
183
164
184
default:
165
185
break;
186
+
}
187
+
}
188
+
189
+
/*
190
+
* Plug in coherent or noncoherent dma ops
191
+
*/
192
+
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
193
+
const struct iommu_ops *iommu, bool coherent)
194
+
{
195
+
/*
196
+
* IOC hardware snoops all DMA traffic keeping the caches consistent
197
+
* with memory - eliding need for any explicit cache maintenance of
198
+
* DMA buffers - so we can use dma_direct cache ops.
199
+
*/
200
+
if (is_isa_arcv2() && ioc_enable && coherent) {
201
+
set_dma_ops(dev, &dma_direct_ops);
202
+
dev_info(dev, "use dma_direct_ops cache ops\n");
203
+
} else {
204
+
set_dma_ops(dev, &dma_noncoherent_ops);
205
+
dev_info(dev, "use dma_noncoherent_ops cache ops\n");
166
206
}
167
207
}