tjh.dev / kernel
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drm/i915/display: change pipe allocation order for discrete platforms

When big joiner is enabled, it reserves the adjacent pipe as the
secondary pipe. This happens without the user space knowing, and
subsequent attempts at using the CRTC with that pipe will fail. If the
user space does not have a coping mechanism, i.e. trying another CRTC,
this leads to a black screen.

Try to reduce the impact of the problem on discrete platforms by mapping
the CRTCs to pipes in order A, C, B, and D. If the user space reserves
CRTCs in order, this should trick it to using pipes that are more likely
to be available for and after joining.

Limit this to discrete platforms, which have four pipes, and no eDP, a
combination that should benefit the most with least drawbacks.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260413081609.969342-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Jani Nikula 2c683e9b f49499e6

+26 -3
+26 -3
drivers/gpu/drm/i915/display/intel_crtc.c
··· 411 411 412 412 cpu_latency_qos_add_request(&crtc->vblank_pm_qos, PM_QOS_DEFAULT_VALUE); 413 413 414 - drm_WARN_ON(display->drm, drm_crtc_index(&crtc->base) != crtc->pipe); 415 - 416 414 if (HAS_CASF(display) && crtc->num_scalers >= 2) 417 415 drm_crtc_create_sharpness_strength_property(&crtc->base); 418 416 ··· 424 426 return ret; 425 427 } 426 428 429 + #define HAS_PIPE(display, pipe) (DISPLAY_RUNTIME_INFO(display)->pipe_mask & BIT(pipe)) 430 + 431 + /* 432 + * Expose the pipes in order A, C, B, D on discrete platforms to trick user 433 + * space into using pipes that are more likely to be available for both a) user 434 + * space if pipe B has been reserved for the joiner, and b) the joiner if pipe A 435 + * doesn't need the joiner. 436 + * 437 + * Swap pipes B and C only if both are available i.e. not fused off. 438 + */ 439 + static enum pipe reorder_pipe(struct intel_display *display, enum pipe pipe) 440 + { 441 + if (!display->platform.dgfx || !HAS_PIPE(display, PIPE_B) || !HAS_PIPE(display, PIPE_C)) 442 + return pipe; 443 + 444 + switch (pipe) { 445 + case PIPE_B: 446 + return PIPE_C; 447 + case PIPE_C: 448 + return PIPE_B; 449 + default: 450 + return pipe; 451 + } 452 + } 453 + 427 454 int intel_crtc_init(struct intel_display *display) 428 455 { 429 456 enum pipe pipe; ··· 458 435 INTEL_NUM_PIPES(display), str_plural(INTEL_NUM_PIPES(display))); 459 436 460 437 for_each_pipe(display, pipe) { 461 - ret = __intel_crtc_init(display, pipe); 438 + ret = __intel_crtc_init(display, reorder_pipe(display, pipe)); 462 439 if (ret) 463 440 return ret; 464 441 }