Merge tag 'ata-6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/libata/linux

+5

Documentation/admin-guide/kernel-parameters.txt

··· 3468 3468 * [no]logdir: Enable or disable access to the general 3469 3469 purpose log directory. 3470 3470 3471 + * max_sec=<sectors>: Set the transfer size limit, in 3472 + number of 512-byte sectors, to the value specified in 3473 + <sectors>. The value specified in <sectors> has to be 3474 + a non-zero positive integer. 3475 + 3471 3476 * max_sec_128: Set transfer size limit to 128 sectors. 3472 3477 3473 3478 * max_sec_1024: Set or clear transfer size limit to

-20

Documentation/devicetree/bindings/ata/ahci-platform.yaml

··· 18 18 - Hans de Goede <hdegoede@redhat.com> 19 19 - Jens Axboe <axboe@kernel.dk> 20 20 21 - select: 22 - properties: 23 - compatible: 24 - contains: 25 - enum: 26 - - brcm,iproc-ahci 27 - - cavium,octeon-7130-ahci 28 - - hisilicon,hisi-ahci 29 - - ibm,476gtr-ahci 30 - - marvell,armada-3700-ahci 31 - - marvell,armada-8k-ahci 32 - - marvell,berlin2q-ahci 33 - - qcom,apq8064-ahci 34 - - qcom,ipq806x-ahci 35 - - socionext,uniphier-pro4-ahci 36 - - socionext,uniphier-pxs2-ahci 37 - - socionext,uniphier-pxs3-ahci 38 - required: 39 - - compatible 40 - 41 21 properties: 42 22 compatible: 43 23 oneOf:

+3

Documentation/devicetree/bindings/ata/sata-common.yaml

··· 54 54 each port can have a Port Multiplier attached thus allowing to 55 55 access more than one drive by means of a single SATA port. 56 56 57 + port: 58 + $ref: /schemas/graph.yaml#/properties/port 59 + 57 60 ...

+1 -16

drivers/ata/Kconfig

··· 1127 1127 1128 1128 If unsure, say N. 1129 1129 1130 - config PATA_QDI 1131 - tristate "QDI VLB PATA support" 1132 - depends on ISA 1133 - select PATA_LEGACY 1134 - help 1135 - Support for QDI 6500 and 6580 PATA controllers on VESA local bus. 1136 - 1137 1130 config PATA_RB532 1138 1131 tristate "RouterBoard 532 PATA CompactFlash support" 1139 1132 depends on MIKROTIK_RB532 ··· 1144 1151 PATA controllers via the new ATA layer 1145 1152 1146 1153 If unsure, say N. 1147 - 1148 - config PATA_WINBOND_VLB 1149 - tristate "Winbond W83759A VLB PATA support (Experimental)" 1150 - depends on ISA 1151 - select PATA_LEGACY 1152 - help 1153 - Support for the Winbond W83759A controller on Vesa Local Bus 1154 - systems. 1155 1154 1156 1155 config PATA_PARPORT 1157 1156 tristate "Parallel port IDE device support" ··· 1186 1201 depends on (ISA || PCI) && HAS_IOPORT 1187 1202 select PATA_TIMINGS 1188 1203 help 1189 - This option enables support for ISA/VLB/PCI bus legacy PATA 1204 + This option enables support for ISA/PCI bus legacy PATA 1190 1205 ports and allows them to be accessed via the new ATA layer. 1191 1206 1192 1207 If unsure, say N.

+2 -8

drivers/ata/ahci_dwc.c

··· 260 260 static int ahci_dwc_init_dmacr(struct ahci_host_priv *hpriv) 261 261 { 262 262 struct ahci_dwc_host_priv *dpriv = hpriv->plat_data; 263 - struct device_node *child; 264 263 void __iomem *port_mmio; 265 264 u32 port, dmacr, ts; 266 265 ··· 270 271 * the HBA global reset so we can freely initialize it once until the 271 272 * next system reset. 272 273 */ 273 - for_each_child_of_node(dpriv->pdev->dev.of_node, child) { 274 - if (!of_device_is_available(child)) 275 - continue; 276 - 277 - if (of_property_read_u32(child, "reg", &port)) { 278 - of_node_put(child); 274 + for_each_available_child_of_node_scoped(dpriv->pdev->dev.of_node, child) { 275 + if (of_property_read_u32(child, "reg", &port)) 279 276 return -EINVAL; 280 - } 281 277 282 278 port_mmio = __ahci_port_base(hpriv, port); 283 279 dmacr = readl(port_mmio + AHCI_DWC_PORT_DMACR);

+1 -1

drivers/ata/ahci_imx.c

··· 869 869 imxpriv->ahci_pdev = pdev; 870 870 imxpriv->no_device = false; 871 871 imxpriv->first_time = true; 872 - imxpriv->type = (enum ahci_imx_type)device_get_match_data(dev); 872 + imxpriv->type = (unsigned long)device_get_match_data(dev); 873 873 874 874 imxpriv->sata_clk = devm_clk_get(dev, "sata"); 875 875 if (IS_ERR(imxpriv->sata_clk)) {

+1 -1

drivers/ata/ahci_xgene.c

··· 773 773 } 774 774 775 775 if (dev->of_node) { 776 - version = (enum xgene_ahci_version)of_device_get_match_data(dev); 776 + version = (unsigned long)of_device_get_match_data(dev); 777 777 } 778 778 #ifdef CONFIG_ACPI 779 779 else {

+187 -54

drivers/ata/libata-core.c

··· 76 76 u16 heads, u16 sectors); 77 77 static unsigned int ata_dev_set_xfermode(struct ata_device *dev); 78 78 static void ata_dev_xfermask(struct ata_device *dev); 79 - static unsigned int ata_dev_quirks(const struct ata_device *dev); 79 + static u64 ata_dev_quirks(const struct ata_device *dev); 80 + static u64 ata_dev_get_quirk_value(struct ata_device *dev, u64 quirk); 80 81 81 82 static DEFINE_IDA(ata_ida); 82 83 83 84 #ifdef CONFIG_ATA_FORCE 84 85 struct ata_force_param { 85 86 const char *name; 87 + u64 value; 86 88 u8 cbl; 87 89 u8 spd_limit; 88 90 unsigned int xfer_mask; 89 - unsigned int quirk_on; 90 - unsigned int quirk_off; 91 + u64 quirk_on; 92 + u64 quirk_off; 91 93 unsigned int pflags_on; 92 94 u16 lflags_on; 93 95 u16 lflags_off; ··· 475 473 } 476 474 } 477 475 476 + static const struct ata_force_ent * 477 + ata_force_get_fe_for_dev(struct ata_device *dev) 478 + { 479 + const struct ata_force_ent *fe; 480 + int devno = dev->link->pmp + dev->devno; 481 + int alt_devno = devno; 482 + int i; 483 + 484 + /* allow n.15/16 for devices attached to host port */ 485 + if (ata_is_host_link(dev->link)) 486 + alt_devno += 15; 487 + 488 + for (i = 0; i < ata_force_tbl_size; i++) { 489 + fe = &ata_force_tbl[i]; 490 + if (fe->port != -1 && fe->port != dev->link->ap->print_id) 491 + continue; 492 + 493 + if (fe->device != -1 && fe->device != devno && 494 + fe->device != alt_devno) 495 + continue; 496 + 497 + return fe; 498 + } 499 + 500 + return NULL; 501 + } 502 + 478 503 /** 479 504 * ata_force_quirks - force quirks according to libata.force 480 505 * @dev: ATA device of interest ··· 515 486 */ 516 487 static void ata_force_quirks(struct ata_device *dev) 517 488 { 518 - int devno = dev->link->pmp + dev->devno; 519 - int alt_devno = devno; 520 - int i; 489 + const struct ata_force_ent *fe = ata_force_get_fe_for_dev(dev); 521 490 522 - /* allow n.15/16 for devices attached to host port */ 523 - if (ata_is_host_link(dev->link)) 524 - alt_devno += 15; 491 + if (!fe) 492 + return; 525 493 526 - for (i = 0; i < ata_force_tbl_size; i++) { 527 - const struct ata_force_ent *fe = &ata_force_tbl[i]; 494 + if (!(~dev->quirks & fe->param.quirk_on) && 495 + !(dev->quirks & fe->param.quirk_off)) 496 + return; 528 497 529 - if (fe->port != -1 && fe->port != dev->link->ap->print_id) 530 - continue; 498 + dev->quirks |= fe->param.quirk_on; 499 + dev->quirks &= ~fe->param.quirk_off; 531 500 532 - if (fe->device != -1 && fe->device != devno && 533 - fe->device != alt_devno) 534 - continue; 535 - 536 - if (!(~dev->quirks & fe->param.quirk_on) && 537 - !(dev->quirks & fe->param.quirk_off)) 538 - continue; 539 - 540 - dev->quirks |= fe->param.quirk_on; 541 - dev->quirks &= ~fe->param.quirk_off; 542 - 543 - ata_dev_notice(dev, "FORCE: modified (%s)\n", 544 - fe->param.name); 545 - } 501 + ata_dev_notice(dev, "FORCE: modified (%s)\n", fe->param.name); 546 502 } 547 503 #else 548 504 static inline void ata_force_pflags(struct ata_port *ap) { } ··· 2372 2358 return false; 2373 2359 } 2374 2360 2361 + bool ata_adapter_is_online(struct ata_port *ap) 2362 + { 2363 + struct device *dev; 2364 + 2365 + if (!ap || !ap->host) 2366 + return false; 2367 + 2368 + dev = ap->host->dev; 2369 + if (!dev) 2370 + return false; 2371 + 2372 + if (dev_is_pci(dev) && 2373 + pci_channel_offline(to_pci_dev(dev))) 2374 + return false; 2375 + 2376 + return true; 2377 + } 2378 + 2375 2379 static int ata_dev_config_ncq(struct ata_device *dev, 2376 2380 char *desc, size_t desc_sz) 2377 2381 { ··· 3176 3144 dev->quirks |= ATA_QUIRK_STUCK_ERR; 3177 3145 } 3178 3146 3179 - if (dev->quirks & ATA_QUIRK_MAX_SEC_128) 3180 - dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128, 3181 - dev->max_sectors); 3182 - 3183 - if (dev->quirks & ATA_QUIRK_MAX_SEC_1024) 3184 - dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_1024, 3185 - dev->max_sectors); 3186 - 3187 - if (dev->quirks & ATA_QUIRK_MAX_SEC_8191) 3188 - dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_8191, 3189 - dev->max_sectors); 3147 + if (dev->quirks & ATA_QUIRK_MAX_SEC) 3148 + dev->max_sectors = min_t(unsigned int, dev->max_sectors, 3149 + ata_dev_get_quirk_value(dev, 3150 + ATA_QUIRK_MAX_SEC)); 3190 3151 3191 3152 if (dev->quirks & ATA_QUIRK_MAX_SEC_LBA48) 3192 3153 dev->max_sectors = ATA_MAX_SECTORS_LBA48; ··· 4011 3986 [__ATA_QUIRK_DIAGNOSTIC] = "diagnostic", 4012 3987 [__ATA_QUIRK_NODMA] = "nodma", 4013 3988 [__ATA_QUIRK_NONCQ] = "noncq", 4014 - [__ATA_QUIRK_MAX_SEC_128] = "maxsec128", 4015 3989 [__ATA_QUIRK_BROKEN_HPA] = "brokenhpa", 4016 3990 [__ATA_QUIRK_DISABLE] = "disable", 4017 3991 [__ATA_QUIRK_HPA_SIZE] = "hpasize", ··· 4031 4007 [__ATA_QUIRK_ZERO_AFTER_TRIM] = "zeroaftertrim", 4032 4008 [__ATA_QUIRK_NO_DMA_LOG] = "nodmalog", 4033 4009 [__ATA_QUIRK_NOTRIM] = "notrim", 4034 - [__ATA_QUIRK_MAX_SEC_1024] = "maxsec1024", 4035 - [__ATA_QUIRK_MAX_SEC_8191] = "maxsec8191", 4010 + [__ATA_QUIRK_MAX_SEC] = "maxsec", 4036 4011 [__ATA_QUIRK_MAX_TRIM_128M] = "maxtrim128m", 4037 4012 [__ATA_QUIRK_NO_NCQ_ON_ATI] = "noncqonati", 4038 4013 [__ATA_QUIRK_NO_LPM_ON_ATI] = "nolpmonati", ··· 4076 4053 kfree(str); 4077 4054 } 4078 4055 4056 + struct ata_dev_quirk_value { 4057 + const char *model_num; 4058 + const char *model_rev; 4059 + u64 val; 4060 + }; 4061 + 4062 + static const struct ata_dev_quirk_value __ata_dev_max_sec_quirks[] = { 4063 + { "TORiSAN DVD-ROM DRD-N216", NULL, 128 }, 4064 + { "ST380013AS", "3.20", 1024 }, 4065 + { "LITEON CX1-JB*-HP", NULL, 1024 }, 4066 + { "LITEON EP1-*", NULL, 1024 }, 4067 + { "DELLBOSS VD", "MV.R00-0", 8191 }, 4068 + { "INTEL SSDSC2KG480G8", "XCV10120", 8191 }, 4069 + { }, 4070 + }; 4071 + 4079 4072 struct ata_dev_quirks_entry { 4080 4073 const char *model_num; 4081 4074 const char *model_rev; 4082 - unsigned int quirks; 4075 + u64 quirks; 4083 4076 }; 4084 4077 4085 4078 static const struct ata_dev_quirks_entry __ata_dev_quirks[] = { ··· 4136 4097 { "ASMT109x- Config", NULL, ATA_QUIRK_DISABLE }, 4137 4098 4138 4099 /* Weird ATAPI devices */ 4139 - { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_QUIRK_MAX_SEC_128 }, 4100 + { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_QUIRK_MAX_SEC }, 4140 4101 { "QUANTUM DAT DAT72-000", NULL, ATA_QUIRK_ATAPI_MOD16_DMA }, 4141 4102 { "Slimtype DVD A DS8A8SH", NULL, ATA_QUIRK_MAX_SEC_LBA48 }, 4142 4103 { "Slimtype DVD A DS8A9SH", NULL, ATA_QUIRK_MAX_SEC_LBA48 }, ··· 4145 4106 * Causes silent data corruption with higher max sects. 4146 4107 * http://lkml.kernel.org/g/x49wpy40ysk.fsf@segfault.boston.devel.redhat.com 4147 4108 */ 4148 - { "ST380013AS", "3.20", ATA_QUIRK_MAX_SEC_1024 }, 4109 + { "ST380013AS", "3.20", ATA_QUIRK_MAX_SEC }, 4149 4110 4150 4111 /* 4151 4112 * These devices time out with higher max sects. 4152 4113 * https://bugzilla.kernel.org/show_bug.cgi?id=121671 4153 4114 */ 4154 - { "LITEON CX1-JB*-HP", NULL, ATA_QUIRK_MAX_SEC_1024 }, 4155 - { "LITEON EP1-*", NULL, ATA_QUIRK_MAX_SEC_1024 }, 4115 + { "LITEON CX1-JB*-HP", NULL, ATA_QUIRK_MAX_SEC }, 4116 + { "LITEON EP1-*", NULL, ATA_QUIRK_MAX_SEC }, 4156 4117 4157 4118 /* 4158 4119 * These devices time out with higher max sects. 4159 4120 * https://bugzilla.kernel.org/show_bug.cgi?id=220693 4160 4121 */ 4161 - { "DELLBOSS VD", "MV.R00-0", ATA_QUIRK_MAX_SEC_8191 }, 4122 + { "DELLBOSS VD", "MV.R00-0", ATA_QUIRK_MAX_SEC }, 4162 4123 4163 4124 /* Devices we expect to fail diagnostics */ 4164 4125 ··· 4346 4307 4347 4308 { "Micron*", NULL, ATA_QUIRK_ZERO_AFTER_TRIM }, 4348 4309 { "Crucial*", NULL, ATA_QUIRK_ZERO_AFTER_TRIM }, 4310 + { "INTEL SSDSC2KG480G8", "XCV10120", ATA_QUIRK_ZERO_AFTER_TRIM | 4311 + ATA_QUIRK_MAX_SEC }, 4349 4312 { "INTEL*SSD*", NULL, ATA_QUIRK_ZERO_AFTER_TRIM }, 4350 4313 { "SSD*INTEL*", NULL, ATA_QUIRK_ZERO_AFTER_TRIM }, 4351 4314 { "Samsung*SSD*", NULL, ATA_QUIRK_ZERO_AFTER_TRIM }, ··· 4389 4348 { } 4390 4349 }; 4391 4350 4392 - static unsigned int ata_dev_quirks(const struct ata_device *dev) 4351 + static u64 ata_dev_quirks(const struct ata_device *dev) 4393 4352 { 4394 4353 unsigned char model_num[ATA_ID_PROD_LEN + 1]; 4395 4354 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1]; 4396 4355 const struct ata_dev_quirks_entry *ad = __ata_dev_quirks; 4397 4356 4398 - /* dev->quirks is an unsigned int. */ 4399 - BUILD_BUG_ON(__ATA_QUIRK_MAX > 32); 4357 + /* dev->quirks is an u64. */ 4358 + BUILD_BUG_ON(__ATA_QUIRK_MAX > 64); 4400 4359 4401 4360 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 4402 4361 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev)); ··· 4410 4369 } 4411 4370 ad++; 4412 4371 } 4372 + return 0; 4373 + } 4374 + 4375 + static u64 ata_dev_get_max_sec_quirk_value(struct ata_device *dev) 4376 + { 4377 + unsigned char model_num[ATA_ID_PROD_LEN + 1]; 4378 + unsigned char model_rev[ATA_ID_FW_REV_LEN + 1]; 4379 + const struct ata_dev_quirk_value *ad = __ata_dev_max_sec_quirks; 4380 + u64 val = 0; 4381 + 4382 + #ifdef CONFIG_ATA_FORCE 4383 + const struct ata_force_ent *fe = ata_force_get_fe_for_dev(dev); 4384 + if (fe && (fe->param.quirk_on & ATA_QUIRK_MAX_SEC) && fe->param.value) 4385 + val = fe->param.value; 4386 + #endif 4387 + if (val) 4388 + goto out; 4389 + 4390 + ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 4391 + ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev)); 4392 + 4393 + while (ad->model_num) { 4394 + if (glob_match(ad->model_num, model_num) && 4395 + (!ad->model_rev || glob_match(ad->model_rev, model_rev))) { 4396 + val = ad->val; 4397 + break; 4398 + } 4399 + ad++; 4400 + } 4401 + 4402 + out: 4403 + ata_dev_warn(dev, "%s quirk is using value: %llu\n", 4404 + ata_quirk_names[__ATA_QUIRK_MAX_SEC], val); 4405 + 4406 + return val; 4407 + } 4408 + 4409 + static u64 ata_dev_get_quirk_value(struct ata_device *dev, u64 quirk) 4410 + { 4411 + if (quirk == ATA_QUIRK_MAX_SEC) 4412 + return ata_dev_get_max_sec_quirk_value(dev); 4413 + 4413 4414 return 0; 4414 4415 } 4415 4416 ··· 5165 5082 qc->flags |= ATA_QCFLAG_ACTIVE; 5166 5083 ap->qc_active |= 1ULL << qc->tag; 5167 5084 5085 + /* Make sure the device is still accessible. */ 5086 + if (!ata_adapter_is_online(ap)) { 5087 + qc->err_mask |= AC_ERR_HOST_BUS; 5088 + goto sys_err; 5089 + } 5090 + 5168 5091 /* 5169 5092 * We guarantee to LLDs that they will have at least one 5170 5093 * non-zero sg if the command is a data command. ··· 5656 5567 mutex_init(&ap->scsi_scan_mutex); 5657 5568 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); 5658 5569 INIT_DELAYED_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); 5570 + INIT_WORK(&ap->deferred_qc_work, ata_scsi_deferred_qc_work); 5659 5571 INIT_LIST_HEAD(&ap->eh_done_q); 5660 5572 init_waitqueue_head(&ap->eh_wait_q); 5661 5573 init_completion(&ap->park_req_pending); ··· 6269 6179 } 6270 6180 } 6271 6181 6182 + /* Make sure the deferred qc work finished. */ 6183 + cancel_work_sync(&ap->deferred_qc_work); 6184 + WARN_ON(ap->deferred_qc); 6185 + 6272 6186 /* Tell EH to disable all devices */ 6273 6187 ap->pflags |= ATA_PFLAG_UNLOADING; 6274 6188 ata_port_schedule_eh(ap); ··· 6499 6405 #define force_quirk_on(name, flag) \ 6500 6406 { #name, .quirk_on = (flag) } 6501 6407 6408 + #define force_quirk_val(name, flag, val) \ 6409 + { #name, .quirk_on = (flag), \ 6410 + .value = (val) } 6411 + 6502 6412 #define force_quirk_onoff(name, flag) \ 6503 6413 { "no" #name, .quirk_on = (flag) }, \ 6504 6414 { #name, .quirk_off = (flag) } 6505 6415 6416 + /* 6417 + * If the ata_force_param struct member 'name' ends with '=', then the value 6418 + * after the equal sign will be parsed as an u64, and will be saved in the 6419 + * ata_force_param struct member 'value'. This works because each libata.force 6420 + * entry (struct ata_force_ent) is separated by commas, so each entry represents 6421 + * a single quirk, and can thus only have a single value. 6422 + */ 6506 6423 static const struct ata_force_param force_tbl[] __initconst = { 6507 6424 force_cbl(40c, ATA_CBL_PATA40), 6508 6425 force_cbl(80c, ATA_CBL_PATA80), ··· 6584 6479 force_quirk_onoff(iddevlog, ATA_QUIRK_NO_ID_DEV_LOG), 6585 6480 force_quirk_onoff(logdir, ATA_QUIRK_NO_LOG_DIR), 6586 6481 6587 - force_quirk_on(max_sec_128, ATA_QUIRK_MAX_SEC_128), 6588 - force_quirk_on(max_sec_1024, ATA_QUIRK_MAX_SEC_1024), 6482 + force_quirk_val(max_sec_128, ATA_QUIRK_MAX_SEC, 128), 6483 + force_quirk_val(max_sec_1024, ATA_QUIRK_MAX_SEC, 1024), 6484 + force_quirk_on(max_sec=, ATA_QUIRK_MAX_SEC), 6589 6485 force_quirk_on(max_sec_lba48, ATA_QUIRK_MAX_SEC_LBA48), 6590 6486 6591 6487 force_quirk_onoff(lpm, ATA_QUIRK_NOLPM), ··· 6602 6496 const char **reason) 6603 6497 { 6604 6498 char *start = *cur, *p = *cur; 6605 - char *id, *val, *endp; 6499 + char *id, *val, *endp, *equalsign, *char_after_equalsign; 6606 6500 const struct ata_force_param *match_fp = NULL; 6501 + u64 val_after_equalsign; 6607 6502 int nr_matches = 0, i; 6608 6503 6609 6504 /* find where this param ends and update *cur */ ··· 6647 6540 } 6648 6541 6649 6542 parse_val: 6650 - /* parse val, allow shortcuts so that both 1.5 and 1.5Gbps work */ 6543 + equalsign = strchr(val, '='); 6544 + if (equalsign) { 6545 + char_after_equalsign = equalsign + 1; 6546 + if (!strlen(char_after_equalsign) || 6547 + kstrtoull(char_after_equalsign, 10, &val_after_equalsign)) { 6548 + *reason = "invalid value after equal sign"; 6549 + return -EINVAL; 6550 + } 6551 + } 6552 + 6553 + /* Parse the parameter value. */ 6651 6554 for (i = 0; i < ARRAY_SIZE(force_tbl); i++) { 6652 6555 const struct ata_force_param *fp = &force_tbl[i]; 6653 6556 6557 + /* 6558 + * If val contains equal sign, match has to be exact, i.e. 6559 + * shortcuts are not supported. 6560 + */ 6561 + if (equalsign && 6562 + (strncasecmp(val, fp->name, 6563 + char_after_equalsign - val) == 0)) { 6564 + force_ent->param = *fp; 6565 + force_ent->param.value = val_after_equalsign; 6566 + return 0; 6567 + } 6568 + 6569 + /* 6570 + * If val does not contain equal sign, allow shortcuts so that 6571 + * both 1.5 and 1.5Gbps work. 6572 + */ 6654 6573 if (strncasecmp(val, fp->name, strlen(val))) 6655 6574 continue; 6656 6575

+8 -1

drivers/ata/libata-eh.c

··· 736 736 spin_unlock_irqrestore(ap->lock, flags); 737 737 738 738 /* invoke EH, skip if unloading or suspended */ 739 - if (!(ap->pflags & (ATA_PFLAG_UNLOADING | ATA_PFLAG_SUSPENDED))) 739 + if (!(ap->pflags & (ATA_PFLAG_UNLOADING | ATA_PFLAG_SUSPENDED)) && 740 + ata_adapter_is_online(ap)) 740 741 ap->ops->error_handler(ap); 741 742 else { 742 743 /* if unloading, commence suicide */ ··· 917 916 return; 918 917 919 918 ap->pflags |= ATA_PFLAG_EH_PENDING; 919 + 920 + /* 921 + * If we have a deferred qc, requeue it so that it is retried once EH 922 + * completes. 923 + */ 924 + ata_scsi_requeue_deferred_qc(ap); 920 925 921 926 if (!fastdrain) 922 927 return;

+148 -34

drivers/ata/libata-scsi.c

··· 1658 1658 done(cmd); 1659 1659 } 1660 1660 1661 + void ata_scsi_deferred_qc_work(struct work_struct *work) 1662 + { 1663 + struct ata_port *ap = 1664 + container_of(work, struct ata_port, deferred_qc_work); 1665 + struct ata_queued_cmd *qc; 1666 + unsigned long flags; 1667 + 1668 + spin_lock_irqsave(ap->lock, flags); 1669 + 1670 + /* 1671 + * If we still have a deferred qc and we are not in EH, issue it. In 1672 + * such case, we should not need any more deferring the qc, so warn if 1673 + * qc_defer() says otherwise. 1674 + */ 1675 + qc = ap->deferred_qc; 1676 + if (qc && !ata_port_eh_scheduled(ap)) { 1677 + WARN_ON_ONCE(ap->ops->qc_defer(qc)); 1678 + ap->deferred_qc = NULL; 1679 + ata_qc_issue(qc); 1680 + } 1681 + 1682 + spin_unlock_irqrestore(ap->lock, flags); 1683 + } 1684 + 1685 + void ata_scsi_requeue_deferred_qc(struct ata_port *ap) 1686 + { 1687 + struct ata_queued_cmd *qc = ap->deferred_qc; 1688 + struct scsi_cmnd *scmd; 1689 + 1690 + lockdep_assert_held(ap->lock); 1691 + 1692 + /* 1693 + * If we have a deferred qc when a reset occurs or NCQ commands fail, 1694 + * do not try to be smart about what to do with this deferred command 1695 + * and simply retry it by completing it with DID_SOFT_ERROR. 1696 + */ 1697 + if (!qc) 1698 + return; 1699 + 1700 + scmd = qc->scsicmd; 1701 + ap->deferred_qc = NULL; 1702 + ata_qc_free(qc); 1703 + scmd->result = (DID_SOFT_ERROR << 16); 1704 + scsi_done(scmd); 1705 + } 1706 + 1707 + static void ata_scsi_schedule_deferred_qc(struct ata_port *ap) 1708 + { 1709 + struct ata_queued_cmd *qc = ap->deferred_qc; 1710 + 1711 + lockdep_assert_held(ap->lock); 1712 + 1713 + /* 1714 + * If we have a deferred qc, then qc_defer() is defined and we can use 1715 + * this callback to determine if this qc is good to go, unless EH has 1716 + * been scheduled. 1717 + */ 1718 + if (!qc) 1719 + return; 1720 + 1721 + if (ata_port_eh_scheduled(ap)) { 1722 + ata_scsi_requeue_deferred_qc(ap); 1723 + return; 1724 + } 1725 + if (!ap->ops->qc_defer(qc)) 1726 + queue_work(system_highpri_wq, &ap->deferred_qc_work); 1727 + } 1728 + 1661 1729 static void ata_scsi_qc_complete(struct ata_queued_cmd *qc) 1662 1730 { 1731 + struct ata_port *ap = qc->ap; 1663 1732 struct scsi_cmnd *cmd = qc->scsicmd; 1664 1733 u8 *cdb = cmd->cmnd; 1665 1734 bool have_sense = qc->flags & ATA_QCFLAG_SENSE_VALID; ··· 1758 1689 } 1759 1690 1760 1691 ata_qc_done(qc); 1692 + 1693 + ata_scsi_schedule_deferred_qc(ap); 1694 + } 1695 + 1696 + static int ata_scsi_qc_issue(struct ata_port *ap, struct ata_queued_cmd *qc) 1697 + { 1698 + int ret; 1699 + 1700 + if (!ap->ops->qc_defer) 1701 + goto issue; 1702 + 1703 + /* 1704 + * If we already have a deferred qc, then rely on the SCSI layer to 1705 + * requeue and defer all incoming commands until the deferred qc is 1706 + * processed, once all on-going commands complete. 1707 + */ 1708 + if (ap->deferred_qc) { 1709 + ata_qc_free(qc); 1710 + return SCSI_MLQUEUE_DEVICE_BUSY; 1711 + } 1712 + 1713 + /* Check if the command needs to be deferred. */ 1714 + ret = ap->ops->qc_defer(qc); 1715 + switch (ret) { 1716 + case 0: 1717 + break; 1718 + case ATA_DEFER_LINK: 1719 + ret = SCSI_MLQUEUE_DEVICE_BUSY; 1720 + break; 1721 + case ATA_DEFER_PORT: 1722 + ret = SCSI_MLQUEUE_HOST_BUSY; 1723 + break; 1724 + default: 1725 + WARN_ON_ONCE(1); 1726 + ret = SCSI_MLQUEUE_HOST_BUSY; 1727 + break; 1728 + } 1729 + 1730 + if (ret) { 1731 + /* 1732 + * We must defer this qc: if this is not an NCQ command, keep 1733 + * this qc as a deferred one and report to the SCSI layer that 1734 + * we issued it so that it is not requeued. The deferred qc will 1735 + * be issued with the port deferred_qc_work once all on-going 1736 + * commands complete. 1737 + */ 1738 + if (!ata_is_ncq(qc->tf.protocol)) { 1739 + ap->deferred_qc = qc; 1740 + return 0; 1741 + } 1742 + 1743 + /* Force a requeue of the command to defer its execution. */ 1744 + ata_qc_free(qc); 1745 + return ret; 1746 + } 1747 + 1748 + issue: 1749 + ata_qc_issue(qc); 1750 + 1751 + return 0; 1761 1752 } 1762 1753 1763 1754 /** ··· 1843 1714 * spin_lock_irqsave(host lock) 1844 1715 * 1845 1716 * RETURNS: 1846 - * 0 on success, SCSI_ML_QUEUE_DEVICE_BUSY if the command 1847 - * needs to be deferred. 1717 + * 0 on success, SCSI_ML_QUEUE_DEVICE_BUSY or SCSI_MLQUEUE_HOST_BUSY if the 1718 + * command needs to be deferred. 1848 1719 */ 1849 1720 static int ata_scsi_translate(struct ata_device *dev, struct scsi_cmnd *cmd, 1850 1721 ata_xlat_func_t xlat_func) 1851 1722 { 1852 1723 struct ata_port *ap = dev->link->ap; 1853 1724 struct ata_queued_cmd *qc; 1854 - int rc; 1855 1725 1726 + lockdep_assert_held(ap->lock); 1727 + 1728 + /* 1729 + * ata_scsi_qc_new() calls scsi_done(cmd) in case of failure. So we 1730 + * have nothing further to do when allocating a qc fails. 1731 + */ 1856 1732 qc = ata_scsi_qc_new(dev, cmd); 1857 1733 if (!qc) 1858 - goto err_mem; 1734 + return 0; 1859 1735 1860 1736 /* data is present; dma-map it */ 1861 1737 if (cmd->sc_data_direction == DMA_FROM_DEVICE || 1862 1738 cmd->sc_data_direction == DMA_TO_DEVICE) { 1863 1739 if (unlikely(scsi_bufflen(cmd) < 1)) { 1864 1740 ata_dev_warn(dev, "WARNING: zero len r/w req\n"); 1865 - goto err_did; 1741 + cmd->result = (DID_ERROR << 16); 1742 + goto done; 1866 1743 } 1867 1744 1868 1745 ata_sg_init(qc, scsi_sglist(cmd), scsi_sg_count(cmd)); 1869 - 1870 1746 qc->dma_dir = cmd->sc_data_direction; 1871 1747 } 1872 1748 1873 1749 qc->complete_fn = ata_scsi_qc_complete; 1874 1750 1875 1751 if (xlat_func(qc)) 1876 - goto early_finish; 1752 + goto done; 1877 1753 1878 - if (ap->ops->qc_defer) { 1879 - if ((rc = ap->ops->qc_defer(qc))) 1880 - goto defer; 1881 - } 1754 + return ata_scsi_qc_issue(ap, qc); 1882 1755 1883 - /* select device, send command to hardware */ 1884 - ata_qc_issue(qc); 1885 - 1886 - return 0; 1887 - 1888 - early_finish: 1756 + done: 1889 1757 ata_qc_free(qc); 1890 1758 scsi_done(cmd); 1891 1759 return 0; 1892 - 1893 - err_did: 1894 - ata_qc_free(qc); 1895 - cmd->result = (DID_ERROR << 16); 1896 - scsi_done(cmd); 1897 - err_mem: 1898 - return 0; 1899 - 1900 - defer: 1901 - ata_qc_free(qc); 1902 - if (rc == ATA_DEFER_LINK) 1903 - return SCSI_MLQUEUE_DEVICE_BUSY; 1904 - else 1905 - return SCSI_MLQUEUE_HOST_BUSY; 1906 1760 } 1907 1761 1908 1762 /** ··· 3094 2982 { 3095 2983 struct ata_device *dev = __ata_scsi_find_dev(ap, scsidev); 3096 2984 2985 + if (!ata_adapter_is_online(ap)) 2986 + return NULL; 2987 + 3097 2988 if (unlikely(!dev || !ata_dev_enabled(dev))) 3098 2989 return NULL; 3099 2990 ··· 3688 3573 { 3689 3574 struct scsi_cmnd *scmd = qc->scsicmd; 3690 3575 struct sg_mapping_iter miter; 3691 - unsigned long flags; 3692 3576 unsigned int bytes = 0; 3577 + 3578 + lockdep_assert_held(qc->ap->lock); 3693 3579 3694 3580 sg_miter_start(&miter, scsi_sglist(scmd), scsi_sg_count(scmd), 3695 3581 SG_MITER_TO_SG | SG_MITER_ATOMIC); 3696 3582 3697 - local_irq_save(flags); 3698 3583 while (sg_miter_next(&miter)) { 3699 3584 unsigned int offset = 0; 3700 3585 ··· 3742 3627 } 3743 3628 } 3744 3629 sg_miter_stop(&miter); 3745 - local_irq_restore(flags); 3746 3630 3747 3631 ata_scsi_qc_complete(qc); 3748 3632 }

+3

drivers/ata/libata.h

··· 94 94 extern void swap_buf_le16(u16 *buf, unsigned int buf_words); 95 95 extern bool ata_phys_link_online(struct ata_link *link); 96 96 extern bool ata_phys_link_offline(struct ata_link *link); 97 + bool ata_adapter_is_online(struct ata_port *ap); 97 98 extern void ata_dev_init(struct ata_device *dev); 98 99 extern void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp); 99 100 extern int sata_link_init_spd(struct ata_link *link); ··· 167 166 struct ata_device *dev); 168 167 enum scsi_qc_status __ata_scsi_queuecmd(struct scsi_cmnd *scmd, 169 168 struct ata_device *dev); 169 + void ata_scsi_deferred_qc_work(struct work_struct *work); 170 + void ata_scsi_requeue_deferred_qc(struct ata_port *ap); 170 171 171 172 /* libata-eh.c */ 172 173 extern unsigned int ata_internal_cmd_timeout(struct ata_device *dev, u8 cmd);

+1 -1

drivers/ata/pata_cypress.c

··· 62 62 u32 addr; 63 63 64 64 if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) { 65 - ata_dev_err(adev, DRV_NAME ": mome computation failed.\n"); 65 + ata_dev_err(adev, DRV_NAME ": mode computation failed.\n"); 66 66 return; 67 67 } 68 68

+3 -3

drivers/ata/pata_ftide010.c

··· 122 122 static const u8 mwdma_50_recovery_time[3] = {6, 2, 1}; 123 123 static const u8 mwdma_66_active_time[3] = {8, 3, 3}; 124 124 static const u8 mwdma_66_recovery_time[3] = {8, 2, 1}; 125 - static const u8 udma_50_setup_time[6] = {3, 3, 2, 2, 1, 1}; 125 + static const u8 udma_50_setup_time[6] = {3, 3, 2, 2, 1, 9}; 126 126 static const u8 udma_50_hold_time[6] = {3, 1, 1, 1, 1, 1}; 127 - static const u8 udma_66_setup_time[7] = {4, 4, 3, 2, }; 128 - static const u8 udma_66_hold_time[7] = {}; 127 + static const u8 udma_66_setup_time[7] = {4, 4, 3, 2, 1, 9, 9}; 128 + static const u8 udma_66_hold_time[7] = {4, 2, 1, 1, 1, 1, 1}; 129 129 130 130 /* 131 131 * We set 66 MHz for all MWDMA modes

+5 -862

drivers/ata/pata_legacy.c

··· 5 5 * 6 6 * An ATA driver for the legacy ATA ports. 7 7 * 8 - * Data Sources: 9 - * Opti 82C465/82C611 support: Data sheets at opti-inc.com 10 - * HT6560 series: 11 - * Promise 20230/20620: 12 - * http://www.ryston.cz/petr/vlb/pdc20230b.html 13 - * http://www.ryston.cz/petr/vlb/pdc20230c.html 14 - * http://www.ryston.cz/petr/vlb/pdc20630.html 15 - * QDI65x0: 16 - * http://www.ryston.cz/petr/vlb/qd6500.html 17 - * http://www.ryston.cz/petr/vlb/qd6580.html 18 - * 19 - * QDI65x0 probe code based on drivers/ide/legacy/qd65xx.c 20 - * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by 21 - * Samuel Thibault <samuel.thibault@ens-lyon.org> 22 - * 23 - * Unsupported but docs exist: 24 - * Appian/Adaptec AIC25VL01/Cirrus Logic PD7220 25 - * 26 - * This driver handles legacy (that is "ISA/VLB side") IDE ports found 27 - * on PC class systems. There are three hybrid devices that are exceptions 8 + * This driver handles legacy (that is "ISA side") IDE ports found 9 + * on PC class systems. There are three hybrid devices that are exceptions: 28 10 * The Cyrix 5510/5520 where a pre SFF ATA device is on the bridge and 29 11 * the MPIIX where the tuning is PCI side but the IDE is "ISA side". 30 - * 31 - * Specific support is included for the ht6560a/ht6560b/opti82c611a/ 32 - * opti82c465mv/promise 20230c/20630/qdi65x0/winbond83759A 33 - * 34 - * Support for the Winbond 83759A when operating in advanced mode. 35 - * Multichip mode is not currently supported. 36 - * 37 - * Use the autospeed and pio_mask options with: 38 - * Appian ADI/2 aka CLPD7220 or AIC25VL01. 39 - * Use the jumpers, autospeed and set pio_mask to the mode on the jumpers with 40 - * Goldstar GM82C711, PIC-1288A-125, UMC 82C871F, Winbond W83759, 41 - * Winbond W83759A, Promise PDC20230-B 42 - * 43 - * For now use autospeed and pio_mask as above with the W83759A. This may 44 - * change. 45 12 */ 46 13 47 14 #include <linux/async.h> ··· 54 87 module_param(iordy_mask, int, 0); 55 88 MODULE_PARM_DESC(iordy_mask, "Use IORDY if available"); 56 89 57 - static int ht6560a; 58 - module_param(ht6560a, int, 0); 59 - MODULE_PARM_DESC(ht6560a, "HT 6560A on primary 1, second 2, both 3"); 60 - 61 - static int ht6560b; 62 - module_param(ht6560b, int, 0); 63 - MODULE_PARM_DESC(ht6560b, "HT 6560B on primary 1, secondary 2, both 3"); 64 - 65 - static int opti82c611a; 66 - module_param(opti82c611a, int, 0); 67 - MODULE_PARM_DESC(opti82c611a, 68 - "Opti 82c611A on primary 1, secondary 2, both 3"); 69 - 70 - static int opti82c46x; 71 - module_param(opti82c46x, int, 0); 72 - MODULE_PARM_DESC(opti82c46x, 73 - "Opti 82c465MV on primary 1, secondary 2, both 3"); 74 - 75 - #ifdef CONFIG_PATA_QDI_MODULE 76 - static int qdi = 1; 77 - #else 78 - static int qdi; 79 - #endif 80 - module_param(qdi, int, 0); 81 - MODULE_PARM_DESC(qdi, "Set to probe QDI controllers"); 82 - 83 - #ifdef CONFIG_PATA_WINBOND_VLB_MODULE 84 - static int winbond = 1; 85 - #else 86 - static int winbond; 87 - #endif 88 - module_param(winbond, int, 0); 89 - MODULE_PARM_DESC(winbond, 90 - "Set to probe Winbond controllers, " 91 - "give I/O port if non standard"); 92 - 93 - 94 90 enum controller { 95 91 BIOS = 0, 96 92 SNOOP = 1, 97 - PDC20230 = 2, 98 - HT6560A = 3, 99 - HT6560B = 4, 100 - OPTI611A = 5, 101 - OPTI46X = 6, 102 - QDI6500 = 7, 103 - QDI6580 = 8, 104 - QDI6580DP = 9, /* Dual channel mode is different */ 105 - W83759A = 10, 106 93 107 94 UNKNOWN = -1 108 95 }; ··· 104 183 * 105 184 * Add an entry into the probe list for ATA controllers. This is used 106 185 * to add the default ISA slots and then to build up the table 107 - * further according to other ISA/VLB/Weird device scans 186 + * further according to other ISA/Weird device scans 108 187 * 109 188 * An I/O port list is used to keep ordering stable and sane, as we 110 189 * don't have any good way to talk about ordering otherwise ··· 197 276 .set_mode = legacy_set_mode, 198 277 }; 199 278 200 - /* 201 - * Promise 20230C and 20620 support 202 - * 203 - * This controller supports PIO0 to PIO2. We set PIO timings 204 - * conservatively to allow for 50MHz Vesa Local Bus. The 20620 DMA 205 - * support is weird being DMA to controller and PIO'd to the host 206 - * and not supported. 207 - */ 208 - 209 - static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev) 210 - { 211 - int tries = 5; 212 - int pio = adev->pio_mode - XFER_PIO_0; 213 - u8 rt; 214 - unsigned long flags; 215 - 216 - /* Safe as UP only. Force I/Os to occur together */ 217 - 218 - local_irq_save(flags); 219 - 220 - /* Unlock the control interface */ 221 - do { 222 - inb(0x1F5); 223 - outb(inb(0x1F2) | 0x80, 0x1F2); 224 - inb(0x1F2); 225 - inb(0x3F6); 226 - inb(0x3F6); 227 - inb(0x1F2); 228 - inb(0x1F2); 229 - } 230 - while ((inb(0x1F2) & 0x80) && --tries); 231 - 232 - local_irq_restore(flags); 233 - 234 - outb(inb(0x1F4) & 0x07, 0x1F4); 235 - 236 - rt = inb(0x1F3); 237 - rt &= ~(0x07 << (3 * !adev->devno)); 238 - if (pio) 239 - rt |= (1 + 3 * pio) << (3 * !adev->devno); 240 - outb(rt, 0x1F3); 241 - 242 - udelay(100); 243 - outb(inb(0x1F2) | 0x01, 0x1F2); 244 - udelay(100); 245 - inb(0x1F5); 246 - 247 - } 248 - 249 - static unsigned int pdc_data_xfer_vlb(struct ata_queued_cmd *qc, 250 - unsigned char *buf, unsigned int buflen, int rw) 251 - { 252 - struct ata_device *dev = qc->dev; 253 - struct ata_port *ap = dev->link->ap; 254 - int slop = buflen & 3; 255 - 256 - /* 32bit I/O capable *and* we need to write a whole number of dwords */ 257 - if (ata_id_has_dword_io(dev->id) && (slop == 0 || slop == 3) 258 - && (ap->pflags & ATA_PFLAG_PIO32)) { 259 - unsigned long flags; 260 - 261 - local_irq_save(flags); 262 - 263 - /* Perform the 32bit I/O synchronization sequence */ 264 - ioread8(ap->ioaddr.nsect_addr); 265 - ioread8(ap->ioaddr.nsect_addr); 266 - ioread8(ap->ioaddr.nsect_addr); 267 - 268 - /* Now the data */ 269 - if (rw == READ) 270 - ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); 271 - else 272 - iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); 273 - 274 - if (unlikely(slop)) { 275 - __le32 pad = 0; 276 - 277 - if (rw == READ) { 278 - pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr)); 279 - memcpy(buf + buflen - slop, &pad, slop); 280 - } else { 281 - memcpy(&pad, buf + buflen - slop, slop); 282 - iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr); 283 - } 284 - buflen += 4 - slop; 285 - } 286 - local_irq_restore(flags); 287 - } else 288 - buflen = ata_sff_data_xfer32(qc, buf, buflen, rw); 289 - 290 - return buflen; 291 - } 292 - 293 - static struct ata_port_operations pdc20230_port_ops = { 294 - .inherits = &legacy_base_port_ops, 295 - .set_piomode = pdc20230_set_piomode, 296 - .sff_data_xfer = pdc_data_xfer_vlb, 297 - }; 298 - 299 - /* 300 - * Holtek 6560A support 301 - * 302 - * This controller supports PIO0 to PIO2 (no IORDY even though higher 303 - * timings can be loaded). 304 - */ 305 - 306 - static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev) 307 - { 308 - u8 active, recover; 309 - struct ata_timing t; 310 - 311 - /* Get the timing data in cycles. For now play safe at 50Mhz */ 312 - ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000); 313 - 314 - active = clamp_val(t.active, 2, 15); 315 - recover = clamp_val(t.recover, 4, 15); 316 - 317 - inb(0x3E6); 318 - inb(0x3E6); 319 - inb(0x3E6); 320 - inb(0x3E6); 321 - 322 - iowrite8(recover << 4 | active, ap->ioaddr.device_addr); 323 - ioread8(ap->ioaddr.status_addr); 324 - } 325 - 326 - static struct ata_port_operations ht6560a_port_ops = { 327 - .inherits = &legacy_base_port_ops, 328 - .set_piomode = ht6560a_set_piomode, 329 - }; 330 - 331 - /* 332 - * Holtek 6560B support 333 - * 334 - * This controller supports PIO0 to PIO4. We honour the BIOS/jumper FIFO 335 - * setting unless we see an ATAPI device in which case we force it off. 336 - * 337 - * FIXME: need to implement 2nd channel support. 338 - */ 339 - 340 - static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev) 341 - { 342 - u8 active, recover; 343 - struct ata_timing t; 344 - 345 - /* Get the timing data in cycles. For now play safe at 50Mhz */ 346 - ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000); 347 - 348 - active = clamp_val(t.active, 2, 15); 349 - recover = clamp_val(t.recover, 2, 16) & 0x0F; 350 - 351 - inb(0x3E6); 352 - inb(0x3E6); 353 - inb(0x3E6); 354 - inb(0x3E6); 355 - 356 - iowrite8(recover << 4 | active, ap->ioaddr.device_addr); 357 - 358 - if (adev->class != ATA_DEV_ATA) { 359 - u8 rconf = inb(0x3E6); 360 - if (rconf & 0x24) { 361 - rconf &= ~0x24; 362 - outb(rconf, 0x3E6); 363 - } 364 - } 365 - ioread8(ap->ioaddr.status_addr); 366 - } 367 - 368 - static struct ata_port_operations ht6560b_port_ops = { 369 - .inherits = &legacy_base_port_ops, 370 - .set_piomode = ht6560b_set_piomode, 371 - }; 372 - 373 - /* 374 - * Opti core chipset helpers 375 - */ 376 - 377 - /** 378 - * opti_syscfg - read OPTI chipset configuration 379 - * @reg: Configuration register to read 380 - * 381 - * Returns the value of an OPTI system board configuration register. 382 - */ 383 - 384 - static u8 opti_syscfg(u8 reg) 385 - { 386 - unsigned long flags; 387 - u8 r; 388 - 389 - /* Uniprocessor chipset and must force cycles adjancent */ 390 - local_irq_save(flags); 391 - outb(reg, 0x22); 392 - r = inb(0x24); 393 - local_irq_restore(flags); 394 - return r; 395 - } 396 - 397 - /* 398 - * Opti 82C611A 399 - * 400 - * This controller supports PIO0 to PIO3. 401 - */ 402 - 403 - static void opti82c611a_set_piomode(struct ata_port *ap, 404 - struct ata_device *adev) 405 - { 406 - u8 active, recover, setup; 407 - struct ata_timing t; 408 - struct ata_device *pair = ata_dev_pair(adev); 409 - int clock; 410 - int khz[4] = { 50000, 40000, 33000, 25000 }; 411 - u8 rc; 412 - 413 - /* Enter configuration mode */ 414 - ioread16(ap->ioaddr.error_addr); 415 - ioread16(ap->ioaddr.error_addr); 416 - iowrite8(3, ap->ioaddr.nsect_addr); 417 - 418 - /* Read VLB clock strapping */ 419 - clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03]; 420 - 421 - /* Get the timing data in cycles */ 422 - ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000); 423 - 424 - /* Setup timing is shared */ 425 - if (pair) { 426 - struct ata_timing tp; 427 - ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000); 428 - 429 - ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP); 430 - } 431 - 432 - active = clamp_val(t.active, 2, 17) - 2; 433 - recover = clamp_val(t.recover, 1, 16) - 1; 434 - setup = clamp_val(t.setup, 1, 4) - 1; 435 - 436 - /* Select the right timing bank for write timing */ 437 - rc = ioread8(ap->ioaddr.lbal_addr); 438 - rc &= 0x7F; 439 - rc |= (adev->devno << 7); 440 - iowrite8(rc, ap->ioaddr.lbal_addr); 441 - 442 - /* Write the timings */ 443 - iowrite8(active << 4 | recover, ap->ioaddr.error_addr); 444 - 445 - /* Select the right bank for read timings, also 446 - load the shared timings for address */ 447 - rc = ioread8(ap->ioaddr.device_addr); 448 - rc &= 0xC0; 449 - rc |= adev->devno; /* Index select */ 450 - rc |= (setup << 4) | 0x04; 451 - iowrite8(rc, ap->ioaddr.device_addr); 452 - 453 - /* Load the read timings */ 454 - iowrite8(active << 4 | recover, ap->ioaddr.data_addr); 455 - 456 - /* Ensure the timing register mode is right */ 457 - rc = ioread8(ap->ioaddr.lbal_addr); 458 - rc &= 0x73; 459 - rc |= 0x84; 460 - iowrite8(rc, ap->ioaddr.lbal_addr); 461 - 462 - /* Exit command mode */ 463 - iowrite8(0x83, ap->ioaddr.nsect_addr); 464 - } 465 - 466 - 467 - static struct ata_port_operations opti82c611a_port_ops = { 468 - .inherits = &legacy_base_port_ops, 469 - .set_piomode = opti82c611a_set_piomode, 470 - }; 471 - 472 - /* 473 - * Opti 82C465MV 474 - * 475 - * This controller supports PIO0 to PIO3. Unlike the 611A the MVB 476 - * version is dual channel but doesn't have a lot of unique registers. 477 - */ 478 - 479 - static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev) 480 - { 481 - u8 active, recover, setup; 482 - struct ata_timing t; 483 - struct ata_device *pair = ata_dev_pair(adev); 484 - int clock; 485 - int khz[4] = { 50000, 40000, 33000, 25000 }; 486 - u8 rc; 487 - u8 sysclk; 488 - 489 - /* Get the clock */ 490 - sysclk = (opti_syscfg(0xAC) & 0xC0) >> 6; /* BIOS set */ 491 - 492 - /* Enter configuration mode */ 493 - ioread16(ap->ioaddr.error_addr); 494 - ioread16(ap->ioaddr.error_addr); 495 - iowrite8(3, ap->ioaddr.nsect_addr); 496 - 497 - /* Read VLB clock strapping */ 498 - clock = 1000000000 / khz[sysclk]; 499 - 500 - /* Get the timing data in cycles */ 501 - ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000); 502 - 503 - /* Setup timing is shared */ 504 - if (pair) { 505 - struct ata_timing tp; 506 - ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000); 507 - 508 - ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP); 509 - } 510 - 511 - active = clamp_val(t.active, 2, 17) - 2; 512 - recover = clamp_val(t.recover, 1, 16) - 1; 513 - setup = clamp_val(t.setup, 1, 4) - 1; 514 - 515 - /* Select the right timing bank for write timing */ 516 - rc = ioread8(ap->ioaddr.lbal_addr); 517 - rc &= 0x7F; 518 - rc |= (adev->devno << 7); 519 - iowrite8(rc, ap->ioaddr.lbal_addr); 520 - 521 - /* Write the timings */ 522 - iowrite8(active << 4 | recover, ap->ioaddr.error_addr); 523 - 524 - /* Select the right bank for read timings, also 525 - load the shared timings for address */ 526 - rc = ioread8(ap->ioaddr.device_addr); 527 - rc &= 0xC0; 528 - rc |= adev->devno; /* Index select */ 529 - rc |= (setup << 4) | 0x04; 530 - iowrite8(rc, ap->ioaddr.device_addr); 531 - 532 - /* Load the read timings */ 533 - iowrite8(active << 4 | recover, ap->ioaddr.data_addr); 534 - 535 - /* Ensure the timing register mode is right */ 536 - rc = ioread8(ap->ioaddr.lbal_addr); 537 - rc &= 0x73; 538 - rc |= 0x84; 539 - iowrite8(rc, ap->ioaddr.lbal_addr); 540 - 541 - /* Exit command mode */ 542 - iowrite8(0x83, ap->ioaddr.nsect_addr); 543 - 544 - /* We need to know this for quad device on the MVB */ 545 - ap->host->private_data = ap; 546 - } 547 - 548 - /** 549 - * opti82c46x_qc_issue - command issue 550 - * @qc: command pending 551 - * 552 - * Called when the libata layer is about to issue a command. We wrap 553 - * this interface so that we can load the correct ATA timings. The 554 - * MVB has a single set of timing registers and these are shared 555 - * across channels. As there are two registers we really ought to 556 - * track the last two used values as a sort of register window. For 557 - * now we just reload on a channel switch. On the single channel 558 - * setup this condition never fires so we do nothing extra. 559 - * 560 - * FIXME: dual channel needs ->serialize support 561 - */ 562 - 563 - static unsigned int opti82c46x_qc_issue(struct ata_queued_cmd *qc) 564 - { 565 - struct ata_port *ap = qc->ap; 566 - struct ata_device *adev = qc->dev; 567 - 568 - /* If timings are set and for the wrong channel (2nd test is 569 - due to a libata shortcoming and will eventually go I hope) */ 570 - if (ap->host->private_data != ap->host 571 - && ap->host->private_data != NULL) 572 - opti82c46x_set_piomode(ap, adev); 573 - 574 - return ata_sff_qc_issue(qc); 575 - } 576 - 577 - static struct ata_port_operations opti82c46x_port_ops = { 578 - .inherits = &legacy_base_port_ops, 579 - .set_piomode = opti82c46x_set_piomode, 580 - .qc_issue = opti82c46x_qc_issue, 581 - }; 582 - 583 - /** 584 - * qdi65x0_set_piomode - PIO setup for QDI65x0 585 - * @ap: Port 586 - * @adev: Device 587 - * 588 - * In single channel mode the 6580 has one clock per device and we can 589 - * avoid the requirement to clock switch. We also have to load the timing 590 - * into the right clock according to whether we are master or slave. 591 - * 592 - * In dual channel mode the 6580 has one clock per channel and we have 593 - * to software clockswitch in qc_issue. 594 - */ 595 - 596 - static void qdi65x0_set_piomode(struct ata_port *ap, struct ata_device *adev) 597 - { 598 - struct ata_timing t; 599 - struct legacy_data *ld_qdi = ap->host->private_data; 600 - int active, recovery; 601 - u8 timing; 602 - 603 - /* Get the timing data in cycles */ 604 - ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); 605 - 606 - if (ld_qdi->fast) { 607 - active = 8 - clamp_val(t.active, 1, 8); 608 - recovery = 18 - clamp_val(t.recover, 3, 18); 609 - } else { 610 - active = 9 - clamp_val(t.active, 2, 9); 611 - recovery = 15 - clamp_val(t.recover, 0, 15); 612 - } 613 - timing = (recovery << 4) | active | 0x08; 614 - ld_qdi->clock[adev->devno] = timing; 615 - 616 - if (ld_qdi->type == QDI6580) 617 - outb(timing, ld_qdi->timing + 2 * adev->devno); 618 - else 619 - outb(timing, ld_qdi->timing + 2 * ap->port_no); 620 - 621 - /* Clear the FIFO */ 622 - if (ld_qdi->type != QDI6500 && adev->class != ATA_DEV_ATA) 623 - outb(0x5F, (ld_qdi->timing & 0xFFF0) + 3); 624 - } 625 - 626 - /** 627 - * qdi_qc_issue - command issue 628 - * @qc: command pending 629 - * 630 - * Called when the libata layer is about to issue a command. We wrap 631 - * this interface so that we can load the correct ATA timings. 632 - */ 633 - 634 - static unsigned int qdi_qc_issue(struct ata_queued_cmd *qc) 635 - { 636 - struct ata_port *ap = qc->ap; 637 - struct ata_device *adev = qc->dev; 638 - struct legacy_data *ld_qdi = ap->host->private_data; 639 - 640 - if (ld_qdi->clock[adev->devno] != ld_qdi->last) { 641 - if (adev->pio_mode) { 642 - ld_qdi->last = ld_qdi->clock[adev->devno]; 643 - outb(ld_qdi->clock[adev->devno], ld_qdi->timing + 644 - 2 * ap->port_no); 645 - } 646 - } 647 - return ata_sff_qc_issue(qc); 648 - } 649 - 650 - static unsigned int vlb32_data_xfer(struct ata_queued_cmd *qc, 651 - unsigned char *buf, 652 - unsigned int buflen, int rw) 653 - { 654 - struct ata_device *adev = qc->dev; 655 - struct ata_port *ap = adev->link->ap; 656 - int slop = buflen & 3; 657 - 658 - if (ata_id_has_dword_io(adev->id) && (slop == 0 || slop == 3) 659 - && (ap->pflags & ATA_PFLAG_PIO32)) { 660 - if (rw == WRITE) 661 - iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); 662 - else 663 - ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); 664 - 665 - if (unlikely(slop)) { 666 - __le32 pad = 0; 667 - 668 - if (rw == WRITE) { 669 - memcpy(&pad, buf + buflen - slop, slop); 670 - iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr); 671 - } else { 672 - pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr)); 673 - memcpy(buf + buflen - slop, &pad, slop); 674 - } 675 - } 676 - return (buflen + 3) & ~3; 677 - } else 678 - return ata_sff_data_xfer(qc, buf, buflen, rw); 679 - } 680 - 681 - static int qdi_port(struct platform_device *dev, 682 - struct legacy_probe *lp, struct legacy_data *ld) 683 - { 684 - if (devm_request_region(&dev->dev, lp->private, 4, "qdi") == NULL) 685 - return -EBUSY; 686 - ld->timing = lp->private; 687 - return 0; 688 - } 689 - 690 - static struct ata_port_operations qdi6500_port_ops = { 691 - .inherits = &legacy_base_port_ops, 692 - .set_piomode = qdi65x0_set_piomode, 693 - .qc_issue = qdi_qc_issue, 694 - .sff_data_xfer = vlb32_data_xfer, 695 - }; 696 - 697 - static struct ata_port_operations qdi6580_port_ops = { 698 - .inherits = &legacy_base_port_ops, 699 - .set_piomode = qdi65x0_set_piomode, 700 - .sff_data_xfer = vlb32_data_xfer, 701 - }; 702 - 703 - static struct ata_port_operations qdi6580dp_port_ops = { 704 - .inherits = &legacy_base_port_ops, 705 - .set_piomode = qdi65x0_set_piomode, 706 - .qc_issue = qdi_qc_issue, 707 - .sff_data_xfer = vlb32_data_xfer, 708 - }; 709 - 710 - static DEFINE_SPINLOCK(winbond_lock); 711 - 712 - static void winbond_writecfg(unsigned long port, u8 reg, u8 val) 713 - { 714 - unsigned long flags; 715 - spin_lock_irqsave(&winbond_lock, flags); 716 - outb(reg, port + 0x01); 717 - outb(val, port + 0x02); 718 - spin_unlock_irqrestore(&winbond_lock, flags); 719 - } 720 - 721 - static u8 winbond_readcfg(unsigned long port, u8 reg) 722 - { 723 - u8 val; 724 - 725 - unsigned long flags; 726 - spin_lock_irqsave(&winbond_lock, flags); 727 - outb(reg, port + 0x01); 728 - val = inb(port + 0x02); 729 - spin_unlock_irqrestore(&winbond_lock, flags); 730 - 731 - return val; 732 - } 733 - 734 - static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev) 735 - { 736 - struct ata_timing t; 737 - struct legacy_data *ld_winbond = ap->host->private_data; 738 - int active, recovery; 739 - u8 reg; 740 - int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2); 741 - 742 - reg = winbond_readcfg(ld_winbond->timing, 0x81); 743 - 744 - /* Get the timing data in cycles */ 745 - if (reg & 0x40) /* Fast VLB bus, assume 50MHz */ 746 - ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000); 747 - else 748 - ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); 749 - 750 - active = (clamp_val(t.active, 3, 17) - 1) & 0x0F; 751 - recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F; 752 - timing = (active << 4) | recovery; 753 - winbond_writecfg(ld_winbond->timing, timing, reg); 754 - 755 - /* Load the setup timing */ 756 - 757 - reg = 0x35; 758 - if (adev->class != ATA_DEV_ATA) 759 - reg |= 0x08; /* FIFO off */ 760 - if (!ata_pio_need_iordy(adev)) 761 - reg |= 0x02; /* IORDY off */ 762 - reg |= (clamp_val(t.setup, 0, 3) << 6); 763 - winbond_writecfg(ld_winbond->timing, timing + 1, reg); 764 - } 765 - 766 - static int winbond_port(struct platform_device *dev, 767 - struct legacy_probe *lp, struct legacy_data *ld) 768 - { 769 - if (devm_request_region(&dev->dev, lp->private, 4, "winbond") == NULL) 770 - return -EBUSY; 771 - ld->timing = lp->private; 772 - return 0; 773 - } 774 - 775 - static struct ata_port_operations winbond_port_ops = { 776 - .inherits = &legacy_base_port_ops, 777 - .set_piomode = winbond_set_piomode, 778 - .sff_data_xfer = vlb32_data_xfer, 779 - }; 780 - 781 279 static struct legacy_controller controllers[] = { 782 280 {"BIOS", &legacy_port_ops, ATA_PIO4, 783 281 ATA_FLAG_NO_IORDY, 0, NULL }, 784 282 {"Snooping", &simple_port_ops, ATA_PIO4, 785 283 0, 0, NULL }, 786 - {"PDC20230", &pdc20230_port_ops, ATA_PIO2, 787 - ATA_FLAG_NO_IORDY, 788 - ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, NULL }, 789 - {"HT6560A", &ht6560a_port_ops, ATA_PIO2, 790 - ATA_FLAG_NO_IORDY, 0, NULL }, 791 - {"HT6560B", &ht6560b_port_ops, ATA_PIO4, 792 - ATA_FLAG_NO_IORDY, 0, NULL }, 793 - {"OPTI82C611A", &opti82c611a_port_ops, ATA_PIO3, 794 - 0, 0, NULL }, 795 - {"OPTI82C46X", &opti82c46x_port_ops, ATA_PIO3, 796 - 0, 0, NULL }, 797 - {"QDI6500", &qdi6500_port_ops, ATA_PIO2, 798 - ATA_FLAG_NO_IORDY, 799 - ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port }, 800 - {"QDI6580", &qdi6580_port_ops, ATA_PIO4, 801 - 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port }, 802 - {"QDI6580DP", &qdi6580dp_port_ops, ATA_PIO4, 803 - 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port }, 804 - {"W83759A", &winbond_port_ops, ATA_PIO4, 805 - 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, 806 - winbond_port } 807 284 }; 808 285 809 286 /** ··· 216 897 { 217 898 int mask = 1 << probe->slot; 218 899 219 - if (winbond && (probe->port == 0x1F0 || probe->port == 0x170)) { 220 - u8 reg = winbond_readcfg(winbond, 0x81); 221 - reg |= 0x80; /* jumpered mode off */ 222 - winbond_writecfg(winbond, 0x81, reg); 223 - reg = winbond_readcfg(winbond, 0x83); 224 - reg |= 0xF0; /* local control */ 225 - winbond_writecfg(winbond, 0x83, reg); 226 - reg = winbond_readcfg(winbond, 0x85); 227 - reg |= 0xF0; /* programmable timing */ 228 - winbond_writecfg(winbond, 0x85, reg); 229 - 230 - reg = winbond_readcfg(winbond, 0x81); 231 - 232 - if (reg & mask) 233 - return W83759A; 234 - } 235 - if (probe->port == 0x1F0) { 236 - unsigned long flags; 237 - local_irq_save(flags); 238 - /* Probes */ 239 - outb(inb(0x1F2) | 0x80, 0x1F2); 240 - inb(0x1F5); 241 - inb(0x1F2); 242 - inb(0x3F6); 243 - inb(0x3F6); 244 - inb(0x1F2); 245 - inb(0x1F2); 246 - 247 - if ((inb(0x1F2) & 0x80) == 0) { 248 - /* PDC20230c or 20630 ? */ 249 - printk(KERN_INFO "PDC20230-C/20630 VLB ATA controller" 250 - " detected.\n"); 251 - udelay(100); 252 - inb(0x1F5); 253 - local_irq_restore(flags); 254 - return PDC20230; 255 - } else { 256 - outb(0x55, 0x1F2); 257 - inb(0x1F2); 258 - inb(0x1F2); 259 - if (inb(0x1F2) == 0x00) 260 - printk(KERN_INFO "PDC20230-B VLB ATA " 261 - "controller detected.\n"); 262 - local_irq_restore(flags); 263 - return BIOS; 264 - } 265 - } 266 - 267 - if (ht6560a & mask) 268 - return HT6560A; 269 - if (ht6560b & mask) 270 - return HT6560B; 271 - if (opti82c611a & mask) 272 - return OPTI611A; 273 - if (opti82c46x & mask) 274 - return OPTI46X; 275 900 if (autospeed & mask) 276 901 return SNOOP; 277 902 return BIOS; ··· 348 1085 } 349 1086 } 350 1087 351 - static __init void probe_opti_vlb(void) 352 - { 353 - /* If an OPTI 82C46X is present find out where the channels are */ 354 - static const char *optis[4] = { 355 - "3/463MV", "5MV", 356 - "5MVA", "5MVB" 357 - }; 358 - u8 chans = 1; 359 - u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6; 360 - 361 - opti82c46x = 3; /* Assume master and slave first */ 362 - printk(KERN_INFO DRV_NAME ": Opti 82C46%s chipset support.\n", 363 - optis[ctrl]); 364 - if (ctrl == 3) 365 - chans = (opti_syscfg(0x3F) & 0x20) ? 2 : 1; 366 - ctrl = opti_syscfg(0xAC); 367 - /* Check enabled and this port is the 465MV port. On the 368 - MVB we may have two channels */ 369 - if (ctrl & 8) { 370 - if (chans == 2) { 371 - legacy_probe_add(0x1F0, 14, OPTI46X, 0); 372 - legacy_probe_add(0x170, 15, OPTI46X, 0); 373 - } 374 - if (ctrl & 4) 375 - legacy_probe_add(0x170, 15, OPTI46X, 0); 376 - else 377 - legacy_probe_add(0x1F0, 14, OPTI46X, 0); 378 - } else 379 - legacy_probe_add(0x1F0, 14, OPTI46X, 0); 380 - } 381 - 382 - static __init void qdi65_identify_port(u8 r, u8 res, unsigned long port) 383 - { 384 - static const unsigned long ide_port[2] = { 0x170, 0x1F0 }; 385 - /* Check card type */ 386 - if ((r & 0xF0) == 0xC0) { 387 - /* QD6500: single channel */ 388 - if (r & 8) 389 - /* Disabled ? */ 390 - return; 391 - legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01), 392 - QDI6500, port); 393 - } 394 - if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) { 395 - /* QD6580: dual channel */ 396 - if (!request_region(port + 2 , 2, "pata_qdi")) { 397 - release_region(port, 2); 398 - return; 399 - } 400 - res = inb(port + 3); 401 - /* Single channel mode ? */ 402 - if (res & 1) 403 - legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01), 404 - QDI6580, port); 405 - else { /* Dual channel mode */ 406 - legacy_probe_add(0x1F0, 14, QDI6580DP, port); 407 - /* port + 0x02, r & 0x04 */ 408 - legacy_probe_add(0x170, 15, QDI6580DP, port + 2); 409 - } 410 - release_region(port + 2, 2); 411 - } 412 - } 413 - 414 - static __init void probe_qdi_vlb(void) 415 - { 416 - unsigned long flags; 417 - static const unsigned long qd_port[2] = { 0x30, 0xB0 }; 418 - int i; 419 - 420 - /* 421 - * Check each possible QD65xx base address 422 - */ 423 - 424 - for (i = 0; i < 2; i++) { 425 - unsigned long port = qd_port[i]; 426 - u8 r, res; 427 - 428 - 429 - if (request_region(port, 2, "pata_qdi")) { 430 - /* Check for a card */ 431 - local_irq_save(flags); 432 - /* I have no h/w that needs this delay but it 433 - is present in the historic code */ 434 - r = inb(port); 435 - udelay(1); 436 - outb(0x19, port); 437 - udelay(1); 438 - res = inb(port); 439 - udelay(1); 440 - outb(r, port); 441 - udelay(1); 442 - local_irq_restore(flags); 443 - 444 - /* Fail */ 445 - if (res == 0x19) { 446 - release_region(port, 2); 447 - continue; 448 - } 449 - /* Passes the presence test */ 450 - r = inb(port + 1); 451 - udelay(1); 452 - /* Check port agrees with port set */ 453 - if ((r & 2) >> 1 == i) 454 - qdi65_identify_port(r, res, port); 455 - release_region(port, 2); 456 - } 457 - } 458 - } 459 - 460 1088 /** 461 1089 * legacy_init - attach legacy interfaces 462 1090 * 463 1091 * Attach legacy IDE interfaces by scanning the usual IRQ/port suspects. 464 1092 * Right now we do not scan the ide0 and ide1 address but should do so 465 1093 * for non PCI systems or systems with no PCI IDE legacy mode devices. 466 - * If you fix that note there are special cases to consider like VLB 467 - * drivers and CS5510/20. 1094 + * If you fix that note there are special cases to consider like CS5510/20. 468 1095 */ 469 1096 470 1097 static __init int legacy_init(void) ··· 388 1235 pci_present = 1; 389 1236 } 390 1237 391 - if (winbond == 1) 392 - winbond = 0x130; /* Default port, alt is 1B0 */ 393 - 394 1238 if (primary == 0 || all) 395 1239 legacy_probe_add(0x1F0, 14, UNKNOWN, 0); 396 1240 if (secondary == 0 || all) 397 1241 legacy_probe_add(0x170, 15, UNKNOWN, 0); 398 1242 399 1243 if (probe_all || !pci_present) { 400 - /* ISA/VLB extra ports */ 1244 + /* ISA extra ports */ 401 1245 legacy_probe_add(0x1E8, 11, UNKNOWN, 0); 402 1246 legacy_probe_add(0x168, 10, UNKNOWN, 0); 403 1247 legacy_probe_add(0x1E0, 8, UNKNOWN, 0); 404 1248 legacy_probe_add(0x160, 12, UNKNOWN, 0); 405 1249 } 406 - 407 - if (opti82c46x) 408 - probe_opti_vlb(); 409 - if (qdi) 410 - probe_qdi_vlb(); 411 1250 412 1251 for (i = 0; i < NR_HOST; i++, pl++) { 413 1252 if (pl->port == 0) ··· 432 1287 MODULE_DESCRIPTION("low-level driver for legacy ATA"); 433 1288 MODULE_LICENSE("GPL"); 434 1289 MODULE_VERSION(DRV_VERSION); 435 - MODULE_ALIAS("pata_qdi"); 436 - MODULE_ALIAS("pata_winbond"); 437 1290 438 1291 module_init(legacy_init); 439 1292 module_exit(legacy_exit);

-3

include/linux/ata.h

··· 26 26 ATA_MAX_DEVICES = 2, /* per bus/port */ 27 27 ATA_MAX_PRD = 256, /* we could make these 256/256 */ 28 28 ATA_SECT_SIZE = 512, 29 - ATA_MAX_SECTORS_128 = 128, 30 29 ATA_MAX_SECTORS = 256, 31 - ATA_MAX_SECTORS_1024 = 1024, 32 - ATA_MAX_SECTORS_8191 = 8191, 33 30 ATA_MAX_SECTORS_LBA48 = 65535,/* avoid count to be 0000h */ 34 31 ATA_MAX_SECTORS_TAPE = 65535, 35 32 ATA_MAX_TRIM_RNUM = 64, /* 512-byte payload / (6-byte LBA + 2-byte range per entry) */

+36 -37

include/linux/libata.h

··· 46 46 47 47 /* 48 48 * Quirk flags bits. 49 - * ata_device->quirks is an unsigned int, so __ATA_QUIRK_MAX must not exceed 32. 49 + * ata_device->quirks is an u64, so __ATA_QUIRK_MAX must not exceed 64. 50 50 */ 51 51 enum ata_quirks { 52 52 __ATA_QUIRK_DIAGNOSTIC, /* Failed boot diag */ 53 53 __ATA_QUIRK_NODMA, /* DMA problems */ 54 54 __ATA_QUIRK_NONCQ, /* Don't use NCQ */ 55 - __ATA_QUIRK_MAX_SEC_128, /* Limit max sects to 128 */ 56 55 __ATA_QUIRK_BROKEN_HPA, /* Broken HPA */ 57 56 __ATA_QUIRK_DISABLE, /* Disable it */ 58 57 __ATA_QUIRK_HPA_SIZE, /* Native size off by one */ ··· 73 74 __ATA_QUIRK_ZERO_AFTER_TRIM, /* Guarantees zero after trim */ 74 75 __ATA_QUIRK_NO_DMA_LOG, /* Do not use DMA for log read */ 75 76 __ATA_QUIRK_NOTRIM, /* Do not use TRIM */ 76 - __ATA_QUIRK_MAX_SEC_1024, /* Limit max sects to 1024 */ 77 - __ATA_QUIRK_MAX_SEC_8191, /* Limit max sects to 8191 */ 77 + __ATA_QUIRK_MAX_SEC, /* Limit max sectors */ 78 78 __ATA_QUIRK_MAX_TRIM_128M, /* Limit max trim size to 128M */ 79 79 __ATA_QUIRK_NO_NCQ_ON_ATI, /* Disable NCQ on ATI chipset */ 80 80 __ATA_QUIRK_NO_LPM_ON_ATI, /* Disable LPM on ATI chipset */ ··· 89 91 * Some quirks may be drive/controller pair dependent. 90 92 */ 91 93 enum { 92 - ATA_QUIRK_DIAGNOSTIC = (1U << __ATA_QUIRK_DIAGNOSTIC), 93 - ATA_QUIRK_NODMA = (1U << __ATA_QUIRK_NODMA), 94 - ATA_QUIRK_NONCQ = (1U << __ATA_QUIRK_NONCQ), 95 - ATA_QUIRK_MAX_SEC_128 = (1U << __ATA_QUIRK_MAX_SEC_128), 96 - ATA_QUIRK_BROKEN_HPA = (1U << __ATA_QUIRK_BROKEN_HPA), 97 - ATA_QUIRK_DISABLE = (1U << __ATA_QUIRK_DISABLE), 98 - ATA_QUIRK_HPA_SIZE = (1U << __ATA_QUIRK_HPA_SIZE), 99 - ATA_QUIRK_IVB = (1U << __ATA_QUIRK_IVB), 100 - ATA_QUIRK_STUCK_ERR = (1U << __ATA_QUIRK_STUCK_ERR), 101 - ATA_QUIRK_BRIDGE_OK = (1U << __ATA_QUIRK_BRIDGE_OK), 102 - ATA_QUIRK_ATAPI_MOD16_DMA = (1U << __ATA_QUIRK_ATAPI_MOD16_DMA), 103 - ATA_QUIRK_FIRMWARE_WARN = (1U << __ATA_QUIRK_FIRMWARE_WARN), 104 - ATA_QUIRK_1_5_GBPS = (1U << __ATA_QUIRK_1_5_GBPS), 105 - ATA_QUIRK_NOSETXFER = (1U << __ATA_QUIRK_NOSETXFER), 106 - ATA_QUIRK_BROKEN_FPDMA_AA = (1U << __ATA_QUIRK_BROKEN_FPDMA_AA), 107 - ATA_QUIRK_DUMP_ID = (1U << __ATA_QUIRK_DUMP_ID), 108 - ATA_QUIRK_MAX_SEC_LBA48 = (1U << __ATA_QUIRK_MAX_SEC_LBA48), 109 - ATA_QUIRK_ATAPI_DMADIR = (1U << __ATA_QUIRK_ATAPI_DMADIR), 110 - ATA_QUIRK_NO_NCQ_TRIM = (1U << __ATA_QUIRK_NO_NCQ_TRIM), 111 - ATA_QUIRK_NOLPM = (1U << __ATA_QUIRK_NOLPM), 112 - ATA_QUIRK_WD_BROKEN_LPM = (1U << __ATA_QUIRK_WD_BROKEN_LPM), 113 - ATA_QUIRK_ZERO_AFTER_TRIM = (1U << __ATA_QUIRK_ZERO_AFTER_TRIM), 114 - ATA_QUIRK_NO_DMA_LOG = (1U << __ATA_QUIRK_NO_DMA_LOG), 115 - ATA_QUIRK_NOTRIM = (1U << __ATA_QUIRK_NOTRIM), 116 - ATA_QUIRK_MAX_SEC_1024 = (1U << __ATA_QUIRK_MAX_SEC_1024), 117 - ATA_QUIRK_MAX_SEC_8191 = (1U << __ATA_QUIRK_MAX_SEC_8191), 118 - ATA_QUIRK_MAX_TRIM_128M = (1U << __ATA_QUIRK_MAX_TRIM_128M), 119 - ATA_QUIRK_NO_NCQ_ON_ATI = (1U << __ATA_QUIRK_NO_NCQ_ON_ATI), 120 - ATA_QUIRK_NO_LPM_ON_ATI = (1U << __ATA_QUIRK_NO_LPM_ON_ATI), 121 - ATA_QUIRK_NO_ID_DEV_LOG = (1U << __ATA_QUIRK_NO_ID_DEV_LOG), 122 - ATA_QUIRK_NO_LOG_DIR = (1U << __ATA_QUIRK_NO_LOG_DIR), 123 - ATA_QUIRK_NO_FUA = (1U << __ATA_QUIRK_NO_FUA), 94 + ATA_QUIRK_DIAGNOSTIC = BIT_ULL(__ATA_QUIRK_DIAGNOSTIC), 95 + ATA_QUIRK_NODMA = BIT_ULL(__ATA_QUIRK_NODMA), 96 + ATA_QUIRK_NONCQ = BIT_ULL(__ATA_QUIRK_NONCQ), 97 + ATA_QUIRK_BROKEN_HPA = BIT_ULL(__ATA_QUIRK_BROKEN_HPA), 98 + ATA_QUIRK_DISABLE = BIT_ULL(__ATA_QUIRK_DISABLE), 99 + ATA_QUIRK_HPA_SIZE = BIT_ULL(__ATA_QUIRK_HPA_SIZE), 100 + ATA_QUIRK_IVB = BIT_ULL(__ATA_QUIRK_IVB), 101 + ATA_QUIRK_STUCK_ERR = BIT_ULL(__ATA_QUIRK_STUCK_ERR), 102 + ATA_QUIRK_BRIDGE_OK = BIT_ULL(__ATA_QUIRK_BRIDGE_OK), 103 + ATA_QUIRK_ATAPI_MOD16_DMA = BIT_ULL(__ATA_QUIRK_ATAPI_MOD16_DMA), 104 + ATA_QUIRK_FIRMWARE_WARN = BIT_ULL(__ATA_QUIRK_FIRMWARE_WARN), 105 + ATA_QUIRK_1_5_GBPS = BIT_ULL(__ATA_QUIRK_1_5_GBPS), 106 + ATA_QUIRK_NOSETXFER = BIT_ULL(__ATA_QUIRK_NOSETXFER), 107 + ATA_QUIRK_BROKEN_FPDMA_AA = BIT_ULL(__ATA_QUIRK_BROKEN_FPDMA_AA), 108 + ATA_QUIRK_DUMP_ID = BIT_ULL(__ATA_QUIRK_DUMP_ID), 109 + ATA_QUIRK_MAX_SEC_LBA48 = BIT_ULL(__ATA_QUIRK_MAX_SEC_LBA48), 110 + ATA_QUIRK_ATAPI_DMADIR = BIT_ULL(__ATA_QUIRK_ATAPI_DMADIR), 111 + ATA_QUIRK_NO_NCQ_TRIM = BIT_ULL(__ATA_QUIRK_NO_NCQ_TRIM), 112 + ATA_QUIRK_NOLPM = BIT_ULL(__ATA_QUIRK_NOLPM), 113 + ATA_QUIRK_WD_BROKEN_LPM = BIT_ULL(__ATA_QUIRK_WD_BROKEN_LPM), 114 + ATA_QUIRK_ZERO_AFTER_TRIM = BIT_ULL(__ATA_QUIRK_ZERO_AFTER_TRIM), 115 + ATA_QUIRK_NO_DMA_LOG = BIT_ULL(__ATA_QUIRK_NO_DMA_LOG), 116 + ATA_QUIRK_NOTRIM = BIT_ULL(__ATA_QUIRK_NOTRIM), 117 + ATA_QUIRK_MAX_SEC = BIT_ULL(__ATA_QUIRK_MAX_SEC), 118 + ATA_QUIRK_MAX_TRIM_128M = BIT_ULL(__ATA_QUIRK_MAX_TRIM_128M), 119 + ATA_QUIRK_NO_NCQ_ON_ATI = BIT_ULL(__ATA_QUIRK_NO_NCQ_ON_ATI), 120 + ATA_QUIRK_NO_LPM_ON_ATI = BIT_ULL(__ATA_QUIRK_NO_LPM_ON_ATI), 121 + ATA_QUIRK_NO_ID_DEV_LOG = BIT_ULL(__ATA_QUIRK_NO_ID_DEV_LOG), 122 + ATA_QUIRK_NO_LOG_DIR = BIT_ULL(__ATA_QUIRK_NO_LOG_DIR), 123 + ATA_QUIRK_NO_FUA = BIT_ULL(__ATA_QUIRK_NO_FUA), 124 124 }; 125 125 126 126 enum { ··· 719 723 struct ata_device { 720 724 struct ata_link *link; 721 725 unsigned int devno; /* 0 or 1 */ 722 - unsigned int quirks; /* List of broken features */ 726 + u64 quirks; /* List of broken features */ 723 727 unsigned long flags; /* ATA_DFLAG_xxx */ 724 728 struct scsi_device *sdev; /* attached SCSI device */ 725 729 void *private_data; ··· 898 902 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE + 1]; 899 903 u64 qc_active; 900 904 int nr_active_links; /* #links with active qcs */ 905 + 906 + struct work_struct deferred_qc_work; 907 + struct ata_queued_cmd *deferred_qc; 901 908 902 909 struct ata_link link; /* host default link */ 903 910 struct ata_link *slave_link; /* see ata_slave_link_init() */

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