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Merge tag 'amlogic-arm64-dt-for-v6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt

Amlogic ARM64 DT changes for v6.2:
- meson-gxl: add SPI pinctrl nodes for CLK
- meson-gxbb: add SPI pinctrl nodes for CLK
- Enable active coling using gpio-fan on Odroid N2/N2+
- remove clock-frequency from rtc
- Update cache properties for amlogic
- Add DDR PMU node for G12 series SoC
- document Odroid Go Ultra compatible
- add initial Odroid Go Ultra DTS

* tag 'amlogic-arm64-dt-for-v6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
arm64: dts: amlogic: add initial Odroid Go Ultra DTS
dt-bindings: amlogic: document Odroid Go Ultra compatible
arm64: dts: meson: Add DDR PMU node
arm64: dts: Update cache properties for amlogic
arm64: dts: meson: remove clock-frequency from rtc
arm64: dts: meson: Enable active coling using gpio-fan on Odroid N2/N2+
arm64: dts: meson-gxbb: add SPI pinctrl nodes for CLK
arm64: dts: meson-gxl: add SPI pinctrl nodes for CLK

Link: https://lore.kernel.org/r/8faa1d3c-5a17-2c3f-92d1-f8fe3df74131@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+818 -3
+1
Documentation/devicetree/bindings/arm/amlogic.yaml
··· 163 163 - azw,gsking-x 164 164 - azw,gtking 165 165 - azw,gtking-pro 166 + - hardkernel,odroid-go-ultra 166 167 - hardkernel,odroid-n2 167 168 - hardkernel,odroid-n2-plus 168 169 - khadas,vim3
+1
arch/arm64/boot/dts/amlogic/Makefile
··· 12 12 dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb 13 13 dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb 14 14 dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb 15 + dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-go-ultra.dtb 15 16 dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2-plus.dtb 16 17 dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2.dtb 17 18 dtb-$(CONFIG_ARCH_MESON) += meson-g12b-s922x-khadas-vim3.dtb
+1
arch/arm64/boot/dts/amlogic/meson-a1.dtsi
··· 36 36 37 37 l2: l2-cache0 { 38 38 compatible = "cache"; 39 + cache-level = <2>; 39 40 }; 40 41 }; 41 42
+1
arch/arm64/boot/dts/amlogic/meson-axg.dtsi
··· 105 105 106 106 l2: l2-cache0 { 107 107 compatible = "cache"; 108 + cache-level = <2>; 108 109 }; 109 110 }; 110 111
+6
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
··· 1705 1705 }; 1706 1706 }; 1707 1707 1708 + pmu: pmu@ff638000 { 1709 + reg = <0x0 0xff638000 0x0 0x100>, 1710 + <0x0 0xff638c00 0x0 0x100>; 1711 + interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>; 1712 + }; 1713 + 1708 1714 aobus: bus@ff800000 { 1709 1715 compatible = "simple-bus"; 1710 1716 reg = <0x0 0xff800000 0x0 0x100000>;
+5
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
··· 50 50 51 51 l2: l2-cache0 { 52 52 compatible = "cache"; 53 + cache-level = <2>; 53 54 }; 54 55 }; 55 56 ··· 133 132 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 134 133 }; 135 134 }; 135 + }; 136 + 137 + &pmu { 138 + compatible = "amlogic,g12a-ddr-pmu"; 136 139 };
+722
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Copyright (c) 2022 Neil Armstrong <neil.armstrong@linaro.org> 4 + */ 5 + 6 + /dts-v1/; 7 + 8 + #include "meson-g12b-s922x.dtsi" 9 + #include <dt-bindings/input/input.h> 10 + #include <dt-bindings/leds/common.h> 11 + #include <dt-bindings/gpio/meson-g12a-gpio.h> 12 + #include <dt-bindings/sound/meson-g12a-toacodec.h> 13 + #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 14 + 15 + / { 16 + compatible = "hardkernel,odroid-go-ultra", "amlogic,s922x", "amlogic,g12b"; 17 + model = "Hardkernel ODROID-GO-Ultra"; 18 + 19 + aliases { 20 + serial0 = &uart_AO; 21 + rtc0 = &vrtc; 22 + }; 23 + 24 + adc-joystick-left { 25 + compatible = "adc-joystick"; 26 + io-channels = <&saradc 2>, <&saradc 3>; 27 + poll-interval = <10>; 28 + #address-cells = <1>; 29 + #size-cells = <0>; 30 + 31 + axis@0 { 32 + reg = <0>; 33 + linux,code = <ABS_Y>; 34 + abs-range = <3150 950>; 35 + abs-fuzz = <32>; 36 + abs-flat = <64>; 37 + }; 38 + axis@1 { 39 + reg = <1>; 40 + linux,code = <ABS_X>; 41 + abs-range = <700 2900>; 42 + abs-fuzz = <32>; 43 + abs-flat = <64>; 44 + }; 45 + }; 46 + 47 + adc-joystick-right { 48 + compatible = "adc-joystick"; 49 + io-channels = <&saradc 0>, <&saradc 1>; 50 + poll-interval = <10>; 51 + #address-cells = <1>; 52 + #size-cells = <0>; 53 + 54 + axis@0 { 55 + reg = <0>; 56 + linux,code = <ABS_RY>; 57 + abs-range = <3150 950>; 58 + abs-fuzz = <32>; 59 + abs-flat = <64>; 60 + }; 61 + axis@1 { 62 + reg = <1>; 63 + linux,code = <ABS_RX>; 64 + abs-range = <800 3000>; 65 + abs-fuzz = <32>; 66 + abs-flat = <64>; 67 + }; 68 + }; 69 + 70 + chosen { 71 + stdout-path = "serial0:115200n8"; 72 + }; 73 + 74 + codec_clk: codec-clk { 75 + compatible = "fixed-clock"; 76 + clock-frequency = <12288000>; 77 + clock-output-names = "codec_clk"; 78 + #clock-cells = <0>; 79 + }; 80 + 81 + gpio-keys { 82 + compatible = "gpio-keys-polled"; 83 + poll-interval = <10>; 84 + pinctrl-0 = <&keypad_gpio_pins>; 85 + pinctrl-names = "default"; 86 + 87 + volume-up-button { 88 + label = "VOLUME-UP"; 89 + linux,code = <KEY_VOLUMEUP>; 90 + gpios = <&gpio GPIOX_8 GPIO_ACTIVE_LOW>; 91 + }; 92 + volume-down-button { 93 + label = "VOLUME-DOWN"; 94 + linux,code = <KEY_VOLUMEDOWN>; 95 + gpios = <&gpio GPIOX_9 GPIO_ACTIVE_LOW>; 96 + }; 97 + dpad-up-button { 98 + label = "DPAD-UP"; 99 + linux,code = <BTN_DPAD_UP>; 100 + gpios = <&gpio GPIOX_0 GPIO_ACTIVE_LOW>; 101 + }; 102 + dpad-down-button { 103 + label = "DPAD-DOWN"; 104 + linux,code = <BTN_DPAD_DOWN>; 105 + gpios = <&gpio GPIOX_1 GPIO_ACTIVE_LOW>; 106 + }; 107 + dpad-left-button { 108 + label = "DPAD-LEFT"; 109 + linux,code = <BTN_DPAD_LEFT>; 110 + gpios = <&gpio GPIOX_2 GPIO_ACTIVE_LOW>; 111 + }; 112 + dpad-right-button { 113 + label = "DPAD-RIGHT"; 114 + linux,code = <BTN_DPAD_RIGHT>; 115 + gpios = <&gpio GPIOX_3 GPIO_ACTIVE_LOW>; 116 + }; 117 + a-button { 118 + label = "A"; 119 + linux,code = <BTN_EAST>; 120 + gpios = <&gpio GPIOX_4 GPIO_ACTIVE_LOW>; 121 + }; 122 + b-button { 123 + label = "B"; 124 + linux,code = <BTN_SOUTH>; 125 + gpios = <&gpio GPIOX_5 GPIO_ACTIVE_LOW>; 126 + }; 127 + y-button { 128 + label = "Y"; 129 + linux,code = <BTN_WEST>; 130 + gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; 131 + }; 132 + x-button { 133 + label = "X"; 134 + linux,code = <BTN_NORTH>; 135 + gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>; 136 + }; 137 + f1-button { 138 + label = "F1"; 139 + linux,code = <BTN_TRIGGER_HAPPY1>; 140 + gpios = <&gpio GPIOX_17 GPIO_ACTIVE_LOW>; 141 + }; 142 + f2-button { 143 + label = "F2"; 144 + linux,code = <BTN_TRIGGER_HAPPY2>; 145 + gpios = <&gpio GPIOX_10 GPIO_ACTIVE_LOW>; 146 + }; 147 + f3-button { 148 + label = "F3"; 149 + linux,code = <BTN_TRIGGER_HAPPY3>; 150 + gpios = <&gpio GPIOX_11 GPIO_ACTIVE_LOW>; 151 + }; 152 + f4-button { 153 + label = "F4"; 154 + linux,code = <BTN_TRIGGER_HAPPY4>; 155 + gpios = <&gpio GPIOX_12 GPIO_ACTIVE_LOW>; 156 + }; 157 + f5-button { 158 + label = "F5"; 159 + linux,code = <BTN_TRIGGER_HAPPY5>; 160 + gpios = <&gpio GPIOX_13 GPIO_ACTIVE_LOW>; 161 + }; 162 + f6-button { 163 + label = "F6"; 164 + linux,code = <BTN_TRIGGER_HAPPY6>; 165 + gpios = <&gpio GPIOX_16 GPIO_ACTIVE_LOW>; 166 + }; 167 + top-left-button { 168 + label = "TOP Left"; 169 + linux,code = <BTN_TL>; 170 + gpios = <&gpio GPIOX_14 GPIO_ACTIVE_LOW>; 171 + }; 172 + top-left2-button { 173 + label = "TOP Left 2"; 174 + linux,code = <BTN_TL2>; 175 + gpios = <&gpio GPIOX_19 GPIO_ACTIVE_LOW>; 176 + }; 177 + top-right-button { 178 + label = "TOP Right"; 179 + linux,code = <BTN_TR>; 180 + gpios = <&gpio GPIOX_15 GPIO_ACTIVE_LOW>; 181 + }; 182 + top-right2-button { 183 + label = "TOP Right 2"; 184 + linux,code = <BTN_TR2>; 185 + gpios = <&gpio GPIOX_18 GPIO_ACTIVE_LOW>; 186 + }; 187 + }; 188 + 189 + memory@0 { 190 + device_type = "memory"; 191 + reg = <0x0 0x0 0x0 0x40000000>; 192 + }; 193 + 194 + emmc_pwrseq: emmc-pwrseq { 195 + compatible = "mmc-pwrseq-emmc"; 196 + reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; 197 + }; 198 + 199 + leds { 200 + compatible = "gpio-leds"; 201 + 202 + led-blue { 203 + color = <LED_COLOR_ID_BLUE>; 204 + gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; 205 + linux,default-trigger = "heartbeat"; 206 + }; 207 + }; 208 + 209 + vdd_sys: regulator-vdd-sys { 210 + compatible = "regulator-fixed"; 211 + regulator-name = "VDD_SYS"; 212 + regulator-min-microvolt = <3800000>; 213 + regulator-max-microvolt = <3800000>; 214 + regulator-always-on; 215 + }; 216 + 217 + sound { 218 + compatible = "amlogic,axg-sound-card"; 219 + model = "Odroid GO Ultra"; 220 + audio-widgets = "Microphone", "Mic Jack", 221 + "Headphone", "Headphones", 222 + "Speaker", "Internal Speakers"; 223 + audio-aux-devs = <&tdmout_b>, <&tdmin_b>, <&speaker_amp>; 224 + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", 225 + "TDM_B Playback", "TDMOUT_B OUT", 226 + "TDMIN_B IN 1", "TDM_B Capture", 227 + "TDMIN_B IN 4", "TDM_B Loopback", 228 + "TODDR_A IN 1", "TDMIN_B OUT", 229 + "MICL", "Mic Jack", 230 + "Headphones", "HPOL", 231 + "Headphones", "HPOR", 232 + "Speaker Amplifier INL", "HPOL", 233 + "Speaker Amplifier INR", "HPOR", 234 + "Internal Speakers", "Speaker Amplifier OUTL", 235 + "Internal Speakers", "Speaker Amplifier OUTR"; 236 + 237 + assigned-clocks = <&clkc CLKID_MPLL2>, 238 + <&clkc CLKID_MPLL0>, 239 + <&clkc CLKID_MPLL1>; 240 + assigned-clock-parents = <0>, <0>, <0>; 241 + assigned-clock-rates = <294912000>, 242 + <270950400>, 243 + <393216000>; 244 + 245 + dai-link-0 { 246 + sound-dai = <&frddr_a>; 247 + }; 248 + 249 + dai-link-1 { 250 + sound-dai = <&toddr_a>; 251 + }; 252 + 253 + dai-link-2 { 254 + sound-dai = <&tdmif_b>; 255 + dai-format = "i2s"; 256 + dai-tdm-slot-tx-mask-0 = <1 1>; 257 + mclk-fs = <256>; 258 + 259 + codec-0 { 260 + sound-dai = <&rk817>; 261 + }; 262 + }; 263 + }; 264 + 265 + speaker_amp: speaker-amplifier { 266 + compatible = "simple-audio-amplifier"; 267 + sound-name-prefix = "Speaker Amplifier"; 268 + VCC-supply = <&hp_5v>; 269 + }; 270 + }; 271 + 272 + &arb { 273 + status = "okay"; 274 + }; 275 + 276 + &cpu0 { 277 + cpu-supply = <&vddcpu_b>; 278 + operating-points-v2 = <&cpu_opp_table_0>; 279 + clocks = <&clkc CLKID_CPU_CLK>; 280 + clock-latency = <50000>; 281 + }; 282 + 283 + &cpu1 { 284 + cpu-supply = <&vddcpu_b>; 285 + operating-points-v2 = <&cpu_opp_table_0>; 286 + clocks = <&clkc CLKID_CPU_CLK>; 287 + clock-latency = <50000>; 288 + }; 289 + 290 + &cpu100 { 291 + cpu-supply = <&vddcpu_a>; 292 + operating-points-v2 = <&cpub_opp_table_1>; 293 + clocks = <&clkc CLKID_CPUB_CLK>; 294 + clock-latency = <50000>; 295 + }; 296 + 297 + &cpu101 { 298 + cpu-supply = <&vddcpu_a>; 299 + operating-points-v2 = <&cpub_opp_table_1>; 300 + clocks = <&clkc CLKID_CPUB_CLK>; 301 + clock-latency = <50000>; 302 + }; 303 + 304 + &cpu102 { 305 + cpu-supply = <&vddcpu_a>; 306 + operating-points-v2 = <&cpub_opp_table_1>; 307 + clocks = <&clkc CLKID_CPUB_CLK>; 308 + clock-latency = <50000>; 309 + }; 310 + 311 + &cpu103 { 312 + cpu-supply = <&vddcpu_a>; 313 + operating-points-v2 = <&cpub_opp_table_1>; 314 + clocks = <&clkc CLKID_CPUB_CLK>; 315 + clock-latency = <50000>; 316 + }; 317 + 318 + /* RK817 only supports 12.5mV steps, round up the values */ 319 + &cpu_opp_table_0 { 320 + opp-1000000000 { 321 + opp-microvolt = <737500>; 322 + }; 323 + opp-1200000000 { 324 + opp-microvolt = <737500>; 325 + }; 326 + opp-1398000000 { 327 + opp-microvolt = <762500>; 328 + }; 329 + opp-1512000000 { 330 + opp-microvolt = <800000>; 331 + }; 332 + opp-1608000000 { 333 + opp-microvolt = <837500>; 334 + }; 335 + opp-1704000000 { 336 + opp-microvolt = <862500>; 337 + }; 338 + opp-1896000000 { 339 + opp-microvolt = <987500>; 340 + }; 341 + opp-1992000000 { 342 + opp-microvolt = <1012500>; 343 + }; 344 + }; 345 + 346 + /* RK818 only supports 12.5mV steps, round up the values */ 347 + &cpub_opp_table_1 { 348 + opp-1000000000 { 349 + opp-microvolt = <775000>; 350 + }; 351 + opp-1200000000 { 352 + opp-microvolt = <775000>; 353 + }; 354 + opp-1398000000 { 355 + opp-microvolt = <800000>; 356 + }; 357 + opp-1512000000 { 358 + opp-microvolt = <825000>; 359 + }; 360 + opp-1608000000 { 361 + opp-microvolt = <862500>; 362 + }; 363 + opp-1704000000 { 364 + opp-microvolt = <900000>; 365 + }; 366 + opp-1800000000 { 367 + opp-microvolt = <987500>; 368 + }; 369 + opp-1908000000 { 370 + opp-microvolt = <1025000>; 371 + }; 372 + }; 373 + 374 + &i2c_AO { 375 + status = "okay"; 376 + pinctrl-0 = <&i2c_ao_sck_pins>, <&i2c_ao_sda_pins>; 377 + pinctrl-names = "default"; 378 + 379 + rk818: pmic@1c { 380 + compatible = "rockchip,rk818"; 381 + reg = <0x1c>; 382 + interrupt-parent = <&gpio_intc>; 383 + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; /* GPIOAO_7 */ 384 + 385 + vcc1-supply = <&vdd_sys>; 386 + vcc2-supply = <&vdd_sys>; 387 + vcc3-supply = <&vdd_sys>; 388 + vcc4-supply = <&vdd_sys>; 389 + vcc6-supply = <&vdd_sys>; 390 + vcc7-supply = <&vcc_2v3>; 391 + vcc8-supply = <&vcc_2v3>; 392 + vcc9-supply = <&vddao_3v3>; 393 + boost-supply = <&vdd_sys>; 394 + switch-supply = <&vdd_sys>; 395 + 396 + regulators { 397 + vddcpu_a: DCDC_REG1 { 398 + regulator-name = "vddcpu_a"; 399 + regulator-always-on; 400 + regulator-boot-on; 401 + regulator-min-microvolt = <775000>; 402 + regulator-max-microvolt = <1025000>; 403 + regulator-ramp-delay = <6001>; 404 + regulator-state-mem { 405 + regulator-on-in-suspend; 406 + regulator-suspend-microvolt = <775000>; 407 + }; 408 + }; 409 + 410 + vdd_ee: DCDC_REG2 { 411 + regulator-name = "vdd_ee"; 412 + regulator-always-on; 413 + regulator-boot-on; 414 + regulator-min-microvolt = <875000>; 415 + regulator-max-microvolt = <1250000>; 416 + regulator-ramp-delay = <6001>; 417 + regulator-state-mem { 418 + regulator-on-in-suspend; 419 + regulator-suspend-microvolt = <875000>; 420 + }; 421 + }; 422 + 423 + vddq_1v1: DCDC_REG3 { 424 + regulator-name = "vddq_1v1"; 425 + regulator-always-on; 426 + regulator-boot-on; 427 + regulator-state-mem { 428 + regulator-on-in-suspend; 429 + }; 430 + }; 431 + 432 + vddao_3v3: DCDC_REG4 { 433 + regulator-always-on; 434 + regulator-boot-on; 435 + regulator-min-microvolt = <3300000>; 436 + regulator-max-microvolt = <3300000>; 437 + regulator-name = "vddao_3v3"; 438 + regulator-state-mem { 439 + regulator-on-in-suspend; 440 + regulator-suspend-microvolt = <3300000>; 441 + }; 442 + }; 443 + 444 + hp_5v: DCDC_BOOST { 445 + regulator-always-on; 446 + regulator-boot-on; 447 + regulator-name = "hp_5v"; 448 + regulator-min-microvolt = <5000000>; 449 + regulator-max-microvolt = <5000000>; 450 + regulator-state-mem { 451 + regulator-off-in-suspend; 452 + }; 453 + }; 454 + 455 + vddio_ao1v8: LDO_REG5 { 456 + regulator-always-on; 457 + regulator-boot-on; 458 + regulator-min-microvolt = <1800000>; 459 + regulator-max-microvolt = <1800000>; 460 + regulator-name = "vddio_ao1v8"; 461 + regulator-state-mem { 462 + regulator-on-in-suspend; 463 + regulator-suspend-microvolt = <1800000>; 464 + }; 465 + }; 466 + 467 + vddq_1v8: LDO_REG7 { 468 + regulator-always-on; 469 + regulator-boot-on; 470 + regulator-min-microvolt = <1800000>; 471 + regulator-max-microvolt = <1800000>; 472 + regulator-name = "vddq_1v8"; 473 + regulator-state-mem { 474 + regulator-on-in-suspend; 475 + regulator-suspend-microvolt = <1800000>; 476 + }; 477 + }; 478 + 479 + vddio_c: LDO_REG9 { 480 + regulator-always-on; 481 + regulator-boot-on; 482 + regulator-min-microvolt = <1800000>; 483 + regulator-max-microvolt = <3300000>; 484 + regulator-name = "vddio_c"; 485 + regulator-state-mem { 486 + regulator-on-in-suspend; 487 + regulator-suspend-microvolt = <3300000>; 488 + }; 489 + }; 490 + 491 + vcc_sd: SWITCH_REG { 492 + regulator-name = "vcc_sd"; 493 + regulator-always-on; 494 + regulator-boot-on; 495 + regulator-min-microvolt = <3300000>; 496 + regulator-max-microvolt = <3300000>; 497 + regulator-state-mem { 498 + regulator-on-in-suspend; 499 + }; 500 + }; 501 + 502 + OTG_SWITCH { 503 + regulator-name = "otg_switch"; 504 + regulator-state-mem { 505 + regulator-off-in-suspend; 506 + }; 507 + }; 508 + }; 509 + }; 510 + }; 511 + 512 + &i2c3 { 513 + status = "okay"; 514 + pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; 515 + pinctrl-names = "default"; 516 + 517 + rk817: pmic@20 { 518 + compatible = "rockchip,rk817"; 519 + reg = <0x20>; 520 + interrupt-parent = <&gpio_intc>; 521 + 522 + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; /* GPIOAO_5 */ 523 + 524 + vcc1-supply = <&vdd_sys>; 525 + vcc2-supply = <&vdd_sys>; 526 + vcc3-supply = <&vdd_sys>; 527 + vcc4-supply = <&vdd_sys>; 528 + vcc5-supply = <&vdd_sys>; 529 + vcc6-supply = <&vdd_sys>; 530 + vcc7-supply = <&vdd_sys>; 531 + vcc8-supply = <&vdd_sys>; 532 + vcc9-supply = <&rk817_boost>; 533 + 534 + #sound-dai-cells = <0>; 535 + clocks = <&codec_clk>; 536 + clock-names = "mclk"; 537 + 538 + #clock-cells = <1>; 539 + 540 + regulators { 541 + vddcpu_b: DCDC_REG2 { 542 + regulator-always-on; 543 + regulator-boot-on; 544 + regulator-min-microvolt = <737500>; 545 + regulator-max-microvolt = <1012500>; 546 + regulator-ramp-delay = <6001>; 547 + regulator-initial-mode = <0x2>; 548 + regulator-name = "vddcpu_b"; 549 + regulator-state-mem { 550 + regulator-on-in-suspend; 551 + regulator-suspend-microvolt = <1000000>; 552 + }; 553 + }; 554 + 555 + vcc_2v3: DCDC_REG3 { 556 + regulator-always-on; 557 + regulator-boot-on; 558 + regulator-min-microvolt = <2300000>; 559 + regulator-max-microvolt = <2400000>; 560 + regulator-initial-mode = <0x2>; 561 + regulator-name = "vcc_2v3"; 562 + regulator-state-mem { 563 + regulator-on-in-suspend; 564 + }; 565 + }; 566 + 567 + LDO_REG4 { 568 + regulator-always-on; 569 + regulator-boot-on; 570 + regulator-min-microvolt = <3300000>; 571 + regulator-max-microvolt = <3300000>; 572 + regulator-name = "vdd_codec"; 573 + regulator-state-mem { 574 + regulator-off-in-suspend; 575 + }; 576 + }; 577 + 578 + vcc_lcd: LDO_REG8 { 579 + regulator-min-microvolt = <3300000>; 580 + regulator-max-microvolt = <3300000>; 581 + regulator-name = "vcc_lcd"; 582 + regulator-state-mem { 583 + regulator-off-in-suspend; 584 + }; 585 + }; 586 + 587 + rk817_boost: BOOST { 588 + regulator-always-on; 589 + regulator-boot-on; 590 + regulator-min-microvolt = <5000000>; 591 + regulator-max-microvolt = <5400000>; 592 + regulator-name = "rk817_boost"; 593 + regulator-state-mem { 594 + regulator-off-in-suspend; 595 + }; 596 + }; 597 + 598 + usb_host: OTG_SWITCH { 599 + regulator-name = "usb_host"; 600 + regulator-min-microvolt = <5000000>; 601 + regulator-max-microvolt = <5000000>; 602 + regulator-state-mem { 603 + regulator-off-in-suspend; 604 + }; 605 + }; 606 + }; 607 + }; 608 + }; 609 + 610 + &clkc_audio { 611 + status = "okay"; 612 + }; 613 + 614 + &eth_phy { 615 + status = "disabled"; 616 + }; 617 + 618 + &frddr_a { 619 + status = "okay"; 620 + }; 621 + 622 + &periphs_pinctrl { 623 + keypad_gpio_pins: keypad-gpio { 624 + mux { 625 + groups = "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", 626 + "GPIOX_4", "GPIOX_5", "GPIOX_6", "GPIOX_7", 627 + "GPIOX_8", "GPIOX_9", "GPIOX_10", "GPIOX_11", 628 + "GPIOX_12", "GPIOX_13", "GPIOX_14", "GPIOX_15", 629 + "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19"; 630 + function = "gpio_periphs"; 631 + bias-pull-up; 632 + output-disable; 633 + }; 634 + }; 635 + }; 636 + 637 + &saradc { 638 + status = "okay"; 639 + vref-supply = <&vddio_ao1v8>; 640 + }; 641 + 642 + /* SD card */ 643 + &sd_emmc_b { 644 + status = "okay"; 645 + pinctrl-0 = <&sdcard_c_pins>; 646 + pinctrl-1 = <&sdcard_clk_gate_c_pins>; 647 + pinctrl-names = "default", "clk-gate"; 648 + 649 + bus-width = <4>; 650 + cap-sd-highspeed; 651 + max-frequency = <50000000>; 652 + disable-wp; 653 + 654 + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; 655 + vmmc-supply = <&vcc_sd>; 656 + vqmmc-supply = <&vddio_c>; 657 + 658 + }; 659 + 660 + /* eMMC */ 661 + &sd_emmc_c { 662 + status = "okay"; 663 + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; 664 + pinctrl-1 = <&emmc_clk_gate_pins>; 665 + pinctrl-names = "default", "clk-gate"; 666 + 667 + bus-width = <8>; 668 + cap-mmc-highspeed; 669 + mmc-ddr-1_8v; 670 + mmc-hs200-1_8v; 671 + max-frequency = <200000000>; 672 + disable-wp; 673 + 674 + mmc-pwrseq = <&emmc_pwrseq>; 675 + vmmc-supply = <&vcc_sd>; 676 + vqmmc-supply = <&vddio_ao1v8>; 677 + }; 678 + 679 + 680 + &tdmif_b { 681 + pinctrl-0 = <&tdm_b_dout0_pins>, <&tdm_b_fs_pins>, <&tdm_b_sclk_pins>, <&tdm_b_din1_pins>; 682 + pinctrl-names = "default"; 683 + status = "okay"; 684 + 685 + assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD1>, 686 + <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD1>; 687 + assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_B_SCLK>, 688 + <&clkc_audio AUD_CLKID_MST_B_LRCLK>; 689 + assigned-clock-rates = <0>, <0>; 690 + }; 691 + 692 + &tdmin_b { 693 + status = "okay"; 694 + }; 695 + 696 + &tdmout_b { 697 + status = "okay"; 698 + }; 699 + 700 + &toddr_a { 701 + status = "okay"; 702 + }; 703 + 704 + &uart_AO { 705 + status = "okay"; 706 + pinctrl-0 = <&uart_ao_a_pins>; 707 + pinctrl-names = "default"; 708 + }; 709 + 710 + &usb { 711 + status = "okay"; 712 + dr_mode = "peripheral"; 713 + }; 714 + 715 + &usb2_phy0 { 716 + status = "okay"; 717 + }; 718 + 719 + &usb2_phy1 { 720 + status = "okay"; 721 + phy-supply = <&usb_host>; 722 + };
+42
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
··· 39 39 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; 40 40 }; 41 41 42 + fan: gpio-fan { 43 + compatible = "gpio-fan"; 44 + gpios = <&gpio_ao GPIOAO_10 GPIO_ACTIVE_HIGH>; 45 + /* Using Dummy Speed */ 46 + gpio-fan,speed-map = <0 0>, <1 1>; 47 + #cooling-cells = <2>; 48 + }; 49 + 42 50 leds { 43 51 compatible = "gpio-leds"; 44 52 ··· 416 408 operating-points-v2 = <&cpub_opp_table_1>; 417 409 clocks = <&clkc CLKID_CPUB_CLK>; 418 410 clock-latency = <50000>; 411 + }; 412 + 413 + &cpu_thermal { 414 + trips { 415 + cpu_active: cpu-active { 416 + temperature = <60000>; /* millicelsius */ 417 + hysteresis = <2000>; /* millicelsius */ 418 + type = "active"; 419 + }; 420 + }; 421 + 422 + cooling-maps { 423 + map { 424 + trip = <&cpu_active>; 425 + cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 426 + }; 427 + }; 428 + }; 429 + 430 + &ddr_thermal { 431 + trips { 432 + ddr_active: ddr-active { 433 + temperature = <60000>; /* millicelsius */ 434 + hysteresis = <2000>; /* millicelsius */ 435 + type = "active"; 436 + }; 437 + }; 438 + 439 + cooling-maps { 440 + map { 441 + trip = <&ddr_active>; 442 + cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 443 + }; 444 + }; 419 445 }; 420 446 421 447 &ext_mdio {
+5
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
··· 105 105 106 106 l2: l2-cache0 { 107 107 compatible = "cache"; 108 + cache-level = <2>; 108 109 }; 109 110 }; 110 111 }; ··· 139 138 140 139 &mali { 141 140 dma-coherent; 141 + }; 142 + 143 + &pmu { 144 + compatible = "amlogic,g12b-ddr-pmu"; 142 145 };
+1
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
··· 132 132 133 133 l2: l2-cache0 { 134 134 compatible = "cache"; 135 + cache-level = <2>; 135 136 }; 136 137 }; 137 138
+14
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
··· 427 427 }; 428 428 }; 429 429 430 + spi_idle_high_pins: spi-idle-high-pins { 431 + mux { 432 + groups = "spi_sclk"; 433 + bias-pull-up; 434 + }; 435 + }; 436 + 437 + spi_idle_low_pins: spi-idle-low-pins { 438 + mux { 439 + groups = "spi_sclk"; 440 + bias-pull-down; 441 + }; 442 + }; 443 + 430 444 spi_ss0_pins: spi-ss0 { 431 445 mux { 432 446 groups = "spi_ss0";
-1
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
··· 140 140 compatible = "haoyu,hym8563"; 141 141 reg = <0x51>; 142 142 #clock-cells = <0>; 143 - clock-frequency = <32768>; 144 143 clock-output-names = "xin32k"; 145 144 }; 146 145 };
+14
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
··· 429 429 }; 430 430 }; 431 431 432 + spi_idle_high_pins: spi-idle-high-pins { 433 + mux { 434 + groups = "spi_sclk"; 435 + bias-pull-up; 436 + }; 437 + }; 438 + 439 + spi_idle_low_pins: spi-idle-low-pins { 440 + mux { 441 + groups = "spi_sclk"; 442 + bias-pull-down; 443 + }; 444 + }; 445 + 432 446 spi_ss0_pins: spi-ss0 { 433 447 mux { 434 448 groups = "spi_ss0";
-1
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
··· 270 270 compatible = "haoyu,hym8563"; 271 271 reg = <0x51>; 272 272 #clock-cells = <0>; 273 - clock-frequency = <32768>; 274 273 clock-output-names = "xin32k"; 275 274 }; 276 275 };
-1
arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts
··· 89 89 compatible = "haoyu,hym8563"; 90 90 reg = <0x51>; 91 91 #clock-cells = <0>; 92 - clock-frequency = <32768>; 93 92 clock-output-names = "xin32k"; 94 93 wakeup-source; 95 94 };
+5
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
··· 88 88 89 89 l2: l2-cache0 { 90 90 compatible = "cache"; 91 + cache-level = <2>; 91 92 }; 92 93 }; 93 94 ··· 519 518 520 519 &pcie { 521 520 power-domains = <&pwrc PWRC_SM1_PCIE_ID>; 521 + }; 522 + 523 + &pmu { 524 + compatible = "amlogic,sm1-ddr-pmu"; 522 525 }; 523 526 524 527 &pwrc {