Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amdgpu: set CP_HQD_PQ_DOORBELL_CONTROL.DOORBELL_MODE to 1 for sriov multiple vf.
In sriov multiple vf, Set CP_HQD_PQ_DOORBELL_CONTROL.DOORBELL_MODE to 1 to read WPTR from MQD.
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Emily Deng
and committed by
Alex Deucher
2da3af5f
8d5e70ba
+25
-4
+1
-1
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+1
-1
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
···
1821
1821
DOORBELL_SOURCE, 0);
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1822
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
1823
1823
DOORBELL_HIT, 0);
1824
-
if (amdgpu_sriov_vf(adev))
1824
+
if (amdgpu_sriov_multi_vf_mode(adev))
1825
1825
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
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1826
DOORBELL_MODE, 1);
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1827
} else {
+24
-3
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
+24
-3
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
···
554
554
m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK |
555
555
1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT |
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1 << CP_HQD_PQ_CONTROL__KMD_QUEUE__SHIFT;
557
-
if (amdgpu_sriov_vf(mm->dev->adev))
557
+
if (amdgpu_sriov_multi_vf_mode(mm->dev->adev))
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m->cp_hqd_pq_doorbell_control |= 1 <<
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CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
560
560
m->cp_mqd_stride_size = kfd_hiq_mqd_stride(mm->dev);
···
667
667
get_xcc_mqd(mqd_mem_obj, &xcc_mqd_mem_obj, offset*xcc);
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668
669
669
init_mqd(mm, (void **)&m, &xcc_mqd_mem_obj, &xcc_gart_addr, q);
670
-
670
+
if (amdgpu_sriov_multi_vf_mode(mm->dev->adev))
671
+
m->cp_hqd_pq_doorbell_control |= 1 <<
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+
CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
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m->cp_mqd_stride_size = offset;
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674
673
675
/*
···
729
727
m = get_mqd(mqd + size * xcc);
730
728
update_mqd(mm, m, q, minfo);
731
729
730
+
if (amdgpu_sriov_multi_vf_mode(mm->dev->adev))
731
+
m->cp_hqd_pq_doorbell_control |= 1 <<
732
+
CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
732
733
update_cu_mask(mm, m, minfo, xcc);
733
734
734
735
if (q->format == KFD_QUEUE_FORMAT_AQL) {
···
754
749
}
755
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}
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+
static void restore_mqd_v9_4_3(struct mqd_manager *mm, void **mqd,
753
+
struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
754
+
struct queue_properties *qp,
755
+
const void *mqd_src,
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+
const void *ctl_stack_src, u32 ctl_stack_size)
757
+
{
758
+
restore_mqd(mm, mqd, mqd_mem_obj, gart_addr, qp, mqd_src, ctl_stack_src, ctl_stack_size);
759
+
if (amdgpu_sriov_multi_vf_mode(mm->dev->adev)) {
760
+
struct v9_mqd *m;
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+
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+
m = (struct v9_mqd *) mqd_mem_obj->cpu_ptr;
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+
m->cp_hqd_pq_doorbell_control |= 1 <<
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+
CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
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+
}
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+
}
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767
static int destroy_mqd_v9_4_3(struct mqd_manager *mm, void *mqd,
758
768
enum kfd_preempt_type type, unsigned int timeout,
759
769
uint32_t pipe_id, uint32_t queue_id)
···
903
883
mqd->is_occupied = kfd_is_occupied_cp;
904
884
mqd->get_checkpoint_info = get_checkpoint_info;
905
885
mqd->checkpoint_mqd = checkpoint_mqd;
906
-
mqd->restore_mqd = restore_mqd;
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mqd->mqd_size = sizeof(struct v9_mqd);
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mqd->mqd_stride = mqd_stride_v9;
909
888
#if defined(CONFIG_DEBUG_FS)
···
914
895
mqd->init_mqd = init_mqd_v9_4_3;
915
896
mqd->load_mqd = load_mqd_v9_4_3;
916
897
mqd->update_mqd = update_mqd_v9_4_3;
898
+
mqd->restore_mqd = restore_mqd_v9_4_3;
917
899
mqd->destroy_mqd = destroy_mqd_v9_4_3;
918
900
mqd->get_wave_state = get_wave_state_v9_4_3;
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901
} else {
920
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mqd->init_mqd = init_mqd;
921
903
mqd->load_mqd = load_mqd;
922
904
mqd->update_mqd = update_mqd;
905
+
mqd->restore_mqd = restore_mqd;
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906
mqd->destroy_mqd = kfd_destroy_mqd_cp;
924
907
mqd->get_wave_state = get_wave_state;
925
908
}