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Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c fixes from Wolfram Sang:

- I2C core bugfix regarding bus recovery

- driver bugfix for the tegra driver

- typo correction

* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: recovery: if possible send STOP with recovery pulses
i2c: tegra: Fix NACK error handling
i2c: stu300: use non-archaic spelling of failes

+19 -11
+1 -1
drivers/i2c/busses/i2c-stu300.c
··· 127 127 128 128 /* 129 129 * The number of address send athemps tried before giving up. 130 - * If the first one failes it seems like 5 to 8 attempts are required. 130 + * If the first one fails it seems like 5 to 8 attempts are required. 131 131 */ 132 132 #define NUM_ADDR_RESEND_ATTEMPTS 12 133 133
+8 -9
drivers/i2c/busses/i2c-tegra.c
··· 545 545 { 546 546 u32 cnfg; 547 547 548 + /* 549 + * NACK interrupt is generated before the I2C controller generates 550 + * the STOP condition on the bus. So wait for 2 clock periods 551 + * before disabling the controller so that the STOP condition has 552 + * been delivered properly. 553 + */ 554 + udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate)); 555 + 548 556 cnfg = i2c_readl(i2c_dev, I2C_CNFG); 549 557 if (cnfg & I2C_CNFG_PACKET_MODE_EN) 550 558 i2c_writel(i2c_dev, cnfg & ~I2C_CNFG_PACKET_MODE_EN, I2C_CNFG); ··· 713 705 714 706 if (likely(i2c_dev->msg_err == I2C_ERR_NONE)) 715 707 return 0; 716 - 717 - /* 718 - * NACK interrupt is generated before the I2C controller generates 719 - * the STOP condition on the bus. So wait for 2 clock periods 720 - * before resetting the controller so that the STOP condition has 721 - * been delivered properly. 722 - */ 723 - if (i2c_dev->msg_err == I2C_ERR_NO_ACK) 724 - udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate)); 725 708 726 709 tegra_i2c_init(i2c_dev); 727 710 if (i2c_dev->msg_err == I2C_ERR_NO_ACK) {
+10 -1
drivers/i2c/i2c-core-base.c
··· 198 198 199 199 val = !val; 200 200 bri->set_scl(adap, val); 201 - ndelay(RECOVERY_NDELAY); 201 + 202 + /* 203 + * If we can set SDA, we will always create STOP here to ensure 204 + * the additional pulses will do no harm. This is achieved by 205 + * letting SDA follow SCL half a cycle later. 206 + */ 207 + ndelay(RECOVERY_NDELAY / 2); 208 + if (bri->set_sda) 209 + bri->set_sda(adap, val); 210 + ndelay(RECOVERY_NDELAY / 2); 202 211 } 203 212 204 213 /* check if recovery actually succeeded */