Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'iio-for-6.11a' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-testing
Jonathan writes:
IIO: 1st set of new device support, cleanups etc for 6.11
Lots of new device support and 3 entirely new drivers.
Early pull request this cycle to allow for clean picking up of fixes
that are dependencies for some queued patch sets.
Device support
==============
adi,ad3552r
- Add AD3541R and AD3551R - single output variants of already supported
DACs.
adi,ad7192
- Add support for ad7194 24-bit ADC with integrated PGA.
adi,ad7380
- New ADC driver built up in a number of steps. Supports
- 2 channel differential ADCs: AD7380, AD7381
- 4 channel differential ADCs: AD7380-4, AD7381-4
- 2 channel pseudo-differential ADCs: AD7383, AD7384
- 4 channel pseudo-differential ADCs: AD7383-4, AD7384-4
adi,adis16475
- Support ADS16501 variant - ID and some different scale factors from
parts already supported.
- Driver refactoring then enables support for 6 more IMUs:
- ADIS16575-[2,3]
- ADIS16576-[2,3]
- ADIS16577-[2,3]
adi,adsi16480
- Driver refactoring and feature additions leading to support for 6 more
IMUs - with new delta angle and delta velocity feature:
- ADIS16545-[1,2,3]
- ADIS16547-[1,2,3]
bosch,bmi160
- Support for the bmi120 IMU: ID only. Also relax ID checking to warn
only on mismatch allowing use of fallback compatibles for new devices.
sciosense,ens160
- New driver for this metal oxide multi-gas sensor for indoor
air quality monitoring.
sensortek,stk3110
- Support for stk3311a and stk3311s34 light sensor variants. Relax ID
checking to warn only on a mismatch allowing use of fallback compatibles
for new devices.
vishay,veml6040
- New driver for this RGBW light sensor. Note that whilst the register
interface is very different, the dt-binding similar enough that it is
shared with the existing vishay,veml6075 binding
x-powers,axp20x
- Add support for axp192, very similar to another supported PMIC ADC variant
but with a few more GPIO channels.
Dt-binding only
===============
ti,ads1015
- Add binding (no driver support yet) for ti,tla2021
New features
============
core
- Variable scan type support. We have papered over this for a long time
so good to finally resolve it.
Some devices will change their data output format (typically resolution)
dependent on settings such as oversampling. A new callback is added
to enable this. First used in the ad7380 driver.
- Harden the core against missing callback functions.
dt-binding:
- Add a single-channel property that can be used in per channel nodes
instead of reg to indicate which device channel. This is important
in devices with a mixture of differential and single ended channels
as reg already just acted as an index for the differential channels
making things inconsistent if it had more meaning for single ended
channels.
adi,ad7380
- Use spi_optimize_message() to reduce reading message setup overhead.
- Add oversampling support using the new core functionality to allow
a device support multiple scan types.
invense,icm42600
- Support for low-power accelerometer modes. When a given sampling
frequency is only supported at one power mode, use that. Otherwise
default to low power at the cost of some noise unless overridden
via a new sysfs attribute.
silicon-labs,si70720
- Add control of the heater.
Cleanups and minor fixes
========================
core
- Cleanup use of sizeof(struct xxxx) in favor of sizeof(*variable)
Makefile
- Resort the iio/adc/Makefile which has drifted away from alphabetical
order.
gts library
- Fix sorting of lists with a zero in the middle. Doesn't happen with
upstream drivers, but good to harden this code. Add a related unit test.
multiple drivers
- Add missing MODULE_DESCRIPTION()
- Drop some unused structure fields.
- Drop some entirely unused structure definitions.
- Stop pointless initialization of i2c_device_id::driver_data to 0 in drivers
where it isn't used.
- Use spi_get_device_match_data() to replace open-coded equivalent.
adi,ad3552r
- Fix dt gain parameter names to reflect what the driver does. Note
discussion in patch to justify fixing it in the binding not the
driver.
- Tidy up some naming.
adi,ad7192
- Use read_avail() callback to handle the low pass filter.
- Add an aincom supply for pseudo differential operation.
adi,ad7606
- Use iio_device_claim_direct_scoped() to simplify error paths.
adi,ad7944
- Drop an unused function parameter.
adi,adrf6780
- Drop unused header.
adi,ad9467
- Use a DMA safe buffer for SPI transfers.
- Stop using tabs to pad structure field names. It was creating a lot
of noise.
adi,axi-adc
- Prevent races between enable and disable calls.
- Ensure the DRP (dynamic reconfiguration port) is locked. Not used
in most real designs, but better safe than sorry.
- Limit build to COMPILE_TEST or platforms for which the IP exists.
adi,axi-dac
- Limit build to COMPILE_TEST or platforms for which the IP exists.
ams,iaq
- Use __packed instead of ___attribute__((__packed__))
bosch,bmp280
- White space cleanup.
- Use BME280 prefix for registers that do not exist on the BMP280.
- Add parameter names to callback function definitions.
- Rename measure function to better reflect what it does which is wait
for a measurement to happen.
- Drop a redundant error check.
- Improve error messages
- Make error checks consistent as if (ret)
- Use unsigned types for inherently unsigned data.
- Refactor reading functions to not rely on a hidden t_fine variable.
- Make use of cleanup.h
freescale,mma7660
- Add mount matrix support.
invense,icm42600
- Enable the regmap cache to reduce bus accesses.
amlogic,meson-saradc
- Add dt-binding support for power-domains.
ti,adc161s626
- Use iio_device_claim_direct_scoped() to simplify error handling.
* tag 'iio-for-6.11a' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (107 commits)
iio: imu: inv_icm42600: add support of accel low-power mode
iio: document inv_icm42600 driver private sysfs attributes
MAINTAINERS: Add ScioSense ENS160
iio: chemical: ens160: add power management support
iio: chemical: ens160: add triggered buffer support
iio: chemical: add driver for ENS160 sensor
dt-bindings: iio: chemical: add ENS160 sensor
dt-bindings: vendor-prefixes: add ScioSense
iio: temperature: mcp9600: add threshold events support
dt-bindings: iio: light: add VEML6040 RGBW-LS
iio: light: driver for Vishay VEML6040
dt-bindings: iio: adc: amlogic,meson-saradc: add optional power-domains
iio: dac: adi-axi-dac: add platform dependencies
iio: adc: adi-axi-adc: add platform dependencies
iio: imu: inv_icm42600: add register caching in the regmap
iio: adc: mcp3564: drop redundant open-coded spi_get_device_match_data()
iio: dac: max5522: simplify with spi_get_device_match_data()
iio: addac: ad74413r: simplify with spi_get_device_match_data()
iio: adc: ti-tsc2046: simplify with spi_get_device_match_data()
iio: adc: ti-ads131e08: simplify with spi_get_device_match_data()
...
+6068
-1152
+18
Documentation/ABI/testing/sysfs-bus-iio-inv_icm42600
+18
Documentation/ABI/testing/sysfs-bus-iio-inv_icm42600
···
1
+
What: /sys/bus/iio/devices/iio:deviceX/in_accel_power_mode
2
+
KernelVersion: 6.11
3
+
Contact: linux-iio@vger.kernel.org
4
+
Description:
5
+
Accelerometer power mode. Setting this attribute will set the
6
+
requested power mode to use if the ODR support it. If ODR
7
+
support only 1 mode, power mode will be enforced.
8
+
Reading this attribute will return the current accelerometer
9
+
power mode if the sensor is on, or the requested value if the
10
+
sensor is off. The value between real and requested value can
11
+
be different for ODR supporting only 1 mode.
12
+
13
+
What: /sys/bus/iio/devices/iio:deviceX/in_accel_power_mode_available
14
+
KernelVersion: 6.11
15
+
Contact: linux-iio@vger.kernel.org
16
+
Description:
17
+
List of available accelerometer power modes that can be set in
18
+
in_accel_power_mode attribute.
+19
Documentation/devicetree/bindings/iio/adc/adc.yaml
+19
Documentation/devicetree/bindings/iio/adc/adc.yaml
···
38
38
The first value specifies the positive input pin, the second
39
39
specifies the negative input pin.
40
40
41
+
single-channel:
42
+
$ref: /schemas/types.yaml#/definitions/uint32
43
+
description:
44
+
When devices combine single-ended and differential channels, allow the
45
+
channel for a single element to be specified, independent of reg (as for
46
+
differential channels). If this and diff-channels are not present reg
47
+
shall be used instead.
48
+
41
49
settling-time-us:
42
50
description:
43
51
Time between enabling the channel and first stable readings.
···
57
49
In some cases, the desired filtering characteristics are a function the
58
50
device design and can interact with other characteristics such as
59
51
settling time.
52
+
53
+
anyOf:
54
+
- oneOf:
55
+
- required:
56
+
- reg
57
+
- diff-channels
58
+
- required:
59
+
- reg
60
+
- single-channel
61
+
- required:
62
+
- reg
60
63
61
64
additionalProperties: true
+95
Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml
+95
Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml
···
21
21
- adi,ad7190
22
22
- adi,ad7192
23
23
- adi,ad7193
24
+
- adi,ad7194
24
25
- adi,ad7195
26
+
27
+
"#address-cells":
28
+
const: 1
29
+
30
+
"#size-cells":
31
+
const: 0
25
32
26
33
reg:
27
34
maxItems: 1
···
47
40
48
41
interrupts:
49
42
maxItems: 1
43
+
44
+
aincom-supply:
45
+
description: |
46
+
AINCOM voltage supply. Analog inputs AINx are referenced to this input
47
+
when configured for pseudo-differential operation.
50
48
51
49
dvdd-supply:
52
50
description: DVdd voltage supply
···
96
84
description: see Documentation/devicetree/bindings/iio/adc/adc.yaml
97
85
type: boolean
98
86
87
+
patternProperties:
88
+
"^channel@[0-9a-f]+$":
89
+
type: object
90
+
$ref: adc.yaml
91
+
unevaluatedProperties: false
92
+
93
+
properties:
94
+
reg:
95
+
description: The channel index.
96
+
minimum: 0
97
+
maximum: 271
98
+
99
+
diff-channels:
100
+
description:
101
+
Both inputs can be connected to pins AIN1 to AIN16 by choosing the
102
+
appropriate value from 1 to 16.
103
+
items:
104
+
minimum: 1
105
+
maximum: 16
106
+
107
+
single-channel:
108
+
description:
109
+
Positive input can be connected to pins AIN1 to AIN16 by choosing the
110
+
appropriate value from 1 to 16. Negative input is connected to AINCOM.
111
+
items:
112
+
minimum: 1
113
+
maximum: 16
114
+
115
+
oneOf:
116
+
- required:
117
+
- reg
118
+
- diff-channels
119
+
- required:
120
+
- reg
121
+
- single-channel
122
+
99
123
required:
100
124
- compatible
101
125
- reg
···
146
98
147
99
allOf:
148
100
- $ref: /schemas/spi/spi-peripheral-props.yaml#
101
+
- if:
102
+
properties:
103
+
compatible:
104
+
enum:
105
+
- adi,ad7190
106
+
- adi,ad7192
107
+
- adi,ad7193
108
+
- adi,ad7195
109
+
then:
110
+
patternProperties:
111
+
"^channel@[0-9a-f]+$": false
149
112
150
113
unevaluatedProperties: false
151
114
···
176
117
clock-names = "mclk";
177
118
interrupts = <25 0x2>;
178
119
interrupt-parent = <&gpio>;
120
+
aincom-supply = <&aincom>;
179
121
dvdd-supply = <&dvdd>;
180
122
avdd-supply = <&avdd>;
181
123
vref-supply = <&vref>;
···
185
125
adi,rejection-60-Hz-enable;
186
126
adi,buffer-enable;
187
127
adi,burnout-currents-enable;
128
+
};
129
+
};
130
+
- |
131
+
spi {
132
+
#address-cells = <1>;
133
+
#size-cells = <0>;
134
+
135
+
adc@0 {
136
+
compatible = "adi,ad7194";
137
+
reg = <0>;
138
+
139
+
#address-cells = <1>;
140
+
#size-cells = <0>;
141
+
142
+
spi-max-frequency = <1000000>;
143
+
spi-cpol;
144
+
spi-cpha;
145
+
clocks = <&ad7192_mclk>;
146
+
clock-names = "mclk";
147
+
interrupts = <25 0x2>;
148
+
interrupt-parent = <&gpio>;
149
+
aincom-supply = <&aincom>;
150
+
dvdd-supply = <&dvdd>;
151
+
avdd-supply = <&avdd>;
152
+
vref-supply = <&vref>;
153
+
154
+
channel@0 {
155
+
reg = <0>;
156
+
diff-channels = <1 6>;
157
+
};
158
+
159
+
channel@1 {
160
+
reg = <1>;
161
+
single-channel = <1>;
162
+
};
188
163
};
189
164
};
+148
Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
+148
Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/iio/adc/adi,ad7380.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Analog Devices Simultaneous Sampling Analog to Digital Converters
8
+
9
+
maintainers:
10
+
- Michael Hennerich <Michael.Hennerich@analog.com>
11
+
- Nuno Sá <nuno.sa@analog.com>
12
+
13
+
description: |
14
+
* https://www.analog.com/en/products/ad7380.html
15
+
* https://www.analog.com/en/products/ad7381.html
16
+
* https://www.analog.com/en/products/ad7383.html
17
+
* https://www.analog.com/en/products/ad7384.html
18
+
* https://www.analog.com/en/products/ad7380-4.html
19
+
* https://www.analog.com/en/products/ad7381-4.html
20
+
* https://www.analog.com/en/products/ad7383-4.html
21
+
* https://www.analog.com/en/products/ad7384-4.html
22
+
23
+
$ref: /schemas/spi/spi-peripheral-props.yaml#
24
+
25
+
properties:
26
+
compatible:
27
+
enum:
28
+
- adi,ad7380
29
+
- adi,ad7381
30
+
- adi,ad7383
31
+
- adi,ad7384
32
+
- adi,ad7380-4
33
+
- adi,ad7381-4
34
+
- adi,ad7383-4
35
+
- adi,ad7384-4
36
+
37
+
reg:
38
+
maxItems: 1
39
+
40
+
spi-max-frequency:
41
+
maximum: 80000000
42
+
spi-cpol: true
43
+
spi-cpha: true
44
+
45
+
vcc-supply:
46
+
description: A 3V to 3.6V supply that powers the chip.
47
+
48
+
vlogic-supply:
49
+
description:
50
+
A 1.65V to 3.6V supply for the logic pins.
51
+
52
+
refio-supply:
53
+
description:
54
+
A 2.5V to 3.3V supply for the external reference voltage. When omitted,
55
+
the internal 2.5V reference is used.
56
+
57
+
aina-supply:
58
+
description:
59
+
The common mode voltage supply for the AINA- pin on pseudo-differential
60
+
chips.
61
+
62
+
ainb-supply:
63
+
description:
64
+
The common mode voltage supply for the AINB- pin on pseudo-differential
65
+
chips.
66
+
67
+
ainc-supply:
68
+
description:
69
+
The common mode voltage supply for the AINC- pin on pseudo-differential
70
+
chips.
71
+
72
+
aind-supply:
73
+
description:
74
+
The common mode voltage supply for the AIND- pin on pseudo-differential
75
+
chips.
76
+
77
+
interrupts:
78
+
description:
79
+
When the device is using 1-wire mode, this property is used to optionally
80
+
specify the ALERT interrupt.
81
+
maxItems: 1
82
+
83
+
required:
84
+
- compatible
85
+
- reg
86
+
- vcc-supply
87
+
- vlogic-supply
88
+
89
+
unevaluatedProperties: false
90
+
91
+
allOf:
92
+
# pseudo-differential chips require common mode voltage supplies,
93
+
# true differential chips don't use them
94
+
- if:
95
+
properties:
96
+
compatible:
97
+
enum:
98
+
- adi,ad7383
99
+
- adi,ad7384
100
+
- adi,ad7383-4
101
+
- adi,ad7384-4
102
+
then:
103
+
required:
104
+
- aina-supply
105
+
- ainb-supply
106
+
else:
107
+
properties:
108
+
aina-supply: false
109
+
ainb-supply: false
110
+
- if:
111
+
properties:
112
+
compatible:
113
+
enum:
114
+
- adi,ad7383-4
115
+
- adi,ad7384-4
116
+
then:
117
+
required:
118
+
- ainc-supply
119
+
- aind-supply
120
+
else:
121
+
properties:
122
+
ainc-supply: false
123
+
aind-supply: false
124
+
125
+
examples:
126
+
- |
127
+
#include <dt-bindings/interrupt-controller/irq.h>
128
+
129
+
spi {
130
+
#address-cells = <1>;
131
+
#size-cells = <0>;
132
+
133
+
adc@0 {
134
+
compatible = "adi,ad7380";
135
+
reg = <0>;
136
+
137
+
spi-cpol;
138
+
spi-cpha;
139
+
spi-max-frequency = <80000000>;
140
+
141
+
interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
142
+
interrupt-parent = <&gpio0>;
143
+
144
+
vcc-supply = <&supply_3_3V>;
145
+
vlogic-supply = <&supply_3_3V>;
146
+
refio-supply = <&supply_2_5V>;
147
+
};
148
+
};
+3
Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml
+3
Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml
+1
Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml
+1
Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml
+70
Documentation/devicetree/bindings/iio/chemical/sciosense,ens160.yaml
+70
Documentation/devicetree/bindings/iio/chemical/sciosense,ens160.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/iio/chemical/sciosense,ens160.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: ScioSense ENS160 multi-gas sensor
8
+
9
+
maintainers:
10
+
- Gustavo Silva <gustavograzs@gmail.com>
11
+
12
+
description: |
13
+
Digital Multi-Gas Sensor for Monitoring Indoor Air Quality.
14
+
15
+
Datasheet:
16
+
https://www.sciosense.com/wp-content/uploads/2023/12/ENS160-Datasheet.pdf
17
+
18
+
properties:
19
+
compatible:
20
+
enum:
21
+
- sciosense,ens160
22
+
23
+
reg:
24
+
maxItems: 1
25
+
26
+
interrupts:
27
+
maxItems: 1
28
+
29
+
vdd-supply: true
30
+
vddio-supply: true
31
+
32
+
required:
33
+
- compatible
34
+
- reg
35
+
36
+
allOf:
37
+
- $ref: /schemas/spi/spi-peripheral-props.yaml#
38
+
39
+
unevaluatedProperties: false
40
+
41
+
examples:
42
+
- |
43
+
#include <dt-bindings/interrupt-controller/irq.h>
44
+
i2c {
45
+
#address-cells = <1>;
46
+
#size-cells = <0>;
47
+
48
+
gas-sensor@52 {
49
+
compatible = "sciosense,ens160";
50
+
reg = <0x52>;
51
+
interrupt-parent = <&gpio0>;
52
+
interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
53
+
};
54
+
};
55
+
- |
56
+
#include <dt-bindings/interrupt-controller/irq.h>
57
+
spi {
58
+
#address-cells = <1>;
59
+
#size-cells = <0>;
60
+
61
+
gas-sensor@0 {
62
+
compatible = "sciosense,ens160";
63
+
reg = <0>;
64
+
spi-max-frequency = <10000000>;
65
+
interrupt-parent = <&gpio>;
66
+
interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
67
+
};
68
+
};
69
+
70
+
...
+33
-10
Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
+33
-10
Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
···
13
13
description: |
14
14
Bindings for the Analog Devices AD3552R DAC device and similar.
15
15
Datasheet can be found here:
16
+
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3541r.pdf
16
17
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3542r.pdf
18
+
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3551r.pdf
17
19
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3552r.pdf
18
20
19
21
properties:
20
22
compatible:
21
23
enum:
24
+
- adi,ad3541r
22
25
- adi,ad3542r
26
+
- adi,ad3551r
23
27
- adi,ad3552r
24
28
25
29
reg:
···
96
92
maximum: 511
97
93
minimum: -511
98
94
99
-
adi,gain-scaling-p-inv-log2:
100
-
description: GainP = 1 / ( 2 ^ adi,gain-scaling-p-inv-log2)
95
+
adi,gain-scaling-p:
96
+
description: GainP = 1 / ( 2 ^ adi,gain-scaling-p)
101
97
$ref: /schemas/types.yaml#/definitions/uint32
102
98
enum: [0, 1, 2, 3]
103
99
104
-
adi,gain-scaling-n-inv-log2:
105
-
description: GainN = 1 / ( 2 ^ adi,gain-scaling-n-inv-log2)
100
+
adi,gain-scaling-n:
101
+
description: GainN = 1 / ( 2 ^ adi,gain-scaling-n)
106
102
$ref: /schemas/types.yaml#/definitions/uint32
107
103
enum: [0, 1, 2, 3]
108
104
···
111
107
112
108
required:
113
109
- adi,gain-offset
114
-
- adi,gain-scaling-p-inv-log2
115
-
- adi,gain-scaling-n-inv-log2
110
+
- adi,gain-scaling-p
111
+
- adi,gain-scaling-n
116
112
- adi,rfb-ohms
117
113
118
114
required:
···
132
128
properties:
133
129
compatible:
134
130
contains:
135
-
const: adi,ad3542r
131
+
enum:
132
+
- adi,ad3541r
133
+
- adi,ad3542r
136
134
then:
137
135
patternProperties:
138
136
"^channel@([0-1])$":
···
164
158
properties:
165
159
compatible:
166
160
contains:
167
-
const: adi,ad3552r
161
+
enum:
162
+
- adi,ad3551r
163
+
- adi,ad3552r
168
164
then:
169
165
patternProperties:
170
166
"^channel@([0-1])$":
···
189
181
- items:
190
182
- const: -10000000
191
183
- const: 10000000
184
+
185
+
- if:
186
+
properties:
187
+
compatible:
188
+
contains:
189
+
enum:
190
+
- adi,ad3541r
191
+
- adi,ad3551r
192
+
then:
193
+
properties:
194
+
channel@1: false
195
+
channel@0:
196
+
properties:
197
+
reg:
198
+
const: 0
192
199
193
200
required:
194
201
- compatible
···
231
208
reg = <1>;
232
209
custom-output-range-config {
233
210
adi,gain-offset = <5>;
234
-
adi,gain-scaling-p-inv-log2 = <1>;
235
-
adi,gain-scaling-n-inv-log2 = <2>;
211
+
adi,gain-scaling-p = <1>;
212
+
adi,gain-scaling-n = <2>;
236
213
adi,rfb-ohms = <1>;
237
214
};
238
215
};
+31
Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml
+31
Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml
···
30
30
- adi,adis16467-2
31
31
- adi,adis16467-3
32
32
- adi,adis16500
33
+
- adi,adis16501
33
34
- adi,adis16505-1
34
35
- adi,adis16505-2
35
36
- adi,adis16505-3
36
37
- adi,adis16507-1
37
38
- adi,adis16507-2
38
39
- adi,adis16507-3
40
+
- adi,adis16575-2
41
+
- adi,adis16575-3
42
+
- adi,adis16576-2
43
+
- adi,adis16576-3
44
+
- adi,adis16577-2
45
+
- adi,adis16577-3
39
46
40
47
reg:
41
48
maxItems: 1
···
97
90
contains:
98
91
enum:
99
92
- adi,adis16500
93
+
- adi,adis16501
100
94
- adi,adis16505-1
101
95
- adi,adis16505-2
102
96
- adi,adis16505-3
103
97
- adi,adis16507-1
104
98
- adi,adis16507-2
105
99
- adi,adis16507-3
100
+
- adi,adis16575-2
101
+
- adi,adis16575-3
102
+
- adi,adis16576-2
103
+
- adi,adis16576-3
104
+
- adi,adis16577-2
105
+
- adi,adis16577-3
106
106
107
107
then:
108
108
properties:
···
125
111
then:
126
112
dependencies:
127
113
adi,sync-mode: [ clocks ]
114
+
115
+
- if:
116
+
properties:
117
+
compatible:
118
+
contains:
119
+
enum:
120
+
- adi,adis16575-2
121
+
- adi,adis16575-3
122
+
- adi,adis16576-2
123
+
- adi,adis16576-3
124
+
- adi,adis16577-2
125
+
- adi,adis16577-3
126
+
127
+
then:
128
+
properties:
129
+
spi-max-frequency:
130
+
maximum: 15000000
128
131
129
132
unevaluatedProperties: false
130
133
+6
Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml
+6
Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml
+5
-1
Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml
+5
-1
Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml
+7
-2
Documentation/devicetree/bindings/iio/light/vishay,veml6075.yaml
+7
-2
Documentation/devicetree/bindings/iio/light/vishay,veml6075.yaml
···
4
4
$id: http://devicetree.org/schemas/iio/light/vishay,veml6075.yaml#
5
5
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
6
7
-
title: Vishay VEML6075 UVA and UVB sensor
7
+
title: Vishay VEML6075 UVA/B and VEML6040 RGBW sensors
8
8
9
9
maintainers:
10
10
- Javier Carrasco <javier.carrasco.cruz@gmail.com>
11
11
12
+
description:
13
+
VEML6040 datasheet at https://www.vishay.com/docs/84276/veml6040.pdf
14
+
12
15
properties:
13
16
compatible:
14
-
const: vishay,veml6075
17
+
enum:
18
+
- vishay,veml6040
19
+
- vishay,veml6075
15
20
16
21
reg:
17
22
maxItems: 1
+2
Documentation/devicetree/bindings/vendor-prefixes.yaml
+2
Documentation/devicetree/bindings/vendor-prefixes.yaml
+2
-21
Documentation/iio/adis16475.rst
+2
-21
Documentation/iio/adis16475.rst
···
380
380
4. IIO Interfacing Tools
381
381
========================
382
382
383
-
Linux Kernel Tools
384
-
------------------
385
-
386
-
Linux Kernel provides some userspace tools that can be used to retrieve data
387
-
from IIO sysfs:
388
-
389
-
* lsiio: example application that provides a list of IIO devices and triggers
390
-
* iio_event_monitor: example application that reads events from an IIO device
391
-
and prints them
392
-
* iio_generic_buffer: example application that reads data from buffer
393
-
* iio_utils: set of APIs, typically used to access sysfs files.
394
-
395
-
LibIIO
396
-
------
397
-
398
-
LibIIO is a C/C++ library that provides generic access to IIO devices. The
399
-
library abstracts the low-level details of the hardware, and provides a simple
400
-
yet complete programming interface that can be used for advanced projects.
401
-
402
-
For more information about LibIIO, please see:
403
-
https://github.com/analogdevicesinc/libiio
383
+
See ``Documentation/iio/iio_tools.rst`` for the description of the available IIO
384
+
interfacing tools.
+443
Documentation/iio/adis16480.rst
+443
Documentation/iio/adis16480.rst
···
1
+
.. SPDX-License-Identifier: GPL-2.0
2
+
3
+
================
4
+
ADIS16480 driver
5
+
================
6
+
7
+
This driver supports Analog Device's IMUs on SPI bus.
8
+
9
+
1. Supported devices
10
+
====================
11
+
12
+
* `ADIS16375 <https://www.analog.com/ADIS16375>`_
13
+
* `ADIS16480 <https://www.analog.com/ADIS16480>`_
14
+
* `ADIS16485 <https://www.analog.com/ADIS16485>`_
15
+
* `ADIS16488 <https://www.analog.com/ADIS16488>`_
16
+
* `ADIS16490 <https://www.analog.com/ADIS16490>`_
17
+
* `ADIS16495 <https://www.analog.com/ADIS16495>`_
18
+
* `ADIS16497 <https://www.analog.com/ADIS16497>`_
19
+
* `ADIS16545 <https://www.analog.com/ADIS16545>`_
20
+
* `ADIS16547 <https://www.analog.com/ADIS16547>`_
21
+
22
+
Each supported device is a complete inertial system that includes a triaxial
23
+
gyroscope and a triaxial accelerometer. Each inertial sensor in device combines
24
+
with signal conditioning that optimizes dynamic performance. The factory
25
+
calibration characterizes each sensor for sensitivity, bias, and alignment. As
26
+
a result, each sensor has its own dynamic compensation formulas that provide
27
+
accurate sensor measurements.
28
+
29
+
2. Device attributes
30
+
====================
31
+
32
+
Accelerometer, gyroscope measurements are always provided. Furthermore, the
33
+
driver offers the capability to retrieve the delta angle and the delta velocity
34
+
measurements computed by the device.
35
+
36
+
The delta angle measurements represent a calculation of angular displacement
37
+
between each sample update, while the delta velocity measurements represent a
38
+
calculation of linear velocity change between each sample update.
39
+
40
+
Finally, temperature data are provided which show a coarse measurement of
41
+
the temperature inside of the IMU device. This data is most useful for
42
+
monitoring relative changes in the thermal environment.
43
+
44
+
ADIS16480 and ADIS16488 also provide access to barometric pressure data and
45
+
triaxial magnetometer measurements.
46
+
47
+
Each IIO device, has a device folder under ``/sys/bus/iio/devices/iio:deviceX``,
48
+
where X is the IIO index of the device. Under these folders reside a set of
49
+
device files, depending on the characteristics and features of the hardware
50
+
device in questions. These files are consistently generalized and documented in
51
+
the IIO ABI documentation.
52
+
53
+
The following tables show the adis16480 related device files, found in the
54
+
specific device folder path ``/sys/bus/iio/devices/iio:deviceX``.
55
+
56
+
**Available only for ADIS16480 and ADIS16488:**
57
+
58
+
+------------------------------------------+---------------------------------------------------------+
59
+
| 3-Axis Magnetometer related device files | Description |
60
+
+------------------------------------------+---------------------------------------------------------+
61
+
| in_magn_scale | Scale for the magnetometer channels. |
62
+
+------------------------------------------+---------------------------------------------------------+
63
+
| in_magn_x_calibbias | Calibration offset for the X-axis magnetometer channel. |
64
+
+------------------------------------------+---------------------------------------------------------+
65
+
| in_magn_x_filter_low_pass_3db_frequency | Bandwidth for the X-axis magnetometer channel. |
66
+
+------------------------------------------+---------------------------------------------------------+
67
+
| in_magn_x_raw | Raw X-axis magnetometer channel value. |
68
+
+------------------------------------------+---------------------------------------------------------+
69
+
| in_magn_y_calibbias | Calibration offset for the Y-axis magnetometer channel. |
70
+
+------------------------------------------+---------------------------------------------------------+
71
+
| in_magn_y_filter_low_pass_3db_frequency | Bandwidth for the Y-axis magnetometer channel. |
72
+
+------------------------------------------+---------------------------------------------------------+
73
+
| in_magn_y_raw | Raw Y-axis magnetometer channel value. |
74
+
+------------------------------------------+---------------------------------------------------------+
75
+
| in_magn_z_calibbias | Calibration offset for the Z-axis magnetometer channel. |
76
+
+------------------------------------------+---------------------------------------------------------+
77
+
| in_magn_z_filter_low_pass_3db_frequency | Bandwidth for the Z-axis magnetometer channel. |
78
+
+------------------------------------------+---------------------------------------------------------+
79
+
| in_magn_z_raw | Raw Z-axis magnetometer channel value. |
80
+
+------------------------------------------+---------------------------------------------------------+
81
+
82
+
+------------------------------------------+-----------------------------------------------------+
83
+
| Barometric pressure sensor related files | Description |
84
+
+------------------------------------------+-----------------------------------------------------+
85
+
| in_pressure0_calibbias | Calibration offset for barometric pressure channel. |
86
+
+------------------------------------------+-----------------------------------------------------+
87
+
| in_pressure0_raw | Raw barometric pressure channel value. |
88
+
+------------------------------------------+-----------------------------------------------------+
89
+
| in_pressure0_scale | Scale for the barometric pressure sensor channel. |
90
+
+------------------------------------------+-----------------------------------------------------+
91
+
92
+
**Available for all supported devices:**
93
+
94
+
+-------------------------------------------+----------------------------------------------------------+
95
+
| 3-Axis Accelerometer related device files | Description |
96
+
+-------------------------------------------+----------------------------------------------------------+
97
+
| in_accel_scale | Scale for the accelerometer channels. |
98
+
+-------------------------------------------+----------------------------------------------------------+
99
+
| in_accel_x_calibbias | Calibration offset for the X-axis accelerometer channel. |
100
+
+-------------------------------------------+----------------------------------------------------------+
101
+
| in_accel_x_calibscale | Calibration scale for the X-axis accelerometer channel. |
102
+
+-------------------------------------------+----------------------------------------------------------+
103
+
| in_accel_x_filter_low_pass_3db_frequency | Bandwidth for the X-axis accelerometer channel. |
104
+
+-------------------------------------------+----------------------------------------------------------+
105
+
| in_accel_x_raw | Raw X-axis accelerometer channel value. |
106
+
+-------------------------------------------+----------------------------------------------------------+
107
+
| in_accel_y_calibbias | Calibration offset for the Y-axis accelerometer channel. |
108
+
+-------------------------------------------+----------------------------------------------------------+
109
+
| in_accel_y_calibscale | Calibration scale for the Y-axis accelerometer channel. |
110
+
+-------------------------------------------+----------------------------------------------------------+
111
+
| in_accel_y_filter_low_pass_3db_frequency | Bandwidth for the Y-axis accelerometer channel. |
112
+
+-------------------------------------------+----------------------------------------------------------+
113
+
| in_accel_y_raw | Raw Y-axis accelerometer channel value. |
114
+
+-------------------------------------------+----------------------------------------------------------+
115
+
| in_accel_z_calibbias | Calibration offset for the Z-axis accelerometer channel. |
116
+
+-------------------------------------------+----------------------------------------------------------+
117
+
| in_accel_z_calibscale | Calibration scale for the Z-axis accelerometer channel. |
118
+
+-------------------------------------------+----------------------------------------------------------+
119
+
| in_accel_z_filter_low_pass_3db_frequency | Bandwidth for the Z-axis accelerometer channel. |
120
+
+-------------------------------------------+----------------------------------------------------------+
121
+
| in_accel_z_raw | Raw Z-axis accelerometer channel value. |
122
+
+-------------------------------------------+----------------------------------------------------------+
123
+
| in_deltavelocity_scale | Scale for delta velocity channels. |
124
+
+-------------------------------------------+----------------------------------------------------------+
125
+
| in_deltavelocity_x_raw | Raw X-axis delta velocity channel value. |
126
+
+-------------------------------------------+----------------------------------------------------------+
127
+
| in_deltavelocity_y_raw | Raw Y-axis delta velocity channel value. |
128
+
+-------------------------------------------+----------------------------------------------------------+
129
+
| in_deltavelocity_z_raw | Raw Z-axis delta velocity channel value. |
130
+
+-------------------------------------------+----------------------------------------------------------+
131
+
132
+
+--------------------------------------------+------------------------------------------------------+
133
+
| 3-Axis Gyroscope related device files | Description |
134
+
+--------------------------------------------+------------------------------------------------------+
135
+
| in_anglvel_scale | Scale for the gyroscope channels. |
136
+
+--------------------------------------------+------------------------------------------------------+
137
+
| in_anglvel_x_calibbias | Calibration offset for the X-axis gyroscope channel. |
138
+
+--------------------------------------------+------------------------------------------------------+
139
+
| in_anglvel_x_calibscale | Calibration scale for the X-axis gyroscope channel. |
140
+
+--------------------------------------------+------------------------------------------------------+
141
+
| in_anglvel_x_filter_low_pass_3db_frequency | Bandwidth for the X-axis gyroscope channel. |
142
+
+--------------------------------------------+------------------------------------------------------+
143
+
| in_anglvel_x_raw | Raw X-axis gyroscope channel value. |
144
+
+--------------------------------------------+------------------------------------------------------+
145
+
| in_anglvel_y_calibbias | Calibration offset for the Y-axis gyroscope channel. |
146
+
+--------------------------------------------+------------------------------------------------------+
147
+
| in_anglvel_y_calibscale | Calibration scale for the Y-axis gyroscope channel. |
148
+
+--------------------------------------------+------------------------------------------------------+
149
+
| in_anglvel_y_filter_low_pass_3db_frequency | Bandwidth for the Y-axis gyroscope channel. |
150
+
+--------------------------------------------+------------------------------------------------------+
151
+
| in_anglvel_y_raw | Raw Y-axis gyroscope channel value. |
152
+
+--------------------------------------------+------------------------------------------------------+
153
+
| in_anglvel_z_calibbias | Calibration offset for the Z-axis gyroscope channel. |
154
+
+--------------------------------------------+------------------------------------------------------+
155
+
| in_anglvel_z_calibscale | Calibration scale for the Z-axis gyroscope channel. |
156
+
+--------------------------------------------+------------------------------------------------------+
157
+
| in_anglvel_z_filter_low_pass_3db_frequency | Bandwidth for the Z-axis gyroscope channel. |
158
+
+--------------------------------------------+------------------------------------------------------+
159
+
| in_anglvel_z_raw | Raw Z-axis gyroscope channel value. |
160
+
+--------------------------------------------+------------------------------------------------------+
161
+
| in_deltaangl_scale | Scale for delta angle channels. |
162
+
+--------------------------------------------+------------------------------------------------------+
163
+
| in_deltaangl_x_raw | Raw X-axis delta angle channel value. |
164
+
+--------------------------------------------+------------------------------------------------------+
165
+
| in_deltaangl_y_raw | Raw Y-axis delta angle channel value. |
166
+
+--------------------------------------------+------------------------------------------------------+
167
+
| in_deltaangl_z_raw | Raw Z-axis delta angle channel value. |
168
+
+--------------------------------------------+------------------------------------------------------+
169
+
170
+
+----------------------------------+-------------------------------------------+
171
+
| Temperature sensor related files | Description |
172
+
+----------------------------------+-------------------------------------------+
173
+
| in_temp0_raw | Raw temperature channel value. |
174
+
+----------------------------------+-------------------------------------------+
175
+
| in_temp0_offset | Offset for the temperature sensor channel.|
176
+
+----------------------------------+-------------------------------------------+
177
+
| in_temp0_scale | Scale for the temperature sensor channel. |
178
+
+----------------------------------+-------------------------------------------+
179
+
180
+
+-------------------------------+---------------------------------------------------------+
181
+
| Miscellaneous device files | Description |
182
+
+-------------------------------+---------------------------------------------------------+
183
+
| name | Name of the IIO device. |
184
+
+-------------------------------+---------------------------------------------------------+
185
+
| sampling_frequency | Currently selected sample rate. |
186
+
+-------------------------------+---------------------------------------------------------+
187
+
188
+
The following table shows the adis16480 related device debug files, found in the
189
+
specific device debug folder path ``/sys/kernel/debug/iio/iio:deviceX``.
190
+
191
+
+----------------------+-------------------------------------------------------------------------+
192
+
| Debugfs device files | Description |
193
+
+----------------------+-------------------------------------------------------------------------+
194
+
| serial_number | The serial number of the chip in hexadecimal format. |
195
+
+----------------------+-------------------------------------------------------------------------+
196
+
| product_id | Chip specific product id (e.g. 16480, 16488, 16545, etc.). |
197
+
+----------------------+-------------------------------------------------------------------------+
198
+
| flash_count | The number of flash writes performed on the device. |
199
+
+----------------------+-------------------------------------------------------------------------+
200
+
| firmware_revision | String containing the firmware revision in the following format ##.##. |
201
+
+----------------------+-------------------------------------------------------------------------+
202
+
| firmware_date | String containing the firmware date in the following format mm-dd-yyyy. |
203
+
+----------------------+-------------------------------------------------------------------------+
204
+
205
+
Channels processed values
206
+
-------------------------
207
+
208
+
A channel value can be read from its _raw attribute. The value returned is the
209
+
raw value as reported by the devices. To get the processed value of the channel,
210
+
apply the following formula:
211
+
212
+
.. code-block:: bash
213
+
214
+
processed value = (_raw + _offset) * _scale
215
+
216
+
Where _offset and _scale are device attributes. If no _offset attribute is
217
+
present, simply assume its value is 0.
218
+
219
+
The adis16480 driver offers data for 7 types of channels, the table below shows
220
+
the measurement units for the processed value, which are defined by the IIO
221
+
framework:
222
+
223
+
+--------------------------------------+---------------------------+
224
+
| Channel type | Measurement unit |
225
+
+--------------------------------------+---------------------------+
226
+
| Acceleration on X, Y, and Z axis | Meters per Second squared |
227
+
+--------------------------------------+---------------------------+
228
+
| Angular velocity on X, Y and Z axis | Radians per second |
229
+
+--------------------------------------+---------------------------+
230
+
| Delta velocity on X. Y, and Z axis | Meters per Second |
231
+
+--------------------------------------+---------------------------+
232
+
| Delta angle on X, Y, and Z axis | Radians |
233
+
+--------------------------------------+---------------------------+
234
+
| Temperature | Millidegrees Celsius |
235
+
+--------------------------------------+---------------------------+
236
+
| Magnetic field along X, Y and Z axis | Gauss |
237
+
+--------------------------------------+---------------------------+
238
+
| Barometric pressure | kilo Pascal |
239
+
+--------------------------------------+---------------------------+
240
+
241
+
Usage examples
242
+
--------------
243
+
244
+
Show device name:
245
+
246
+
.. code-block:: bash
247
+
248
+
root:/sys/bus/iio/devices/iio:device0> cat name
249
+
adis16545-1
250
+
251
+
Show accelerometer channels value:
252
+
253
+
.. code-block:: bash
254
+
255
+
root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_raw
256
+
1376728
257
+
root:/sys/bus/iio/devices/iio:device0> cat in_accel_y_raw
258
+
4487621
259
+
root:/sys/bus/iio/devices/iio:device0> cat in_accel_z_raw
260
+
262773792
261
+
root:/sys/bus/iio/devices/iio:device0> cat in_accel_scale
262
+
0.000000037
263
+
264
+
- X-axis acceleration = in_accel_x_raw * in_accel_scale = 0.050938936 m/s^2
265
+
- Y-axis acceleration = in_accel_y_raw * in_accel_scale = 0.166041977 m/s^2
266
+
- Z-axis acceleration = in_accel_z_raw * in_accel_scale = 9.722630304 m/s^2
267
+
268
+
Show gyroscope channels value:
269
+
270
+
.. code-block:: bash
271
+
272
+
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_x_raw
273
+
-1041702
274
+
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_y_raw
275
+
-273013
276
+
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_z_raw
277
+
2745116
278
+
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_scale
279
+
0.000000001
280
+
281
+
- X-axis angular velocity = in_anglvel_x_raw * in_anglvel_scale = −0.001041702 rad/s
282
+
- Y-axis angular velocity = in_anglvel_y_raw * in_anglvel_scale = −0.000273013 rad/s
283
+
- Z-axis angular velocity = in_anglvel_z_raw * in_anglvel_scale = 0.002745116 rad/s
284
+
285
+
Set calibration offset for accelerometer channels:
286
+
287
+
.. code-block:: bash
288
+
289
+
root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_calibbias
290
+
0
291
+
292
+
root:/sys/bus/iio/devices/iio:device0> echo 5000 > in_accel_x_calibbias
293
+
root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_calibbias
294
+
5000
295
+
296
+
Set calibration offset for gyroscope channels:
297
+
298
+
.. code-block:: bash
299
+
300
+
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_y_calibbias
301
+
0
302
+
303
+
root:/sys/bus/iio/devices/iio:device0> echo -5000 > in_anglvel_y_calibbias
304
+
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_y_calibbias
305
+
-5000
306
+
307
+
Set sampling frequency:
308
+
309
+
.. code-block:: bash
310
+
311
+
root:/sys/bus/iio/devices/iio:device0> cat sampling_frequency
312
+
4250.000000
313
+
314
+
root:/sys/bus/iio/devices/iio:device0> echo 1000 > sampling_frequency
315
+
1062.500000
316
+
317
+
Set bandwidth for accelerometer channels:
318
+
319
+
.. code-block:: bash
320
+
321
+
root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_filter_low_pass_3db_frequency
322
+
0
323
+
324
+
root:/sys/bus/iio/devices/iio:device0> echo 300 > in_accel_x_filter_low_pass_3db_frequency
325
+
root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_filter_low_pass_3db_frequency
326
+
300
327
+
328
+
Show serial number:
329
+
330
+
.. code-block:: bash
331
+
332
+
root:/sys/kernel/debug/iio/iio:device0> cat serial_number
333
+
0x000c
334
+
335
+
Show product id:
336
+
337
+
.. code-block:: bash
338
+
339
+
root:/sys/kernel/debug/iio/iio:device0> cat product_id
340
+
16545
341
+
342
+
Show flash count:
343
+
344
+
.. code-block:: bash
345
+
346
+
root:/sys/kernel/debug/iio/iio:device0> cat flash_count
347
+
88
348
+
349
+
Show firmware revision:
350
+
351
+
.. code-block:: bash
352
+
353
+
root:/sys/kernel/debug/iio/iio:device0> cat firmware_revision
354
+
1.4
355
+
356
+
Show firmware date:
357
+
358
+
.. code-block:: bash
359
+
360
+
root:/sys/kernel/debug/iio/iio:device0> cat firmware_date
361
+
09-23-2023
362
+
363
+
3. Device buffers
364
+
=================
365
+
366
+
This driver supports IIO buffers.
367
+
368
+
All devices support retrieving the raw acceleration, gyroscope and temperature
369
+
measurements using buffers.
370
+
371
+
The following device families also support retrieving the delta velocity, delta
372
+
angle and temperature measurements using buffers:
373
+
374
+
- ADIS16545
375
+
- ADIS16547
376
+
377
+
However, when retrieving acceleration or gyroscope data using buffers, delta
378
+
readings will not be available and vice versa. This is because the device only
379
+
allows to read either acceleration and gyroscope data or delta velocity and
380
+
delta angle data at a time and switching between these two burst data selection
381
+
modes is time consuming.
382
+
383
+
Usage examples
384
+
--------------
385
+
386
+
Set device trigger in current_trigger, if not already set:
387
+
388
+
.. code-block:: bash
389
+
390
+
root:/sys/bus/iio/devices/iio:device0> cat trigger/current_trigger
391
+
392
+
root:/sys/bus/iio/devices/iio:device0> echo adis16545-1-dev0 > trigger/current_trigger
393
+
root:/sys/bus/iio/devices/iio:device0> cat trigger/current_trigger
394
+
adis16545-1-dev0
395
+
396
+
Select channels for buffer read:
397
+
398
+
.. code-block:: bash
399
+
400
+
root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_deltavelocity_x_en
401
+
root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_deltavelocity_y_en
402
+
root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_deltavelocity_z_en
403
+
root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_temp0_en
404
+
405
+
Set the number of samples to be stored in the buffer:
406
+
407
+
.. code-block:: bash
408
+
409
+
root:/sys/bus/iio/devices/iio:device0> echo 10 > buffer/length
410
+
411
+
Enable buffer readings:
412
+
413
+
.. code-block:: bash
414
+
415
+
root:/sys/bus/iio/devices/iio:device0> echo 1 > buffer/enable
416
+
417
+
Obtain buffered data::
418
+
419
+
root:/sys/bus/iio/devices/iio:device0> hexdump -C /dev/iio\:device0
420
+
...
421
+
00006aa0 09 62 00 00 ff ff fc a4 00 00 01 69 00 03 3c 08 |.b.........i..<.|
422
+
00006ab0 09 61 00 00 00 00 02 96 00 00 02 8f 00 03 37 50 |.a............7P|
423
+
00006ac0 09 61 00 00 00 00 12 3d 00 00 0b 89 00 03 2c 0b |.a.....=......,.|
424
+
00006ad0 09 61 00 00 00 00 1e dc 00 00 16 dd 00 03 25 bf |.a............%.|
425
+
00006ae0 09 61 00 00 00 00 1e e3 00 00 1b bf 00 03 27 0b |.a............'.|
426
+
00006af0 09 61 00 00 00 00 15 50 00 00 19 44 00 03 30 fd |.a.....P...D..0.|
427
+
00006b00 09 61 00 00 00 00 09 0e 00 00 14 41 00 03 3d 7f |.a.........A..=.|
428
+
00006b10 09 61 00 00 ff ff ff f0 00 00 0e bc 00 03 48 d0 |.a............H.|
429
+
00006b20 09 63 00 00 00 00 00 9f 00 00 0f 37 00 03 4c fe |.c.........7..L.|
430
+
00006b30 09 64 00 00 00 00 0b f6 00 00 18 92 00 03 43 22 |.d............C"|
431
+
00006b40 09 64 00 00 00 00 18 df 00 00 22 33 00 03 33 ab |.d........"3..3.|
432
+
00006b50 09 63 00 00 00 00 1e 81 00 00 26 be 00 03 29 60 |.c........&...)`|
433
+
00006b60 09 63 00 00 00 00 1b 13 00 00 22 2f 00 03 23 91 |.c........"/..#.|
434
+
...
435
+
436
+
See ``Documentation/iio/iio_devbuf.rst`` for more information about how buffered
437
+
data is structured.
438
+
439
+
4. IIO Interfacing Tools
440
+
========================
441
+
442
+
See ``Documentation/iio/iio_tools.rst`` for the description of the available IIO
443
+
interfacing tools.
+27
Documentation/iio/iio_tools.rst
+27
Documentation/iio/iio_tools.rst
···
1
+
.. SPDX-License-Identifier: GPL-2.0
2
+
3
+
=====================
4
+
IIO Interfacing Tools
5
+
=====================
6
+
7
+
1. Linux Kernel Tools
8
+
=====================
9
+
10
+
Linux Kernel provides some userspace tools that can be used to retrieve data
11
+
from IIO sysfs:
12
+
13
+
* lsiio: example application that provides a list of IIO devices and triggers
14
+
* iio_event_monitor: example application that reads events from an IIO device
15
+
and prints them
16
+
* iio_generic_buffer: example application that reads data from buffer
17
+
* iio_utils: set of APIs, typically used to access sysfs files.
18
+
19
+
2. LibIIO
20
+
=========
21
+
22
+
LibIIO is a C/C++ library that provides generic access to IIO devices. The
23
+
library abstracts the low-level details of the hardware, and provides a simple
24
+
yet complete programming interface that can be used for advanced projects.
25
+
26
+
For more information about LibIIO, please see:
27
+
https://github.com/analogdevicesinc/libiio
+2
Documentation/iio/index.rst
+2
Documentation/iio/index.rst
+19
MAINTAINERS
+19
MAINTAINERS
···
439
439
W: https://ez.analog.com/linux-software-drivers
440
440
F: drivers/input/misc/ad714x.c
441
441
442
+
AD738X ADC DRIVER (AD7380/1/2/4)
443
+
M: Michael Hennerich <michael.hennerich@analog.com>
444
+
M: Nuno Sá <nuno.sa@analog.com>
445
+
R: David Lechner <dlechner@baylibre.com>
446
+
S: Supported
447
+
W: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-adc/ad738x
448
+
W: https://ez.analog.com/linux-software-drivers
449
+
F: Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
450
+
F: drivers/iio/adc/ad7380.c
451
+
442
452
AD7877 TOUCHSCREEN DRIVER
443
453
M: Michael Hennerich <michael.hennerich@analog.com>
444
454
S: Supported
···
11520
11510
L: linux-iio@vger.kernel.org
11521
11511
S: Maintained
11522
11512
W: https://invensense.tdk.com/
11513
+
F: Documentation/ABI/testing/sysfs-bus-iio-inv_icm42600
11523
11514
F: Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml
11524
11515
F: drivers/iio/imu/inv_icm42600/
11525
11516
···
19948
19937
F: include/linux/wait.h
19949
19938
F: include/uapi/linux/sched.h
19950
19939
F: kernel/sched/
19940
+
19941
+
SCIOSENSE ENS160 MULTI-GAS SENSOR DRIVER
19942
+
M: Gustavo Silva <gustavograzs@gmail.com>
19943
+
S: Maintained
19944
+
F: drivers/iio/chemical/ens160_core.c
19945
+
F: drivers/iio/chemical/ens160_i2c.c
19946
+
F: drivers/iio/chemical/ens160_spi.c
19947
+
F: drivers/iio/chemical/ens160.h
19951
19948
19952
19949
SCSI LIBSAS SUBSYSTEM
19953
19950
R: John Garry <john.g.garry@oracle.com>
+1
-7
drivers/iio/accel/adxl313_spi.c
+1
-7
drivers/iio/accel/adxl313_spi.c
···
72
72
if (ret)
73
73
return ret;
74
74
75
-
/*
76
-
* Retrieves device specific data as a pointer to a
77
-
* adxl313_chip_info structure
78
-
*/
79
-
chip_data = device_get_match_data(&spi->dev);
80
-
if (!chip_data)
81
-
chip_data = (const struct adxl313_chip_info *)spi_get_device_id(spi)->driver_data;
75
+
chip_data = spi_get_device_match_data(spi);
82
76
83
77
regmap = devm_regmap_init_spi(spi,
84
78
&adxl31x_spi_regmap_config[chip_data->type]);
+3
-7
drivers/iio/accel/adxl355_spi.c
+3
-7
drivers/iio/accel/adxl355_spi.c
···
28
28
const struct adxl355_chip_info *chip_data;
29
29
struct regmap *regmap;
30
30
31
-
chip_data = device_get_match_data(&spi->dev);
32
-
if (!chip_data) {
33
-
chip_data = (void *)spi_get_device_id(spi)->driver_data;
34
-
35
-
if (!chip_data)
36
-
return -EINVAL;
37
-
}
31
+
chip_data = spi_get_device_match_data(spi);
32
+
if (!chip_data)
33
+
return -EINVAL;
38
34
39
35
regmap = devm_regmap_init_spi(spi, &adxl355_spi_regmap_config);
40
36
if (IS_ERR(regmap)) {
+2
-2
drivers/iio/accel/adxl367_i2c.c
+2
-2
drivers/iio/accel/adxl367_i2c.c
+1
-1
drivers/iio/accel/adxl372_i2c.c
+1
-1
drivers/iio/accel/adxl372_i2c.c
+1
-1
drivers/iio/accel/bma400_i2c.c
+1
-1
drivers/iio/accel/bma400_i2c.c
-5
drivers/iio/accel/bmi088-accel-core.c
-5
drivers/iio/accel/bmi088-accel-core.c
+1
-1
drivers/iio/accel/da311.c
+1
-1
drivers/iio/accel/da311.c
+3
-3
drivers/iio/accel/dmard06.c
+3
-3
drivers/iio/accel/dmard06.c
+2
-2
drivers/iio/accel/dmard09.c
+2
-2
drivers/iio/accel/dmard09.c
+1
-1
drivers/iio/accel/dmard10.c
+1
-1
drivers/iio/accel/dmard10.c
+2
-2
drivers/iio/accel/kxsd9-i2c.c
+2
-2
drivers/iio/accel/kxsd9-i2c.c
+1
-1
drivers/iio/accel/mc3230.c
+1
-1
drivers/iio/accel/mc3230.c
+2
-2
drivers/iio/accel/mma7455_i2c.c
+2
-2
drivers/iio/accel/mma7455_i2c.c
+36
-16
drivers/iio/accel/mma7660.c
+36
-16
drivers/iio/accel/mma7660.c
···
38
38
39
39
static const int mma7660_nscale = 467142857;
40
40
41
-
#define MMA7660_CHANNEL(reg, axis) { \
42
-
.type = IIO_ACCEL, \
43
-
.address = reg, \
44
-
.modified = 1, \
45
-
.channel2 = IIO_MOD_##axis, \
46
-
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
47
-
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
48
-
}
49
-
50
-
static const struct iio_chan_spec mma7660_channels[] = {
51
-
MMA7660_CHANNEL(MMA7660_REG_XOUT, X),
52
-
MMA7660_CHANNEL(MMA7660_REG_YOUT, Y),
53
-
MMA7660_CHANNEL(MMA7660_REG_ZOUT, Z),
54
-
};
55
-
56
41
enum mma7660_mode {
57
42
MMA7660_MODE_STANDBY,
58
43
MMA7660_MODE_ACTIVE
···
47
62
struct i2c_client *client;
48
63
struct mutex lock;
49
64
enum mma7660_mode mode;
65
+
struct iio_mount_matrix orientation;
66
+
};
67
+
68
+
static const struct iio_mount_matrix *
69
+
mma7660_get_mount_matrix(const struct iio_dev *indio_dev,
70
+
const struct iio_chan_spec *chan)
71
+
{
72
+
struct mma7660_data *data = iio_priv(indio_dev);
73
+
74
+
return &data->orientation;
75
+
}
76
+
77
+
static const struct iio_chan_spec_ext_info mma7660_ext_info[] = {
78
+
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, mma7660_get_mount_matrix),
79
+
{ }
50
80
};
51
81
52
82
static IIO_CONST_ATTR(in_accel_scale_available, MMA7660_SCALE_AVAIL);
···
73
73
74
74
static const struct attribute_group mma7660_attribute_group = {
75
75
.attrs = mma7660_attributes
76
+
};
77
+
78
+
#define MMA7660_CHANNEL(reg, axis) { \
79
+
.type = IIO_ACCEL, \
80
+
.address = reg, \
81
+
.modified = 1, \
82
+
.channel2 = IIO_MOD_##axis, \
83
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
84
+
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
85
+
.ext_info = mma7660_ext_info, \
86
+
}
87
+
88
+
static const struct iio_chan_spec mma7660_channels[] = {
89
+
MMA7660_CHANNEL(MMA7660_REG_XOUT, X),
90
+
MMA7660_CHANNEL(MMA7660_REG_YOUT, Y),
91
+
MMA7660_CHANNEL(MMA7660_REG_ZOUT, Z),
76
92
};
77
93
78
94
static int mma7660_set_mode(struct mma7660_data *data,
···
203
187
mutex_init(&data->lock);
204
188
data->mode = MMA7660_MODE_STANDBY;
205
189
190
+
ret = iio_read_mount_matrix(&client->dev, &data->orientation);
191
+
if (ret)
192
+
return ret;
193
+
206
194
indio_dev->info = &mma7660_info;
207
195
indio_dev->name = MMA7660_DRIVER_NAME;
208
196
indio_dev->modes = INDIO_DIRECT_MODE;
···
261
241
mma7660_resume);
262
242
263
243
static const struct i2c_device_id mma7660_i2c_id[] = {
264
-
{"mma7660", 0},
244
+
{ "mma7660" },
265
245
{}
266
246
};
267
247
MODULE_DEVICE_TABLE(i2c, mma7660_i2c_id);
+1
-1
drivers/iio/accel/mma9551.c
+1
-1
drivers/iio/accel/mma9551.c
+2
-2
drivers/iio/accel/mma9553.c
+2
-2
drivers/iio/accel/mma9553.c
+3
-3
drivers/iio/accel/mxc4005.c
+3
-3
drivers/iio/accel/mxc4005.c
+2
-2
drivers/iio/accel/mxc6255.c
+2
-2
drivers/iio/accel/mxc6255.c
+2
-2
drivers/iio/accel/stk8312.c
+2
-2
drivers/iio/accel/stk8312.c
+1
-1
drivers/iio/accel/stk8ba50.c
+1
-1
drivers/iio/accel/stk8ba50.c
+25
-3
drivers/iio/adc/Kconfig
+25
-3
drivers/iio/adc/Kconfig
···
88
88
called ad7173.
89
89
90
90
config AD7192
91
-
tristate "Analog Devices AD7190 AD7192 AD7193 AD7195 ADC driver"
91
+
tristate "Analog Devices AD7192 and similar ADC driver"
92
92
depends on SPI
93
93
select AD_SIGMA_DELTA
94
94
help
95
-
Say yes here to build support for Analog Devices AD7190,
96
-
AD7192, AD7193 or AD7195 SPI analog to digital converters (ADC).
95
+
Say yes here to build support for Analog Devices SPI analog to digital
96
+
converters (ADC):
97
+
- AD7190
98
+
- AD7192
99
+
- AD7193
100
+
- AD7194
101
+
- AD7195
97
102
If unsure, say N (but it's safe to say "Y").
98
103
99
104
To compile this driver as a module, choose M here: the
···
159
154
160
155
To compile this driver as a module, choose M here: the
161
156
module will be called ad7298.
157
+
158
+
config AD7380
159
+
tristate "Analog Devices AD7380 ADC driver"
160
+
depends on SPI_MASTER
161
+
select IIO_BUFFER
162
+
select IIO_TRIGGER
163
+
select IIO_TRIGGERED_BUFFER
164
+
help
165
+
AD7380 is a family of simultaneous sampling ADCs that share the same
166
+
SPI register map and have similar pinouts.
167
+
168
+
Say yes here to build support for Analog Devices AD7380 ADC and
169
+
similar chips.
170
+
171
+
To compile this driver as a module, choose M here: the module will be
172
+
called ad7380.
162
173
163
174
config AD7476
164
175
tristate "Analog Devices AD7476 1-channel ADCs driver and other similar devices from AD and TI"
···
353
332
354
333
config ADI_AXI_ADC
355
334
tristate "Analog Devices Generic AXI ADC IP core driver"
335
+
depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST
356
336
select IIO_BUFFER
357
337
select IIO_BUFFER_HW_CONSUMER
358
338
select IIO_BUFFER_DMAENGINE
+13
-12
drivers/iio/adc/Makefile
+13
-12
drivers/iio/adc/Makefile
···
18
18
obj-$(CONFIG_AD7291) += ad7291.o
19
19
obj-$(CONFIG_AD7292) += ad7292.o
20
20
obj-$(CONFIG_AD7298) += ad7298.o
21
-
obj-$(CONFIG_AD7923) += ad7923.o
21
+
obj-$(CONFIG_AD7380) += ad7380.o
22
22
obj-$(CONFIG_AD7476) += ad7476.o
23
23
obj-$(CONFIG_AD7606_IFACE_PARALLEL) += ad7606_par.o
24
24
obj-$(CONFIG_AD7606_IFACE_SPI) += ad7606_spi.o
···
29
29
obj-$(CONFIG_AD7791) += ad7791.o
30
30
obj-$(CONFIG_AD7793) += ad7793.o
31
31
obj-$(CONFIG_AD7887) += ad7887.o
32
+
obj-$(CONFIG_AD7923) += ad7923.o
32
33
obj-$(CONFIG_AD7944) += ad7944.o
33
34
obj-$(CONFIG_AD7949) += ad7949.o
34
35
obj-$(CONFIG_AD799X) += ad799x.o
···
91
90
obj-$(CONFIG_NPCM_ADC) += npcm_adc.o
92
91
obj-$(CONFIG_PAC1934) += pac1934.o
93
92
obj-$(CONFIG_PALMAS_GPADC) += palmas_gpadc.o
93
+
obj-$(CONFIG_QCOM_PM8XXX_XOADC) += qcom-pm8xxx-xoadc.o
94
94
obj-$(CONFIG_QCOM_SPMI_ADC5) += qcom-spmi-adc5.o
95
95
obj-$(CONFIG_QCOM_SPMI_IADC) += qcom-spmi-iadc.o
96
96
obj-$(CONFIG_QCOM_SPMI_RRADC) += qcom-spmi-rradc.o
97
-
obj-$(CONFIG_QCOM_VADC_COMMON) += qcom-vadc-common.o
98
97
obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
99
-
obj-$(CONFIG_QCOM_PM8XXX_XOADC) += qcom-pm8xxx-xoadc.o
98
+
obj-$(CONFIG_QCOM_VADC_COMMON) += qcom-vadc-common.o
100
99
obj-$(CONFIG_RCAR_GYRO_ADC) += rcar-gyroadc.o
100
+
obj-$(CONFIG_RICHTEK_RTQ6056) += rtq6056.o
101
101
obj-$(CONFIG_RN5T618_ADC) += rn5t618-adc.o
102
102
obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
103
-
obj-$(CONFIG_RICHTEK_RTQ6056) += rtq6056.o
104
103
obj-$(CONFIG_RZG2L_ADC) += rzg2l_adc.o
105
104
obj-$(CONFIG_SC27XX_ADC) += sc27xx_adc.o
105
+
obj-$(CONFIG_SD_ADC_MODULATOR) += sd_adc_modulator.o
106
106
obj-$(CONFIG_SPEAR_ADC) += spear_adc.o
107
-
obj-$(CONFIG_SUN4I_GPADC) += sun4i-gpadc-iio.o
108
-
obj-$(CONFIG_SUN20I_GPADC) += sun20i-gpadc-iio.o
109
107
obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o
110
108
obj-$(CONFIG_STM32_ADC) += stm32-adc.o
111
-
obj-$(CONFIG_STM32_DFSDM_CORE) += stm32-dfsdm-core.o
112
109
obj-$(CONFIG_STM32_DFSDM_ADC) += stm32-dfsdm-adc.o
110
+
obj-$(CONFIG_STM32_DFSDM_CORE) += stm32-dfsdm-core.o
113
111
obj-$(CONFIG_STMPE_ADC) += stmpe-adc.o
112
+
obj-$(CONFIG_SUN20I_GPADC) += sun20i-gpadc-iio.o
113
+
obj-$(CONFIG_SUN4I_GPADC) += sun4i-gpadc-iio.o
114
114
obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
115
115
obj-$(CONFIG_TI_ADC0832) += ti-adc0832.o
116
116
obj-$(CONFIG_TI_ADC084S021) += ti-adc084s021.o
117
-
obj-$(CONFIG_TI_ADC12138) += ti-adc12138.o
118
117
obj-$(CONFIG_TI_ADC108S102) += ti-adc108s102.o
118
+
obj-$(CONFIG_TI_ADC12138) += ti-adc12138.o
119
119
obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
120
120
obj-$(CONFIG_TI_ADC161S626) += ti-adc161s626.o
121
121
obj-$(CONFIG_TI_ADS1015) += ti-ads1015.o
122
122
obj-$(CONFIG_TI_ADS1100) += ti-ads1100.o
123
+
obj-$(CONFIG_TI_ADS124S08) += ti-ads124s08.o
123
124
obj-$(CONFIG_TI_ADS1298) += ti-ads1298.o
125
+
obj-$(CONFIG_TI_ADS131E08) += ti-ads131e08.o
124
126
obj-$(CONFIG_TI_ADS7924) += ti-ads7924.o
125
127
obj-$(CONFIG_TI_ADS7950) += ti-ads7950.o
126
128
obj-$(CONFIG_TI_ADS8344) += ti-ads8344.o
127
129
obj-$(CONFIG_TI_ADS8688) += ti-ads8688.o
128
-
obj-$(CONFIG_TI_ADS124S08) += ti-ads124s08.o
129
-
obj-$(CONFIG_TI_ADS131E08) += ti-ads131e08.o
130
130
obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
131
131
obj-$(CONFIG_TI_LMP92064) += ti-lmp92064.o
132
132
obj-$(CONFIG_TI_TLC4541) += ti-tlc4541.o
···
136
134
obj-$(CONFIG_TWL6030_GPADC) += twl6030-gpadc.o
137
135
obj-$(CONFIG_VF610_ADC) += vf610_adc.o
138
136
obj-$(CONFIG_VIPERBOARD_ADC) += viperboard_adc.o
137
+
obj-$(CONFIG_XILINX_AMS) += xilinx-ams.o
139
138
xilinx-xadc-y := xilinx-xadc-core.o xilinx-xadc-events.o
140
139
obj-$(CONFIG_XILINX_XADC) += xilinx-xadc.o
141
-
obj-$(CONFIG_XILINX_AMS) += xilinx-ams.o
142
-
obj-$(CONFIG_SD_ADC_MODULATOR) += sd_adc_modulator.o
+225
-48
drivers/iio/adc/ad7192.c
+225
-48
drivers/iio/adc/ad7192.c
···
1
1
// SPDX-License-Identifier: GPL-2.0
2
2
/*
3
-
* AD7190 AD7192 AD7193 AD7195 SPI ADC driver
3
+
* AD7192 and similar SPI ADC driver
4
4
*
5
5
* Copyright 2011-2015 Analog Devices Inc.
6
6
*/
···
20
20
#include <linux/module.h>
21
21
#include <linux/mod_devicetable.h>
22
22
#include <linux/property.h>
23
+
#include <linux/units.h>
23
24
24
25
#include <linux/iio/iio.h>
25
26
#include <linux/iio/sysfs.h>
···
129
128
#define AD7193_CH_AIN8 0x480 /* AIN7 - AINCOM */
130
129
#define AD7193_CH_AINCOM 0x600 /* AINCOM - AINCOM */
131
130
131
+
#define AD7194_CH_POS(x) (((x) - 1) << 4)
132
+
#define AD7194_CH_NEG(x) ((x) - 1)
133
+
134
+
/* 10th bit corresponds to CON18(Pseudo) */
135
+
#define AD7194_CH(p) (BIT(10) | AD7194_CH_POS(p))
136
+
137
+
#define AD7194_DIFF_CH(p, n) (AD7194_CH_POS(p) | AD7194_CH_NEG(n))
138
+
#define AD7194_CH_TEMP 0x100
139
+
#define AD7194_CH_BASE_NR 2
140
+
#define AD7194_CH_AIN_START 1
141
+
#define AD7194_CH_AIN_NR 16
142
+
#define AD7194_CH_MAX_NR 272
143
+
132
144
/* ID Register Bit Designations (AD7192_REG_ID) */
133
145
#define CHIPID_AD7190 0x4
134
146
#define CHIPID_AD7192 0x0
135
147
#define CHIPID_AD7193 0x2
148
+
#define CHIPID_AD7194 0x3
136
149
#define CHIPID_AD7195 0x6
137
150
#define AD7192_ID_MASK GENMASK(3, 0)
138
151
···
184
169
ID_AD7190,
185
170
ID_AD7192,
186
171
ID_AD7193,
172
+
ID_AD7194,
187
173
ID_AD7195,
188
174
};
189
175
···
193
177
const char *name;
194
178
const struct iio_chan_spec *channels;
195
179
u8 num_channels;
180
+
const struct ad_sigma_delta_info *sigma_delta_info;
196
181
const struct iio_info *info;
182
+
int (*parse_channels)(struct iio_dev *indio_dev);
197
183
};
198
184
199
185
struct ad7192_state {
···
204
186
struct regulator *vref;
205
187
struct clk *mclk;
206
188
u16 int_vref_mv;
189
+
u32 aincom_mv;
207
190
u32 fclk;
208
191
u32 mode;
209
192
u32 conf;
210
193
u32 scale_avail[8][2];
194
+
u32 filter_freq_avail[4][2];
211
195
u32 oversampling_ratio_avail[4];
212
196
u8 gpocon;
213
197
u8 clock_sel;
···
363
343
.irq_flags = IRQF_TRIGGER_FALLING,
364
344
};
365
345
346
+
static const struct ad_sigma_delta_info ad7194_sigma_delta_info = {
347
+
.set_channel = ad7192_set_channel,
348
+
.append_status = ad7192_append_status,
349
+
.disable_all = ad7192_disable_all,
350
+
.set_mode = ad7192_set_mode,
351
+
.has_registers = true,
352
+
.addr_shift = 3,
353
+
.read_mask = BIT(6),
354
+
.status_ch_mask = GENMASK(3, 0),
355
+
.irq_flags = IRQF_TRIGGER_FALLING,
356
+
};
357
+
366
358
static const struct ad_sd_calib_data ad7192_calib_arr[8] = {
367
359
{AD7192_MODE_CAL_INT_ZERO, AD7192_CH_AIN1},
368
360
{AD7192_MODE_CAL_INT_FULL, AD7192_CH_AIN1},
···
505
473
st->oversampling_ratio_avail[2] = 8;
506
474
st->oversampling_ratio_avail[3] = 16;
507
475
476
+
st->filter_freq_avail[0][0] = 600;
477
+
st->filter_freq_avail[1][0] = 800;
478
+
st->filter_freq_avail[2][0] = 2300;
479
+
st->filter_freq_avail[3][0] = 2720;
480
+
481
+
st->filter_freq_avail[0][1] = 1000;
482
+
st->filter_freq_avail[1][1] = 1000;
483
+
st->filter_freq_avail[2][1] = 1000;
484
+
st->filter_freq_avail[3][1] = 1000;
485
+
508
486
return 0;
509
487
}
510
488
···
628
586
f_order * FIELD_GET(AD7192_MODE_RATE_MASK, st->mode));
629
587
}
630
588
631
-
static void ad7192_get_available_filter_freq(struct ad7192_state *st,
632
-
int *freq)
589
+
static void ad7192_update_filter_freq_avail(struct ad7192_state *st)
633
590
{
634
591
unsigned int fadc;
635
592
636
593
/* Formulas for filter at page 25 of the datasheet */
637
594
fadc = ad7192_compute_f_adc(st, false, true);
638
-
freq[0] = DIV_ROUND_CLOSEST(fadc * 240, 1024);
595
+
st->filter_freq_avail[0][0] = DIV_ROUND_CLOSEST(fadc * 240, 1024);
639
596
640
597
fadc = ad7192_compute_f_adc(st, true, true);
641
-
freq[1] = DIV_ROUND_CLOSEST(fadc * 240, 1024);
598
+
st->filter_freq_avail[1][0] = DIV_ROUND_CLOSEST(fadc * 240, 1024);
642
599
643
600
fadc = ad7192_compute_f_adc(st, false, false);
644
-
freq[2] = DIV_ROUND_CLOSEST(fadc * 230, 1024);
601
+
st->filter_freq_avail[2][0] = DIV_ROUND_CLOSEST(fadc * 230, 1024);
645
602
646
603
fadc = ad7192_compute_f_adc(st, true, false);
647
-
freq[3] = DIV_ROUND_CLOSEST(fadc * 272, 1024);
604
+
st->filter_freq_avail[3][0] = DIV_ROUND_CLOSEST(fadc * 272, 1024);
648
605
}
649
-
650
-
static ssize_t ad7192_show_filter_avail(struct device *dev,
651
-
struct device_attribute *attr,
652
-
char *buf)
653
-
{
654
-
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
655
-
struct ad7192_state *st = iio_priv(indio_dev);
656
-
unsigned int freq_avail[4], i;
657
-
size_t len = 0;
658
-
659
-
ad7192_get_available_filter_freq(st, freq_avail);
660
-
661
-
for (i = 0; i < ARRAY_SIZE(freq_avail); i++)
662
-
len += sysfs_emit_at(buf, len, "%d.%03d ", freq_avail[i] / 1000,
663
-
freq_avail[i] % 1000);
664
-
665
-
buf[len - 1] = '\n';
666
-
667
-
return len;
668
-
}
669
-
670
-
static IIO_DEVICE_ATTR(filter_low_pass_3db_frequency_available,
671
-
0444, ad7192_show_filter_avail, NULL, 0);
672
606
673
607
static IIO_DEVICE_ATTR(bridge_switch_en, 0644,
674
608
ad7192_show_bridge_switch, ad7192_set,
···
655
637
AD7192_REG_CONF);
656
638
657
639
static struct attribute *ad7192_attributes[] = {
658
-
&iio_dev_attr_filter_low_pass_3db_frequency_available.dev_attr.attr,
659
640
&iio_dev_attr_bridge_switch_en.dev_attr.attr,
660
641
NULL
661
642
};
···
664
647
};
665
648
666
649
static struct attribute *ad7195_attributes[] = {
667
-
&iio_dev_attr_filter_low_pass_3db_frequency_available.dev_attr.attr,
668
650
&iio_dev_attr_bridge_switch_en.dev_attr.attr,
669
651
&iio_dev_attr_ac_excitation_en.dev_attr.attr,
670
652
NULL
···
681
665
static int ad7192_set_3db_filter_freq(struct ad7192_state *st,
682
666
int val, int val2)
683
667
{
684
-
int freq_avail[4], i, ret, freq;
668
+
int i, ret, freq;
685
669
unsigned int diff_new, diff_old;
686
670
int idx = 0;
687
671
688
672
diff_old = U32_MAX;
689
673
freq = val * 1000 + val2;
690
674
691
-
ad7192_get_available_filter_freq(st, freq_avail);
692
-
693
-
for (i = 0; i < ARRAY_SIZE(freq_avail); i++) {
694
-
diff_new = abs(freq - freq_avail[i]);
675
+
for (i = 0; i < ARRAY_SIZE(st->filter_freq_avail); i++) {
676
+
diff_new = abs(freq - st->filter_freq_avail[i][0]);
695
677
if (diff_new < diff_old) {
696
678
diff_old = diff_new;
697
679
idx = i;
···
773
759
*val = -(1 << (chan->scan_type.realbits - 1));
774
760
else
775
761
*val = 0;
762
+
763
+
switch (chan->type) {
764
+
case IIO_VOLTAGE:
765
+
/*
766
+
* Only applies to pseudo-differential inputs.
767
+
* AINCOM voltage has to be converted to "raw" units.
768
+
*/
769
+
if (st->aincom_mv && !chan->differential)
770
+
*val += DIV_ROUND_CLOSEST_ULL((u64)st->aincom_mv * NANO,
771
+
st->scale_avail[gain][1]);
772
+
return IIO_VAL_INT;
776
773
/* Kelvin to Celsius */
777
-
if (chan->type == IIO_TEMP)
774
+
case IIO_TEMP:
778
775
*val -= 273 * ad7192_get_temp_scale(unipolar);
779
-
return IIO_VAL_INT;
776
+
return IIO_VAL_INT;
777
+
default:
778
+
return -EINVAL;
779
+
}
780
780
case IIO_CHAN_INFO_SAMP_FREQ:
781
781
*val = DIV_ROUND_CLOSEST(ad7192_get_f_adc(st), 1024);
782
782
return IIO_VAL_INT;
···
820
792
if (ret)
821
793
return ret;
822
794
795
+
mutex_lock(&st->lock);
796
+
823
797
switch (mask) {
824
798
case IIO_CHAN_INFO_SCALE:
825
799
ret = -EINVAL;
826
-
mutex_lock(&st->lock);
827
800
for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
828
801
if (val2 == st->scale_avail[i][1]) {
829
802
ret = 0;
···
838
809
ad7192_calibrate_all(st);
839
810
break;
840
811
}
841
-
mutex_unlock(&st->lock);
842
812
break;
843
813
case IIO_CHAN_INFO_SAMP_FREQ:
844
814
if (!val) {
···
854
826
st->mode &= ~AD7192_MODE_RATE_MASK;
855
827
st->mode |= FIELD_PREP(AD7192_MODE_RATE_MASK, div);
856
828
ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode);
829
+
ad7192_update_filter_freq_avail(st);
857
830
break;
858
831
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
859
832
ret = ad7192_set_3db_filter_freq(st, val, val2 / 1000);
860
833
break;
861
834
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
862
835
ret = -EINVAL;
863
-
mutex_lock(&st->lock);
864
836
for (i = 0; i < ARRAY_SIZE(st->oversampling_ratio_avail); i++)
865
837
if (val == st->oversampling_ratio_avail[i]) {
866
838
ret = 0;
···
873
845
3, st->mode);
874
846
break;
875
847
}
876
-
mutex_unlock(&st->lock);
848
+
ad7192_update_filter_freq_avail(st);
877
849
break;
878
850
default:
879
851
ret = -EINVAL;
880
852
}
853
+
854
+
mutex_unlock(&st->lock);
881
855
882
856
iio_device_release_direct_mode(indio_dev);
883
857
···
917
887
*type = IIO_VAL_INT_PLUS_NANO;
918
888
/* Values are stored in a 2D matrix */
919
889
*length = ARRAY_SIZE(st->scale_avail) * 2;
890
+
891
+
return IIO_AVAIL_LIST;
892
+
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
893
+
*vals = (int *)st->filter_freq_avail;
894
+
*type = IIO_VAL_FRACTIONAL;
895
+
*length = ARRAY_SIZE(st->filter_freq_avail) * 2;
920
896
921
897
return IIO_AVAIL_LIST;
922
898
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
···
966
930
.update_scan_mode = ad7192_update_scan_mode,
967
931
};
968
932
933
+
static const struct iio_info ad7194_info = {
934
+
.read_raw = ad7192_read_raw,
935
+
.write_raw = ad7192_write_raw,
936
+
.write_raw_get_fmt = ad7192_write_raw_get_fmt,
937
+
.read_avail = ad7192_read_avail,
938
+
.validate_trigger = ad_sd_validate_trigger,
939
+
};
940
+
969
941
static const struct iio_info ad7195_info = {
970
942
.read_raw = ad7192_read_raw,
971
943
.write_raw = ad7192_write_raw,
···
1000
956
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
1001
957
(_mask_all), \
1002
958
.info_mask_shared_by_type_available = (_mask_type_av), \
1003
-
.info_mask_shared_by_all_available = (_mask_all_av), \
959
+
.info_mask_shared_by_all_available = \
960
+
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
961
+
(_mask_all_av), \
1004
962
.ext_info = (_ext_info), \
1005
963
.scan_index = (_si), \
1006
964
.scan_type = { \
···
1065
1019
IIO_CHAN_SOFT_TIMESTAMP(14),
1066
1020
};
1067
1021
1022
+
static bool ad7194_validate_ain_channel(struct device *dev, u32 ain)
1023
+
{
1024
+
return in_range(ain, AD7194_CH_AIN_START, AD7194_CH_AIN_NR);
1025
+
}
1026
+
1027
+
static int ad7194_parse_channels(struct iio_dev *indio_dev)
1028
+
{
1029
+
struct device *dev = indio_dev->dev.parent;
1030
+
struct iio_chan_spec *ad7194_channels;
1031
+
const struct iio_chan_spec ad7194_chan = AD7193_CHANNEL(0, 0, 0);
1032
+
const struct iio_chan_spec ad7194_chan_diff = AD7193_DIFF_CHANNEL(0, 0, 0, 0);
1033
+
const struct iio_chan_spec ad7194_chan_temp = AD719x_TEMP_CHANNEL(0, 0);
1034
+
const struct iio_chan_spec ad7194_chan_timestamp = IIO_CHAN_SOFT_TIMESTAMP(0);
1035
+
unsigned int num_channels, index = 0;
1036
+
u32 ain[2];
1037
+
int ret;
1038
+
1039
+
num_channels = device_get_child_node_count(dev);
1040
+
if (num_channels > AD7194_CH_MAX_NR)
1041
+
return dev_err_probe(dev, -EINVAL, "Too many channels: %u\n",
1042
+
num_channels);
1043
+
1044
+
num_channels += AD7194_CH_BASE_NR;
1045
+
1046
+
ad7194_channels = devm_kcalloc(dev, num_channels,
1047
+
sizeof(*ad7194_channels), GFP_KERNEL);
1048
+
if (!ad7194_channels)
1049
+
return -ENOMEM;
1050
+
1051
+
indio_dev->channels = ad7194_channels;
1052
+
indio_dev->num_channels = num_channels;
1053
+
1054
+
device_for_each_child_node_scoped(dev, child) {
1055
+
ret = fwnode_property_read_u32_array(child, "diff-channels",
1056
+
ain, ARRAY_SIZE(ain));
1057
+
if (ret == 0) {
1058
+
if (!ad7194_validate_ain_channel(dev, ain[0]))
1059
+
return dev_err_probe(dev, -EINVAL,
1060
+
"Invalid AIN channel: %u\n",
1061
+
ain[0]);
1062
+
1063
+
if (!ad7194_validate_ain_channel(dev, ain[1]))
1064
+
return dev_err_probe(dev, -EINVAL,
1065
+
"Invalid AIN channel: %u\n",
1066
+
ain[1]);
1067
+
1068
+
*ad7194_channels = ad7194_chan_diff;
1069
+
ad7194_channels->scan_index = index++;
1070
+
ad7194_channels->channel = ain[0];
1071
+
ad7194_channels->channel2 = ain[1];
1072
+
ad7194_channels->address = AD7194_DIFF_CH(ain[0], ain[1]);
1073
+
} else {
1074
+
ret = fwnode_property_read_u32(child, "single-channel",
1075
+
&ain[0]);
1076
+
if (ret)
1077
+
return dev_err_probe(dev, ret,
1078
+
"Missing channel property\n");
1079
+
1080
+
if (!ad7194_validate_ain_channel(dev, ain[0]))
1081
+
return dev_err_probe(dev, -EINVAL,
1082
+
"Invalid AIN channel: %u\n",
1083
+
ain[0]);
1084
+
1085
+
*ad7194_channels = ad7194_chan;
1086
+
ad7194_channels->scan_index = index++;
1087
+
ad7194_channels->channel = ain[0];
1088
+
ad7194_channels->address = AD7194_CH(ain[0]);
1089
+
}
1090
+
ad7194_channels++;
1091
+
}
1092
+
1093
+
*ad7194_channels = ad7194_chan_temp;
1094
+
ad7194_channels->scan_index = index++;
1095
+
ad7194_channels->address = AD7194_CH_TEMP;
1096
+
ad7194_channels++;
1097
+
1098
+
*ad7194_channels = ad7194_chan_timestamp;
1099
+
ad7194_channels->scan_index = index;
1100
+
1101
+
return 0;
1102
+
}
1103
+
1068
1104
static const struct ad7192_chip_info ad7192_chip_info_tbl[] = {
1069
1105
[ID_AD7190] = {
1070
1106
.chip_id = CHIPID_AD7190,
1071
1107
.name = "ad7190",
1072
1108
.channels = ad7192_channels,
1073
1109
.num_channels = ARRAY_SIZE(ad7192_channels),
1110
+
.sigma_delta_info = &ad7192_sigma_delta_info,
1074
1111
.info = &ad7192_info,
1075
1112
},
1076
1113
[ID_AD7192] = {
···
1161
1032
.name = "ad7192",
1162
1033
.channels = ad7192_channels,
1163
1034
.num_channels = ARRAY_SIZE(ad7192_channels),
1035
+
.sigma_delta_info = &ad7192_sigma_delta_info,
1164
1036
.info = &ad7192_info,
1165
1037
},
1166
1038
[ID_AD7193] = {
···
1169
1039
.name = "ad7193",
1170
1040
.channels = ad7193_channels,
1171
1041
.num_channels = ARRAY_SIZE(ad7193_channels),
1042
+
.sigma_delta_info = &ad7192_sigma_delta_info,
1172
1043
.info = &ad7192_info,
1044
+
},
1045
+
[ID_AD7194] = {
1046
+
.chip_id = CHIPID_AD7194,
1047
+
.name = "ad7194",
1048
+
.info = &ad7194_info,
1049
+
.sigma_delta_info = &ad7194_sigma_delta_info,
1050
+
.parse_channels = ad7194_parse_channels,
1173
1051
},
1174
1052
[ID_AD7195] = {
1175
1053
.chip_id = CHIPID_AD7195,
1176
1054
.name = "ad7195",
1177
1055
.channels = ad7192_channels,
1178
1056
.num_channels = ARRAY_SIZE(ad7192_channels),
1057
+
.sigma_delta_info = &ad7192_sigma_delta_info,
1179
1058
.info = &ad7195_info,
1180
1059
},
1181
1060
};
···
1198
1059
{
1199
1060
struct ad7192_state *st;
1200
1061
struct iio_dev *indio_dev;
1062
+
struct regulator *aincom;
1201
1063
int ret;
1202
1064
1203
1065
if (!spi->irq) {
···
1213
1073
st = iio_priv(indio_dev);
1214
1074
1215
1075
mutex_init(&st->lock);
1076
+
1077
+
/*
1078
+
* Regulator aincom is optional to maintain compatibility with older DT.
1079
+
* Newer firmware should provide a zero volt fixed supply if wired to
1080
+
* ground.
1081
+
*/
1082
+
aincom = devm_regulator_get_optional(&spi->dev, "aincom");
1083
+
if (IS_ERR(aincom)) {
1084
+
if (PTR_ERR(aincom) != -ENODEV)
1085
+
return dev_err_probe(&spi->dev, PTR_ERR(aincom),
1086
+
"Failed to get AINCOM supply\n");
1087
+
1088
+
st->aincom_mv = 0;
1089
+
} else {
1090
+
ret = regulator_enable(aincom);
1091
+
if (ret)
1092
+
return dev_err_probe(&spi->dev, ret,
1093
+
"Failed to enable specified AINCOM supply\n");
1094
+
1095
+
ret = devm_add_action_or_reset(&spi->dev, ad7192_reg_disable, aincom);
1096
+
if (ret)
1097
+
return ret;
1098
+
1099
+
ret = regulator_get_voltage(aincom);
1100
+
if (ret < 0)
1101
+
return dev_err_probe(&spi->dev, ret,
1102
+
"Device tree error, AINCOM voltage undefined\n");
1103
+
st->aincom_mv = ret / MILLI;
1104
+
}
1216
1105
1217
1106
st->avdd = devm_regulator_get(&spi->dev, "avdd");
1218
1107
if (IS_ERR(st->avdd))
···
1291
1122
st->chip_info = spi_get_device_match_data(spi);
1292
1123
indio_dev->name = st->chip_info->name;
1293
1124
indio_dev->modes = INDIO_DIRECT_MODE;
1294
-
indio_dev->channels = st->chip_info->channels;
1295
-
indio_dev->num_channels = st->chip_info->num_channels;
1296
1125
indio_dev->info = st->chip_info->info;
1126
+
if (st->chip_info->parse_channels) {
1127
+
ret = st->chip_info->parse_channels(indio_dev);
1128
+
if (ret)
1129
+
return ret;
1130
+
} else {
1131
+
indio_dev->channels = st->chip_info->channels;
1132
+
indio_dev->num_channels = st->chip_info->num_channels;
1133
+
}
1297
1134
1298
-
ret = ad_sd_init(&st->sd, indio_dev, spi, &ad7192_sigma_delta_info);
1135
+
ret = ad_sd_init(&st->sd, indio_dev, spi, st->chip_info->sigma_delta_info);
1299
1136
if (ret)
1300
1137
return ret;
1301
1138
···
1338
1163
{ .compatible = "adi,ad7190", .data = &ad7192_chip_info_tbl[ID_AD7190] },
1339
1164
{ .compatible = "adi,ad7192", .data = &ad7192_chip_info_tbl[ID_AD7192] },
1340
1165
{ .compatible = "adi,ad7193", .data = &ad7192_chip_info_tbl[ID_AD7193] },
1166
+
{ .compatible = "adi,ad7194", .data = &ad7192_chip_info_tbl[ID_AD7194] },
1341
1167
{ .compatible = "adi,ad7195", .data = &ad7192_chip_info_tbl[ID_AD7195] },
1342
1168
{}
1343
1169
};
···
1348
1172
{ "ad7190", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7190] },
1349
1173
{ "ad7192", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7192] },
1350
1174
{ "ad7193", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7193] },
1175
+
{ "ad7194", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7194] },
1351
1176
{ "ad7195", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7195] },
1352
1177
{}
1353
1178
};
···
1365
1188
module_spi_driver(ad7192_driver);
1366
1189
1367
1190
MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
1368
-
MODULE_DESCRIPTION("Analog Devices AD7190, AD7192, AD7193, AD7195 ADC");
1191
+
MODULE_DESCRIPTION("Analog Devices AD7192 and similar ADC");
1369
1192
MODULE_LICENSE("GPL v2");
1370
1193
MODULE_IMPORT_NS(IIO_AD_SIGMA_DELTA);
+1
-1
drivers/iio/adc/ad7291.c
+1
-1
drivers/iio/adc/ad7291.c
+833
drivers/iio/adc/ad7380.c
+833
drivers/iio/adc/ad7380.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-only
2
+
/*
3
+
* Analog Devices AD738x Simultaneous Sampling SAR ADCs
4
+
*
5
+
* Copyright 2017 Analog Devices Inc.
6
+
* Copyright 2024 BayLibre, SAS
7
+
*
8
+
* Datasheets of supported parts:
9
+
* ad7380/1 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7380-7381.pdf
10
+
* ad7383/4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-7384.pdf
11
+
* ad7380-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7380-4.pdf
12
+
* ad7381-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7381-4.pdf
13
+
* ad7383/4-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-4-ad7384-4.pdf
14
+
*/
15
+
16
+
#include <linux/align.h>
17
+
#include <linux/bitfield.h>
18
+
#include <linux/bitops.h>
19
+
#include <linux/cleanup.h>
20
+
#include <linux/device.h>
21
+
#include <linux/err.h>
22
+
#include <linux/kernel.h>
23
+
#include <linux/module.h>
24
+
#include <linux/regmap.h>
25
+
#include <linux/regulator/consumer.h>
26
+
#include <linux/slab.h>
27
+
#include <linux/spi/spi.h>
28
+
29
+
#include <linux/iio/buffer.h>
30
+
#include <linux/iio/iio.h>
31
+
#include <linux/iio/trigger_consumer.h>
32
+
#include <linux/iio/triggered_buffer.h>
33
+
34
+
#define MAX_NUM_CHANNELS 4
35
+
/* 2.5V internal reference voltage */
36
+
#define AD7380_INTERNAL_REF_MV 2500
37
+
38
+
/* reading and writing registers is more reliable at lower than max speed */
39
+
#define AD7380_REG_WR_SPEED_HZ 10000000
40
+
41
+
#define AD7380_REG_WR BIT(15)
42
+
#define AD7380_REG_REGADDR GENMASK(14, 12)
43
+
#define AD7380_REG_DATA GENMASK(11, 0)
44
+
45
+
#define AD7380_REG_ADDR_NOP 0x0
46
+
#define AD7380_REG_ADDR_CONFIG1 0x1
47
+
#define AD7380_REG_ADDR_CONFIG2 0x2
48
+
#define AD7380_REG_ADDR_ALERT 0x3
49
+
#define AD7380_REG_ADDR_ALERT_LOW_TH 0x4
50
+
#define AD7380_REG_ADDR_ALERT_HIGH_TH 0x5
51
+
52
+
#define AD7380_CONFIG1_OS_MODE BIT(9)
53
+
#define AD7380_CONFIG1_OSR GENMASK(8, 6)
54
+
#define AD7380_CONFIG1_CRC_W BIT(5)
55
+
#define AD7380_CONFIG1_CRC_R BIT(4)
56
+
#define AD7380_CONFIG1_ALERTEN BIT(3)
57
+
#define AD7380_CONFIG1_RES BIT(2)
58
+
#define AD7380_CONFIG1_REFSEL BIT(1)
59
+
#define AD7380_CONFIG1_PMODE BIT(0)
60
+
61
+
#define AD7380_CONFIG2_SDO2 GENMASK(9, 8)
62
+
#define AD7380_CONFIG2_SDO BIT(8)
63
+
#define AD7380_CONFIG2_RESET GENMASK(7, 0)
64
+
65
+
#define AD7380_CONFIG2_RESET_SOFT 0x3C
66
+
#define AD7380_CONFIG2_RESET_HARD 0xFF
67
+
68
+
#define AD7380_ALERT_LOW_TH GENMASK(11, 0)
69
+
#define AD7380_ALERT_HIGH_TH GENMASK(11, 0)
70
+
71
+
#define T_CONVERT_NS 190 /* conversion time */
72
+
#define T_CONVERT_0_NS 10 /* 1st conversion start time (oversampling) */
73
+
#define T_CONVERT_X_NS 500 /* xth conversion start time (oversampling) */
74
+
75
+
struct ad7380_timing_specs {
76
+
const unsigned int t_csh_ns; /* CS minimum high time */
77
+
};
78
+
79
+
struct ad7380_chip_info {
80
+
const char *name;
81
+
const struct iio_chan_spec *channels;
82
+
unsigned int num_channels;
83
+
const char * const *vcm_supplies;
84
+
unsigned int num_vcm_supplies;
85
+
const unsigned long *available_scan_masks;
86
+
const struct ad7380_timing_specs *timing_specs;
87
+
};
88
+
89
+
enum {
90
+
AD7380_SCAN_TYPE_NORMAL,
91
+
AD7380_SCAN_TYPE_RESOLUTION_BOOST,
92
+
};
93
+
94
+
/* Extended scan types for 14-bit chips. */
95
+
static const struct iio_scan_type ad7380_scan_type_14[] = {
96
+
[AD7380_SCAN_TYPE_NORMAL] = {
97
+
.sign = 's',
98
+
.realbits = 14,
99
+
.storagebits = 16,
100
+
.endianness = IIO_CPU
101
+
},
102
+
[AD7380_SCAN_TYPE_RESOLUTION_BOOST] = {
103
+
.sign = 's',
104
+
.realbits = 16,
105
+
.storagebits = 16,
106
+
.endianness = IIO_CPU
107
+
},
108
+
};
109
+
110
+
/* Extended scan types for 16-bit chips. */
111
+
static const struct iio_scan_type ad7380_scan_type_16[] = {
112
+
[AD7380_SCAN_TYPE_NORMAL] = {
113
+
.sign = 's',
114
+
.realbits = 16,
115
+
.storagebits = 16,
116
+
.endianness = IIO_CPU
117
+
},
118
+
[AD7380_SCAN_TYPE_RESOLUTION_BOOST] = {
119
+
.sign = 's',
120
+
.realbits = 18,
121
+
.storagebits = 32,
122
+
.endianness = IIO_CPU
123
+
},
124
+
};
125
+
126
+
#define AD7380_CHANNEL(index, bits, diff) { \
127
+
.type = IIO_VOLTAGE, \
128
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
129
+
((diff) ? 0 : BIT(IIO_CHAN_INFO_OFFSET)), \
130
+
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
131
+
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
132
+
.info_mask_shared_by_type_available = \
133
+
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
134
+
.indexed = 1, \
135
+
.differential = (diff), \
136
+
.channel = (diff) ? (2 * (index)) : (index), \
137
+
.channel2 = (diff) ? (2 * (index) + 1) : 0, \
138
+
.scan_index = (index), \
139
+
.has_ext_scan_type = 1, \
140
+
.ext_scan_type = ad7380_scan_type_##bits, \
141
+
.num_ext_scan_type = ARRAY_SIZE(ad7380_scan_type_##bits),\
142
+
}
143
+
144
+
#define DEFINE_AD7380_2_CHANNEL(name, bits, diff) \
145
+
static const struct iio_chan_spec name[] = { \
146
+
AD7380_CHANNEL(0, bits, diff), \
147
+
AD7380_CHANNEL(1, bits, diff), \
148
+
IIO_CHAN_SOFT_TIMESTAMP(2), \
149
+
}
150
+
151
+
#define DEFINE_AD7380_4_CHANNEL(name, bits, diff) \
152
+
static const struct iio_chan_spec name[] = { \
153
+
AD7380_CHANNEL(0, bits, diff), \
154
+
AD7380_CHANNEL(1, bits, diff), \
155
+
AD7380_CHANNEL(2, bits, diff), \
156
+
AD7380_CHANNEL(3, bits, diff), \
157
+
IIO_CHAN_SOFT_TIMESTAMP(4), \
158
+
}
159
+
160
+
/* fully differential */
161
+
DEFINE_AD7380_2_CHANNEL(ad7380_channels, 16, 1);
162
+
DEFINE_AD7380_2_CHANNEL(ad7381_channels, 14, 1);
163
+
DEFINE_AD7380_4_CHANNEL(ad7380_4_channels, 16, 1);
164
+
DEFINE_AD7380_4_CHANNEL(ad7381_4_channels, 14, 1);
165
+
/* pseudo differential */
166
+
DEFINE_AD7380_2_CHANNEL(ad7383_channels, 16, 0);
167
+
DEFINE_AD7380_2_CHANNEL(ad7384_channels, 14, 0);
168
+
DEFINE_AD7380_4_CHANNEL(ad7383_4_channels, 16, 0);
169
+
DEFINE_AD7380_4_CHANNEL(ad7384_4_channels, 14, 0);
170
+
171
+
static const char * const ad7380_2_channel_vcm_supplies[] = {
172
+
"aina", "ainb",
173
+
};
174
+
175
+
static const char * const ad7380_4_channel_vcm_supplies[] = {
176
+
"aina", "ainb", "ainc", "aind",
177
+
};
178
+
179
+
/* Since this is simultaneous sampling, we don't allow individual channels. */
180
+
static const unsigned long ad7380_2_channel_scan_masks[] = {
181
+
GENMASK(1, 0),
182
+
0
183
+
};
184
+
185
+
static const unsigned long ad7380_4_channel_scan_masks[] = {
186
+
GENMASK(3, 0),
187
+
0
188
+
};
189
+
190
+
static const struct ad7380_timing_specs ad7380_timing = {
191
+
.t_csh_ns = 10,
192
+
};
193
+
194
+
static const struct ad7380_timing_specs ad7380_4_timing = {
195
+
.t_csh_ns = 20,
196
+
};
197
+
198
+
/*
199
+
* Available oversampling ratios. The indices correspond with the bit value
200
+
* expected by the chip. The available ratios depend on the averaging mode,
201
+
* only normal averaging is supported for now.
202
+
*/
203
+
static const int ad7380_oversampling_ratios[] = {
204
+
1, 2, 4, 8, 16, 32,
205
+
};
206
+
207
+
static const struct ad7380_chip_info ad7380_chip_info = {
208
+
.name = "ad7380",
209
+
.channels = ad7380_channels,
210
+
.num_channels = ARRAY_SIZE(ad7380_channels),
211
+
.available_scan_masks = ad7380_2_channel_scan_masks,
212
+
.timing_specs = &ad7380_timing,
213
+
};
214
+
215
+
static const struct ad7380_chip_info ad7381_chip_info = {
216
+
.name = "ad7381",
217
+
.channels = ad7381_channels,
218
+
.num_channels = ARRAY_SIZE(ad7381_channels),
219
+
.available_scan_masks = ad7380_2_channel_scan_masks,
220
+
.timing_specs = &ad7380_timing,
221
+
};
222
+
223
+
static const struct ad7380_chip_info ad7383_chip_info = {
224
+
.name = "ad7383",
225
+
.channels = ad7383_channels,
226
+
.num_channels = ARRAY_SIZE(ad7383_channels),
227
+
.vcm_supplies = ad7380_2_channel_vcm_supplies,
228
+
.num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies),
229
+
.available_scan_masks = ad7380_2_channel_scan_masks,
230
+
.timing_specs = &ad7380_timing,
231
+
};
232
+
233
+
static const struct ad7380_chip_info ad7384_chip_info = {
234
+
.name = "ad7384",
235
+
.channels = ad7384_channels,
236
+
.num_channels = ARRAY_SIZE(ad7384_channels),
237
+
.vcm_supplies = ad7380_2_channel_vcm_supplies,
238
+
.num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies),
239
+
.available_scan_masks = ad7380_2_channel_scan_masks,
240
+
.timing_specs = &ad7380_timing,
241
+
};
242
+
243
+
static const struct ad7380_chip_info ad7380_4_chip_info = {
244
+
.name = "ad7380-4",
245
+
.channels = ad7380_4_channels,
246
+
.num_channels = ARRAY_SIZE(ad7380_4_channels),
247
+
.available_scan_masks = ad7380_4_channel_scan_masks,
248
+
.timing_specs = &ad7380_4_timing,
249
+
};
250
+
251
+
static const struct ad7380_chip_info ad7381_4_chip_info = {
252
+
.name = "ad7381-4",
253
+
.channels = ad7381_4_channels,
254
+
.num_channels = ARRAY_SIZE(ad7381_4_channels),
255
+
.available_scan_masks = ad7380_4_channel_scan_masks,
256
+
.timing_specs = &ad7380_4_timing,
257
+
};
258
+
259
+
static const struct ad7380_chip_info ad7383_4_chip_info = {
260
+
.name = "ad7383-4",
261
+
.channels = ad7383_4_channels,
262
+
.num_channels = ARRAY_SIZE(ad7383_4_channels),
263
+
.vcm_supplies = ad7380_4_channel_vcm_supplies,
264
+
.num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies),
265
+
.available_scan_masks = ad7380_4_channel_scan_masks,
266
+
.timing_specs = &ad7380_4_timing,
267
+
};
268
+
269
+
static const struct ad7380_chip_info ad7384_4_chip_info = {
270
+
.name = "ad7384-4",
271
+
.channels = ad7384_4_channels,
272
+
.num_channels = ARRAY_SIZE(ad7384_4_channels),
273
+
.vcm_supplies = ad7380_4_channel_vcm_supplies,
274
+
.num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies),
275
+
.available_scan_masks = ad7380_4_channel_scan_masks,
276
+
.timing_specs = &ad7380_4_timing,
277
+
};
278
+
279
+
struct ad7380_state {
280
+
const struct ad7380_chip_info *chip_info;
281
+
struct spi_device *spi;
282
+
struct regmap *regmap;
283
+
unsigned int oversampling_ratio;
284
+
bool resolution_boost_enabled;
285
+
unsigned int vref_mv;
286
+
unsigned int vcm_mv[MAX_NUM_CHANNELS];
287
+
/* xfers, message an buffer for reading sample data */
288
+
struct spi_transfer xfer[2];
289
+
struct spi_message msg;
290
+
/*
291
+
* DMA (thus cache coherency maintenance) requires the transfer buffers
292
+
* to live in their own cache lines.
293
+
*
294
+
* Make the buffer large enough for MAX_NUM_CHANNELS 32-bit samples and
295
+
* one 64-bit aligned 64-bit timestamp.
296
+
*/
297
+
u8 scan_data[ALIGN(MAX_NUM_CHANNELS * sizeof(u32), sizeof(s64))
298
+
+ sizeof(s64)] __aligned(IIO_DMA_MINALIGN);
299
+
/* buffers for reading/writing registers */
300
+
u16 tx;
301
+
u16 rx;
302
+
};
303
+
304
+
static int ad7380_regmap_reg_write(void *context, unsigned int reg,
305
+
unsigned int val)
306
+
{
307
+
struct ad7380_state *st = context;
308
+
struct spi_transfer xfer = {
309
+
.speed_hz = AD7380_REG_WR_SPEED_HZ,
310
+
.bits_per_word = 16,
311
+
.len = 2,
312
+
.tx_buf = &st->tx,
313
+
};
314
+
315
+
st->tx = FIELD_PREP(AD7380_REG_WR, 1) |
316
+
FIELD_PREP(AD7380_REG_REGADDR, reg) |
317
+
FIELD_PREP(AD7380_REG_DATA, val);
318
+
319
+
return spi_sync_transfer(st->spi, &xfer, 1);
320
+
}
321
+
322
+
static int ad7380_regmap_reg_read(void *context, unsigned int reg,
323
+
unsigned int *val)
324
+
{
325
+
struct ad7380_state *st = context;
326
+
struct spi_transfer xfers[] = {
327
+
{
328
+
.speed_hz = AD7380_REG_WR_SPEED_HZ,
329
+
.bits_per_word = 16,
330
+
.len = 2,
331
+
.tx_buf = &st->tx,
332
+
.cs_change = 1,
333
+
.cs_change_delay = {
334
+
.value = st->chip_info->timing_specs->t_csh_ns,
335
+
.unit = SPI_DELAY_UNIT_NSECS,
336
+
},
337
+
}, {
338
+
.speed_hz = AD7380_REG_WR_SPEED_HZ,
339
+
.bits_per_word = 16,
340
+
.len = 2,
341
+
.rx_buf = &st->rx,
342
+
},
343
+
};
344
+
int ret;
345
+
346
+
st->tx = FIELD_PREP(AD7380_REG_WR, 0) |
347
+
FIELD_PREP(AD7380_REG_REGADDR, reg) |
348
+
FIELD_PREP(AD7380_REG_DATA, 0);
349
+
350
+
ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
351
+
if (ret < 0)
352
+
return ret;
353
+
354
+
*val = FIELD_GET(AD7380_REG_DATA, st->rx);
355
+
356
+
return 0;
357
+
}
358
+
359
+
static const struct regmap_config ad7380_regmap_config = {
360
+
.reg_bits = 3,
361
+
.val_bits = 12,
362
+
.reg_read = ad7380_regmap_reg_read,
363
+
.reg_write = ad7380_regmap_reg_write,
364
+
.max_register = AD7380_REG_ADDR_ALERT_HIGH_TH,
365
+
.can_sleep = true,
366
+
};
367
+
368
+
static int ad7380_debugfs_reg_access(struct iio_dev *indio_dev, u32 reg,
369
+
u32 writeval, u32 *readval)
370
+
{
371
+
iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
372
+
struct ad7380_state *st = iio_priv(indio_dev);
373
+
374
+
if (readval)
375
+
return regmap_read(st->regmap, reg, readval);
376
+
else
377
+
return regmap_write(st->regmap, reg, writeval);
378
+
}
379
+
unreachable();
380
+
}
381
+
382
+
/**
383
+
* ad7380_update_xfers - update the SPI transfers base on the current scan type
384
+
* @st: device instance specific state
385
+
* @scan_type: current scan type
386
+
*/
387
+
static void ad7380_update_xfers(struct ad7380_state *st,
388
+
const struct iio_scan_type *scan_type)
389
+
{
390
+
/*
391
+
* First xfer only triggers conversion and has to be long enough for
392
+
* all conversions to complete, which can be multiple conversion in the
393
+
* case of oversampling. Technically T_CONVERT_X_NS is lower for some
394
+
* chips, but we use the maximum value for simplicity for now.
395
+
*/
396
+
if (st->oversampling_ratio > 1)
397
+
st->xfer[0].delay.value = T_CONVERT_0_NS + T_CONVERT_X_NS *
398
+
(st->oversampling_ratio - 1);
399
+
else
400
+
st->xfer[0].delay.value = T_CONVERT_NS;
401
+
402
+
st->xfer[0].delay.unit = SPI_DELAY_UNIT_NSECS;
403
+
404
+
/*
405
+
* Second xfer reads all channels. Data size depends on if resolution
406
+
* boost is enabled or not.
407
+
*/
408
+
st->xfer[1].bits_per_word = scan_type->realbits;
409
+
st->xfer[1].len = BITS_TO_BYTES(scan_type->storagebits) *
410
+
(st->chip_info->num_channels - 1);
411
+
}
412
+
413
+
static int ad7380_triggered_buffer_preenable(struct iio_dev *indio_dev)
414
+
{
415
+
struct ad7380_state *st = iio_priv(indio_dev);
416
+
const struct iio_scan_type *scan_type;
417
+
418
+
/*
419
+
* Currently, we always read all channels at the same time. The scan_type
420
+
* is the same for all channels, so we just pass the first channel.
421
+
*/
422
+
scan_type = iio_get_current_scan_type(indio_dev, &indio_dev->channels[0]);
423
+
if (IS_ERR(scan_type))
424
+
return PTR_ERR(scan_type);
425
+
426
+
ad7380_update_xfers(st, scan_type);
427
+
428
+
return spi_optimize_message(st->spi, &st->msg);
429
+
}
430
+
431
+
static int ad7380_triggered_buffer_postdisable(struct iio_dev *indio_dev)
432
+
{
433
+
struct ad7380_state *st = iio_priv(indio_dev);
434
+
435
+
spi_unoptimize_message(&st->msg);
436
+
437
+
return 0;
438
+
}
439
+
440
+
static const struct iio_buffer_setup_ops ad7380_buffer_setup_ops = {
441
+
.preenable = ad7380_triggered_buffer_preenable,
442
+
.postdisable = ad7380_triggered_buffer_postdisable,
443
+
};
444
+
445
+
static irqreturn_t ad7380_trigger_handler(int irq, void *p)
446
+
{
447
+
struct iio_poll_func *pf = p;
448
+
struct iio_dev *indio_dev = pf->indio_dev;
449
+
struct ad7380_state *st = iio_priv(indio_dev);
450
+
int ret;
451
+
452
+
ret = spi_sync(st->spi, &st->msg);
453
+
if (ret)
454
+
goto out;
455
+
456
+
iio_push_to_buffers_with_timestamp(indio_dev, &st->scan_data,
457
+
pf->timestamp);
458
+
459
+
out:
460
+
iio_trigger_notify_done(indio_dev->trig);
461
+
462
+
return IRQ_HANDLED;
463
+
}
464
+
465
+
static int ad7380_read_direct(struct ad7380_state *st, unsigned int scan_index,
466
+
const struct iio_scan_type *scan_type, int *val)
467
+
{
468
+
int ret;
469
+
470
+
ad7380_update_xfers(st, scan_type);
471
+
472
+
ret = spi_sync(st->spi, &st->msg);
473
+
if (ret < 0)
474
+
return ret;
475
+
476
+
if (scan_type->storagebits > 16)
477
+
*val = sign_extend32(*(u32 *)(st->scan_data + 4 * scan_index),
478
+
scan_type->realbits - 1);
479
+
else
480
+
*val = sign_extend32(*(u16 *)(st->scan_data + 2 * scan_index),
481
+
scan_type->realbits - 1);
482
+
483
+
return IIO_VAL_INT;
484
+
}
485
+
486
+
static int ad7380_read_raw(struct iio_dev *indio_dev,
487
+
struct iio_chan_spec const *chan,
488
+
int *val, int *val2, long info)
489
+
{
490
+
struct ad7380_state *st = iio_priv(indio_dev);
491
+
const struct iio_scan_type *scan_type;
492
+
493
+
scan_type = iio_get_current_scan_type(indio_dev, chan);
494
+
495
+
if (IS_ERR(scan_type))
496
+
return PTR_ERR(scan_type);
497
+
498
+
switch (info) {
499
+
case IIO_CHAN_INFO_RAW:
500
+
iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
501
+
return ad7380_read_direct(st, chan->scan_index,
502
+
scan_type, val);
503
+
}
504
+
unreachable();
505
+
case IIO_CHAN_INFO_SCALE:
506
+
/*
507
+
* According to the datasheet, the LSB size is:
508
+
* * (2 × VREF) / 2^N, for differential chips
509
+
* * VREF / 2^N, for pseudo-differential chips
510
+
* where N is the ADC resolution (i.e realbits)
511
+
*/
512
+
*val = st->vref_mv;
513
+
*val2 = scan_type->realbits - chan->differential;
514
+
515
+
return IIO_VAL_FRACTIONAL_LOG2;
516
+
case IIO_CHAN_INFO_OFFSET:
517
+
/*
518
+
* According to IIO ABI, offset is applied before scale,
519
+
* so offset is: vcm_mv / scale
520
+
*/
521
+
*val = st->vcm_mv[chan->channel] * (1 << scan_type->realbits)
522
+
/ st->vref_mv;
523
+
524
+
return IIO_VAL_INT;
525
+
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
526
+
*val = st->oversampling_ratio;
527
+
528
+
return IIO_VAL_INT;
529
+
default:
530
+
return -EINVAL;
531
+
}
532
+
}
533
+
534
+
static int ad7380_read_avail(struct iio_dev *indio_dev,
535
+
struct iio_chan_spec const *chan,
536
+
const int **vals, int *type, int *length,
537
+
long mask)
538
+
{
539
+
switch (mask) {
540
+
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
541
+
*vals = ad7380_oversampling_ratios;
542
+
*length = ARRAY_SIZE(ad7380_oversampling_ratios);
543
+
*type = IIO_VAL_INT;
544
+
545
+
return IIO_AVAIL_LIST;
546
+
default:
547
+
return -EINVAL;
548
+
}
549
+
}
550
+
551
+
/**
552
+
* ad7380_osr_to_regval - convert ratio to OSR register value
553
+
* @ratio: ratio to check
554
+
*
555
+
* Check if ratio is present in the list of available ratios and return the
556
+
* corresponding value that needs to be written to the register to select that
557
+
* ratio.
558
+
*
559
+
* Returns: register value (0 to 7) or -EINVAL if there is not an exact match
560
+
*/
561
+
static int ad7380_osr_to_regval(int ratio)
562
+
{
563
+
int i;
564
+
565
+
for (i = 0; i < ARRAY_SIZE(ad7380_oversampling_ratios); i++) {
566
+
if (ratio == ad7380_oversampling_ratios[i])
567
+
return i;
568
+
}
569
+
570
+
return -EINVAL;
571
+
}
572
+
573
+
static int ad7380_write_raw(struct iio_dev *indio_dev,
574
+
struct iio_chan_spec const *chan, int val,
575
+
int val2, long mask)
576
+
{
577
+
struct ad7380_state *st = iio_priv(indio_dev);
578
+
int ret, osr, boost;
579
+
580
+
switch (mask) {
581
+
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
582
+
osr = ad7380_osr_to_regval(val);
583
+
if (osr < 0)
584
+
return osr;
585
+
586
+
/* always enable resolution boost when oversampling is enabled */
587
+
boost = osr > 0 ? 1 : 0;
588
+
589
+
iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
590
+
ret = regmap_update_bits(st->regmap,
591
+
AD7380_REG_ADDR_CONFIG1,
592
+
AD7380_CONFIG1_OSR | AD7380_CONFIG1_RES,
593
+
FIELD_PREP(AD7380_CONFIG1_OSR, osr) |
594
+
FIELD_PREP(AD7380_CONFIG1_RES, boost));
595
+
596
+
if (ret)
597
+
return ret;
598
+
599
+
st->oversampling_ratio = val;
600
+
st->resolution_boost_enabled = boost;
601
+
602
+
/*
603
+
* Perform a soft reset. This will flush the oversampling
604
+
* block and FIFO but will maintain the content of the
605
+
* configurable registers.
606
+
*/
607
+
return regmap_update_bits(st->regmap,
608
+
AD7380_REG_ADDR_CONFIG2,
609
+
AD7380_CONFIG2_RESET,
610
+
FIELD_PREP(AD7380_CONFIG2_RESET,
611
+
AD7380_CONFIG2_RESET_SOFT));
612
+
}
613
+
unreachable();
614
+
default:
615
+
return -EINVAL;
616
+
}
617
+
}
618
+
619
+
static int ad7380_get_current_scan_type(const struct iio_dev *indio_dev,
620
+
const struct iio_chan_spec *chan)
621
+
{
622
+
struct ad7380_state *st = iio_priv(indio_dev);
623
+
624
+
return st->resolution_boost_enabled ? AD7380_SCAN_TYPE_RESOLUTION_BOOST
625
+
: AD7380_SCAN_TYPE_NORMAL;
626
+
}
627
+
628
+
static const struct iio_info ad7380_info = {
629
+
.read_raw = &ad7380_read_raw,
630
+
.read_avail = &ad7380_read_avail,
631
+
.write_raw = &ad7380_write_raw,
632
+
.get_current_scan_type = &ad7380_get_current_scan_type,
633
+
.debugfs_reg_access = &ad7380_debugfs_reg_access,
634
+
};
635
+
636
+
static int ad7380_init(struct ad7380_state *st, struct regulator *vref)
637
+
{
638
+
int ret;
639
+
640
+
/* perform hard reset */
641
+
ret = regmap_update_bits(st->regmap, AD7380_REG_ADDR_CONFIG2,
642
+
AD7380_CONFIG2_RESET,
643
+
FIELD_PREP(AD7380_CONFIG2_RESET,
644
+
AD7380_CONFIG2_RESET_HARD));
645
+
if (ret < 0)
646
+
return ret;
647
+
648
+
/* select internal or external reference voltage */
649
+
ret = regmap_update_bits(st->regmap, AD7380_REG_ADDR_CONFIG1,
650
+
AD7380_CONFIG1_REFSEL,
651
+
FIELD_PREP(AD7380_CONFIG1_REFSEL,
652
+
vref ? 1 : 0));
653
+
if (ret < 0)
654
+
return ret;
655
+
656
+
/* This is the default value after reset. */
657
+
st->oversampling_ratio = 1;
658
+
659
+
/* SPI 1-wire mode */
660
+
return regmap_update_bits(st->regmap, AD7380_REG_ADDR_CONFIG2,
661
+
AD7380_CONFIG2_SDO,
662
+
FIELD_PREP(AD7380_CONFIG2_SDO, 1));
663
+
}
664
+
665
+
static void ad7380_regulator_disable(void *p)
666
+
{
667
+
regulator_disable(p);
668
+
}
669
+
670
+
static int ad7380_probe(struct spi_device *spi)
671
+
{
672
+
struct iio_dev *indio_dev;
673
+
struct ad7380_state *st;
674
+
struct regulator *vref;
675
+
int ret, i;
676
+
677
+
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
678
+
if (!indio_dev)
679
+
return -ENOMEM;
680
+
681
+
st = iio_priv(indio_dev);
682
+
st->spi = spi;
683
+
st->chip_info = spi_get_device_match_data(spi);
684
+
if (!st->chip_info)
685
+
return dev_err_probe(&spi->dev, -EINVAL, "missing match data\n");
686
+
687
+
vref = devm_regulator_get_optional(&spi->dev, "refio");
688
+
if (IS_ERR(vref)) {
689
+
if (PTR_ERR(vref) != -ENODEV)
690
+
return dev_err_probe(&spi->dev, PTR_ERR(vref),
691
+
"Failed to get refio regulator\n");
692
+
693
+
vref = NULL;
694
+
}
695
+
696
+
/*
697
+
* If there is no REFIO supply, then it means that we are using
698
+
* the internal 2.5V reference, otherwise REFIO is reference voltage.
699
+
*/
700
+
if (vref) {
701
+
ret = regulator_enable(vref);
702
+
if (ret)
703
+
return ret;
704
+
705
+
ret = devm_add_action_or_reset(&spi->dev,
706
+
ad7380_regulator_disable, vref);
707
+
if (ret)
708
+
return ret;
709
+
710
+
ret = regulator_get_voltage(vref);
711
+
if (ret < 0)
712
+
return ret;
713
+
714
+
st->vref_mv = ret / 1000;
715
+
} else {
716
+
st->vref_mv = AD7380_INTERNAL_REF_MV;
717
+
}
718
+
719
+
if (st->chip_info->num_vcm_supplies > ARRAY_SIZE(st->vcm_mv))
720
+
return dev_err_probe(&spi->dev, -EINVAL,
721
+
"invalid number of VCM supplies\n");
722
+
723
+
/*
724
+
* pseudo-differential chips have common mode supplies for the negative
725
+
* input pin.
726
+
*/
727
+
for (i = 0; i < st->chip_info->num_vcm_supplies; i++) {
728
+
struct regulator *vcm;
729
+
730
+
vcm = devm_regulator_get(&spi->dev,
731
+
st->chip_info->vcm_supplies[i]);
732
+
if (IS_ERR(vcm))
733
+
return dev_err_probe(&spi->dev, PTR_ERR(vcm),
734
+
"Failed to get %s regulator\n",
735
+
st->chip_info->vcm_supplies[i]);
736
+
737
+
ret = regulator_enable(vcm);
738
+
if (ret)
739
+
return ret;
740
+
741
+
ret = devm_add_action_or_reset(&spi->dev,
742
+
ad7380_regulator_disable, vcm);
743
+
if (ret)
744
+
return ret;
745
+
746
+
ret = regulator_get_voltage(vcm);
747
+
if (ret < 0)
748
+
return ret;
749
+
750
+
st->vcm_mv[i] = ret / 1000;
751
+
}
752
+
753
+
st->regmap = devm_regmap_init(&spi->dev, NULL, st, &ad7380_regmap_config);
754
+
if (IS_ERR(st->regmap))
755
+
return dev_err_probe(&spi->dev, PTR_ERR(st->regmap),
756
+
"failed to allocate register map\n");
757
+
758
+
/*
759
+
* Setting up a low latency read for getting sample data. Used for both
760
+
* direct read an triggered buffer. Additional fields will be set up in
761
+
* ad7380_update_xfers() based on the current state of the driver at the
762
+
* time of the read.
763
+
*/
764
+
765
+
/* toggle CS (no data xfer) to trigger a conversion */
766
+
st->xfer[0].cs_change = 1;
767
+
st->xfer[0].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns;
768
+
st->xfer[0].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;
769
+
770
+
/* then do a second xfer to read the data */
771
+
st->xfer[1].rx_buf = st->scan_data;
772
+
773
+
spi_message_init_with_transfers(&st->msg, st->xfer, ARRAY_SIZE(st->xfer));
774
+
775
+
indio_dev->channels = st->chip_info->channels;
776
+
indio_dev->num_channels = st->chip_info->num_channels;
777
+
indio_dev->name = st->chip_info->name;
778
+
indio_dev->info = &ad7380_info;
779
+
indio_dev->modes = INDIO_DIRECT_MODE;
780
+
indio_dev->available_scan_masks = st->chip_info->available_scan_masks;
781
+
782
+
ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
783
+
iio_pollfunc_store_time,
784
+
ad7380_trigger_handler,
785
+
&ad7380_buffer_setup_ops);
786
+
if (ret)
787
+
return ret;
788
+
789
+
ret = ad7380_init(st, vref);
790
+
if (ret)
791
+
return ret;
792
+
793
+
return devm_iio_device_register(&spi->dev, indio_dev);
794
+
}
795
+
796
+
static const struct of_device_id ad7380_of_match_table[] = {
797
+
{ .compatible = "adi,ad7380", .data = &ad7380_chip_info },
798
+
{ .compatible = "adi,ad7381", .data = &ad7381_chip_info },
799
+
{ .compatible = "adi,ad7383", .data = &ad7383_chip_info },
800
+
{ .compatible = "adi,ad7384", .data = &ad7384_chip_info },
801
+
{ .compatible = "adi,ad7380-4", .data = &ad7380_4_chip_info },
802
+
{ .compatible = "adi,ad7381-4", .data = &ad7381_4_chip_info },
803
+
{ .compatible = "adi,ad7383-4", .data = &ad7383_4_chip_info },
804
+
{ .compatible = "adi,ad7384-4", .data = &ad7384_4_chip_info },
805
+
{ }
806
+
};
807
+
808
+
static const struct spi_device_id ad7380_id_table[] = {
809
+
{ "ad7380", (kernel_ulong_t)&ad7380_chip_info },
810
+
{ "ad7381", (kernel_ulong_t)&ad7381_chip_info },
811
+
{ "ad7383", (kernel_ulong_t)&ad7383_chip_info },
812
+
{ "ad7384", (kernel_ulong_t)&ad7384_chip_info },
813
+
{ "ad7380-4", (kernel_ulong_t)&ad7380_4_chip_info },
814
+
{ "ad7381-4", (kernel_ulong_t)&ad7381_4_chip_info },
815
+
{ "ad7383-4", (kernel_ulong_t)&ad7383_4_chip_info },
816
+
{ "ad7384-4", (kernel_ulong_t)&ad7384_4_chip_info },
817
+
{ }
818
+
};
819
+
MODULE_DEVICE_TABLE(spi, ad7380_id_table);
820
+
821
+
static struct spi_driver ad7380_driver = {
822
+
.driver = {
823
+
.name = "ad7380",
824
+
.of_match_table = ad7380_of_match_table,
825
+
},
826
+
.probe = ad7380_probe,
827
+
.id_table = ad7380_id_table,
828
+
};
829
+
module_spi_driver(ad7380_driver);
830
+
831
+
MODULE_AUTHOR("Stefan Popa <stefan.popa@analog.com>");
832
+
MODULE_DESCRIPTION("Analog Devices AD738x ADC driver");
833
+
MODULE_LICENSE("GPL");
+8
-11
drivers/iio/adc/ad7606.c
+8
-11
drivers/iio/adc/ad7606.c
···
174
174
175
175
switch (m) {
176
176
case IIO_CHAN_INFO_RAW:
177
-
ret = iio_device_claim_direct_mode(indio_dev);
178
-
if (ret)
179
-
return ret;
180
-
181
-
ret = ad7606_scan_direct(indio_dev, chan->address);
182
-
iio_device_release_direct_mode(indio_dev);
183
-
184
-
if (ret < 0)
185
-
return ret;
186
-
*val = (short)ret;
187
-
return IIO_VAL_INT;
177
+
iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
178
+
ret = ad7606_scan_direct(indio_dev, chan->address);
179
+
if (ret < 0)
180
+
return ret;
181
+
*val = (short) ret;
182
+
return IIO_VAL_INT;
183
+
}
184
+
unreachable();
188
185
case IIO_CHAN_INFO_SCALE:
189
186
if (st->sw_mode_en)
190
187
ch = chan->address;
+3
-5
drivers/iio/adc/ad7944.c
+3
-5
drivers/iio/adc/ad7944.c
···
259
259
/**
260
260
* ad7944_convert_and_acquire - Perform a single conversion and acquisition
261
261
* @adc: The ADC device structure
262
-
* @chan: The channel specification
263
262
* Return: 0 on success, a negative error code on failure
264
263
*
265
264
* Perform a conversion and acquisition of a single sample using the
···
267
268
* Upon successful return adc->sample.raw will contain the conversion result
268
269
* (or adc->chain_mode_buf if the device is using chain mode).
269
270
*/
270
-
static int ad7944_convert_and_acquire(struct ad7944_adc *adc,
271
-
const struct iio_chan_spec *chan)
271
+
static int ad7944_convert_and_acquire(struct ad7944_adc *adc)
272
272
{
273
273
int ret;
274
274
···
289
291
{
290
292
int ret;
291
293
292
-
ret = ad7944_convert_and_acquire(adc, chan);
294
+
ret = ad7944_convert_and_acquire(adc);
293
295
if (ret)
294
296
return ret;
295
297
···
359
361
struct ad7944_adc *adc = iio_priv(indio_dev);
360
362
int ret;
361
363
362
-
ret = ad7944_convert_and_acquire(adc, &indio_dev->channels[0]);
364
+
ret = ad7944_convert_and_acquire(adc);
363
365
if (ret)
364
366
goto out;
365
367
+50
-53
drivers/iio/adc/ad9467.c
+50
-53
drivers/iio/adc/ad9467.c
···
107
107
#define AD9647_MAX_TEST_POINTS 32
108
108
109
109
struct ad9467_chip_info {
110
-
const char *name;
111
-
unsigned int id;
112
-
const struct iio_chan_spec *channels;
113
-
unsigned int num_channels;
114
-
const unsigned int (*scale_table)[2];
115
-
int num_scales;
116
-
unsigned long max_rate;
117
-
unsigned int default_output_mode;
118
-
unsigned int vref_mask;
119
-
unsigned int num_lanes;
110
+
const char *name;
111
+
unsigned int id;
112
+
const struct iio_chan_spec *channels;
113
+
unsigned int num_channels;
114
+
const unsigned int (*scale_table)[2];
115
+
int num_scales;
116
+
unsigned long max_rate;
117
+
unsigned int default_output_mode;
118
+
unsigned int vref_mask;
119
+
unsigned int num_lanes;
120
120
/* data clock output */
121
-
bool has_dco;
121
+
bool has_dco;
122
122
};
123
123
124
124
struct ad9467_state {
125
-
const struct ad9467_chip_info *info;
126
-
struct iio_backend *back;
127
-
struct spi_device *spi;
128
-
struct clk *clk;
129
-
unsigned int output_mode;
130
-
unsigned int (*scales)[2];
125
+
const struct ad9467_chip_info *info;
126
+
struct iio_backend *back;
127
+
struct spi_device *spi;
128
+
struct clk *clk;
129
+
unsigned int output_mode;
130
+
unsigned int (*scales)[2];
131
131
/*
132
132
* Times 2 because we may also invert the signal polarity and run the
133
133
* calibration again. For some reference on the test points (ad9265) see:
···
138
138
* at the io delay control section.
139
139
*/
140
140
DECLARE_BITMAP(calib_map, AD9647_MAX_TEST_POINTS * 2);
141
-
struct gpio_desc *pwrdown_gpio;
141
+
struct gpio_desc *pwrdown_gpio;
142
142
/* ensure consistent state obtained on multiple related accesses */
143
-
struct mutex lock;
143
+
struct mutex lock;
144
+
u8 buf[3] __aligned(IIO_DMA_MINALIGN);
144
145
};
145
146
146
-
static int ad9467_spi_read(struct spi_device *spi, unsigned int reg)
147
+
static int ad9467_spi_read(struct ad9467_state *st, unsigned int reg)
147
148
{
148
149
unsigned char tbuf[2], rbuf[1];
149
150
int ret;
···
152
151
tbuf[0] = 0x80 | (reg >> 8);
153
152
tbuf[1] = reg & 0xFF;
154
153
155
-
ret = spi_write_then_read(spi,
154
+
ret = spi_write_then_read(st->spi,
156
155
tbuf, ARRAY_SIZE(tbuf),
157
156
rbuf, ARRAY_SIZE(rbuf));
158
157
···
162
161
return rbuf[0];
163
162
}
164
163
165
-
static int ad9467_spi_write(struct spi_device *spi, unsigned int reg,
164
+
static int ad9467_spi_write(struct ad9467_state *st, unsigned int reg,
166
165
unsigned int val)
167
166
{
168
-
unsigned char buf[3];
167
+
st->buf[0] = reg >> 8;
168
+
st->buf[1] = reg & 0xFF;
169
+
st->buf[2] = val;
169
170
170
-
buf[0] = reg >> 8;
171
-
buf[1] = reg & 0xFF;
172
-
buf[2] = val;
173
-
174
-
return spi_write(spi, buf, ARRAY_SIZE(buf));
171
+
return spi_write(st->spi, st->buf, ARRAY_SIZE(st->buf));
175
172
}
176
173
177
174
static int ad9467_reg_access(struct iio_dev *indio_dev, unsigned int reg,
178
175
unsigned int writeval, unsigned int *readval)
179
176
{
180
177
struct ad9467_state *st = iio_priv(indio_dev);
181
-
struct spi_device *spi = st->spi;
182
178
int ret;
183
179
184
180
if (!readval) {
185
181
guard(mutex)(&st->lock);
186
-
ret = ad9467_spi_write(spi, reg, writeval);
182
+
ret = ad9467_spi_write(st, reg, writeval);
187
183
if (ret)
188
184
return ret;
189
-
return ad9467_spi_write(spi, AN877_ADC_REG_TRANSFER,
185
+
return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER,
190
186
AN877_ADC_TRANSFER_SYNC);
191
187
}
192
188
193
-
ret = ad9467_spi_read(spi, reg);
189
+
ret = ad9467_spi_read(st, reg);
194
190
if (ret < 0)
195
191
return ret;
196
192
*readval = ret;
···
293
295
unsigned int i, vref_val;
294
296
int ret;
295
297
296
-
ret = ad9467_spi_read(st->spi, AN877_ADC_REG_VREF);
298
+
ret = ad9467_spi_read(st, AN877_ADC_REG_VREF);
297
299
if (ret < 0)
298
300
return ret;
299
301
···
328
330
continue;
329
331
330
332
guard(mutex)(&st->lock);
331
-
ret = ad9467_spi_write(st->spi, AN877_ADC_REG_VREF,
333
+
ret = ad9467_spi_write(st, AN877_ADC_REG_VREF,
332
334
info->scale_table[i][1]);
333
335
if (ret < 0)
334
336
return ret;
335
337
336
-
return ad9467_spi_write(st->spi, AN877_ADC_REG_TRANSFER,
338
+
return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER,
337
339
AN877_ADC_TRANSFER_SYNC);
338
340
}
339
341
340
342
return -EINVAL;
341
343
}
342
344
343
-
static int ad9467_outputmode_set(struct spi_device *spi, unsigned int mode)
345
+
static int ad9467_outputmode_set(struct ad9467_state *st, unsigned int mode)
344
346
{
345
347
int ret;
346
348
347
-
ret = ad9467_spi_write(spi, AN877_ADC_REG_OUTPUT_MODE, mode);
349
+
ret = ad9467_spi_write(st, AN877_ADC_REG_OUTPUT_MODE, mode);
348
350
if (ret < 0)
349
351
return ret;
350
352
351
-
return ad9467_spi_write(spi, AN877_ADC_REG_TRANSFER,
353
+
return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER,
352
354
AN877_ADC_TRANSFER_SYNC);
353
355
}
354
356
355
-
static int ad9647_calibrate_prepare(const struct ad9467_state *st)
357
+
static int ad9647_calibrate_prepare(struct ad9467_state *st)
356
358
{
357
359
struct iio_backend_data_fmt data = {
358
360
.enable = false,
···
360
362
unsigned int c;
361
363
int ret;
362
364
363
-
ret = ad9467_spi_write(st->spi, AN877_ADC_REG_TEST_IO,
365
+
ret = ad9467_spi_write(st, AN877_ADC_REG_TEST_IO,
364
366
AN877_ADC_TESTMODE_PN9_SEQ);
365
367
if (ret)
366
368
return ret;
367
369
368
-
ret = ad9467_spi_write(st->spi, AN877_ADC_REG_TRANSFER,
370
+
ret = ad9467_spi_write(st, AN877_ADC_REG_TRANSFER,
369
371
AN877_ADC_TRANSFER_SYNC);
370
372
if (ret)
371
373
return ret;
372
374
373
-
ret = ad9467_outputmode_set(st->spi, st->info->default_output_mode);
375
+
ret = ad9467_outputmode_set(st, st->info->default_output_mode);
374
376
if (ret)
375
377
return ret;
376
378
···
388
390
return iio_backend_chan_enable(st->back, 0);
389
391
}
390
392
391
-
static int ad9647_calibrate_polarity_set(const struct ad9467_state *st,
393
+
static int ad9647_calibrate_polarity_set(struct ad9467_state *st,
392
394
bool invert)
393
395
{
394
396
enum iio_backend_sample_trigger trigger;
···
399
401
if (invert)
400
402
phase |= AN877_ADC_INVERT_DCO_CLK;
401
403
402
-
return ad9467_spi_write(st->spi, AN877_ADC_REG_OUTPUT_PHASE,
404
+
return ad9467_spi_write(st, AN877_ADC_REG_OUTPUT_PHASE,
403
405
phase);
404
406
}
405
407
···
435
437
return cnt;
436
438
}
437
439
438
-
static int ad9467_calibrate_apply(const struct ad9467_state *st,
439
-
unsigned int val)
440
+
static int ad9467_calibrate_apply(struct ad9467_state *st, unsigned int val)
440
441
{
441
442
unsigned int lane;
442
443
int ret;
443
444
444
445
if (st->info->has_dco) {
445
-
ret = ad9467_spi_write(st->spi, AN877_ADC_REG_OUTPUT_DELAY,
446
+
ret = ad9467_spi_write(st, AN877_ADC_REG_OUTPUT_DELAY,
446
447
val);
447
448
if (ret)
448
449
return ret;
449
450
450
-
return ad9467_spi_write(st->spi, AN877_ADC_REG_TRANSFER,
451
+
return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER,
451
452
AN877_ADC_TRANSFER_SYNC);
452
453
}
453
454
···
459
462
return 0;
460
463
}
461
464
462
-
static int ad9647_calibrate_stop(const struct ad9467_state *st)
465
+
static int ad9647_calibrate_stop(struct ad9467_state *st)
463
466
{
464
467
struct iio_backend_data_fmt data = {
465
468
.sign_extend = true,
···
484
487
}
485
488
486
489
mode = st->info->default_output_mode | AN877_ADC_OUTPUT_MODE_TWOS_COMPLEMENT;
487
-
ret = ad9467_outputmode_set(st->spi, mode);
490
+
ret = ad9467_outputmode_set(st, mode);
488
491
if (ret)
489
492
return ret;
490
493
491
-
ret = ad9467_spi_write(st->spi, AN877_ADC_REG_TEST_IO,
494
+
ret = ad9467_spi_write(st, AN877_ADC_REG_TEST_IO,
492
495
AN877_ADC_TESTMODE_OFF);
493
496
if (ret)
494
497
return ret;
495
498
496
-
return ad9467_spi_write(st->spi, AN877_ADC_REG_TRANSFER,
499
+
return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER,
497
500
AN877_ADC_TRANSFER_SYNC);
498
501
}
499
502
···
843
846
if (ret)
844
847
return ret;
845
848
846
-
id = ad9467_spi_read(spi, AN877_ADC_REG_CHIP_ID);
849
+
id = ad9467_spi_read(st, AN877_ADC_REG_CHIP_ID);
847
850
if (id != st->info->id) {
848
851
dev_err(&spi->dev, "Mismatch CHIP_ID, got 0x%X, expected 0x%X\n",
849
852
id, st->info->id);
+17
-1
drivers/iio/adc/adi-axi-adc.c
+17
-1
drivers/iio/adc/adi-axi-adc.c
···
42
42
#define ADI_AXI_ADC_REG_CTRL 0x0044
43
43
#define ADI_AXI_ADC_CTRL_DDR_EDGESEL_MASK BIT(1)
44
44
45
+
#define ADI_AXI_ADC_REG_DRP_STATUS 0x0074
46
+
#define ADI_AXI_ADC_DRP_LOCKED BIT(17)
47
+
45
48
/* ADC Channel controls */
46
49
47
50
#define ADI_AXI_REG_CHAN_CTRL(c) (0x0400 + (c) * 0x40)
···
86
83
static int axi_adc_enable(struct iio_backend *back)
87
84
{
88
85
struct adi_axi_adc_state *st = iio_backend_get_priv(back);
86
+
unsigned int __val;
89
87
int ret;
90
88
89
+
guard(mutex)(&st->lock);
91
90
ret = regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN,
92
91
ADI_AXI_REG_RSTN_MMCM_RSTN);
93
92
if (ret)
94
93
return ret;
95
94
96
-
fsleep(10000);
95
+
/*
96
+
* Make sure the DRP (Dynamic Reconfiguration Port) is locked. Not all
97
+
* designs really use it but if they don't we still get the lock bit
98
+
* set. So let's do it all the time so the code is generic.
99
+
*/
100
+
ret = regmap_read_poll_timeout(st->regmap, ADI_AXI_ADC_REG_DRP_STATUS,
101
+
__val, __val & ADI_AXI_ADC_DRP_LOCKED,
102
+
100, 1000);
103
+
if (ret)
104
+
return ret;
105
+
97
106
return regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN,
98
107
ADI_AXI_REG_RSTN_RSTN | ADI_AXI_REG_RSTN_MMCM_RSTN);
99
108
}
···
114
99
{
115
100
struct adi_axi_adc_state *st = iio_backend_get_priv(back);
116
101
102
+
guard(mutex)(&st->lock);
117
103
regmap_write(st->regmap, ADI_AXI_REG_RSTN, 0);
118
104
}
119
105
+279
drivers/iio/adc/axp20x_adc.c
+279
drivers/iio/adc/axp20x_adc.c
···
22
22
#include <linux/iio/machine.h>
23
23
#include <linux/mfd/axp20x.h>
24
24
25
+
#define AXP192_ADC_EN1_MASK GENMASK(7, 0)
26
+
#define AXP192_ADC_EN2_MASK (GENMASK(3, 0) | BIT(7))
27
+
25
28
#define AXP20X_ADC_EN1_MASK GENMASK(7, 0)
26
29
#define AXP20X_ADC_EN2_MASK (GENMASK(3, 2) | BIT(7))
27
30
28
31
#define AXP22X_ADC_EN1_MASK (GENMASK(7, 5) | BIT(0))
32
+
33
+
#define AXP192_GPIO30_IN_RANGE_GPIO0 BIT(0)
34
+
#define AXP192_GPIO30_IN_RANGE_GPIO1 BIT(1)
35
+
#define AXP192_GPIO30_IN_RANGE_GPIO2 BIT(2)
36
+
#define AXP192_GPIO30_IN_RANGE_GPIO3 BIT(3)
29
37
30
38
#define AXP20X_GPIO10_IN_RANGE_GPIO0 BIT(0)
31
39
#define AXP20X_GPIO10_IN_RANGE_GPIO1 BIT(1)
···
77
69
struct axp20x_adc_iio {
78
70
struct regmap *regmap;
79
71
const struct axp_data *data;
72
+
};
73
+
74
+
enum axp192_adc_channel_v {
75
+
AXP192_ACIN_V = 0,
76
+
AXP192_VBUS_V,
77
+
AXP192_TS_IN,
78
+
AXP192_GPIO0_V,
79
+
AXP192_GPIO1_V,
80
+
AXP192_GPIO2_V,
81
+
AXP192_GPIO3_V,
82
+
AXP192_IPSOUT_V,
83
+
AXP192_BATT_V,
84
+
};
85
+
86
+
enum axp192_adc_channel_i {
87
+
AXP192_ACIN_I = 0,
88
+
AXP192_VBUS_I,
89
+
AXP192_BATT_CHRG_I,
90
+
AXP192_BATT_DISCHRG_I,
80
91
};
81
92
82
93
enum axp20x_adc_channel_v {
···
185
158
* The only exception is for the battery. batt_v will be in_voltage6_raw and
186
159
* charge current in_current6_raw and discharge current will be in_current7_raw.
187
160
*/
161
+
static const struct iio_chan_spec axp192_adc_channels[] = {
162
+
AXP20X_ADC_CHANNEL(AXP192_ACIN_V, "acin_v", IIO_VOLTAGE,
163
+
AXP20X_ACIN_V_ADC_H),
164
+
AXP20X_ADC_CHANNEL(AXP192_ACIN_I, "acin_i", IIO_CURRENT,
165
+
AXP20X_ACIN_I_ADC_H),
166
+
AXP20X_ADC_CHANNEL(AXP192_VBUS_V, "vbus_v", IIO_VOLTAGE,
167
+
AXP20X_VBUS_V_ADC_H),
168
+
AXP20X_ADC_CHANNEL(AXP192_VBUS_I, "vbus_i", IIO_CURRENT,
169
+
AXP20X_VBUS_I_ADC_H),
170
+
{
171
+
.type = IIO_TEMP,
172
+
.address = AXP20X_TEMP_ADC_H,
173
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
174
+
BIT(IIO_CHAN_INFO_SCALE) |
175
+
BIT(IIO_CHAN_INFO_OFFSET),
176
+
.datasheet_name = "pmic_temp",
177
+
},
178
+
AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
179
+
AXP20X_GPIO0_V_ADC_H),
180
+
AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO1_V, "gpio1_v", IIO_VOLTAGE,
181
+
AXP20X_GPIO1_V_ADC_H),
182
+
AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO2_V, "gpio2_v", IIO_VOLTAGE,
183
+
AXP192_GPIO2_V_ADC_H),
184
+
AXP20X_ADC_CHANNEL_OFFSET(AXP192_GPIO3_V, "gpio3_v", IIO_VOLTAGE,
185
+
AXP192_GPIO3_V_ADC_H),
186
+
AXP20X_ADC_CHANNEL(AXP192_IPSOUT_V, "ipsout_v", IIO_VOLTAGE,
187
+
AXP20X_IPSOUT_V_HIGH_H),
188
+
AXP20X_ADC_CHANNEL(AXP192_BATT_V, "batt_v", IIO_VOLTAGE,
189
+
AXP20X_BATT_V_H),
190
+
AXP20X_ADC_CHANNEL(AXP192_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
191
+
AXP20X_BATT_CHRG_I_H),
192
+
AXP20X_ADC_CHANNEL(AXP192_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
193
+
AXP20X_BATT_DISCHRG_I_H),
194
+
AXP20X_ADC_CHANNEL(AXP192_TS_IN, "ts_v", IIO_VOLTAGE,
195
+
AXP20X_TS_IN_H),
196
+
};
197
+
188
198
static const struct iio_chan_spec axp20x_adc_channels[] = {
189
199
AXP20X_ADC_CHANNEL(AXP20X_ACIN_V, "acin_v", IIO_VOLTAGE,
190
200
AXP20X_ACIN_V_ADC_H),
···
295
231
AXP288_TS_ADC_H),
296
232
};
297
233
234
+
static int axp192_adc_raw(struct iio_dev *indio_dev,
235
+
struct iio_chan_spec const *chan, int *val)
236
+
{
237
+
struct axp20x_adc_iio *info = iio_priv(indio_dev);
238
+
int ret, size;
239
+
240
+
if (chan->type == IIO_CURRENT &&
241
+
(chan->channel == AXP192_BATT_CHRG_I ||
242
+
chan->channel == AXP192_BATT_DISCHRG_I))
243
+
size = 13;
244
+
else
245
+
size = 12;
246
+
247
+
ret = axp20x_read_variable_width(info->regmap, chan->address, size);
248
+
if (ret < 0)
249
+
return ret;
250
+
251
+
*val = ret;
252
+
return IIO_VAL_INT;
253
+
}
254
+
298
255
static int axp20x_adc_raw(struct iio_dev *indio_dev,
299
256
struct iio_chan_spec const *chan, int *val)
300
257
{
···
366
281
367
282
*val = ret;
368
283
return IIO_VAL_INT;
284
+
}
285
+
286
+
static int axp192_adc_scale_voltage(int channel, int *val, int *val2)
287
+
{
288
+
switch (channel) {
289
+
case AXP192_ACIN_V:
290
+
case AXP192_VBUS_V:
291
+
*val = 1;
292
+
*val2 = 700000;
293
+
return IIO_VAL_INT_PLUS_MICRO;
294
+
295
+
case AXP192_GPIO0_V:
296
+
case AXP192_GPIO1_V:
297
+
case AXP192_GPIO2_V:
298
+
case AXP192_GPIO3_V:
299
+
*val = 0;
300
+
*val2 = 500000;
301
+
return IIO_VAL_INT_PLUS_MICRO;
302
+
303
+
case AXP192_BATT_V:
304
+
*val = 1;
305
+
*val2 = 100000;
306
+
return IIO_VAL_INT_PLUS_MICRO;
307
+
308
+
case AXP192_IPSOUT_V:
309
+
*val = 1;
310
+
*val2 = 400000;
311
+
return IIO_VAL_INT_PLUS_MICRO;
312
+
313
+
case AXP192_TS_IN:
314
+
/* 0.8 mV per LSB */
315
+
*val = 0;
316
+
*val2 = 800000;
317
+
return IIO_VAL_INT_PLUS_MICRO;
318
+
319
+
default:
320
+
return -EINVAL;
321
+
}
369
322
}
370
323
371
324
static int axp20x_adc_scale_voltage(int channel, int *val, int *val2)
···
509
386
}
510
387
}
511
388
389
+
static int axp192_adc_scale(struct iio_chan_spec const *chan, int *val,
390
+
int *val2)
391
+
{
392
+
switch (chan->type) {
393
+
case IIO_VOLTAGE:
394
+
return axp192_adc_scale_voltage(chan->channel, val, val2);
395
+
396
+
case IIO_CURRENT:
397
+
/*
398
+
* AXP192 current channels are identical to the AXP20x,
399
+
* therefore we can re-use the scaling function.
400
+
*/
401
+
return axp20x_adc_scale_current(chan->channel, val, val2);
402
+
403
+
case IIO_TEMP:
404
+
*val = 100;
405
+
return IIO_VAL_INT;
406
+
407
+
default:
408
+
return -EINVAL;
409
+
}
410
+
}
411
+
512
412
static int axp20x_adc_scale(struct iio_chan_spec const *chan, int *val,
513
413
int *val2)
514
414
{
···
591
445
}
592
446
}
593
447
448
+
static int axp192_adc_offset_voltage(struct iio_dev *indio_dev, int channel,
449
+
int *val)
450
+
{
451
+
struct axp20x_adc_iio *info = iio_priv(indio_dev);
452
+
unsigned int regval;
453
+
int ret;
454
+
455
+
ret = regmap_read(info->regmap, AXP192_GPIO30_IN_RANGE, ®val);
456
+
if (ret < 0)
457
+
return ret;
458
+
459
+
switch (channel) {
460
+
case AXP192_GPIO0_V:
461
+
regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO0, regval);
462
+
break;
463
+
464
+
case AXP192_GPIO1_V:
465
+
regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO1, regval);
466
+
break;
467
+
468
+
case AXP192_GPIO2_V:
469
+
regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO2, regval);
470
+
break;
471
+
472
+
case AXP192_GPIO3_V:
473
+
regval = FIELD_GET(AXP192_GPIO30_IN_RANGE_GPIO3, regval);
474
+
break;
475
+
476
+
default:
477
+
return -EINVAL;
478
+
}
479
+
480
+
*val = regval ? 700000 : 0;
481
+
return IIO_VAL_INT;
482
+
}
483
+
594
484
static int axp20x_adc_offset_voltage(struct iio_dev *indio_dev, int channel,
595
485
int *val)
596
486
{
···
655
473
return IIO_VAL_INT;
656
474
}
657
475
476
+
static int axp192_adc_offset(struct iio_dev *indio_dev,
477
+
struct iio_chan_spec const *chan, int *val)
478
+
{
479
+
switch (chan->type) {
480
+
case IIO_VOLTAGE:
481
+
return axp192_adc_offset_voltage(indio_dev, chan->channel, val);
482
+
483
+
case IIO_TEMP:
484
+
*val = -1447;
485
+
return IIO_VAL_INT;
486
+
487
+
default:
488
+
return -EINVAL;
489
+
}
490
+
}
491
+
658
492
static int axp20x_adc_offset(struct iio_dev *indio_dev,
659
493
struct iio_chan_spec const *chan, int *val)
660
494
{
···
681
483
case IIO_TEMP:
682
484
*val = -1447;
683
485
return IIO_VAL_INT;
486
+
487
+
default:
488
+
return -EINVAL;
489
+
}
490
+
}
491
+
492
+
static int axp192_read_raw(struct iio_dev *indio_dev,
493
+
struct iio_chan_spec const *chan, int *val,
494
+
int *val2, long mask)
495
+
{
496
+
switch (mask) {
497
+
case IIO_CHAN_INFO_OFFSET:
498
+
return axp192_adc_offset(indio_dev, chan, val);
499
+
500
+
case IIO_CHAN_INFO_SCALE:
501
+
return axp192_adc_scale(chan, val, val2);
502
+
503
+
case IIO_CHAN_INFO_RAW:
504
+
return axp192_adc_raw(indio_dev, chan, val);
684
505
685
506
default:
686
507
return -EINVAL;
···
766
549
}
767
550
}
768
551
552
+
static int axp192_write_raw(struct iio_dev *indio_dev,
553
+
struct iio_chan_spec const *chan, int val, int val2,
554
+
long mask)
555
+
{
556
+
struct axp20x_adc_iio *info = iio_priv(indio_dev);
557
+
unsigned int regmask, regval;
558
+
559
+
/*
560
+
* The AXP192 PMIC allows the user to choose between 0V and 0.7V offsets
561
+
* for (independently) GPIO0-3 when in ADC mode.
562
+
*/
563
+
if (mask != IIO_CHAN_INFO_OFFSET)
564
+
return -EINVAL;
565
+
566
+
if (val != 0 && val != 700000)
567
+
return -EINVAL;
568
+
569
+
switch (chan->channel) {
570
+
case AXP192_GPIO0_V:
571
+
regmask = AXP192_GPIO30_IN_RANGE_GPIO0;
572
+
regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO0, !!val);
573
+
break;
574
+
575
+
case AXP192_GPIO1_V:
576
+
regmask = AXP192_GPIO30_IN_RANGE_GPIO1;
577
+
regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO1, !!val);
578
+
break;
579
+
580
+
case AXP192_GPIO2_V:
581
+
regmask = AXP192_GPIO30_IN_RANGE_GPIO2;
582
+
regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO2, !!val);
583
+
break;
584
+
585
+
case AXP192_GPIO3_V:
586
+
regmask = AXP192_GPIO30_IN_RANGE_GPIO3;
587
+
regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO3, !!val);
588
+
break;
589
+
590
+
default:
591
+
return -EINVAL;
592
+
}
593
+
594
+
return regmap_update_bits(info->regmap, AXP192_GPIO30_IN_RANGE, regmask, regval);
595
+
}
596
+
769
597
static int axp20x_write_raw(struct iio_dev *indio_dev,
770
598
struct iio_chan_spec const *chan, int val, int val2,
771
599
long mask)
···
845
583
846
584
return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, regmask, regval);
847
585
}
586
+
587
+
static const struct iio_info axp192_adc_iio_info = {
588
+
.read_raw = axp192_read_raw,
589
+
.write_raw = axp192_write_raw,
590
+
};
848
591
849
592
static const struct iio_info axp20x_adc_iio_info = {
850
593
.read_raw = axp20x_read_raw,
···
896
629
struct iio_map *maps;
897
630
};
898
631
632
+
static const struct axp_data axp192_data = {
633
+
.iio_info = &axp192_adc_iio_info,
634
+
.num_channels = ARRAY_SIZE(axp192_adc_channels),
635
+
.channels = axp192_adc_channels,
636
+
.adc_en1_mask = AXP192_ADC_EN1_MASK,
637
+
.adc_en2_mask = AXP192_ADC_EN2_MASK,
638
+
.adc_rate = axp20x_adc_rate,
639
+
.maps = axp20x_maps,
640
+
};
641
+
899
642
static const struct axp_data axp20x_data = {
900
643
.iio_info = &axp20x_adc_iio_info,
901
644
.num_channels = ARRAY_SIZE(axp20x_adc_channels),
···
935
658
};
936
659
937
660
static const struct of_device_id axp20x_adc_of_match[] = {
661
+
{ .compatible = "x-powers,axp192-adc", .data = (void *)&axp192_data, },
938
662
{ .compatible = "x-powers,axp209-adc", .data = (void *)&axp20x_data, },
939
663
{ .compatible = "x-powers,axp221-adc", .data = (void *)&axp22x_data, },
940
664
{ .compatible = "x-powers,axp813-adc", .data = (void *)&axp813_data, },
···
944
666
MODULE_DEVICE_TABLE(of, axp20x_adc_of_match);
945
667
946
668
static const struct platform_device_id axp20x_adc_id_match[] = {
669
+
{ .name = "axp192-adc", .driver_data = (kernel_ulong_t)&axp192_data, },
947
670
{ .name = "axp20x-adc", .driver_data = (kernel_ulong_t)&axp20x_data, },
948
671
{ .name = "axp22x-adc", .driver_data = (kernel_ulong_t)&axp22x_data, },
949
672
{ .name = "axp813-adc", .driver_data = (kernel_ulong_t)&axp813_data, },
+1
drivers/iio/adc/ingenic-adc.c
+1
drivers/iio/adc/ingenic-adc.c
+1
-1
drivers/iio/adc/ltc2485.c
+1
-1
drivers/iio/adc/ltc2485.c
+1
-4
drivers/iio/adc/max11205.c
+1
-4
drivers/iio/adc/max11205.c
···
116
116
117
117
ad_sd_init(&st->sd, indio_dev, spi, &max11205_sigma_delta_info);
118
118
119
-
st->chip_info = device_get_match_data(&spi->dev);
120
-
if (!st->chip_info)
121
-
st->chip_info =
122
-
(const struct max11205_chip_info *)spi_get_device_id(spi)->driver_data;
119
+
st->chip_info = spi_get_device_match_data(spi);
123
120
124
121
indio_dev->name = st->chip_info->name;
125
122
indio_dev->modes = INDIO_DIRECT_MODE;
-6
drivers/iio/adc/mcp3564.c
-6
drivers/iio/adc/mcp3564.c
···
1114
1114
{
1115
1115
struct mcp3564_state *adc = iio_priv(indio_dev);
1116
1116
struct device *dev = &adc->spi->dev;
1117
-
const struct spi_device_id *dev_id;
1118
1117
u8 tmp_reg;
1119
1118
u16 tmp_u16;
1120
1119
enum mcp3564_ids ids;
···
1211
1212
* try using fallback compatible in device tree to deal with some newer part number.
1212
1213
*/
1213
1214
adc->chip_info = spi_get_device_match_data(adc->spi);
1214
-
if (!adc->chip_info) {
1215
-
dev_id = spi_get_device_id(adc->spi);
1216
-
adc->chip_info = (const struct mcp3564_chip_info *)dev_id->driver_data;
1217
-
}
1218
-
1219
1215
adc->have_vref = adc->chip_info->have_vref;
1220
1216
} else {
1221
1217
adc->chip_info = &mcp3564_chip_infos_tbl[ids];
+1
-1
drivers/iio/adc/nau7802.c
+1
-1
drivers/iio/adc/nau7802.c
-5
drivers/iio/adc/pac1934.c
-5
drivers/iio/adc/pac1934.c
+7
-11
drivers/iio/adc/ti-adc161s626.c
+7
-11
drivers/iio/adc/ti-adc161s626.c
···
137
137
138
138
switch (mask) {
139
139
case IIO_CHAN_INFO_RAW:
140
-
ret = iio_device_claim_direct_mode(indio_dev);
141
-
if (ret)
142
-
return ret;
143
-
144
-
ret = ti_adc_read_measurement(data, chan, val);
145
-
iio_device_release_direct_mode(indio_dev);
146
-
147
-
if (ret)
148
-
return ret;
149
-
150
-
return IIO_VAL_INT;
140
+
iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
141
+
ret = ti_adc_read_measurement(data, chan, val);
142
+
if (ret)
143
+
return ret;
144
+
return IIO_VAL_INT;
145
+
}
146
+
unreachable();
151
147
case IIO_CHAN_INFO_SCALE:
152
148
ret = regulator_get_voltage(data->ref);
153
149
if (ret < 0)
+1
-3
drivers/iio/adc/ti-ads131e08.c
+1
-3
drivers/iio/adc/ti-ads131e08.c
···
802
802
unsigned long adc_clk_ns;
803
803
int ret;
804
804
805
-
info = device_get_match_data(&spi->dev);
806
-
if (!info)
807
-
info = (void *)spi_get_device_id(spi)->driver_data;
805
+
info = spi_get_device_match_data(spi);
808
806
if (!info) {
809
807
dev_err(&spi->dev, "failed to get match data\n");
810
808
return -ENODEV;
+1
-1
drivers/iio/adc/ti-ads7924.c
+1
-1
drivers/iio/adc/ti-ads7924.c
+1
-6
drivers/iio/adc/ti-tsc2046.c
+1
-6
drivers/iio/adc/ti-tsc2046.c
···
804
804
return -EINVAL;
805
805
}
806
806
807
-
dcfg = device_get_match_data(dev);
808
-
if (!dcfg) {
809
-
const struct spi_device_id *id = spi_get_device_id(spi);
810
-
811
-
dcfg = (const struct tsc2046_adc_dcfg *)id->driver_data;
812
-
}
807
+
dcfg = spi_get_device_match_data(spi);
813
808
if (!dcfg)
814
809
return -EINVAL;
815
810
+1
drivers/iio/adc/xilinx-ams.c
+1
drivers/iio/adc/xilinx-ams.c
+3
-10
drivers/iio/addac/ad74413r.c
+3
-10
drivers/iio/addac/ad74413r.c
···
1365
1365
1366
1366
st->spi = spi;
1367
1367
st->dev = &spi->dev;
1368
-
st->chip_info = device_get_match_data(&spi->dev);
1369
-
if (!st->chip_info) {
1370
-
const struct spi_device_id *id = spi_get_device_id(spi);
1371
-
1372
-
if (id)
1373
-
st->chip_info =
1374
-
(struct ad74413r_chip_info *)id->driver_data;
1375
-
if (!st->chip_info)
1376
-
return -EINVAL;
1377
-
}
1368
+
st->chip_info = spi_get_device_match_data(spi);
1369
+
if (!st->chip_info)
1370
+
return -EINVAL;
1378
1371
1379
1372
mutex_init(&st->lock);
1380
1373
init_completion(&st->adc_data_completion);
+1
drivers/iio/buffer/kfifo_buf.c
+1
drivers/iio/buffer/kfifo_buf.c
+20
drivers/iio/chemical/Kconfig
+20
drivers/iio/chemical/Kconfig
···
76
76
Say Y here to build I2C interface support for the AMS
77
77
CCS811 VOC (Volatile Organic Compounds) sensor
78
78
79
+
config ENS160
80
+
tristate "ScioSense ENS160 sensor driver"
81
+
depends on (I2C || SPI)
82
+
select REGMAP
83
+
select ENS160_I2C if I2C
84
+
select ENS160_SPI if SPI
85
+
help
86
+
Say yes here to build support for ScioSense ENS160 multi-gas sensor.
87
+
88
+
This driver can also be built as a module. If so, the module for I2C
89
+
would be called ens160_i2c and ens160_spi for SPI support.
90
+
91
+
config ENS160_I2C
92
+
tristate
93
+
select REGMAP_I2C
94
+
95
+
config ENS160_SPI
96
+
tristate
97
+
select REGMAP_SPI
98
+
79
99
config IAQCORE
80
100
tristate "AMS iAQ-Core VOC sensors"
81
101
depends on I2C
+3
drivers/iio/chemical/Makefile
+3
drivers/iio/chemical/Makefile
···
11
11
obj-$(CONFIG_BME680_I2C) += bme680_i2c.o
12
12
obj-$(CONFIG_BME680_SPI) += bme680_spi.o
13
13
obj-$(CONFIG_CCS811) += ccs811.o
14
+
obj-$(CONFIG_ENS160) += ens160_core.o
15
+
obj-$(CONFIG_ENS160_I2C) += ens160_i2c.o
16
+
obj-$(CONFIG_ENS160_SPI) += ens160_spi.o
14
17
obj-$(CONFIG_IAQCORE) += ams-iaq-core.o
15
18
obj-$(CONFIG_PMS7003) += pms7003.o
16
19
obj-$(CONFIG_SCD30_CORE) += scd30_core.o
+2
-2
drivers/iio/chemical/ams-iaq-core.c
+2
-2
drivers/iio/chemical/ams-iaq-core.c
···
24
24
u8 status;
25
25
__be32 resistance;
26
26
__be16 voc_ppb;
27
-
} __attribute__((__packed__));
27
+
} __packed;
28
28
29
29
struct ams_iaqcore_data {
30
30
struct i2c_client *client;
···
163
163
}
164
164
165
165
static const struct i2c_device_id ams_iaqcore_id[] = {
166
-
{ "ams-iaq-core", 0 },
166
+
{ "ams-iaq-core" },
167
167
{ }
168
168
};
169
169
MODULE_DEVICE_TABLE(i2c, ams_iaqcore_id);
+2
-2
drivers/iio/chemical/bme680_i2c.c
+2
-2
drivers/iio/chemical/bme680_i2c.c
+1
-1
drivers/iio/chemical/ccs811.c
+1
-1
drivers/iio/chemical/ccs811.c
+10
drivers/iio/chemical/ens160.h
+10
drivers/iio/chemical/ens160.h
+367
drivers/iio/chemical/ens160_core.c
+367
drivers/iio/chemical/ens160_core.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* ScioSense ENS160 multi-gas sensor driver
4
+
*
5
+
* Copyright (c) 2024 Gustavo Silva <gustavograzs@gmail.com>
6
+
*
7
+
* Datasheet:
8
+
* https://www.sciosense.com/wp-content/uploads/2023/12/ENS160-Datasheet.pdf
9
+
*/
10
+
11
+
#include <linux/bitfield.h>
12
+
#include <linux/iio/iio.h>
13
+
#include <linux/iio/trigger.h>
14
+
#include <linux/iio/trigger_consumer.h>
15
+
#include <linux/iio/triggered_buffer.h>
16
+
#include <linux/module.h>
17
+
#include <linux/regmap.h>
18
+
19
+
#include "ens160.h"
20
+
21
+
#define ENS160_PART_ID 0x160
22
+
23
+
#define ENS160_BOOTING_TIME_MS 10U
24
+
25
+
#define ENS160_REG_PART_ID 0x00
26
+
27
+
#define ENS160_REG_OPMODE 0x10
28
+
29
+
#define ENS160_REG_CONFIG 0x11
30
+
#define ENS160_REG_CONFIG_INTEN BIT(0)
31
+
#define ENS160_REG_CONFIG_INTDAT BIT(1)
32
+
#define ENS160_REG_CONFIG_INT_CFG BIT(5)
33
+
34
+
#define ENS160_REG_MODE_DEEP_SLEEP 0x00
35
+
#define ENS160_REG_MODE_IDLE 0x01
36
+
#define ENS160_REG_MODE_STANDARD 0x02
37
+
#define ENS160_REG_MODE_RESET 0xF0
38
+
39
+
#define ENS160_REG_COMMAND 0x12
40
+
#define ENS160_REG_COMMAND_GET_APPVER 0x0E
41
+
#define ENS160_REG_COMMAND_CLRGPR 0xCC
42
+
43
+
#define ENS160_REG_TEMP_IN 0x13
44
+
#define ENS160_REG_RH_IN 0x15
45
+
#define ENS160_REG_DEVICE_STATUS 0x20
46
+
#define ENS160_REG_DATA_AQI 0x21
47
+
#define ENS160_REG_DATA_TVOC 0x22
48
+
#define ENS160_REG_DATA_ECO2 0x24
49
+
#define ENS160_REG_DATA_T 0x30
50
+
#define ENS160_REG_DATA_RH 0x32
51
+
#define ENS160_REG_GPR_READ4 0x4C
52
+
53
+
#define ENS160_STATUS_VALIDITY_FLAG GENMASK(3, 2)
54
+
55
+
#define ENS160_STATUS_NORMAL 0x00
56
+
57
+
struct ens160_data {
58
+
struct regmap *regmap;
59
+
/* Protect reads from the sensor */
60
+
struct mutex mutex;
61
+
struct {
62
+
__le16 chans[2];
63
+
s64 timestamp __aligned(8);
64
+
} scan __aligned(IIO_DMA_MINALIGN);
65
+
u8 fw_version[3];
66
+
__le16 buf;
67
+
};
68
+
69
+
static const struct iio_chan_spec ens160_channels[] = {
70
+
{
71
+
.type = IIO_CONCENTRATION,
72
+
.channel2 = IIO_MOD_VOC,
73
+
.modified = 1,
74
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
75
+
BIT(IIO_CHAN_INFO_SCALE),
76
+
.address = ENS160_REG_DATA_TVOC,
77
+
.scan_index = 0,
78
+
.scan_type = {
79
+
.sign = 'u',
80
+
.realbits = 16,
81
+
.storagebits = 16,
82
+
.endianness = IIO_LE,
83
+
},
84
+
},
85
+
{
86
+
.type = IIO_CONCENTRATION,
87
+
.channel2 = IIO_MOD_CO2,
88
+
.modified = 1,
89
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
90
+
BIT(IIO_CHAN_INFO_SCALE),
91
+
.address = ENS160_REG_DATA_ECO2,
92
+
.scan_index = 1,
93
+
.scan_type = {
94
+
.sign = 'u',
95
+
.realbits = 16,
96
+
.storagebits = 16,
97
+
.endianness = IIO_LE,
98
+
},
99
+
},
100
+
IIO_CHAN_SOFT_TIMESTAMP(2),
101
+
};
102
+
103
+
static int ens160_read_raw(struct iio_dev *indio_dev,
104
+
struct iio_chan_spec const *chan,
105
+
int *val, int *val2, long mask)
106
+
{
107
+
struct ens160_data *data = iio_priv(indio_dev);
108
+
int ret;
109
+
110
+
switch (mask) {
111
+
case IIO_CHAN_INFO_RAW:
112
+
iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
113
+
guard(mutex)(&data->mutex);
114
+
ret = regmap_bulk_read(data->regmap, chan->address,
115
+
&data->buf, sizeof(data->buf));
116
+
if (ret)
117
+
return ret;
118
+
*val = le16_to_cpu(data->buf);
119
+
return IIO_VAL_INT;
120
+
}
121
+
unreachable();
122
+
case IIO_CHAN_INFO_SCALE:
123
+
switch (chan->channel2) {
124
+
case IIO_MOD_CO2:
125
+
/* The sensor reads CO2 data as ppm */
126
+
*val = 0;
127
+
*val2 = 100;
128
+
return IIO_VAL_INT_PLUS_MICRO;
129
+
case IIO_MOD_VOC:
130
+
/* The sensor reads VOC data as ppb */
131
+
*val = 0;
132
+
*val2 = 100;
133
+
return IIO_VAL_INT_PLUS_NANO;
134
+
default:
135
+
return -EINVAL;
136
+
}
137
+
default:
138
+
return -EINVAL;
139
+
}
140
+
}
141
+
142
+
static int ens160_set_mode(struct ens160_data *data, u8 mode)
143
+
{
144
+
int ret;
145
+
146
+
ret = regmap_write(data->regmap, ENS160_REG_OPMODE, mode);
147
+
if (ret)
148
+
return ret;
149
+
150
+
msleep(ENS160_BOOTING_TIME_MS);
151
+
152
+
return 0;
153
+
}
154
+
155
+
static void ens160_set_idle(void *data)
156
+
{
157
+
ens160_set_mode(data, ENS160_REG_MODE_IDLE);
158
+
}
159
+
160
+
static int ens160_chip_init(struct ens160_data *data)
161
+
{
162
+
struct device *dev = regmap_get_device(data->regmap);
163
+
unsigned int status;
164
+
int ret;
165
+
166
+
ret = ens160_set_mode(data, ENS160_REG_MODE_RESET);
167
+
if (ret)
168
+
return ret;
169
+
170
+
ret = regmap_bulk_read(data->regmap, ENS160_REG_PART_ID, &data->buf,
171
+
sizeof(data->buf));
172
+
if (ret)
173
+
return ret;
174
+
175
+
if (le16_to_cpu(data->buf) != ENS160_PART_ID)
176
+
return -ENODEV;
177
+
178
+
ret = ens160_set_mode(data, ENS160_REG_MODE_IDLE);
179
+
if (ret)
180
+
return ret;
181
+
182
+
ret = regmap_write(data->regmap, ENS160_REG_COMMAND,
183
+
ENS160_REG_COMMAND_CLRGPR);
184
+
if (ret)
185
+
return ret;
186
+
187
+
ret = regmap_write(data->regmap, ENS160_REG_COMMAND,
188
+
ENS160_REG_COMMAND_GET_APPVER);
189
+
if (ret)
190
+
return ret;
191
+
192
+
ret = regmap_bulk_read(data->regmap, ENS160_REG_GPR_READ4,
193
+
data->fw_version, sizeof(data->fw_version));
194
+
if (ret)
195
+
return ret;
196
+
197
+
dev_info(dev, "firmware version: %u.%u.%u\n", data->fw_version[2],
198
+
data->fw_version[1], data->fw_version[0]);
199
+
200
+
ret = ens160_set_mode(data, ENS160_REG_MODE_STANDARD);
201
+
if (ret)
202
+
return ret;
203
+
204
+
ret = devm_add_action_or_reset(dev, ens160_set_idle, data);
205
+
if (ret)
206
+
return ret;
207
+
208
+
ret = regmap_read(data->regmap, ENS160_REG_DEVICE_STATUS, &status);
209
+
if (ret)
210
+
return ret;
211
+
212
+
if (FIELD_GET(ENS160_STATUS_VALIDITY_FLAG, status)
213
+
!= ENS160_STATUS_NORMAL)
214
+
return -EINVAL;
215
+
216
+
return 0;
217
+
}
218
+
219
+
static const struct iio_info ens160_info = {
220
+
.read_raw = ens160_read_raw,
221
+
};
222
+
223
+
static int ens160_suspend(struct device *dev)
224
+
{
225
+
struct iio_dev *indio_dev = dev_get_drvdata(dev);
226
+
struct ens160_data *data = iio_priv(indio_dev);
227
+
228
+
return ens160_set_mode(data, ENS160_REG_MODE_DEEP_SLEEP);
229
+
}
230
+
231
+
static int ens160_resume(struct device *dev)
232
+
{
233
+
struct iio_dev *indio_dev = dev_get_drvdata(dev);
234
+
struct ens160_data *data = iio_priv(indio_dev);
235
+
int ret;
236
+
237
+
ret = ens160_set_mode(data, ENS160_REG_MODE_IDLE);
238
+
if (ret)
239
+
return ret;
240
+
241
+
return ens160_set_mode(data, ENS160_REG_MODE_STANDARD);
242
+
}
243
+
EXPORT_NS_SIMPLE_DEV_PM_OPS(ens160_pm_ops, ens160_suspend, ens160_resume,
244
+
IIO_ENS160);
245
+
246
+
static irqreturn_t ens160_trigger_handler(int irq, void *p)
247
+
{
248
+
struct iio_poll_func *pf = p;
249
+
struct iio_dev *indio_dev = pf->indio_dev;
250
+
struct ens160_data *data = iio_priv(indio_dev);
251
+
int ret;
252
+
253
+
guard(mutex)(&data->mutex);
254
+
255
+
ret = regmap_bulk_read(data->regmap, ENS160_REG_DATA_TVOC,
256
+
data->scan.chans, sizeof(data->scan.chans));
257
+
if (ret)
258
+
goto err;
259
+
260
+
iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
261
+
pf->timestamp);
262
+
err:
263
+
iio_trigger_notify_done(indio_dev->trig);
264
+
265
+
return IRQ_HANDLED;
266
+
}
267
+
268
+
static int ens160_set_trigger_state(struct iio_trigger *trig, bool state)
269
+
{
270
+
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
271
+
struct ens160_data *data = iio_priv(indio_dev);
272
+
unsigned int int_bits = ENS160_REG_CONFIG_INTEN |
273
+
ENS160_REG_CONFIG_INTDAT |
274
+
ENS160_REG_CONFIG_INT_CFG;
275
+
276
+
if (state)
277
+
return regmap_set_bits(data->regmap, ENS160_REG_CONFIG,
278
+
int_bits);
279
+
else
280
+
return regmap_clear_bits(data->regmap, ENS160_REG_CONFIG,
281
+
int_bits);
282
+
}
283
+
284
+
static const struct iio_trigger_ops ens160_trigger_ops = {
285
+
.set_trigger_state = ens160_set_trigger_state,
286
+
.validate_device = iio_trigger_validate_own_device,
287
+
};
288
+
289
+
static int ens160_setup_trigger(struct iio_dev *indio_dev, int irq)
290
+
{
291
+
struct device *dev = indio_dev->dev.parent;
292
+
struct iio_trigger *trig;
293
+
int ret;
294
+
295
+
trig = devm_iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name,
296
+
iio_device_id(indio_dev));
297
+
if (!trig)
298
+
return dev_err_probe(dev, -ENOMEM,
299
+
"failed to allocate trigger\n");
300
+
301
+
trig->ops = &ens160_trigger_ops;
302
+
iio_trigger_set_drvdata(trig, indio_dev);
303
+
304
+
ret = devm_iio_trigger_register(dev, trig);
305
+
if (ret)
306
+
return ret;
307
+
308
+
indio_dev->trig = iio_trigger_get(trig);
309
+
310
+
ret = devm_request_threaded_irq(dev, irq,
311
+
iio_trigger_generic_data_rdy_poll,
312
+
NULL,
313
+
IRQF_ONESHOT,
314
+
indio_dev->name,
315
+
indio_dev->trig);
316
+
if (ret)
317
+
return dev_err_probe(dev, ret, "failed to request irq\n");
318
+
319
+
return 0;
320
+
}
321
+
322
+
int devm_ens160_core_probe(struct device *dev, struct regmap *regmap, int irq,
323
+
const char *name)
324
+
{
325
+
struct ens160_data *data;
326
+
struct iio_dev *indio_dev;
327
+
int ret;
328
+
329
+
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
330
+
if (!indio_dev)
331
+
return -ENOMEM;
332
+
333
+
data = iio_priv(indio_dev);
334
+
data->regmap = regmap;
335
+
336
+
indio_dev->name = name;
337
+
indio_dev->info = &ens160_info;
338
+
indio_dev->modes = INDIO_DIRECT_MODE;
339
+
indio_dev->channels = ens160_channels;
340
+
indio_dev->num_channels = ARRAY_SIZE(ens160_channels);
341
+
342
+
if (irq > 0) {
343
+
ret = ens160_setup_trigger(indio_dev, irq);
344
+
if (ret)
345
+
return dev_err_probe(dev, ret,
346
+
"failed to setup trigger\n");
347
+
}
348
+
349
+
ret = ens160_chip_init(data);
350
+
if (ret)
351
+
return dev_err_probe(dev, ret, "chip initialization failed\n");
352
+
353
+
mutex_init(&data->mutex);
354
+
355
+
ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
356
+
iio_pollfunc_store_time,
357
+
ens160_trigger_handler, NULL);
358
+
if (ret)
359
+
return ret;
360
+
361
+
return devm_iio_device_register(dev, indio_dev);
362
+
}
363
+
EXPORT_SYMBOL_NS(devm_ens160_core_probe, IIO_ENS160);
364
+
365
+
MODULE_AUTHOR("Gustavo Silva <gustavograzs@gmail.com>");
366
+
MODULE_DESCRIPTION("ScioSense ENS160 driver");
367
+
MODULE_LICENSE("GPL v2");
+62
drivers/iio/chemical/ens160_i2c.c
+62
drivers/iio/chemical/ens160_i2c.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* ScioSense ENS160 multi-gas sensor I2C driver
4
+
*
5
+
* Copyright (c) 2024 Gustavo Silva <gustavograzs@gmail.com>
6
+
*
7
+
* 7-Bit I2C slave address is:
8
+
* - 0x52 if ADDR pin LOW
9
+
* - 0x53 if ADDR pin HIGH
10
+
*/
11
+
12
+
#include <linux/i2c.h>
13
+
#include <linux/module.h>
14
+
#include <linux/regmap.h>
15
+
16
+
#include "ens160.h"
17
+
18
+
static const struct regmap_config ens160_regmap_i2c_conf = {
19
+
.reg_bits = 8,
20
+
.val_bits = 8,
21
+
};
22
+
23
+
static int ens160_i2c_probe(struct i2c_client *client)
24
+
{
25
+
struct regmap *regmap;
26
+
27
+
regmap = devm_regmap_init_i2c(client, &ens160_regmap_i2c_conf);
28
+
if (IS_ERR(regmap))
29
+
return dev_err_probe(&client->dev, PTR_ERR(regmap),
30
+
"Failed to register i2c regmap\n");
31
+
32
+
return devm_ens160_core_probe(&client->dev, regmap, client->irq,
33
+
"ens160");
34
+
}
35
+
36
+
static const struct i2c_device_id ens160_i2c_id[] = {
37
+
{ "ens160" },
38
+
{ }
39
+
};
40
+
MODULE_DEVICE_TABLE(i2c, ens160_i2c_id);
41
+
42
+
static const struct of_device_id ens160_of_i2c_match[] = {
43
+
{ .compatible = "sciosense,ens160" },
44
+
{ }
45
+
};
46
+
MODULE_DEVICE_TABLE(of, ens160_of_i2c_match);
47
+
48
+
static struct i2c_driver ens160_i2c_driver = {
49
+
.driver = {
50
+
.name = "ens160",
51
+
.of_match_table = ens160_of_i2c_match,
52
+
.pm = pm_sleep_ptr(&ens160_pm_ops),
53
+
},
54
+
.probe = ens160_i2c_probe,
55
+
.id_table = ens160_i2c_id,
56
+
};
57
+
module_i2c_driver(ens160_i2c_driver);
58
+
59
+
MODULE_AUTHOR("Gustavo Silva <gustavograzs@gmail.com>");
60
+
MODULE_DESCRIPTION("ScioSense ENS160 I2C driver");
61
+
MODULE_LICENSE("GPL v2");
62
+
MODULE_IMPORT_NS(IIO_ENS160);
+61
drivers/iio/chemical/ens160_spi.c
+61
drivers/iio/chemical/ens160_spi.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* ScioSense ENS160 multi-gas sensor SPI driver
4
+
*
5
+
* Copyright (c) 2024 Gustavo Silva <gustavograzs@gmail.com>
6
+
*/
7
+
8
+
#include <linux/module.h>
9
+
#include <linux/regmap.h>
10
+
#include <linux/spi/spi.h>
11
+
12
+
#include "ens160.h"
13
+
14
+
#define ENS160_SPI_READ BIT(0)
15
+
16
+
static const struct regmap_config ens160_regmap_spi_conf = {
17
+
.reg_bits = 8,
18
+
.val_bits = 8,
19
+
.reg_shift = -1,
20
+
.read_flag_mask = ENS160_SPI_READ,
21
+
};
22
+
23
+
static int ens160_spi_probe(struct spi_device *spi)
24
+
{
25
+
struct regmap *regmap;
26
+
27
+
regmap = devm_regmap_init_spi(spi, &ens160_regmap_spi_conf);
28
+
if (IS_ERR(regmap))
29
+
return dev_err_probe(&spi->dev, PTR_ERR(regmap),
30
+
"Failed to register spi regmap\n");
31
+
32
+
return devm_ens160_core_probe(&spi->dev, regmap, spi->irq, "ens160");
33
+
}
34
+
35
+
static const struct of_device_id ens160_spi_of_match[] = {
36
+
{ .compatible = "sciosense,ens160" },
37
+
{ }
38
+
};
39
+
MODULE_DEVICE_TABLE(of, ens160_spi_of_match);
40
+
41
+
static const struct spi_device_id ens160_spi_id[] = {
42
+
{ "ens160" },
43
+
{ }
44
+
};
45
+
MODULE_DEVICE_TABLE(spi, ens160_spi_id);
46
+
47
+
static struct spi_driver ens160_spi_driver = {
48
+
.driver = {
49
+
.name = "ens160",
50
+
.of_match_table = ens160_spi_of_match,
51
+
.pm = pm_sleep_ptr(&ens160_pm_ops),
52
+
},
53
+
.probe = ens160_spi_probe,
54
+
.id_table = ens160_spi_id,
55
+
};
56
+
module_spi_driver(ens160_spi_driver);
57
+
58
+
MODULE_AUTHOR("Gustavo Silva <gustavograzs@gmail.com>");
59
+
MODULE_DESCRIPTION("ScioSense ENS160 SPI driver");
60
+
MODULE_LICENSE("GPL v2");
61
+
MODULE_IMPORT_NS(IIO_ENS160);
+1
drivers/iio/dac/Kconfig
+1
drivers/iio/dac/Kconfig
+95
-45
drivers/iio/dac/ad3552r.c
+95
-45
drivers/iio/dac/ad3552r.c
···
117
117
#define AD3552R_REG_ADDR_CH_INPUT_24B(ch) (0x4B - (1 - ch) * 3)
118
118
119
119
/* Useful defines */
120
-
#define AD3552R_NUM_CH 2
120
+
#define AD3552R_MAX_CH 2
121
121
#define AD3552R_MASK_CH(ch) BIT(ch)
122
122
#define AD3552R_MASK_ALL_CH GENMASK(1, 0)
123
123
#define AD3552R_MAX_REG_SIZE 3
···
139
139
AD3552R_EXTERNAL_VREF_PIN_INPUT
140
140
};
141
141
142
-
enum ad3542r_id {
142
+
enum ad3552r_id {
143
+
AD3541R_ID = 0x400b,
143
144
AD3542R_ID = 0x4009,
145
+
AD3551R_ID = 0x400a,
144
146
AD3552R_ID = 0x4008,
145
147
};
146
148
···
263
261
bool range_override;
264
262
};
265
263
264
+
struct ad3552r_model_data {
265
+
const char *model_name;
266
+
enum ad3552r_id chip_id;
267
+
unsigned int num_hw_channels;
268
+
const s32 (*ranges_table)[2];
269
+
int num_ranges;
270
+
bool requires_output_range;
271
+
};
272
+
266
273
struct ad3552r_desc {
274
+
const struct ad3552r_model_data *model_data;
267
275
/* Used to look the spi bus for atomic operations where needed */
268
276
struct mutex lock;
269
277
struct gpio_desc *gpio_reset;
270
278
struct gpio_desc *gpio_ldac;
271
279
struct spi_device *spi;
272
-
struct ad3552r_ch_data ch_data[AD3552R_NUM_CH];
273
-
struct iio_chan_spec channels[AD3552R_NUM_CH + 1];
280
+
struct ad3552r_ch_data ch_data[AD3552R_MAX_CH];
281
+
struct iio_chan_spec channels[AD3552R_MAX_CH + 1];
274
282
unsigned long enabled_ch;
275
283
unsigned int num_ch;
276
-
enum ad3542r_id chip_id;
277
284
};
278
285
279
286
static const u16 addr_mask_map[][2] = {
···
539
528
static int ad3552r_write_all_channels(struct ad3552r_desc *dac, u8 *data)
540
529
{
541
530
int err, len;
542
-
u8 addr, buff[AD3552R_NUM_CH * AD3552R_MAX_REG_SIZE + 1];
531
+
u8 addr, buff[AD3552R_MAX_CH * AD3552R_MAX_REG_SIZE + 1];
543
532
544
533
addr = AD3552R_REG_ADDR_CH_INPUT_24B(1);
545
534
/* CH1 */
···
597
586
struct iio_buffer *buf = indio_dev->buffer;
598
587
struct ad3552r_desc *dac = iio_priv(indio_dev);
599
588
/* Maximum size of a scan */
600
-
u8 buff[AD3552R_NUM_CH * AD3552R_MAX_REG_SIZE];
589
+
u8 buff[AD3552R_MAX_CH * AD3552R_MAX_REG_SIZE];
601
590
int err;
602
591
603
592
memset(buff, 0, sizeof(buff));
···
756
745
} else {
757
746
/* Normal range */
758
747
idx = dac->ch_data[ch].range;
759
-
if (dac->chip_id == AD3542R_ID) {
760
-
v_min = ad3542r_ch_ranges[idx][0];
761
-
v_max = ad3542r_ch_ranges[idx][1];
762
-
} else {
763
-
v_min = ad3552r_ch_ranges[idx][0];
764
-
v_max = ad3552r_ch_ranges[idx][1];
765
-
}
748
+
v_min = dac->model_data->ranges_table[idx][0];
749
+
v_max = dac->model_data->ranges_table[idx][1];
766
750
}
767
751
768
752
/*
···
781
775
dac->ch_data[ch].offset_dec = div_s64(tmp, span);
782
776
}
783
777
784
-
static int ad3552r_find_range(u16 id, s32 *vals)
778
+
static int ad3552r_find_range(const struct ad3552r_model_data *model_data,
779
+
s32 *vals)
785
780
{
786
-
int i, len;
787
-
const s32 (*ranges)[2];
781
+
int i;
788
782
789
-
if (id == AD3542R_ID) {
790
-
len = ARRAY_SIZE(ad3542r_ch_ranges);
791
-
ranges = ad3542r_ch_ranges;
792
-
} else {
793
-
len = ARRAY_SIZE(ad3552r_ch_ranges);
794
-
ranges = ad3552r_ch_ranges;
795
-
}
796
-
797
-
for (i = 0; i < len; i++)
798
-
if (vals[0] == ranges[i][0] * 1000 &&
799
-
vals[1] == ranges[i][1] * 1000)
783
+
for (i = 0; i < model_data->num_ranges; i++)
784
+
if (vals[0] == model_data->ranges_table[i][0] * 1000 &&
785
+
vals[1] == model_data->ranges_table[i][1] * 1000)
800
786
return i;
801
787
802
788
return -EINVAL;
···
938
940
if (err)
939
941
return dev_err_probe(dev, err,
940
942
"mandatory reg property missing\n");
941
-
if (ch >= AD3552R_NUM_CH)
943
+
if (ch >= dac->model_data->num_hw_channels)
942
944
return dev_err_probe(dev, -EINVAL,
943
945
"reg must be less than %d\n",
944
-
AD3552R_NUM_CH);
946
+
dac->model_data->num_hw_channels);
945
947
946
948
if (fwnode_property_present(child, "adi,output-range-microvolt")) {
947
949
err = fwnode_property_read_u32_array(child,
···
952
954
return dev_err_probe(dev, err,
953
955
"adi,output-range-microvolt property could not be parsed\n");
954
956
955
-
err = ad3552r_find_range(dac->chip_id, vals);
957
+
err = ad3552r_find_range(dac->model_data, vals);
956
958
if (err < 0)
957
959
return dev_err_probe(dev, err,
958
960
"Invalid adi,output-range-microvolt value\n");
···
965
967
return err;
966
968
967
969
dac->ch_data[ch].range = val;
968
-
} else if (dac->chip_id == AD3542R_ID) {
970
+
} else if (dac->model_data->requires_output_range) {
969
971
return dev_err_probe(dev, -EINVAL,
970
-
"adi,output-range-microvolt is required for ad3542r\n");
972
+
"adi,output-range-microvolt is required for %s\n",
973
+
dac->model_data->model_name);
971
974
} else {
972
975
err = ad3552r_configure_custom_gain(dac, child, ch);
973
976
if (err)
···
988
989
}
989
990
990
991
/* Disable unused channels */
991
-
for_each_clear_bit(ch, &dac->enabled_ch, AD3552R_NUM_CH) {
992
+
for_each_clear_bit(ch, &dac->enabled_ch,
993
+
dac->model_data->num_hw_channels) {
992
994
err = ad3552r_set_ch_value(dac, AD3552R_CH_AMPLIFIER_POWERDOWN,
993
995
ch, 1);
994
996
if (err)
···
1032
1032
}
1033
1033
1034
1034
id |= val << 8;
1035
-
if (id != dac->chip_id) {
1035
+
if (id != dac->model_data->chip_id) {
1036
1036
dev_err(&dac->spi->dev, "Product id not matching\n");
1037
1037
return -ENODEV;
1038
1038
}
···
1042
1042
1043
1043
static int ad3552r_probe(struct spi_device *spi)
1044
1044
{
1045
-
const struct spi_device_id *id = spi_get_device_id(spi);
1046
1045
struct ad3552r_desc *dac;
1047
1046
struct iio_dev *indio_dev;
1048
1047
int err;
···
1052
1053
1053
1054
dac = iio_priv(indio_dev);
1054
1055
dac->spi = spi;
1055
-
dac->chip_id = id->driver_data;
1056
+
dac->model_data = spi_get_device_match_data(spi);
1057
+
if (!dac->model_data)
1058
+
return -EINVAL;
1056
1059
1057
1060
mutex_init(&dac->lock);
1058
1061
···
1063
1062
return err;
1064
1063
1065
1064
/* Config triggered buffer device */
1066
-
if (dac->chip_id == AD3552R_ID)
1067
-
indio_dev->name = "ad3552r";
1068
-
else
1069
-
indio_dev->name = "ad3542r";
1065
+
indio_dev->name = dac->model_data->model_name;
1070
1066
indio_dev->dev.parent = &spi->dev;
1071
1067
indio_dev->info = &ad3552r_iio_info;
1072
1068
indio_dev->num_channels = dac->num_ch;
···
1081
1083
return devm_iio_device_register(&spi->dev, indio_dev);
1082
1084
}
1083
1085
1086
+
static const struct ad3552r_model_data ad3541r_model_data = {
1087
+
.model_name = "ad3541r",
1088
+
.chip_id = AD3541R_ID,
1089
+
.num_hw_channels = 1,
1090
+
.ranges_table = ad3542r_ch_ranges,
1091
+
.num_ranges = ARRAY_SIZE(ad3542r_ch_ranges),
1092
+
.requires_output_range = true,
1093
+
};
1094
+
1095
+
static const struct ad3552r_model_data ad3542r_model_data = {
1096
+
.model_name = "ad3542r",
1097
+
.chip_id = AD3542R_ID,
1098
+
.num_hw_channels = 2,
1099
+
.ranges_table = ad3542r_ch_ranges,
1100
+
.num_ranges = ARRAY_SIZE(ad3542r_ch_ranges),
1101
+
.requires_output_range = true,
1102
+
};
1103
+
1104
+
static const struct ad3552r_model_data ad3551r_model_data = {
1105
+
.model_name = "ad3551r",
1106
+
.chip_id = AD3551R_ID,
1107
+
.num_hw_channels = 1,
1108
+
.ranges_table = ad3552r_ch_ranges,
1109
+
.num_ranges = ARRAY_SIZE(ad3552r_ch_ranges),
1110
+
.requires_output_range = false,
1111
+
};
1112
+
1113
+
static const struct ad3552r_model_data ad3552r_model_data = {
1114
+
.model_name = "ad3552r",
1115
+
.chip_id = AD3552R_ID,
1116
+
.num_hw_channels = 2,
1117
+
.ranges_table = ad3552r_ch_ranges,
1118
+
.num_ranges = ARRAY_SIZE(ad3552r_ch_ranges),
1119
+
.requires_output_range = false,
1120
+
};
1121
+
1084
1122
static const struct spi_device_id ad3552r_id[] = {
1085
-
{ "ad3542r", AD3542R_ID },
1086
-
{ "ad3552r", AD3552R_ID },
1123
+
{
1124
+
.name = "ad3541r",
1125
+
.driver_data = (kernel_ulong_t)&ad3541r_model_data
1126
+
},
1127
+
{
1128
+
.name = "ad3542r",
1129
+
.driver_data = (kernel_ulong_t)&ad3542r_model_data
1130
+
},
1131
+
{
1132
+
.name = "ad3551r",
1133
+
.driver_data = (kernel_ulong_t)&ad3551r_model_data
1134
+
},
1135
+
{
1136
+
.name = "ad3552r",
1137
+
.driver_data = (kernel_ulong_t)&ad3552r_model_data
1138
+
},
1087
1139
{ }
1088
1140
};
1089
1141
MODULE_DEVICE_TABLE(spi, ad3552r_id);
1090
1142
1091
1143
static const struct of_device_id ad3552r_of_match[] = {
1092
-
{ .compatible = "adi,ad3542r"},
1093
-
{ .compatible = "adi,ad3552r"},
1144
+
{ .compatible = "adi,ad3541r", .data = &ad3541r_model_data },
1145
+
{ .compatible = "adi,ad3542r", .data = &ad3542r_model_data },
1146
+
{ .compatible = "adi,ad3551r", .data = &ad3551r_model_data },
1147
+
{ .compatible = "adi,ad3552r", .data = &ad3552r_model_data },
1094
1148
{ }
1095
1149
};
1096
1150
MODULE_DEVICE_TABLE(of, ad3552r_of_match);
+3
-8
drivers/iio/dac/max5522.c
+3
-8
drivers/iio/dac/max5522.c
···
132
132
133
133
static int max5522_spi_probe(struct spi_device *spi)
134
134
{
135
-
const struct spi_device_id *id = spi_get_device_id(spi);
136
135
struct iio_dev *indio_dev;
137
136
struct max5522_state *state;
138
137
int ret;
···
143
144
}
144
145
145
146
state = iio_priv(indio_dev);
146
-
state->chip_info = device_get_match_data(&spi->dev);
147
-
if (!state->chip_info) {
148
-
state->chip_info =
149
-
(struct max5522_chip_info *)(id->driver_data);
150
-
if (!state->chip_info)
151
-
return -EINVAL;
152
-
}
147
+
state->chip_info = spi_get_device_match_data(spi);
148
+
if (!state->chip_info)
149
+
return -EINVAL;
153
150
154
151
state->vrefin_reg = devm_regulator_get(&spi->dev, "vrefin");
155
152
if (IS_ERR(state->vrefin_reg))
+1
-1
drivers/iio/dac/mcp4728.c
+1
-1
drivers/iio/dac/mcp4728.c
-1
drivers/iio/frequency/adrf6780.c
-1
drivers/iio/frequency/adrf6780.c
+3
-3
drivers/iio/gyro/bmg160_i2c.c
+3
-3
drivers/iio/gyro/bmg160_i2c.c
+1
-1
drivers/iio/gyro/fxas21002c_i2c.c
+1
-1
drivers/iio/gyro/fxas21002c_i2c.c
+1
-1
drivers/iio/gyro/itg3200_core.c
+1
-1
drivers/iio/gyro/itg3200_core.c
+1
-1
drivers/iio/health/afe4404.c
+1
-1
drivers/iio/health/afe4404.c
+1
-1
drivers/iio/health/max30100.c
+1
-1
drivers/iio/health/max30100.c
+1
-1
drivers/iio/humidity/am2315.c
+1
-1
drivers/iio/humidity/am2315.c
+6
-6
drivers/iio/humidity/hdc100x.c
+6
-6
drivers/iio/humidity/hdc100x.c
···
396
396
}
397
397
398
398
static const struct i2c_device_id hdc100x_id[] = {
399
-
{ "hdc100x", 0 },
400
-
{ "hdc1000", 0 },
401
-
{ "hdc1008", 0 },
402
-
{ "hdc1010", 0 },
403
-
{ "hdc1050", 0 },
404
-
{ "hdc1080", 0 },
399
+
{ "hdc100x" },
400
+
{ "hdc1000" },
401
+
{ "hdc1008" },
402
+
{ "hdc1010" },
403
+
{ "hdc1050" },
404
+
{ "hdc1080" },
405
405
{ }
406
406
};
407
407
MODULE_DEVICE_TABLE(i2c, hdc100x_id);
+2
-2
drivers/iio/humidity/si7005.c
+2
-2
drivers/iio/humidity/si7005.c
+135
-6
drivers/iio/humidity/si7020.c
+135
-6
drivers/iio/humidity/si7020.c
···
23
23
#include <linux/mod_devicetable.h>
24
24
#include <linux/slab.h>
25
25
#include <linux/sysfs.h>
26
+
#include <linux/stat.h>
26
27
27
28
#include <linux/iio/iio.h>
28
29
#include <linux/iio/sysfs.h>
···
34
33
#define SI7020CMD_TEMP_HOLD 0xE3
35
34
/* Software Reset */
36
35
#define SI7020CMD_RESET 0xFE
36
+
#define SI7020CMD_USR_WRITE 0xE6
37
+
/* "Heater Enabled" bit in the User Register */
38
+
#define SI7020_USR_HEATER_EN BIT(2)
39
+
#define SI7020CMD_HEATER_WRITE 0x51
40
+
/* Heater current configuration bits */
41
+
#define SI7020_HEATER_VAL GENMASK(3, 0)
42
+
43
+
struct si7020_data {
44
+
struct i2c_client *client;
45
+
/* Lock for cached register values */
46
+
struct mutex lock;
47
+
u8 user_reg;
48
+
u8 heater_reg;
49
+
};
50
+
51
+
static const int si7020_heater_vals[] = { 0, 1, 0xF };
37
52
38
53
static int si7020_read_raw(struct iio_dev *indio_dev,
39
54
struct iio_chan_spec const *chan, int *val,
40
55
int *val2, long mask)
41
56
{
42
-
struct i2c_client **client = iio_priv(indio_dev);
57
+
struct si7020_data *data = iio_priv(indio_dev);
43
58
int ret;
44
59
45
60
switch (mask) {
46
61
case IIO_CHAN_INFO_RAW:
47
-
ret = i2c_smbus_read_word_swapped(*client,
62
+
if (chan->type == IIO_CURRENT) {
63
+
*val = data->heater_reg;
64
+
return IIO_VAL_INT;
65
+
}
66
+
67
+
ret = i2c_smbus_read_word_swapped(data->client,
48
68
chan->type == IIO_TEMP ?
49
69
SI7020CMD_TEMP_HOLD :
50
70
SI7020CMD_RH_HOLD);
···
118
96
.type = IIO_TEMP,
119
97
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
120
98
BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET),
99
+
},
100
+
{
101
+
.type = IIO_CURRENT,
102
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
103
+
.info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW),
104
+
.extend_name = "heater",
121
105
}
106
+
};
107
+
108
+
static int si7020_update_reg(struct si7020_data *data,
109
+
u8 *reg, u8 cmd, u8 mask, u8 val)
110
+
{
111
+
u8 new = (*reg & ~mask) | val;
112
+
int ret;
113
+
114
+
ret = i2c_smbus_write_byte_data(data->client, cmd, new);
115
+
if (ret)
116
+
return ret;
117
+
118
+
*reg = new;
119
+
120
+
return 0;
121
+
}
122
+
123
+
static int si7020_write_raw(struct iio_dev *indio_dev,
124
+
struct iio_chan_spec const *chan,
125
+
int val, int val2, long mask)
126
+
{
127
+
struct si7020_data *data = iio_priv(indio_dev);
128
+
int ret;
129
+
130
+
switch (mask) {
131
+
case IIO_CHAN_INFO_RAW:
132
+
if (chan->type != IIO_CURRENT || val2 != 0 ||
133
+
val < si7020_heater_vals[0] || val > si7020_heater_vals[2])
134
+
return -EINVAL;
135
+
136
+
scoped_guard(mutex, &data->lock)
137
+
ret = si7020_update_reg(data, &data->heater_reg,
138
+
SI7020CMD_HEATER_WRITE, SI7020_HEATER_VAL, val);
139
+
return ret;
140
+
default:
141
+
return -EINVAL;
142
+
}
143
+
}
144
+
145
+
static int si7020_read_available(struct iio_dev *indio_dev,
146
+
struct iio_chan_spec const *chan,
147
+
const int **vals,
148
+
int *type, int *length, long mask)
149
+
{
150
+
if (mask != IIO_CHAN_INFO_RAW || chan->type != IIO_CURRENT)
151
+
return -EINVAL;
152
+
153
+
*vals = si7020_heater_vals;
154
+
*type = IIO_VAL_INT;
155
+
156
+
return IIO_AVAIL_RANGE;
157
+
}
158
+
159
+
static ssize_t si7020_show_heater_en(struct device *dev,
160
+
struct device_attribute *attr, char *buf)
161
+
{
162
+
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
163
+
struct si7020_data *data = iio_priv(indio_dev);
164
+
165
+
return sysfs_emit(buf, "%d\n", !!(data->user_reg & SI7020_USR_HEATER_EN));
166
+
}
167
+
168
+
static ssize_t si7020_store_heater_en(struct device *dev,
169
+
struct device_attribute *attr,
170
+
const char *buf, size_t len)
171
+
{
172
+
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
173
+
struct si7020_data *data = iio_priv(indio_dev);
174
+
int ret;
175
+
bool val;
176
+
177
+
ret = kstrtobool(buf, &val);
178
+
if (ret)
179
+
return ret;
180
+
181
+
scoped_guard(mutex, &data->lock)
182
+
ret = si7020_update_reg(data, &data->user_reg, SI7020CMD_USR_WRITE,
183
+
SI7020_USR_HEATER_EN, val ? SI7020_USR_HEATER_EN : 0);
184
+
185
+
return ret < 0 ? ret : len;
186
+
}
187
+
188
+
static IIO_DEVICE_ATTR(heater_enable, 0644,
189
+
si7020_show_heater_en, si7020_store_heater_en, 0);
190
+
191
+
static struct attribute *si7020_attributes[] = {
192
+
&iio_dev_attr_heater_enable.dev_attr.attr,
193
+
NULL
194
+
};
195
+
196
+
static const struct attribute_group si7020_attribute_group = {
197
+
.attrs = si7020_attributes,
122
198
};
123
199
124
200
static const struct iio_info si7020_info = {
125
201
.read_raw = si7020_read_raw,
202
+
.write_raw = si7020_write_raw,
203
+
.read_avail = si7020_read_available,
204
+
.attrs = &si7020_attribute_group,
126
205
};
127
206
128
207
static int si7020_probe(struct i2c_client *client)
129
208
{
130
209
struct iio_dev *indio_dev;
131
-
struct i2c_client **data;
210
+
struct si7020_data *data;
132
211
int ret;
133
212
134
213
if (!i2c_check_functionality(client->adapter,
···
249
126
return -ENOMEM;
250
127
251
128
data = iio_priv(indio_dev);
252
-
*data = client;
129
+
i2c_set_clientdata(client, indio_dev);
130
+
data->client = client;
131
+
mutex_init(&data->lock);
253
132
254
133
indio_dev->name = dev_name(&client->dev);
255
134
indio_dev->modes = INDIO_DIRECT_MODE;
···
259
134
indio_dev->channels = si7020_channels;
260
135
indio_dev->num_channels = ARRAY_SIZE(si7020_channels);
261
136
137
+
/* All the "reserved" bits in the User Register are 1s by default */
138
+
data->user_reg = 0x3A;
139
+
data->heater_reg = 0x0;
140
+
262
141
return devm_iio_device_register(&client->dev, indio_dev);
263
142
}
264
143
265
144
static const struct i2c_device_id si7020_id[] = {
266
-
{ "si7020", 0 },
267
-
{ "th06", 0 },
145
+
{ "si7020" },
146
+
{ "th06" },
268
147
{ }
269
148
};
270
149
MODULE_DEVICE_TABLE(i2c, si7020_id);
+2
-2
drivers/iio/imu/Kconfig
+2
-2
drivers/iio/imu/Kconfig
···
36
36
select IIO_ADIS_LIB_BUFFER if IIO_BUFFER
37
37
help
38
38
Say yes here to build support for Analog Devices ADIS16470, ADIS16475,
39
-
ADIS16477, ADIS16465, ADIS16467, ADIS16500, ADIS16505, ADIS16507 inertial
40
-
sensors.
39
+
ADIS16477, ADIS16465, ADIS16467, ADIS16500, ADIS16501, ADIS16505,
40
+
ADIS16507 inertial sensors.
41
41
42
42
To compile this driver as a module, choose M here: the module will be
43
43
called adis16475.
+699
-110
drivers/iio/imu/adis16475.c
+699
-110
drivers/iio/imu/adis16475.c
···
14
14
#include <linux/iio/buffer.h>
15
15
#include <linux/iio/iio.h>
16
16
#include <linux/iio/imu/adis.h>
17
+
#include <linux/iio/sysfs.h>
17
18
#include <linux/iio/trigger_consumer.h>
18
19
#include <linux/irq.h>
19
20
#include <linux/lcm.h>
···
53
52
FIELD_PREP(ADIS16475_MSG_CTRL_DR_POL_MASK, x)
54
53
#define ADIS16475_SYNC_MODE_MASK GENMASK(4, 2)
55
54
#define ADIS16475_SYNC_MODE(x) FIELD_PREP(ADIS16475_SYNC_MODE_MASK, x)
55
+
#define ADIS16575_SYNC_4KHZ_MASK BIT(11)
56
+
#define ADIS16575_SYNC_4KHZ(x) FIELD_PREP(ADIS16575_SYNC_4KHZ_MASK, x)
56
57
#define ADIS16475_REG_UP_SCALE 0x62
57
58
#define ADIS16475_REG_DEC_RATE 0x64
58
59
#define ADIS16475_REG_GLOB_CMD 0x68
···
68
65
#define ADIS16500_BURST32_MASK BIT(9)
69
66
#define ADIS16500_BURST32(x) FIELD_PREP(ADIS16500_BURST32_MASK, x)
70
67
/* number of data elements in burst mode */
71
-
#define ADIS16475_BURST32_MAX_DATA 32
68
+
#define ADIS16475_BURST32_MAX_DATA_NO_TS32 32
69
+
#define ADIS16575_BURST32_DATA_TS32 34
72
70
#define ADIS16475_BURST_MAX_DATA 20
73
71
#define ADIS16475_MAX_SCAN_DATA 20
74
72
/* spi max speed in brust mode */
75
73
#define ADIS16475_BURST_MAX_SPEED 1000000
74
+
#define ADIS16575_BURST_MAX_SPEED 8000000
76
75
#define ADIS16475_LSB_DEC_MASK 0
77
76
#define ADIS16475_LSB_FIR_MASK 1
78
77
#define ADIS16500_BURST_DATA_SEL_0_CHN_MASK GENMASK(5, 0)
79
78
#define ADIS16500_BURST_DATA_SEL_1_CHN_MASK GENMASK(12, 7)
79
+
#define ADIS16575_MAX_FIFO_WM 511UL
80
+
#define ADIS16475_REG_FIFO_CTRL 0x5A
81
+
#define ADIS16575_WM_LVL_MASK GENMASK(15, 4)
82
+
#define ADIS16575_WM_LVL(x) FIELD_PREP(ADIS16575_WM_LVL_MASK, x)
83
+
#define ADIS16575_WM_POL_MASK BIT(3)
84
+
#define ADIS16575_WM_POL(x) FIELD_PREP(ADIS16575_WM_POL_MASK, x)
85
+
#define ADIS16575_WM_EN_MASK BIT(2)
86
+
#define ADIS16575_WM_EN(x) FIELD_PREP(ADIS16575_WM_EN_MASK, x)
87
+
#define ADIS16575_OVERFLOW_MASK BIT(1)
88
+
#define ADIS16575_STOP_ENQUEUE FIELD_PREP(ADIS16575_OVERFLOW_MASK, 0)
89
+
#define ADIS16575_OVERWRITE_OLDEST FIELD_PREP(ADIS16575_OVERFLOW_MASK, 1)
90
+
#define ADIS16575_FIFO_EN_MASK BIT(0)
91
+
#define ADIS16575_FIFO_EN(x) FIELD_PREP(ADIS16575_FIFO_EN_MASK, x)
92
+
#define ADIS16575_FIFO_FLUSH_CMD BIT(5)
93
+
#define ADIS16575_REG_FIFO_CNT 0x3C
80
94
81
95
enum {
82
96
ADIS16475_SYNC_DIRECT = 1,
···
115
95
const char *name;
116
96
#define ADIS16475_HAS_BURST32 BIT(0)
117
97
#define ADIS16475_HAS_BURST_DELTA_DATA BIT(1)
98
+
#define ADIS16475_HAS_TIMESTAMP32 BIT(2)
99
+
#define ADIS16475_NEEDS_BURST_REQUEST BIT(3)
118
100
const long flags;
119
101
u32 num_channels;
120
102
u32 gyro_max_val;
···
138
116
bool burst32;
139
117
unsigned long lsb_flag;
140
118
u16 sync_mode;
119
+
u16 fifo_watermark;
141
120
/* Alignment needed for the timestamp */
142
121
__be16 data[ADIS16475_MAX_SCAN_DATA] __aligned(8);
143
122
};
···
333
310
u16 dec;
334
311
int ret;
335
312
u32 sample_rate = st->clk_freq;
313
+
/* The optimal sample rate for the supported IMUs is between int_clk - 100 and int_clk + 100. */
314
+
u32 max_sample_rate = st->info->int_clk * 1000 + 100000;
315
+
u32 min_sample_rate = st->info->int_clk * 1000 - 100000;
336
316
337
317
if (!freq)
338
318
return -EINVAL;
···
343
317
adis_dev_lock(&st->adis);
344
318
/*
345
319
* When using sync scaled mode, the input clock needs to be scaled so that we have
346
-
* an IMU sample rate between (optimally) 1900 and 2100. After this, we can use the
347
-
* decimation filter to lower the sampling rate in order to get what the user wants.
320
+
* an IMU sample rate between (optimally) int_clk - 100 and int_clk + 100.
321
+
* After this, we can use the decimation filter to lower the sampling rate in order
322
+
* to get what the user wants.
348
323
* Optimally, the user sample rate is a multiple of both the IMU sample rate and
349
324
* the input clock. Hence, calculating the sync_scale dynamically gives us better
350
325
* chances of achieving a perfect/integer value for DEC_RATE. The math here is:
···
363
336
* solution. In this case, we get the highest multiple of the input clock
364
337
* lower than the IMU max sample rate.
365
338
*/
366
-
if (scaled_rate > 2100000)
367
-
scaled_rate = 2100000 / st->clk_freq * st->clk_freq;
339
+
if (scaled_rate > max_sample_rate)
340
+
scaled_rate = max_sample_rate / st->clk_freq * st->clk_freq;
368
341
else
369
-
scaled_rate = 2100000 / scaled_rate * scaled_rate;
342
+
scaled_rate = max_sample_rate / scaled_rate * scaled_rate;
370
343
371
344
/*
372
345
* This is not an hard requirement but it's not advised to run the IMU
373
-
* with a sample rate lower than 1900Hz due to possible undersampling
374
-
* issues. However, there are users that might really want to take the risk.
375
-
* Hence, we provide a module parameter for them. If set, we allow sample
376
-
* rates lower than 1.9KHz. By default, we won't allow this and we just roundup
377
-
* the rate to the next multiple of the input clock bigger than 1.9KHz. This
378
-
* is done like this as in some cases (when DEC_RATE is 0) might give
379
-
* us the closest value to the one desired by the user...
346
+
* with a sample rate lower than internal clock frequency, due to possible
347
+
* undersampling issues. However, there are users that might really want
348
+
* to take the risk. Hence, we provide a module parameter for them. If set,
349
+
* we allow sample rates lower than internal clock frequency.
350
+
* By default, we won't allow this and we just roundup the rate to the next
351
+
* multiple of the input clock. This is done like this as in some cases
352
+
* (when DEC_RATE is 0) might give us the closest value to the one desired
353
+
* by the user...
380
354
*/
381
-
if (scaled_rate < 1900000 && !low_rate_allow)
382
-
scaled_rate = roundup(1900000, st->clk_freq);
355
+
if (scaled_rate < min_sample_rate && !low_rate_allow)
356
+
scaled_rate = roundup(min_sample_rate, st->clk_freq);
383
357
384
358
sync_scale = scaled_rate / st->clk_freq;
385
359
ret = __adis_write_reg_16(&st->adis, ADIS16475_REG_UP_SCALE, sync_scale);
···
463
435
assign_bit(ADIS16475_LSB_FIR_MASK, &st->lsb_flag, i);
464
436
465
437
return 0;
438
+
}
439
+
440
+
static ssize_t adis16475_get_fifo_enabled(struct device *dev,
441
+
struct device_attribute *attr,
442
+
char *buf)
443
+
{
444
+
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
445
+
struct adis16475 *st = iio_priv(indio_dev);
446
+
int ret;
447
+
u16 val;
448
+
449
+
ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIFO_CTRL, &val);
450
+
if (ret)
451
+
return ret;
452
+
453
+
return sysfs_emit(buf, "%lu\n", FIELD_GET(ADIS16575_FIFO_EN_MASK, val));
454
+
}
455
+
456
+
static ssize_t adis16475_get_fifo_watermark(struct device *dev,
457
+
struct device_attribute *attr,
458
+
char *buf)
459
+
{
460
+
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
461
+
struct adis16475 *st = iio_priv(indio_dev);
462
+
int ret;
463
+
u16 val;
464
+
465
+
ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIFO_CTRL, &val);
466
+
if (ret)
467
+
return ret;
468
+
469
+
return sysfs_emit(buf, "%lu\n", FIELD_GET(ADIS16575_WM_LVL_MASK, val) + 1);
470
+
}
471
+
472
+
static ssize_t hwfifo_watermark_min_show(struct device *dev,
473
+
struct device_attribute *attr,
474
+
char *buf)
475
+
{
476
+
return sysfs_emit(buf, "1\n");
477
+
}
478
+
479
+
static ssize_t hwfifo_watermark_max_show(struct device *dev,
480
+
struct device_attribute *attr,
481
+
char *buf)
482
+
{
483
+
return sysfs_emit(buf, "%lu\n", ADIS16575_MAX_FIFO_WM);
484
+
}
485
+
486
+
static IIO_DEVICE_ATTR_RO(hwfifo_watermark_min, 0);
487
+
static IIO_DEVICE_ATTR_RO(hwfifo_watermark_max, 0);
488
+
static IIO_DEVICE_ATTR(hwfifo_watermark, 0444,
489
+
adis16475_get_fifo_watermark, NULL, 0);
490
+
static IIO_DEVICE_ATTR(hwfifo_enabled, 0444,
491
+
adis16475_get_fifo_enabled, NULL, 0);
492
+
493
+
static const struct iio_dev_attr *adis16475_fifo_attributes[] = {
494
+
&iio_dev_attr_hwfifo_watermark_min,
495
+
&iio_dev_attr_hwfifo_watermark_max,
496
+
&iio_dev_attr_hwfifo_watermark,
497
+
&iio_dev_attr_hwfifo_enabled,
498
+
NULL
499
+
};
500
+
501
+
static int adis16475_buffer_postenable(struct iio_dev *indio_dev)
502
+
{
503
+
struct adis16475 *st = iio_priv(indio_dev);
504
+
struct adis *adis = &st->adis;
505
+
506
+
return adis_update_bits(adis, ADIS16475_REG_FIFO_CTRL,
507
+
ADIS16575_FIFO_EN_MASK, (u16)ADIS16575_FIFO_EN(1));
508
+
}
509
+
510
+
static int adis16475_buffer_postdisable(struct iio_dev *indio_dev)
511
+
{
512
+
struct adis16475 *st = iio_priv(indio_dev);
513
+
struct adis *adis = &st->adis;
514
+
int ret;
515
+
516
+
adis_dev_lock(&st->adis);
517
+
518
+
ret = __adis_update_bits(adis, ADIS16475_REG_FIFO_CTRL,
519
+
ADIS16575_FIFO_EN_MASK, (u16)ADIS16575_FIFO_EN(0));
520
+
if (ret)
521
+
goto unlock;
522
+
523
+
ret = __adis_write_reg_16(adis, ADIS16475_REG_GLOB_CMD,
524
+
ADIS16575_FIFO_FLUSH_CMD);
525
+
526
+
unlock:
527
+
adis_dev_unlock(&st->adis);
528
+
return ret;
529
+
}
530
+
531
+
static const struct iio_buffer_setup_ops adis16475_buffer_ops = {
532
+
.postenable = adis16475_buffer_postenable,
533
+
.postdisable = adis16475_buffer_postdisable,
534
+
};
535
+
536
+
static int adis16475_set_watermark(struct iio_dev *indio_dev, unsigned int val)
537
+
{
538
+
struct adis16475 *st = iio_priv(indio_dev);
539
+
int ret;
540
+
u16 wm_lvl;
541
+
542
+
adis_dev_lock(&st->adis);
543
+
544
+
val = min_t(unsigned int, val, ADIS16575_MAX_FIFO_WM);
545
+
546
+
wm_lvl = ADIS16575_WM_LVL(val - 1);
547
+
ret = __adis_update_bits(&st->adis, ADIS16475_REG_FIFO_CTRL, ADIS16575_WM_LVL_MASK, wm_lvl);
548
+
if (ret)
549
+
goto unlock;
550
+
551
+
st->fifo_watermark = val;
552
+
553
+
unlock:
554
+
adis_dev_unlock(&st->adis);
555
+
return ret;
466
556
}
467
557
468
558
static const u32 adis16475_calib_regs[] = {
···
792
646
IIO_CHAN_SOFT_TIMESTAMP(7)
793
647
};
794
648
649
+
static const struct iio_chan_spec adis16575_channels[] = {
650
+
ADIS16475_GYRO_CHANNEL(X),
651
+
ADIS16475_GYRO_CHANNEL(Y),
652
+
ADIS16475_GYRO_CHANNEL(Z),
653
+
ADIS16475_ACCEL_CHANNEL(X),
654
+
ADIS16475_ACCEL_CHANNEL(Y),
655
+
ADIS16475_ACCEL_CHANNEL(Z),
656
+
ADIS16475_TEMP_CHANNEL(),
657
+
ADIS16475_DELTANG_CHAN(X),
658
+
ADIS16475_DELTANG_CHAN(Y),
659
+
ADIS16475_DELTANG_CHAN(Z),
660
+
ADIS16475_DELTVEL_CHAN(X),
661
+
ADIS16475_DELTVEL_CHAN(Y),
662
+
ADIS16475_DELTVEL_CHAN(Z),
663
+
};
664
+
795
665
enum adis16475_variant {
796
666
ADIS16470,
797
667
ADIS16475_1,
···
823
661
ADIS16467_2,
824
662
ADIS16467_3,
825
663
ADIS16500,
664
+
ADIS16501,
826
665
ADIS16505_1,
827
666
ADIS16505_2,
828
667
ADIS16505_3,
829
668
ADIS16507_1,
830
669
ADIS16507_2,
831
670
ADIS16507_3,
671
+
ADIS16575_2,
672
+
ADIS16575_3,
673
+
ADIS16576_2,
674
+
ADIS16576_3,
675
+
ADIS16577_2,
676
+
ADIS16577_3,
832
677
};
833
678
834
679
enum {
···
858
689
[ADIS16475_DIAG_STAT_CLK] = "Clock error",
859
690
};
860
691
861
-
#define ADIS16475_DATA(_prod_id, _timeouts) \
862
-
{ \
863
-
.msc_ctrl_reg = ADIS16475_REG_MSG_CTRL, \
864
-
.glob_cmd_reg = ADIS16475_REG_GLOB_CMD, \
865
-
.diag_stat_reg = ADIS16475_REG_DIAG_STAT, \
866
-
.prod_id_reg = ADIS16475_REG_PROD_ID, \
867
-
.prod_id = (_prod_id), \
868
-
.self_test_mask = BIT(2), \
869
-
.self_test_reg = ADIS16475_REG_GLOB_CMD, \
870
-
.cs_change_delay = 16, \
871
-
.read_delay = 5, \
872
-
.write_delay = 5, \
873
-
.status_error_msgs = adis16475_status_error_msgs, \
874
-
.status_error_mask = BIT(ADIS16475_DIAG_STAT_DATA_PATH) | \
875
-
BIT(ADIS16475_DIAG_STAT_FLASH_MEM) | \
876
-
BIT(ADIS16475_DIAG_STAT_SPI) | \
877
-
BIT(ADIS16475_DIAG_STAT_STANDBY) | \
878
-
BIT(ADIS16475_DIAG_STAT_SENSOR) | \
879
-
BIT(ADIS16475_DIAG_STAT_MEMORY) | \
880
-
BIT(ADIS16475_DIAG_STAT_CLK), \
881
-
.unmasked_drdy = true, \
882
-
.timeouts = (_timeouts), \
883
-
.burst_reg_cmd = ADIS16475_REG_GLOB_CMD, \
884
-
.burst_len = ADIS16475_BURST_MAX_DATA, \
885
-
.burst_max_len = ADIS16475_BURST32_MAX_DATA, \
886
-
.burst_max_speed_hz = ADIS16475_BURST_MAX_SPEED \
692
+
#define ADIS16475_DATA(_prod_id, _timeouts, _burst_max_len, _burst_max_speed_hz, _has_fifo) \
693
+
{ \
694
+
.msc_ctrl_reg = ADIS16475_REG_MSG_CTRL, \
695
+
.glob_cmd_reg = ADIS16475_REG_GLOB_CMD, \
696
+
.diag_stat_reg = ADIS16475_REG_DIAG_STAT, \
697
+
.prod_id_reg = ADIS16475_REG_PROD_ID, \
698
+
.prod_id = (_prod_id), \
699
+
.self_test_mask = BIT(2), \
700
+
.self_test_reg = ADIS16475_REG_GLOB_CMD, \
701
+
.cs_change_delay = 16, \
702
+
.read_delay = 5, \
703
+
.write_delay = 5, \
704
+
.status_error_msgs = adis16475_status_error_msgs, \
705
+
.status_error_mask = BIT(ADIS16475_DIAG_STAT_DATA_PATH) | \
706
+
BIT(ADIS16475_DIAG_STAT_FLASH_MEM) | \
707
+
BIT(ADIS16475_DIAG_STAT_SPI) | \
708
+
BIT(ADIS16475_DIAG_STAT_STANDBY) | \
709
+
BIT(ADIS16475_DIAG_STAT_SENSOR) | \
710
+
BIT(ADIS16475_DIAG_STAT_MEMORY) | \
711
+
BIT(ADIS16475_DIAG_STAT_CLK), \
712
+
.unmasked_drdy = true, \
713
+
.has_fifo = _has_fifo, \
714
+
.timeouts = (_timeouts), \
715
+
.burst_reg_cmd = ADIS16475_REG_GLOB_CMD, \
716
+
.burst_len = ADIS16475_BURST_MAX_DATA, \
717
+
.burst_max_len = _burst_max_len, \
718
+
.burst_max_speed_hz = _burst_max_speed_hz \
887
719
}
888
720
889
721
static const struct adis16475_sync adis16475_sync_mode[] = {
···
892
722
{ ADIS16475_SYNC_DIRECT, 1900, 2100 },
893
723
{ ADIS16475_SYNC_SCALED, 1, 128 },
894
724
{ ADIS16475_SYNC_PULSE, 1000, 2100 },
725
+
};
726
+
727
+
static const struct adis16475_sync adis16575_sync_mode[] = {
728
+
{ ADIS16475_SYNC_OUTPUT },
729
+
{ ADIS16475_SYNC_DIRECT, 1900, 4100 },
730
+
{ ADIS16475_SYNC_SCALED, 1, 400 },
895
731
};
896
732
897
733
static const struct adis_timeout adis16475_timeouts = {
···
928
752
.max_dec = 1999,
929
753
.sync = adis16475_sync_mode,
930
754
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
931
-
.adis_data = ADIS16475_DATA(16470, &adis16475_timeouts),
755
+
.adis_data = ADIS16475_DATA(16470, &adis16475_timeouts,
756
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
757
+
ADIS16475_BURST_MAX_SPEED, false),
932
758
},
933
759
[ADIS16475_1] = {
934
760
.name = "adis16475-1",
···
947
769
.max_dec = 1999,
948
770
.sync = adis16475_sync_mode,
949
771
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
950
-
.adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
772
+
.adis_data = ADIS16475_DATA(16475, &adis16475_timeouts,
773
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
774
+
ADIS16475_BURST_MAX_SPEED, false),
951
775
},
952
776
[ADIS16475_2] = {
953
777
.name = "adis16475-2",
···
966
786
.max_dec = 1999,
967
787
.sync = adis16475_sync_mode,
968
788
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
969
-
.adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
789
+
.adis_data = ADIS16475_DATA(16475, &adis16475_timeouts,
790
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
791
+
ADIS16475_BURST_MAX_SPEED, false),
970
792
},
971
793
[ADIS16475_3] = {
972
794
.name = "adis16475-3",
···
985
803
.max_dec = 1999,
986
804
.sync = adis16475_sync_mode,
987
805
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
988
-
.adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
806
+
.adis_data = ADIS16475_DATA(16475, &adis16475_timeouts,
807
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
808
+
ADIS16475_BURST_MAX_SPEED, false),
989
809
},
990
810
[ADIS16477_1] = {
991
811
.name = "adis16477-1",
···
1005
821
.sync = adis16475_sync_mode,
1006
822
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
1007
823
.flags = ADIS16475_HAS_BURST32 | ADIS16475_HAS_BURST_DELTA_DATA,
1008
-
.adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
824
+
.adis_data = ADIS16475_DATA(16477, &adis16475_timeouts,
825
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
826
+
ADIS16475_BURST_MAX_SPEED, false),
1009
827
},
1010
828
[ADIS16477_2] = {
1011
829
.name = "adis16477-2",
···
1025
839
.sync = adis16475_sync_mode,
1026
840
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
1027
841
.flags = ADIS16475_HAS_BURST32 | ADIS16475_HAS_BURST_DELTA_DATA,
1028
-
.adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
842
+
.adis_data = ADIS16475_DATA(16477, &adis16475_timeouts,
843
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
844
+
ADIS16475_BURST_MAX_SPEED, false),
1029
845
},
1030
846
[ADIS16477_3] = {
1031
847
.name = "adis16477-3",
···
1045
857
.sync = adis16475_sync_mode,
1046
858
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
1047
859
.flags = ADIS16475_HAS_BURST32 | ADIS16475_HAS_BURST_DELTA_DATA,
1048
-
.adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
860
+
.adis_data = ADIS16475_DATA(16477, &adis16475_timeouts,
861
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
862
+
ADIS16475_BURST_MAX_SPEED, false),
1049
863
},
1050
864
[ADIS16465_1] = {
1051
865
.name = "adis16465-1",
···
1064
874
.max_dec = 1999,
1065
875
.sync = adis16475_sync_mode,
1066
876
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
1067
-
.adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
877
+
.adis_data = ADIS16475_DATA(16465, &adis16475_timeouts,
878
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
879
+
ADIS16475_BURST_MAX_SPEED, false),
1068
880
},
1069
881
[ADIS16465_2] = {
1070
882
.name = "adis16465-2",
···
1083
891
.max_dec = 1999,
1084
892
.sync = adis16475_sync_mode,
1085
893
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
1086
-
.adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
894
+
.adis_data = ADIS16475_DATA(16465, &adis16475_timeouts,
895
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
896
+
ADIS16475_BURST_MAX_SPEED, false),
1087
897
},
1088
898
[ADIS16465_3] = {
1089
899
.name = "adis16465-3",
···
1102
908
.max_dec = 1999,
1103
909
.sync = adis16475_sync_mode,
1104
910
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
1105
-
.adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
911
+
.adis_data = ADIS16475_DATA(16465, &adis16475_timeouts,
912
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
913
+
ADIS16475_BURST_MAX_SPEED, false),
1106
914
},
1107
915
[ADIS16467_1] = {
1108
916
.name = "adis16467-1",
···
1121
925
.max_dec = 1999,
1122
926
.sync = adis16475_sync_mode,
1123
927
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
1124
-
.adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
928
+
.adis_data = ADIS16475_DATA(16467, &adis16475_timeouts,
929
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
930
+
ADIS16475_BURST_MAX_SPEED, false),
1125
931
},
1126
932
[ADIS16467_2] = {
1127
933
.name = "adis16467-2",
···
1140
942
.max_dec = 1999,
1141
943
.sync = adis16475_sync_mode,
1142
944
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
1143
-
.adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
945
+
.adis_data = ADIS16475_DATA(16467, &adis16475_timeouts,
946
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
947
+
ADIS16475_BURST_MAX_SPEED, false),
1144
948
},
1145
949
[ADIS16467_3] = {
1146
950
.name = "adis16467-3",
···
1159
959
.max_dec = 1999,
1160
960
.sync = adis16475_sync_mode,
1161
961
.num_sync = ARRAY_SIZE(adis16475_sync_mode),
1162
-
.adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
962
+
.adis_data = ADIS16475_DATA(16467, &adis16475_timeouts,
963
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
964
+
ADIS16475_BURST_MAX_SPEED, false),
1163
965
},
1164
966
[ADIS16500] = {
1165
967
.name = "adis16500",
···
1180
978
/* pulse sync not supported */
1181
979
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
1182
980
.flags = ADIS16475_HAS_BURST32 | ADIS16475_HAS_BURST_DELTA_DATA,
1183
-
.adis_data = ADIS16475_DATA(16500, &adis1650x_timeouts),
981
+
.adis_data = ADIS16475_DATA(16500, &adis1650x_timeouts,
982
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
983
+
ADIS16475_BURST_MAX_SPEED, false),
984
+
},
985
+
[ADIS16501] = {
986
+
.name = "adis16501",
987
+
.num_channels = ARRAY_SIZE(adis16477_channels),
988
+
.channels = adis16477_channels,
989
+
.gyro_max_val = 1,
990
+
.gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
991
+
.accel_max_val = 1,
992
+
.accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
993
+
.temp_scale = 100,
994
+
.deltang_max_val = IIO_DEGREE_TO_RAD(720),
995
+
.deltvel_max_val = 125,
996
+
.int_clk = 2000,
997
+
.max_dec = 1999,
998
+
.sync = adis16475_sync_mode,
999
+
/* pulse sync not supported */
1000
+
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
1001
+
.flags = ADIS16475_HAS_BURST32 | ADIS16475_HAS_BURST_DELTA_DATA,
1002
+
.adis_data = ADIS16475_DATA(16501, &adis1650x_timeouts,
1003
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
1004
+
ADIS16475_BURST_MAX_SPEED, false),
1184
1005
},
1185
1006
[ADIS16505_1] = {
1186
1007
.name = "adis16505-1",
···
1222
997
/* pulse sync not supported */
1223
998
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
1224
999
.flags = ADIS16475_HAS_BURST32 | ADIS16475_HAS_BURST_DELTA_DATA,
1225
-
.adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
1000
+
.adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts,
1001
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
1002
+
ADIS16475_BURST_MAX_SPEED, false),
1226
1003
},
1227
1004
[ADIS16505_2] = {
1228
1005
.name = "adis16505-2",
···
1243
1016
/* pulse sync not supported */
1244
1017
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
1245
1018
.flags = ADIS16475_HAS_BURST32 | ADIS16475_HAS_BURST_DELTA_DATA,
1246
-
.adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
1019
+
.adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts,
1020
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
1021
+
ADIS16475_BURST_MAX_SPEED, false),
1247
1022
},
1248
1023
[ADIS16505_3] = {
1249
1024
.name = "adis16505-3",
···
1264
1035
/* pulse sync not supported */
1265
1036
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
1266
1037
.flags = ADIS16475_HAS_BURST32 | ADIS16475_HAS_BURST_DELTA_DATA,
1267
-
.adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
1038
+
.adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts,
1039
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
1040
+
ADIS16475_BURST_MAX_SPEED, false),
1268
1041
},
1269
1042
[ADIS16507_1] = {
1270
1043
.name = "adis16507-1",
···
1285
1054
/* pulse sync not supported */
1286
1055
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
1287
1056
.flags = ADIS16475_HAS_BURST32 | ADIS16475_HAS_BURST_DELTA_DATA,
1288
-
.adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
1057
+
.adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts,
1058
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
1059
+
ADIS16475_BURST_MAX_SPEED, false),
1289
1060
},
1290
1061
[ADIS16507_2] = {
1291
1062
.name = "adis16507-2",
···
1306
1073
/* pulse sync not supported */
1307
1074
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
1308
1075
.flags = ADIS16475_HAS_BURST32 | ADIS16475_HAS_BURST_DELTA_DATA,
1309
-
.adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
1076
+
.adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts,
1077
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
1078
+
ADIS16475_BURST_MAX_SPEED, false),
1310
1079
},
1311
1080
[ADIS16507_3] = {
1312
1081
.name = "adis16507-3",
···
1327
1092
/* pulse sync not supported */
1328
1093
.num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
1329
1094
.flags = ADIS16475_HAS_BURST32 | ADIS16475_HAS_BURST_DELTA_DATA,
1330
-
.adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
1095
+
.adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts,
1096
+
ADIS16475_BURST32_MAX_DATA_NO_TS32,
1097
+
ADIS16475_BURST_MAX_SPEED, false),
1098
+
},
1099
+
[ADIS16575_2] = {
1100
+
.name = "adis16575-2",
1101
+
.num_channels = ARRAY_SIZE(adis16575_channels),
1102
+
.channels = adis16575_channels,
1103
+
.gyro_max_val = 1,
1104
+
.gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
1105
+
.accel_max_val = 8,
1106
+
.accel_max_scale = IIO_M_S_2_TO_G(32000 << 16),
1107
+
.temp_scale = 100,
1108
+
.deltang_max_val = IIO_DEGREE_TO_RAD(450),
1109
+
.deltvel_max_val = 100,
1110
+
.int_clk = 4000,
1111
+
.max_dec = 3999,
1112
+
.sync = adis16575_sync_mode,
1113
+
.num_sync = ARRAY_SIZE(adis16575_sync_mode),
1114
+
.flags = ADIS16475_HAS_BURST32 |
1115
+
ADIS16475_HAS_BURST_DELTA_DATA |
1116
+
ADIS16475_NEEDS_BURST_REQUEST |
1117
+
ADIS16475_HAS_TIMESTAMP32,
1118
+
.adis_data = ADIS16475_DATA(16575, &adis16475_timeouts,
1119
+
ADIS16575_BURST32_DATA_TS32,
1120
+
ADIS16575_BURST_MAX_SPEED, true),
1121
+
},
1122
+
[ADIS16575_3] = {
1123
+
.name = "adis16575-3",
1124
+
.num_channels = ARRAY_SIZE(adis16575_channels),
1125
+
.channels = adis16575_channels,
1126
+
.gyro_max_val = 1,
1127
+
.gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
1128
+
.accel_max_val = 8,
1129
+
.accel_max_scale = IIO_M_S_2_TO_G(32000 << 16),
1130
+
.temp_scale = 100,
1131
+
.deltang_max_val = IIO_DEGREE_TO_RAD(2000),
1132
+
.deltvel_max_val = 100,
1133
+
.int_clk = 4000,
1134
+
.max_dec = 3999,
1135
+
.sync = adis16575_sync_mode,
1136
+
.num_sync = ARRAY_SIZE(adis16575_sync_mode),
1137
+
.flags = ADIS16475_HAS_BURST32 |
1138
+
ADIS16475_HAS_BURST_DELTA_DATA |
1139
+
ADIS16475_NEEDS_BURST_REQUEST |
1140
+
ADIS16475_HAS_TIMESTAMP32,
1141
+
.adis_data = ADIS16475_DATA(16575, &adis16475_timeouts,
1142
+
ADIS16575_BURST32_DATA_TS32,
1143
+
ADIS16575_BURST_MAX_SPEED, true),
1144
+
},
1145
+
[ADIS16576_2] = {
1146
+
.name = "adis16576-2",
1147
+
.num_channels = ARRAY_SIZE(adis16575_channels),
1148
+
.channels = adis16575_channels,
1149
+
.gyro_max_val = 1,
1150
+
.gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
1151
+
.accel_max_val = 40,
1152
+
.accel_max_scale = IIO_M_S_2_TO_G(32000 << 16),
1153
+
.temp_scale = 100,
1154
+
.deltang_max_val = IIO_DEGREE_TO_RAD(450),
1155
+
.deltvel_max_val = 125,
1156
+
.int_clk = 4000,
1157
+
.max_dec = 3999,
1158
+
.sync = adis16575_sync_mode,
1159
+
.num_sync = ARRAY_SIZE(adis16575_sync_mode),
1160
+
.flags = ADIS16475_HAS_BURST32 |
1161
+
ADIS16475_HAS_BURST_DELTA_DATA |
1162
+
ADIS16475_NEEDS_BURST_REQUEST |
1163
+
ADIS16475_HAS_TIMESTAMP32,
1164
+
.adis_data = ADIS16475_DATA(16576, &adis16475_timeouts,
1165
+
ADIS16575_BURST32_DATA_TS32,
1166
+
ADIS16575_BURST_MAX_SPEED, true),
1167
+
},
1168
+
[ADIS16576_3] = {
1169
+
.name = "adis16576-3",
1170
+
.num_channels = ARRAY_SIZE(adis16575_channels),
1171
+
.channels = adis16575_channels,
1172
+
.gyro_max_val = 1,
1173
+
.gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
1174
+
.accel_max_val = 40,
1175
+
.accel_max_scale = IIO_M_S_2_TO_G(32000 << 16),
1176
+
.temp_scale = 100,
1177
+
.deltang_max_val = IIO_DEGREE_TO_RAD(2000),
1178
+
.deltvel_max_val = 125,
1179
+
.int_clk = 4000,
1180
+
.max_dec = 3999,
1181
+
.sync = adis16575_sync_mode,
1182
+
.num_sync = ARRAY_SIZE(adis16575_sync_mode),
1183
+
.flags = ADIS16475_HAS_BURST32 |
1184
+
ADIS16475_HAS_BURST_DELTA_DATA |
1185
+
ADIS16475_NEEDS_BURST_REQUEST |
1186
+
ADIS16475_HAS_TIMESTAMP32,
1187
+
.adis_data = ADIS16475_DATA(16576, &adis16475_timeouts,
1188
+
ADIS16575_BURST32_DATA_TS32,
1189
+
ADIS16575_BURST_MAX_SPEED, true),
1190
+
},
1191
+
[ADIS16577_2] = {
1192
+
.name = "adis16577-2",
1193
+
.num_channels = ARRAY_SIZE(adis16575_channels),
1194
+
.channels = adis16575_channels,
1195
+
.gyro_max_val = 1,
1196
+
.gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
1197
+
.accel_max_val = 40,
1198
+
.accel_max_scale = IIO_M_S_2_TO_G(32000 << 16),
1199
+
.temp_scale = 100,
1200
+
.deltang_max_val = IIO_DEGREE_TO_RAD(450),
1201
+
.deltvel_max_val = 400,
1202
+
.int_clk = 4000,
1203
+
.max_dec = 3999,
1204
+
.sync = adis16575_sync_mode,
1205
+
.num_sync = ARRAY_SIZE(adis16575_sync_mode),
1206
+
.flags = ADIS16475_HAS_BURST32 |
1207
+
ADIS16475_HAS_BURST_DELTA_DATA |
1208
+
ADIS16475_NEEDS_BURST_REQUEST |
1209
+
ADIS16475_HAS_TIMESTAMP32,
1210
+
.adis_data = ADIS16475_DATA(16577, &adis16475_timeouts,
1211
+
ADIS16575_BURST32_DATA_TS32,
1212
+
ADIS16575_BURST_MAX_SPEED, true),
1213
+
},
1214
+
[ADIS16577_3] = {
1215
+
.name = "adis16577-3",
1216
+
.num_channels = ARRAY_SIZE(adis16575_channels),
1217
+
.channels = adis16575_channels,
1218
+
.gyro_max_val = 1,
1219
+
.gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
1220
+
.accel_max_val = 40,
1221
+
.accel_max_scale = IIO_M_S_2_TO_G(32000 << 16),
1222
+
.temp_scale = 100,
1223
+
.deltang_max_val = IIO_DEGREE_TO_RAD(2000),
1224
+
.deltvel_max_val = 400,
1225
+
.int_clk = 4000,
1226
+
.max_dec = 3999,
1227
+
.sync = adis16575_sync_mode,
1228
+
.num_sync = ARRAY_SIZE(adis16575_sync_mode),
1229
+
.flags = ADIS16475_HAS_BURST32 |
1230
+
ADIS16475_HAS_BURST_DELTA_DATA |
1231
+
ADIS16475_NEEDS_BURST_REQUEST |
1232
+
ADIS16475_HAS_TIMESTAMP32,
1233
+
.adis_data = ADIS16475_DATA(16577, &adis16475_timeouts,
1234
+
ADIS16575_BURST32_DATA_TS32,
1235
+
ADIS16575_BURST_MAX_SPEED, true),
1331
1236
},
1332
1237
};
1333
1238
···
1503
1128
.debugfs_reg_access = adis_debugfs_reg_access,
1504
1129
};
1505
1130
1131
+
static const struct iio_info adis16575_info = {
1132
+
.read_raw = &adis16475_read_raw,
1133
+
.write_raw = &adis16475_write_raw,
1134
+
.update_scan_mode = adis16475_update_scan_mode,
1135
+
.debugfs_reg_access = adis_debugfs_reg_access,
1136
+
.hwfifo_set_watermark = adis16475_set_watermark,
1137
+
};
1138
+
1506
1139
static bool adis16475_validate_crc(const u8 *buffer, u16 crc,
1507
-
const bool burst32)
1140
+
u16 burst_size, u16 start_idx)
1508
1141
{
1509
1142
int i;
1510
-
/* extra 6 elements for low gyro and accel */
1511
-
const u16 sz = burst32 ? ADIS16475_BURST32_MAX_DATA :
1512
-
ADIS16475_BURST_MAX_DATA;
1513
1143
1514
-
for (i = 0; i < sz - 2; i++)
1144
+
for (i = start_idx; i < burst_size - 2; i++)
1515
1145
crc -= buffer[i];
1516
1146
1517
1147
return crc == 0;
···
1526
1146
{
1527
1147
int ret;
1528
1148
struct adis *adis = &st->adis;
1149
+
u8 timestamp32 = 0;
1529
1150
1530
1151
if (!(st->info->flags & ADIS16475_HAS_BURST32))
1531
1152
return;
1153
+
1154
+
if (st->info->flags & ADIS16475_HAS_TIMESTAMP32)
1155
+
timestamp32 = 1;
1532
1156
1533
1157
if (st->lsb_flag && !st->burst32) {
1534
1158
const u16 en = ADIS16500_BURST32(1);
···
1547
1163
/*
1548
1164
* In 32-bit mode we need extra 2 bytes for all gyro
1549
1165
* and accel channels.
1166
+
* If the device has 32-bit timestamp value we need 2 extra
1167
+
* bytes for it.
1550
1168
*/
1551
-
adis->burst_extra_len = 6 * sizeof(u16);
1552
-
adis->xfer[1].len += 6 * sizeof(u16);
1169
+
adis->burst_extra_len = (6 + timestamp32) * sizeof(u16);
1170
+
adis->xfer[1].len += (6 + timestamp32) * sizeof(u16);
1171
+
1553
1172
dev_dbg(&adis->spi->dev, "Enable burst32 mode, xfer:%d",
1554
1173
adis->xfer[1].len);
1555
1174
···
1568
1181
1569
1182
/* Remove the extra bits */
1570
1183
adis->burst_extra_len = 0;
1571
-
adis->xfer[1].len -= 6 * sizeof(u16);
1184
+
adis->xfer[1].len -= (6 + timestamp32) * sizeof(u16);
1572
1185
dev_dbg(&adis->spi->dev, "Disable burst32 mode, xfer:%d\n",
1573
1186
adis->xfer[1].len);
1574
1187
}
1575
1188
}
1576
1189
1577
-
static irqreturn_t adis16475_trigger_handler(int irq, void *p)
1190
+
static int adis16475_push_single_sample(struct iio_poll_func *pf)
1578
1191
{
1579
-
struct iio_poll_func *pf = p;
1580
1192
struct iio_dev *indio_dev = pf->indio_dev;
1581
1193
struct adis16475 *st = iio_priv(indio_dev);
1582
1194
struct adis *adis = &st->adis;
···
1583
1197
__be16 *buffer;
1584
1198
u16 crc;
1585
1199
bool valid;
1200
+
u8 crc_offset = 9;
1201
+
u16 burst_size = ADIS16475_BURST_MAX_DATA;
1202
+
u16 start_idx = (st->info->flags & ADIS16475_HAS_TIMESTAMP32) ? 2 : 0;
1203
+
1586
1204
/* offset until the first element after gyro and accel */
1587
1205
const u8 offset = st->burst32 ? 13 : 7;
1588
1206
1207
+
if (st->burst32) {
1208
+
crc_offset = (st->info->flags & ADIS16475_HAS_TIMESTAMP32) ? 16 : 15;
1209
+
burst_size = adis->data->burst_max_len;
1210
+
}
1211
+
1589
1212
ret = spi_sync(adis->spi, &adis->msg);
1590
1213
if (ret)
1591
-
goto check_burst32;
1214
+
return ret;
1592
1215
1593
1216
buffer = adis->buffer;
1594
1217
1595
-
crc = be16_to_cpu(buffer[offset + 2]);
1596
-
valid = adis16475_validate_crc(adis->buffer, crc, st->burst32);
1218
+
crc = be16_to_cpu(buffer[crc_offset]);
1219
+
valid = adis16475_validate_crc(adis->buffer, crc, burst_size, start_idx);
1597
1220
if (!valid) {
1598
1221
dev_err(&adis->spi->dev, "Invalid crc\n");
1599
-
goto check_burst32;
1222
+
return -EINVAL;
1600
1223
}
1601
1224
1602
1225
for_each_set_bit(bit, indio_dev->active_scan_mask,
···
1665
1270
}
1666
1271
}
1667
1272
1273
+
/* There might not be a timestamp option for some devices. */
1668
1274
iio_push_to_buffers_with_timestamp(indio_dev, st->data, pf->timestamp);
1669
-
check_burst32:
1275
+
1276
+
return 0;
1277
+
}
1278
+
1279
+
static irqreturn_t adis16475_trigger_handler(int irq, void *p)
1280
+
{
1281
+
struct iio_poll_func *pf = p;
1282
+
struct iio_dev *indio_dev = pf->indio_dev;
1283
+
struct adis16475 *st = iio_priv(indio_dev);
1284
+
1285
+
adis16475_push_single_sample(pf);
1670
1286
/*
1671
1287
* We only check the burst mode at the end of the current capture since
1672
1288
* it takes a full data ready cycle for the device to update the burst
1673
1289
* array.
1674
1290
*/
1675
1291
adis16475_burst32_check(st);
1292
+
1293
+
iio_trigger_notify_done(indio_dev->trig);
1294
+
1295
+
return IRQ_HANDLED;
1296
+
}
1297
+
1298
+
/*
1299
+
* This function updates the first tx byte from the adis message based on the
1300
+
* given burst request.
1301
+
*/
1302
+
static void adis16575_update_msg_for_burst(struct adis *adis, u8 burst_req)
1303
+
{
1304
+
unsigned int burst_max_length;
1305
+
u8 *tx;
1306
+
1307
+
if (adis->data->burst_max_len)
1308
+
burst_max_length = adis->data->burst_max_len;
1309
+
else
1310
+
burst_max_length = adis->data->burst_len + adis->burst_extra_len;
1311
+
1312
+
tx = adis->buffer + burst_max_length;
1313
+
tx[0] = ADIS_READ_REG(burst_req);
1314
+
}
1315
+
1316
+
static int adis16575_custom_burst_read(struct iio_poll_func *pf, u8 burst_req)
1317
+
{
1318
+
struct iio_dev *indio_dev = pf->indio_dev;
1319
+
struct adis16475 *st = iio_priv(indio_dev);
1320
+
struct adis *adis = &st->adis;
1321
+
1322
+
adis16575_update_msg_for_burst(adis, burst_req);
1323
+
1324
+
if (burst_req)
1325
+
return spi_sync(adis->spi, &adis->msg);
1326
+
1327
+
return adis16475_push_single_sample(pf);
1328
+
}
1329
+
1330
+
/*
1331
+
* This handler is meant to be used for devices which support burst readings
1332
+
* from FIFO (namely devices from adis1657x family).
1333
+
* In order to pop the FIFO the 0x68 0x00 FIFO pop burst request has to be sent.
1334
+
* If the previous device command was not a FIFO pop burst request, the FIFO pop
1335
+
* burst request will simply pop the FIFO without returning valid data.
1336
+
* For the nth consecutive burst request, thedevice will send the data popped
1337
+
* with the (n-1)th consecutive burst request.
1338
+
* In order to read the data which was popped previously, without popping the
1339
+
* FIFO, the 0x00 0x00 burst request has to be sent.
1340
+
* If after a 0x68 0x00 FIFO pop burst request, there is any other device access
1341
+
* different from a 0x68 0x00 or a 0x00 0x00 burst request, the FIFO data popped
1342
+
* previously will be lost.
1343
+
*/
1344
+
static irqreturn_t adis16475_trigger_handler_with_fifo(int irq, void *p)
1345
+
{
1346
+
struct iio_poll_func *pf = p;
1347
+
struct iio_dev *indio_dev = pf->indio_dev;
1348
+
struct adis16475 *st = iio_priv(indio_dev);
1349
+
struct adis *adis = &st->adis;
1350
+
int ret;
1351
+
u16 fifo_cnt, i;
1352
+
1353
+
adis_dev_lock(&st->adis);
1354
+
1355
+
ret = __adis_read_reg_16(adis, ADIS16575_REG_FIFO_CNT, &fifo_cnt);
1356
+
if (ret)
1357
+
goto unlock;
1358
+
1359
+
/*
1360
+
* If no sample is available, nothing can be read. This can happen if
1361
+
* a the used trigger has a higher frequency than the selected sample rate.
1362
+
*/
1363
+
if (!fifo_cnt)
1364
+
goto unlock;
1365
+
1366
+
/*
1367
+
* First burst request - FIFO pop: popped data will be returned in the
1368
+
* next burst request.
1369
+
*/
1370
+
ret = adis16575_custom_burst_read(pf, adis->data->burst_reg_cmd);
1371
+
if (ret)
1372
+
goto unlock;
1373
+
1374
+
for (i = 0; i < fifo_cnt - 1; i++) {
1375
+
ret = adis16475_push_single_sample(pf);
1376
+
if (ret)
1377
+
goto unlock;
1378
+
}
1379
+
1380
+
/* FIFO read without popping */
1381
+
ret = adis16575_custom_burst_read(pf, 0);
1382
+
1383
+
unlock:
1384
+
/*
1385
+
* We only check the burst mode at the end of the current capture since
1386
+
* reading data from registers will impact the FIFO reading.
1387
+
*/
1388
+
adis16475_burst32_check(st);
1389
+
adis_dev_unlock(&st->adis);
1676
1390
iio_trigger_notify_done(indio_dev->trig);
1677
1391
1678
1392
return IRQ_HANDLED;
···
1793
1289
struct device *dev = &st->adis.spi->dev;
1794
1290
const struct adis16475_sync *sync;
1795
1291
u32 sync_mode;
1292
+
u16 max_sample_rate = st->info->int_clk + 100;
1796
1293
u16 val;
1294
+
1295
+
/* if available, enable 4khz internal clock */
1296
+
if (st->info->int_clk == 4000) {
1297
+
ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1298
+
ADIS16575_SYNC_4KHZ_MASK,
1299
+
(u16)ADIS16575_SYNC_4KHZ(1));
1300
+
if (ret)
1301
+
return ret;
1302
+
}
1797
1303
1798
1304
/* default to internal clk */
1799
1305
st->clk_freq = st->info->int_clk * 1000;
···
1843
1329
/*
1844
1330
* In sync scaled mode, the IMU sample rate is the clk_freq * sync_scale.
1845
1331
* Hence, default the IMU sample rate to the highest multiple of the input
1846
-
* clock lower than the IMU max sample rate. The optimal range is
1847
-
* 1900-2100 sps...
1332
+
* clock lower than the IMU max sample rate.
1848
1333
*/
1849
-
up_scale = 2100 / st->clk_freq;
1334
+
up_scale = max_sample_rate / st->clk_freq;
1850
1335
1851
1336
ret = __adis_write_reg_16(&st->adis,
1852
1337
ADIS16475_REG_UP_SCALE,
···
1883
1370
u8 polarity;
1884
1371
struct spi_device *spi = st->adis.spi;
1885
1372
1886
-
/*
1887
-
* It is possible to configure the data ready polarity. Furthermore, we
1888
-
* need to update the adis struct if we want data ready as active low.
1889
-
*/
1890
1373
irq_type = irq_get_trigger_type(spi->irq);
1891
-
if (irq_type == IRQ_TYPE_EDGE_RISING) {
1892
-
polarity = 1;
1893
-
st->adis.irq_flag = IRQF_TRIGGER_RISING;
1894
-
} else if (irq_type == IRQ_TYPE_EDGE_FALLING) {
1895
-
polarity = 0;
1896
-
st->adis.irq_flag = IRQF_TRIGGER_FALLING;
1897
-
} else {
1898
-
dev_err(&spi->dev, "Invalid interrupt type 0x%x specified\n",
1899
-
irq_type);
1900
-
return -EINVAL;
1901
-
}
1902
1374
1903
-
val = ADIS16475_MSG_CTRL_DR_POL(polarity);
1904
-
ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1905
-
ADIS16475_MSG_CTRL_DR_POL_MASK, val);
1906
-
if (ret)
1907
-
return ret;
1908
-
/*
1909
-
* There is a delay writing to any bits written to the MSC_CTRL
1910
-
* register. It should not be bigger than 200us, so 250 should be more
1911
-
* than enough!
1912
-
*/
1913
-
usleep_range(250, 260);
1375
+
if (st->adis.data->has_fifo) {
1376
+
/*
1377
+
* It is possible to configure the fifo watermark pin polarity.
1378
+
* Furthermore, we need to update the adis struct if we want the
1379
+
* watermark pin active low.
1380
+
*/
1381
+
if (irq_type == IRQ_TYPE_LEVEL_HIGH) {
1382
+
polarity = 1;
1383
+
st->adis.irq_flag = IRQF_TRIGGER_HIGH;
1384
+
} else if (irq_type == IRQ_TYPE_LEVEL_LOW) {
1385
+
polarity = 0;
1386
+
st->adis.irq_flag = IRQF_TRIGGER_LOW;
1387
+
} else {
1388
+
dev_err(&spi->dev, "Invalid interrupt type 0x%x specified\n",
1389
+
irq_type);
1390
+
return -EINVAL;
1391
+
}
1392
+
1393
+
/* Configure the watermark pin polarity. */
1394
+
val = ADIS16575_WM_POL(polarity);
1395
+
ret = adis_update_bits(&st->adis, ADIS16475_REG_FIFO_CTRL,
1396
+
ADIS16575_WM_POL_MASK, val);
1397
+
if (ret)
1398
+
return ret;
1399
+
1400
+
/* Enable watermark interrupt pin. */
1401
+
ret = adis_update_bits(&st->adis, ADIS16475_REG_FIFO_CTRL,
1402
+
ADIS16575_WM_EN_MASK,
1403
+
(u16)ADIS16575_WM_EN(1));
1404
+
if (ret)
1405
+
return ret;
1406
+
1407
+
} else {
1408
+
/*
1409
+
* It is possible to configure the data ready polarity. Furthermore, we
1410
+
* need to update the adis struct if we want data ready as active low.
1411
+
*/
1412
+
if (irq_type == IRQ_TYPE_EDGE_RISING) {
1413
+
polarity = 1;
1414
+
st->adis.irq_flag = IRQF_TRIGGER_RISING;
1415
+
} else if (irq_type == IRQ_TYPE_EDGE_FALLING) {
1416
+
polarity = 0;
1417
+
st->adis.irq_flag = IRQF_TRIGGER_FALLING;
1418
+
} else {
1419
+
dev_err(&spi->dev, "Invalid interrupt type 0x%x specified\n",
1420
+
irq_type);
1421
+
return -EINVAL;
1422
+
}
1423
+
1424
+
val = ADIS16475_MSG_CTRL_DR_POL(polarity);
1425
+
ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1426
+
ADIS16475_MSG_CTRL_DR_POL_MASK, val);
1427
+
if (ret)
1428
+
return ret;
1429
+
/*
1430
+
* There is a delay writing to any bits written to the MSC_CTRL
1431
+
* register. It should not be bigger than 200us, so 250 should be more
1432
+
* than enough!
1433
+
*/
1434
+
usleep_range(250, 260);
1435
+
}
1914
1436
1915
1437
return 0;
1916
1438
}
···
1956
1408
struct iio_dev *indio_dev;
1957
1409
struct adis16475 *st;
1958
1410
int ret;
1411
+
u16 val;
1959
1412
1960
1413
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
1961
1414
if (!indio_dev)
···
1975
1426
indio_dev->name = st->info->name;
1976
1427
indio_dev->channels = st->info->channels;
1977
1428
indio_dev->num_channels = st->info->num_channels;
1978
-
indio_dev->info = &adis16475_info;
1429
+
if (st->adis.data->has_fifo)
1430
+
indio_dev->info = &adis16575_info;
1431
+
else
1432
+
indio_dev->info = &adis16475_info;
1979
1433
indio_dev->modes = INDIO_DIRECT_MODE;
1980
1434
1981
1435
ret = __adis_initial_startup(&st->adis);
···
1993
1441
if (ret)
1994
1442
return ret;
1995
1443
1996
-
ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev,
1997
-
adis16475_trigger_handler);
1998
-
if (ret)
1999
-
return ret;
1444
+
if (st->adis.data->has_fifo) {
1445
+
ret = devm_adis_setup_buffer_and_trigger_with_attrs(&st->adis, indio_dev,
1446
+
adis16475_trigger_handler_with_fifo,
1447
+
&adis16475_buffer_ops,
1448
+
adis16475_fifo_attributes);
1449
+
if (ret)
1450
+
return ret;
1451
+
1452
+
/* Update overflow behavior to always overwrite the oldest sample. */
1453
+
val = ADIS16575_OVERWRITE_OLDEST;
1454
+
ret = adis_update_bits(&st->adis, ADIS16475_REG_FIFO_CTRL,
1455
+
ADIS16575_OVERFLOW_MASK, val);
1456
+
if (ret)
1457
+
return ret;
1458
+
} else {
1459
+
ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev,
1460
+
adis16475_trigger_handler);
1461
+
if (ret)
1462
+
return ret;
1463
+
}
2000
1464
2001
1465
ret = devm_iio_device_register(&spi->dev, indio_dev);
2002
1466
if (ret)
···
2052
1484
.data = &adis16475_chip_info[ADIS16467_3] },
2053
1485
{ .compatible = "adi,adis16500",
2054
1486
.data = &adis16475_chip_info[ADIS16500] },
1487
+
{ .compatible = "adi,adis16501",
1488
+
.data = &adis16475_chip_info[ADIS16501] },
2055
1489
{ .compatible = "adi,adis16505-1",
2056
1490
.data = &adis16475_chip_info[ADIS16505_1] },
2057
1491
{ .compatible = "adi,adis16505-2",
···
2066
1496
.data = &adis16475_chip_info[ADIS16507_2] },
2067
1497
{ .compatible = "adi,adis16507-3",
2068
1498
.data = &adis16475_chip_info[ADIS16507_3] },
1499
+
{ .compatible = "adi,adis16575-2",
1500
+
.data = &adis16475_chip_info[ADIS16575_2] },
1501
+
{ .compatible = "adi,adis16575-3",
1502
+
.data = &adis16475_chip_info[ADIS16575_3] },
1503
+
{ .compatible = "adi,adis16576-2",
1504
+
.data = &adis16475_chip_info[ADIS16576_2] },
1505
+
{ .compatible = "adi,adis16576-3",
1506
+
.data = &adis16475_chip_info[ADIS16576_3] },
1507
+
{ .compatible = "adi,adis16577-2",
1508
+
.data = &adis16475_chip_info[ADIS16577_2] },
1509
+
{ .compatible = "adi,adis16577-3",
1510
+
.data = &adis16475_chip_info[ADIS16577_3] },
2069
1511
{ },
2070
1512
};
2071
1513
MODULE_DEVICE_TABLE(of, adis16475_of_match);
···
2097
1515
{ "adis16467-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16467_2] },
2098
1516
{ "adis16467-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16467_3] },
2099
1517
{ "adis16500", (kernel_ulong_t)&adis16475_chip_info[ADIS16500] },
1518
+
{ "adis16501", (kernel_ulong_t)&adis16475_chip_info[ADIS16501] },
2100
1519
{ "adis16505-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16505_1] },
2101
1520
{ "adis16505-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16505_2] },
2102
1521
{ "adis16505-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16505_3] },
2103
1522
{ "adis16507-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16507_1] },
2104
1523
{ "adis16507-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16507_2] },
2105
1524
{ "adis16507-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16507_3] },
1525
+
{ "adis16575-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16575_2] },
1526
+
{ "adis16575-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16575_3] },
1527
+
{ "adis16576-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16576_2] },
1528
+
{ "adis16576-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16576_3] },
1529
+
{ "adis16577-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16577_2] },
1530
+
{ "adis16577-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16577_3] },
2106
1531
{ }
2107
1532
};
2108
1533
MODULE_DEVICE_TABLE(spi, adis16475_ids);
+343
-50
drivers/iio/imu/adis16480.c
+343
-50
drivers/iio/imu/adis16480.c
···
104
104
*/
105
105
#define ADIS16495_REG_SYNC_SCALE ADIS16480_REG(0x03, 0x10)
106
106
#define ADIS16495_REG_BURST_CMD ADIS16480_REG(0x00, 0x7C)
107
-
#define ADIS16495_BURST_ID 0xA5A5
107
+
#define ADIS16495_GYRO_ACCEL_BURST_ID 0xA5A5
108
+
#define ADIS16545_DELTA_ANG_VEL_BURST_ID 0xC3C3
108
109
/* total number of segments in burst */
109
110
#define ADIS16495_BURST_MAX_DATA 20
110
-
/* spi max speed in burst mode */
111
-
#define ADIS16495_BURST_MAX_SPEED 6000000
112
111
113
112
#define ADIS16480_REG_SERIAL_NUM ADIS16480_REG(0x04, 0x20)
114
113
···
133
134
#define ADIS16480_SYNC_MODE_MSK BIT(8)
134
135
#define ADIS16480_SYNC_MODE(x) FIELD_PREP(ADIS16480_SYNC_MODE_MSK, x)
135
136
137
+
#define ADIS16545_BURST_DATA_SEL_0_CHN_MASK GENMASK(5, 0)
138
+
#define ADIS16545_BURST_DATA_SEL_1_CHN_MASK GENMASK(16, 11)
139
+
#define ADIS16545_BURST_DATA_SEL_MASK BIT(8)
140
+
136
141
struct adis16480_chip_info {
137
142
unsigned int num_channels;
138
143
const struct iio_chan_spec *channels;
···
145
142
unsigned int accel_max_val;
146
143
unsigned int accel_max_scale;
147
144
unsigned int temp_scale;
145
+
unsigned int deltang_max_val;
146
+
unsigned int deltvel_max_val;
148
147
unsigned int int_clk;
149
148
unsigned int max_dec_rate;
150
149
const unsigned int *filter_freqs;
151
150
bool has_pps_clk_mode;
152
151
bool has_sleep_cnt;
152
+
bool has_burst_delta_data;
153
153
const struct adis_data adis_data;
154
154
};
155
155
···
176
170
struct clk *ext_clk;
177
171
enum adis16480_clock_mode clk_mode;
178
172
unsigned int clk_freq;
173
+
u16 burst_id;
179
174
/* Alignment needed for the timestamp */
180
175
__be16 data[ADIS16495_BURST_MAX_DATA] __aligned(8);
181
176
};
···
454
447
ADIS16480_SCAN_MAGN_Z,
455
448
ADIS16480_SCAN_BARO,
456
449
ADIS16480_SCAN_TEMP,
450
+
ADIS16480_SCAN_DELTANG_X,
451
+
ADIS16480_SCAN_DELTANG_Y,
452
+
ADIS16480_SCAN_DELTANG_Z,
453
+
ADIS16480_SCAN_DELTVEL_X,
454
+
ADIS16480_SCAN_DELTVEL_Y,
455
+
ADIS16480_SCAN_DELTVEL_Z,
457
456
};
458
457
459
458
static const unsigned int adis16480_calibbias_regs[] = {
···
703
690
*val = 131; /* 1310mbar = 131 kPa */
704
691
*val2 = 32767 << 16;
705
692
return IIO_VAL_FRACTIONAL;
693
+
case IIO_DELTA_ANGL:
694
+
*val = st->chip_info->deltang_max_val;
695
+
*val2 = 31;
696
+
return IIO_VAL_FRACTIONAL_LOG2;
697
+
case IIO_DELTA_VELOCITY:
698
+
*val = st->chip_info->deltvel_max_val;
699
+
*val2 = 31;
700
+
return IIO_VAL_FRACTIONAL_LOG2;
706
701
default:
707
702
return -EINVAL;
708
703
}
···
784
763
BIT(IIO_CHAN_INFO_CALIBSCALE), \
785
764
32)
786
765
766
+
#define ADIS16480_DELTANG_CHANNEL(_mod) \
767
+
ADIS16480_MOD_CHANNEL(IIO_DELTA_ANGL, IIO_MOD_ ## _mod, \
768
+
ADIS16480_REG_ ## _mod ## _DELTAANG_OUT, ADIS16480_SCAN_DELTANG_ ## _mod, \
769
+
0, 32)
770
+
771
+
#define ADIS16480_DELTANG_CHANNEL_NO_SCAN(_mod) \
772
+
ADIS16480_MOD_CHANNEL(IIO_DELTA_ANGL, IIO_MOD_ ## _mod, \
773
+
ADIS16480_REG_ ## _mod ## _DELTAANG_OUT, -1, 0, 32)
774
+
775
+
#define ADIS16480_DELTVEL_CHANNEL(_mod) \
776
+
ADIS16480_MOD_CHANNEL(IIO_DELTA_VELOCITY, IIO_MOD_ ## _mod, \
777
+
ADIS16480_REG_ ## _mod ## _DELTAVEL_OUT, ADIS16480_SCAN_DELTVEL_ ## _mod, \
778
+
0, 32)
779
+
780
+
#define ADIS16480_DELTVEL_CHANNEL_NO_SCAN(_mod) \
781
+
ADIS16480_MOD_CHANNEL(IIO_DELTA_VELOCITY, IIO_MOD_ ## _mod, \
782
+
ADIS16480_REG_ ## _mod ## _DELTAVEL_OUT, -1, 0, 32)
783
+
787
784
#define ADIS16480_MAGN_CHANNEL(_mod) \
788
785
ADIS16480_MOD_CHANNEL(IIO_MAGN, IIO_MOD_ ## _mod, \
789
786
ADIS16480_REG_ ## _mod ## _MAGN_OUT, ADIS16480_SCAN_MAGN_ ## _mod, \
···
857
818
ADIS16480_MAGN_CHANNEL(Z),
858
819
ADIS16480_PRESSURE_CHANNEL(),
859
820
ADIS16480_TEMP_CHANNEL(),
860
-
IIO_CHAN_SOFT_TIMESTAMP(11)
821
+
IIO_CHAN_SOFT_TIMESTAMP(11),
822
+
ADIS16480_DELTANG_CHANNEL_NO_SCAN(X),
823
+
ADIS16480_DELTANG_CHANNEL_NO_SCAN(Y),
824
+
ADIS16480_DELTANG_CHANNEL_NO_SCAN(Z),
825
+
ADIS16480_DELTVEL_CHANNEL_NO_SCAN(X),
826
+
ADIS16480_DELTVEL_CHANNEL_NO_SCAN(Y),
827
+
ADIS16480_DELTVEL_CHANNEL_NO_SCAN(Z),
861
828
};
862
829
863
830
static const struct iio_chan_spec adis16485_channels[] = {
···
874
829
ADIS16480_ACCEL_CHANNEL(Y),
875
830
ADIS16480_ACCEL_CHANNEL(Z),
876
831
ADIS16480_TEMP_CHANNEL(),
877
-
IIO_CHAN_SOFT_TIMESTAMP(7)
832
+
IIO_CHAN_SOFT_TIMESTAMP(7),
833
+
ADIS16480_DELTANG_CHANNEL_NO_SCAN(X),
834
+
ADIS16480_DELTANG_CHANNEL_NO_SCAN(Y),
835
+
ADIS16480_DELTANG_CHANNEL_NO_SCAN(Z),
836
+
ADIS16480_DELTVEL_CHANNEL_NO_SCAN(X),
837
+
ADIS16480_DELTVEL_CHANNEL_NO_SCAN(Y),
838
+
ADIS16480_DELTVEL_CHANNEL_NO_SCAN(Z),
839
+
};
840
+
841
+
static const struct iio_chan_spec adis16545_channels[] = {
842
+
ADIS16480_GYRO_CHANNEL(X),
843
+
ADIS16480_GYRO_CHANNEL(Y),
844
+
ADIS16480_GYRO_CHANNEL(Z),
845
+
ADIS16480_ACCEL_CHANNEL(X),
846
+
ADIS16480_ACCEL_CHANNEL(Y),
847
+
ADIS16480_ACCEL_CHANNEL(Z),
848
+
ADIS16480_TEMP_CHANNEL(),
849
+
ADIS16480_DELTANG_CHANNEL(X),
850
+
ADIS16480_DELTANG_CHANNEL(Y),
851
+
ADIS16480_DELTANG_CHANNEL(Z),
852
+
ADIS16480_DELTVEL_CHANNEL(X),
853
+
ADIS16480_DELTVEL_CHANNEL(Y),
854
+
ADIS16480_DELTVEL_CHANNEL(Z),
855
+
IIO_CHAN_SOFT_TIMESTAMP(17),
878
856
};
879
857
880
858
enum adis16480_variant {
···
912
844
ADIS16497_1,
913
845
ADIS16497_2,
914
846
ADIS16497_3,
847
+
ADIS16545_1,
848
+
ADIS16545_2,
849
+
ADIS16545_3,
850
+
ADIS16547_1,
851
+
ADIS16547_2,
852
+
ADIS16547_3
915
853
};
916
854
917
855
#define ADIS16480_DIAG_STAT_XGYRO_FAIL 0
···
946
872
947
873
static int adis16480_enable_irq(struct adis *adis, bool enable);
948
874
949
-
#define ADIS16480_DATA(_prod_id, _timeouts, _burst_len) \
950
-
{ \
951
-
.diag_stat_reg = ADIS16480_REG_DIAG_STS, \
952
-
.glob_cmd_reg = ADIS16480_REG_GLOB_CMD, \
953
-
.prod_id_reg = ADIS16480_REG_PROD_ID, \
954
-
.prod_id = (_prod_id), \
955
-
.has_paging = true, \
956
-
.read_delay = 5, \
957
-
.write_delay = 5, \
958
-
.self_test_mask = BIT(1), \
959
-
.self_test_reg = ADIS16480_REG_GLOB_CMD, \
960
-
.status_error_msgs = adis16480_status_error_msgs, \
961
-
.status_error_mask = BIT(ADIS16480_DIAG_STAT_XGYRO_FAIL) | \
962
-
BIT(ADIS16480_DIAG_STAT_YGYRO_FAIL) | \
963
-
BIT(ADIS16480_DIAG_STAT_ZGYRO_FAIL) | \
964
-
BIT(ADIS16480_DIAG_STAT_XACCL_FAIL) | \
965
-
BIT(ADIS16480_DIAG_STAT_YACCL_FAIL) | \
966
-
BIT(ADIS16480_DIAG_STAT_ZACCL_FAIL) | \
967
-
BIT(ADIS16480_DIAG_STAT_XMAGN_FAIL) | \
968
-
BIT(ADIS16480_DIAG_STAT_YMAGN_FAIL) | \
969
-
BIT(ADIS16480_DIAG_STAT_ZMAGN_FAIL) | \
970
-
BIT(ADIS16480_DIAG_STAT_BARO_FAIL), \
971
-
.enable_irq = adis16480_enable_irq, \
972
-
.timeouts = (_timeouts), \
973
-
.burst_reg_cmd = ADIS16495_REG_BURST_CMD, \
974
-
.burst_len = (_burst_len), \
975
-
.burst_max_speed_hz = ADIS16495_BURST_MAX_SPEED \
875
+
#define ADIS16480_DATA(_prod_id, _timeouts, _burst_len, _burst_max_speed) \
876
+
{ \
877
+
.diag_stat_reg = ADIS16480_REG_DIAG_STS, \
878
+
.glob_cmd_reg = ADIS16480_REG_GLOB_CMD, \
879
+
.prod_id_reg = ADIS16480_REG_PROD_ID, \
880
+
.prod_id = (_prod_id), \
881
+
.has_paging = true, \
882
+
.read_delay = 5, \
883
+
.write_delay = 5, \
884
+
.self_test_mask = BIT(1), \
885
+
.self_test_reg = ADIS16480_REG_GLOB_CMD, \
886
+
.status_error_msgs = adis16480_status_error_msgs, \
887
+
.status_error_mask = BIT(ADIS16480_DIAG_STAT_XGYRO_FAIL) | \
888
+
BIT(ADIS16480_DIAG_STAT_YGYRO_FAIL) | \
889
+
BIT(ADIS16480_DIAG_STAT_ZGYRO_FAIL) | \
890
+
BIT(ADIS16480_DIAG_STAT_XACCL_FAIL) | \
891
+
BIT(ADIS16480_DIAG_STAT_YACCL_FAIL) | \
892
+
BIT(ADIS16480_DIAG_STAT_ZACCL_FAIL) | \
893
+
BIT(ADIS16480_DIAG_STAT_XMAGN_FAIL) | \
894
+
BIT(ADIS16480_DIAG_STAT_YMAGN_FAIL) | \
895
+
BIT(ADIS16480_DIAG_STAT_ZMAGN_FAIL) | \
896
+
BIT(ADIS16480_DIAG_STAT_BARO_FAIL), \
897
+
.enable_irq = adis16480_enable_irq, \
898
+
.timeouts = (_timeouts), \
899
+
.burst_reg_cmd = ADIS16495_REG_BURST_CMD, \
900
+
.burst_len = (_burst_len), \
901
+
.burst_max_speed_hz = _burst_max_speed \
976
902
}
977
903
978
904
static const struct adis_timeout adis16485_timeouts = {
···
999
925
.self_test_ms = 20,
1000
926
};
1001
927
928
+
static const struct adis_timeout adis16545_timeouts = {
929
+
.reset_ms = 315,
930
+
.sw_reset_ms = 270,
931
+
.self_test_ms = 35,
932
+
};
933
+
1002
934
static const struct adis16480_chip_info adis16480_chip_info[] = {
1003
935
[ADIS16375] = {
1004
936
.channels = adis16485_channels,
···
1020
940
.accel_max_val = IIO_M_S_2_TO_G(21973 << 16),
1021
941
.accel_max_scale = 18,
1022
942
.temp_scale = 5650, /* 5.65 milli degree Celsius */
943
+
.deltang_max_val = IIO_DEGREE_TO_RAD(180),
944
+
.deltvel_max_val = 100,
1023
945
.int_clk = 2460000,
1024
946
.max_dec_rate = 2048,
1025
947
.has_sleep_cnt = true,
1026
948
.filter_freqs = adis16480_def_filter_freqs,
1027
-
.adis_data = ADIS16480_DATA(16375, &adis16485_timeouts, 0),
949
+
.adis_data = ADIS16480_DATA(16375, &adis16485_timeouts, 0, 0),
1028
950
},
1029
951
[ADIS16480] = {
1030
952
.channels = adis16480_channels,
···
1036
954
.accel_max_val = IIO_M_S_2_TO_G(12500 << 16),
1037
955
.accel_max_scale = 10,
1038
956
.temp_scale = 5650, /* 5.65 milli degree Celsius */
957
+
.deltang_max_val = IIO_DEGREE_TO_RAD(720),
958
+
.deltvel_max_val = 200,
1039
959
.int_clk = 2460000,
1040
960
.max_dec_rate = 2048,
1041
961
.has_sleep_cnt = true,
1042
962
.filter_freqs = adis16480_def_filter_freqs,
1043
-
.adis_data = ADIS16480_DATA(16480, &adis16480_timeouts, 0),
963
+
.adis_data = ADIS16480_DATA(16480, &adis16480_timeouts, 0, 0),
1044
964
},
1045
965
[ADIS16485] = {
1046
966
.channels = adis16485_channels,
···
1052
968
.accel_max_val = IIO_M_S_2_TO_G(20000 << 16),
1053
969
.accel_max_scale = 5,
1054
970
.temp_scale = 5650, /* 5.65 milli degree Celsius */
971
+
.deltang_max_val = IIO_DEGREE_TO_RAD(720),
972
+
.deltvel_max_val = 50,
1055
973
.int_clk = 2460000,
1056
974
.max_dec_rate = 2048,
1057
975
.has_sleep_cnt = true,
1058
976
.filter_freqs = adis16480_def_filter_freqs,
1059
-
.adis_data = ADIS16480_DATA(16485, &adis16485_timeouts, 0),
977
+
.adis_data = ADIS16480_DATA(16485, &adis16485_timeouts, 0, 0),
1060
978
},
1061
979
[ADIS16488] = {
1062
980
.channels = adis16480_channels,
···
1068
982
.accel_max_val = IIO_M_S_2_TO_G(22500 << 16),
1069
983
.accel_max_scale = 18,
1070
984
.temp_scale = 5650, /* 5.65 milli degree Celsius */
985
+
.deltang_max_val = IIO_DEGREE_TO_RAD(720),
986
+
.deltvel_max_val = 200,
1071
987
.int_clk = 2460000,
1072
988
.max_dec_rate = 2048,
1073
989
.has_sleep_cnt = true,
1074
990
.filter_freqs = adis16480_def_filter_freqs,
1075
-
.adis_data = ADIS16480_DATA(16488, &adis16485_timeouts, 0),
991
+
.adis_data = ADIS16480_DATA(16488, &adis16485_timeouts, 0, 0),
1076
992
},
1077
993
[ADIS16490] = {
1078
994
.channels = adis16485_channels,
···
1084
996
.accel_max_val = IIO_M_S_2_TO_G(16000 << 16),
1085
997
.accel_max_scale = 8,
1086
998
.temp_scale = 14285, /* 14.285 milli degree Celsius */
999
+
.deltang_max_val = IIO_DEGREE_TO_RAD(720),
1000
+
.deltvel_max_val = 200,
1087
1001
.int_clk = 4250000,
1088
1002
.max_dec_rate = 4250,
1089
1003
.filter_freqs = adis16495_def_filter_freqs,
1090
1004
.has_pps_clk_mode = true,
1091
-
.adis_data = ADIS16480_DATA(16490, &adis16495_timeouts, 0),
1005
+
.adis_data = ADIS16480_DATA(16490, &adis16495_timeouts, 0, 0),
1092
1006
},
1093
1007
[ADIS16495_1] = {
1094
1008
.channels = adis16485_channels,
···
1100
1010
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1101
1011
.accel_max_scale = 8,
1102
1012
.temp_scale = 12500, /* 12.5 milli degree Celsius */
1013
+
.deltang_max_val = IIO_DEGREE_TO_RAD(360),
1014
+
.deltvel_max_val = 100,
1103
1015
.int_clk = 4250000,
1104
1016
.max_dec_rate = 4250,
1105
1017
.filter_freqs = adis16495_def_filter_freqs,
1106
1018
.has_pps_clk_mode = true,
1107
1019
/* 20 elements of 16bits */
1108
1020
.adis_data = ADIS16480_DATA(16495, &adis16495_1_timeouts,
1109
-
ADIS16495_BURST_MAX_DATA * 2),
1021
+
ADIS16495_BURST_MAX_DATA * 2,
1022
+
6000000),
1110
1023
},
1111
1024
[ADIS16495_2] = {
1112
1025
.channels = adis16485_channels,
···
1119
1026
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1120
1027
.accel_max_scale = 8,
1121
1028
.temp_scale = 12500, /* 12.5 milli degree Celsius */
1029
+
.deltang_max_val = IIO_DEGREE_TO_RAD(720),
1030
+
.deltvel_max_val = 100,
1122
1031
.int_clk = 4250000,
1123
1032
.max_dec_rate = 4250,
1124
1033
.filter_freqs = adis16495_def_filter_freqs,
1125
1034
.has_pps_clk_mode = true,
1126
1035
/* 20 elements of 16bits */
1127
1036
.adis_data = ADIS16480_DATA(16495, &adis16495_1_timeouts,
1128
-
ADIS16495_BURST_MAX_DATA * 2),
1037
+
ADIS16495_BURST_MAX_DATA * 2,
1038
+
6000000),
1129
1039
},
1130
1040
[ADIS16495_3] = {
1131
1041
.channels = adis16485_channels,
···
1138
1042
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1139
1043
.accel_max_scale = 8,
1140
1044
.temp_scale = 12500, /* 12.5 milli degree Celsius */
1045
+
.deltang_max_val = IIO_DEGREE_TO_RAD(2160),
1046
+
.deltvel_max_val = 100,
1141
1047
.int_clk = 4250000,
1142
1048
.max_dec_rate = 4250,
1143
1049
.filter_freqs = adis16495_def_filter_freqs,
1144
1050
.has_pps_clk_mode = true,
1145
1051
/* 20 elements of 16bits */
1146
1052
.adis_data = ADIS16480_DATA(16495, &adis16495_1_timeouts,
1147
-
ADIS16495_BURST_MAX_DATA * 2),
1053
+
ADIS16495_BURST_MAX_DATA * 2,
1054
+
6000000),
1148
1055
},
1149
1056
[ADIS16497_1] = {
1150
1057
.channels = adis16485_channels,
···
1157
1058
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1158
1059
.accel_max_scale = 40,
1159
1060
.temp_scale = 12500, /* 12.5 milli degree Celsius */
1061
+
.deltang_max_val = IIO_DEGREE_TO_RAD(360),
1062
+
.deltvel_max_val = 400,
1160
1063
.int_clk = 4250000,
1161
1064
.max_dec_rate = 4250,
1162
1065
.filter_freqs = adis16495_def_filter_freqs,
1163
1066
.has_pps_clk_mode = true,
1164
1067
/* 20 elements of 16bits */
1165
1068
.adis_data = ADIS16480_DATA(16497, &adis16495_1_timeouts,
1166
-
ADIS16495_BURST_MAX_DATA * 2),
1069
+
ADIS16495_BURST_MAX_DATA * 2,
1070
+
6000000),
1167
1071
},
1168
1072
[ADIS16497_2] = {
1169
1073
.channels = adis16485_channels,
···
1176
1074
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1177
1075
.accel_max_scale = 40,
1178
1076
.temp_scale = 12500, /* 12.5 milli degree Celsius */
1077
+
.deltang_max_val = IIO_DEGREE_TO_RAD(720),
1078
+
.deltvel_max_val = 400,
1179
1079
.int_clk = 4250000,
1180
1080
.max_dec_rate = 4250,
1181
1081
.filter_freqs = adis16495_def_filter_freqs,
1182
1082
.has_pps_clk_mode = true,
1183
1083
/* 20 elements of 16bits */
1184
1084
.adis_data = ADIS16480_DATA(16497, &adis16495_1_timeouts,
1185
-
ADIS16495_BURST_MAX_DATA * 2),
1085
+
ADIS16495_BURST_MAX_DATA * 2,
1086
+
6000000),
1186
1087
},
1187
1088
[ADIS16497_3] = {
1188
1089
.channels = adis16485_channels,
···
1195
1090
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1196
1091
.accel_max_scale = 40,
1197
1092
.temp_scale = 12500, /* 12.5 milli degree Celsius */
1093
+
.deltang_max_val = IIO_DEGREE_TO_RAD(2160),
1094
+
.deltvel_max_val = 400,
1198
1095
.int_clk = 4250000,
1199
1096
.max_dec_rate = 4250,
1200
1097
.filter_freqs = adis16495_def_filter_freqs,
1201
1098
.has_pps_clk_mode = true,
1202
1099
/* 20 elements of 16bits */
1203
1100
.adis_data = ADIS16480_DATA(16497, &adis16495_1_timeouts,
1204
-
ADIS16495_BURST_MAX_DATA * 2),
1101
+
ADIS16495_BURST_MAX_DATA * 2,
1102
+
6000000),
1103
+
},
1104
+
[ADIS16545_1] = {
1105
+
.channels = adis16545_channels,
1106
+
.num_channels = ARRAY_SIZE(adis16545_channels),
1107
+
.gyro_max_val = 20000 << 16,
1108
+
.gyro_max_scale = IIO_DEGREE_TO_RAD(125),
1109
+
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1110
+
.accel_max_scale = 8,
1111
+
.temp_scale = 7000, /* 7 milli degree Celsius */
1112
+
.deltang_max_val = IIO_DEGREE_TO_RAD(360),
1113
+
.deltvel_max_val = 100,
1114
+
.int_clk = 4250000,
1115
+
.max_dec_rate = 4250,
1116
+
.filter_freqs = adis16495_def_filter_freqs,
1117
+
.has_pps_clk_mode = true,
1118
+
.has_burst_delta_data = true,
1119
+
/* 20 elements of 16bits */
1120
+
.adis_data = ADIS16480_DATA(16545, &adis16545_timeouts,
1121
+
ADIS16495_BURST_MAX_DATA * 2,
1122
+
6500000),
1123
+
},
1124
+
[ADIS16545_2] = {
1125
+
.channels = adis16545_channels,
1126
+
.num_channels = ARRAY_SIZE(adis16545_channels),
1127
+
.gyro_max_val = 18000 << 16,
1128
+
.gyro_max_scale = IIO_DEGREE_TO_RAD(450),
1129
+
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1130
+
.accel_max_scale = 8,
1131
+
.temp_scale = 7000, /* 7 milli degree Celsius */
1132
+
.deltang_max_val = IIO_DEGREE_TO_RAD(720),
1133
+
.deltvel_max_val = 100,
1134
+
.int_clk = 4250000,
1135
+
.max_dec_rate = 4250,
1136
+
.filter_freqs = adis16495_def_filter_freqs,
1137
+
.has_pps_clk_mode = true,
1138
+
.has_burst_delta_data = true,
1139
+
/* 20 elements of 16bits */
1140
+
.adis_data = ADIS16480_DATA(16545, &adis16545_timeouts,
1141
+
ADIS16495_BURST_MAX_DATA * 2,
1142
+
6500000),
1143
+
},
1144
+
[ADIS16545_3] = {
1145
+
.channels = adis16545_channels,
1146
+
.num_channels = ARRAY_SIZE(adis16545_channels),
1147
+
.gyro_max_val = 20000 << 16,
1148
+
.gyro_max_scale = IIO_DEGREE_TO_RAD(2000),
1149
+
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1150
+
.accel_max_scale = 8,
1151
+
.temp_scale = 7000, /* 7 milli degree Celsius */
1152
+
.deltang_max_val = IIO_DEGREE_TO_RAD(2160),
1153
+
.deltvel_max_val = 100,
1154
+
.int_clk = 4250000,
1155
+
.max_dec_rate = 4250,
1156
+
.filter_freqs = adis16495_def_filter_freqs,
1157
+
.has_pps_clk_mode = true,
1158
+
.has_burst_delta_data = true,
1159
+
/* 20 elements of 16bits */
1160
+
.adis_data = ADIS16480_DATA(16545, &adis16545_timeouts,
1161
+
ADIS16495_BURST_MAX_DATA * 2,
1162
+
6500000),
1163
+
},
1164
+
[ADIS16547_1] = {
1165
+
.channels = adis16545_channels,
1166
+
.num_channels = ARRAY_SIZE(adis16545_channels),
1167
+
.gyro_max_val = 20000 << 16,
1168
+
.gyro_max_scale = IIO_DEGREE_TO_RAD(125),
1169
+
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1170
+
.accel_max_scale = 40,
1171
+
.temp_scale = 7000, /* 7 milli degree Celsius */
1172
+
.deltang_max_val = IIO_DEGREE_TO_RAD(360),
1173
+
.deltvel_max_val = 400,
1174
+
.int_clk = 4250000,
1175
+
.max_dec_rate = 4250,
1176
+
.filter_freqs = adis16495_def_filter_freqs,
1177
+
.has_pps_clk_mode = true,
1178
+
.has_burst_delta_data = true,
1179
+
/* 20 elements of 16bits */
1180
+
.adis_data = ADIS16480_DATA(16547, &adis16545_timeouts,
1181
+
ADIS16495_BURST_MAX_DATA * 2,
1182
+
6500000),
1183
+
},
1184
+
[ADIS16547_2] = {
1185
+
.channels = adis16545_channels,
1186
+
.num_channels = ARRAY_SIZE(adis16545_channels),
1187
+
.gyro_max_val = 18000 << 16,
1188
+
.gyro_max_scale = IIO_DEGREE_TO_RAD(450),
1189
+
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1190
+
.accel_max_scale = 40,
1191
+
.temp_scale = 7000, /* 7 milli degree Celsius */
1192
+
.deltang_max_val = IIO_DEGREE_TO_RAD(720),
1193
+
.deltvel_max_val = 400,
1194
+
.int_clk = 4250000,
1195
+
.max_dec_rate = 4250,
1196
+
.filter_freqs = adis16495_def_filter_freqs,
1197
+
.has_pps_clk_mode = true,
1198
+
.has_burst_delta_data = true,
1199
+
/* 20 elements of 16bits */
1200
+
.adis_data = ADIS16480_DATA(16547, &adis16545_timeouts,
1201
+
ADIS16495_BURST_MAX_DATA * 2,
1202
+
6500000),
1203
+
},
1204
+
[ADIS16547_3] = {
1205
+
.channels = adis16545_channels,
1206
+
.num_channels = ARRAY_SIZE(adis16545_channels),
1207
+
.gyro_max_val = 20000 << 16,
1208
+
.gyro_max_scale = IIO_DEGREE_TO_RAD(2000),
1209
+
.accel_max_val = IIO_M_S_2_TO_G(32000 << 16),
1210
+
.accel_max_scale = 40,
1211
+
.temp_scale = 7000, /* 7 milli degree Celsius */
1212
+
.deltang_max_val = IIO_DEGREE_TO_RAD(2160),
1213
+
.deltvel_max_val = 400,
1214
+
.int_clk = 4250000,
1215
+
.max_dec_rate = 4250,
1216
+
.filter_freqs = adis16495_def_filter_freqs,
1217
+
.has_pps_clk_mode = true,
1218
+
.has_burst_delta_data = true,
1219
+
/* 20 elements of 16bits */
1220
+
.adis_data = ADIS16480_DATA(16547, &adis16545_timeouts,
1221
+
ADIS16495_BURST_MAX_DATA * 2,
1222
+
6500000),
1205
1223
},
1206
1224
};
1207
1225
···
1350
1122
struct adis16480 *st = iio_priv(indio_dev);
1351
1123
struct adis *adis = &st->adis;
1352
1124
struct device *dev = &adis->spi->dev;
1353
-
int ret, bit, offset, i = 0;
1125
+
int ret, bit, offset, i = 0, buff_offset = 0;
1354
1126
__be16 *buffer;
1355
1127
u32 crc;
1356
1128
bool valid;
···
1383
1155
* 16-bit responses containing the BURST_ID depending on the sclk. If
1384
1156
* clk > 3.6MHz, then we will have two BURST_ID in a row. If clk < 3MHZ,
1385
1157
* we have only one. To manage that variation, we use the transition from the
1386
-
* BURST_ID to the SYS_E_FLAG register, which will not be equal to 0xA5A5. If
1387
-
* we not find this variation in the first 4 segments, then the data should
1158
+
* BURST_ID to the SYS_E_FLAG register, which will not be equal to 0xA5A5/0xC3C3.
1159
+
* If we not find this variation in the first 4 segments, then the data should
1388
1160
* not be valid.
1389
1161
*/
1390
1162
buffer = adis->buffer;
···
1392
1164
u16 curr = be16_to_cpu(buffer[offset]);
1393
1165
u16 next = be16_to_cpu(buffer[offset + 1]);
1394
1166
1395
-
if (curr == ADIS16495_BURST_ID && next != ADIS16495_BURST_ID) {
1167
+
if (curr == st->burst_id && next != st->burst_id) {
1396
1168
offset++;
1397
1169
break;
1398
1170
}
···
1419
1191
switch (bit) {
1420
1192
case ADIS16480_SCAN_TEMP:
1421
1193
st->data[i++] = buffer[offset + 1];
1194
+
/*
1195
+
* The temperature channel has 16-bit storage size.
1196
+
* We need to perform the padding to have the buffer
1197
+
* elements naturally aligned in case there are any
1198
+
* 32-bit storage size channels enabled which are added
1199
+
* in the buffer after the temprature data. In case
1200
+
* there is no data being added after the temperature
1201
+
* data, the padding is harmless.
1202
+
*/
1203
+
st->data[i++] = 0;
1422
1204
break;
1205
+
case ADIS16480_SCAN_DELTANG_X ... ADIS16480_SCAN_DELTVEL_Z:
1206
+
buff_offset = ADIS16480_SCAN_DELTANG_X;
1207
+
fallthrough;
1423
1208
case ADIS16480_SCAN_GYRO_X ... ADIS16480_SCAN_ACCEL_Z:
1424
1209
/* The lower register data is sequenced first */
1425
-
st->data[i++] = buffer[2 * bit + offset + 3];
1426
-
st->data[i++] = buffer[2 * bit + offset + 2];
1210
+
st->data[i++] = buffer[2 * (bit - buff_offset) + offset + 3];
1211
+
st->data[i++] = buffer[2 * (bit - buff_offset) + offset + 2];
1427
1212
break;
1428
1213
}
1429
1214
}
···
1448
1207
return IRQ_HANDLED;
1449
1208
}
1450
1209
1210
+
static const unsigned long adis16545_channel_masks[] = {
1211
+
ADIS16545_BURST_DATA_SEL_0_CHN_MASK | BIT(ADIS16480_SCAN_TEMP) | BIT(17),
1212
+
ADIS16545_BURST_DATA_SEL_1_CHN_MASK | BIT(ADIS16480_SCAN_TEMP) | BIT(17),
1213
+
0,
1214
+
};
1215
+
1216
+
static int adis16480_update_scan_mode(struct iio_dev *indio_dev,
1217
+
const unsigned long *scan_mask)
1218
+
{
1219
+
u16 en;
1220
+
int ret;
1221
+
struct adis16480 *st = iio_priv(indio_dev);
1222
+
1223
+
if (st->chip_info->has_burst_delta_data) {
1224
+
if (*scan_mask & ADIS16545_BURST_DATA_SEL_0_CHN_MASK) {
1225
+
en = FIELD_PREP(ADIS16545_BURST_DATA_SEL_MASK, 0);
1226
+
st->burst_id = ADIS16495_GYRO_ACCEL_BURST_ID;
1227
+
} else {
1228
+
en = FIELD_PREP(ADIS16545_BURST_DATA_SEL_MASK, 1);
1229
+
st->burst_id = ADIS16545_DELTA_ANG_VEL_BURST_ID;
1230
+
}
1231
+
1232
+
ret = __adis_update_bits(&st->adis, ADIS16480_REG_CONFIG,
1233
+
ADIS16545_BURST_DATA_SEL_MASK, en);
1234
+
if (ret)
1235
+
return ret;
1236
+
}
1237
+
1238
+
return adis_update_scan_mode(indio_dev, scan_mask);
1239
+
}
1240
+
1451
1241
static const struct iio_info adis16480_info = {
1452
1242
.read_raw = &adis16480_read_raw,
1453
1243
.write_raw = &adis16480_write_raw,
1454
-
.update_scan_mode = adis_update_scan_mode,
1244
+
.update_scan_mode = &adis16480_update_scan_mode,
1455
1245
.debugfs_reg_access = adis_debugfs_reg_access,
1456
1246
};
1457
1247
···
1679
1407
indio_dev->name = spi_get_device_id(spi)->name;
1680
1408
indio_dev->channels = st->chip_info->channels;
1681
1409
indio_dev->num_channels = st->chip_info->num_channels;
1410
+
if (st->chip_info->has_burst_delta_data)
1411
+
indio_dev->available_scan_masks = adis16545_channel_masks;
1682
1412
indio_dev->info = &adis16480_info;
1683
1413
indio_dev->modes = INDIO_DIRECT_MODE;
1684
1414
···
1693
1419
ret = __adis_initial_startup(&st->adis);
1694
1420
if (ret)
1695
1421
return ret;
1422
+
1423
+
/*
1424
+
* By default, use burst id for gyroscope and accelerometer data.
1425
+
* This is the only option for devices which do not offer delta angle
1426
+
* and delta velocity burst readings.
1427
+
*/
1428
+
st->burst_id = ADIS16495_GYRO_ACCEL_BURST_ID;
1696
1429
1697
1430
if (st->chip_info->has_sleep_cnt) {
1698
1431
ret = devm_add_action_or_reset(dev, adis16480_stop, indio_dev);
···
1774
1493
{ "adis16497-1", ADIS16497_1 },
1775
1494
{ "adis16497-2", ADIS16497_2 },
1776
1495
{ "adis16497-3", ADIS16497_3 },
1496
+
{ "adis16545-1", ADIS16545_1 },
1497
+
{ "adis16545-2", ADIS16545_2 },
1498
+
{ "adis16545-3", ADIS16545_3 },
1499
+
{ "adis16547-1", ADIS16547_1 },
1500
+
{ "adis16547-2", ADIS16547_2 },
1501
+
{ "adis16547-3", ADIS16547_3 },
1777
1502
{ }
1778
1503
};
1779
1504
MODULE_DEVICE_TABLE(spi, adis16480_ids);
···
1796
1509
{ .compatible = "adi,adis16497-1" },
1797
1510
{ .compatible = "adi,adis16497-2" },
1798
1511
{ .compatible = "adi,adis16497-3" },
1512
+
{ .compatible = "adi,adis16545-1" },
1513
+
{ .compatible = "adi,adis16545-2" },
1514
+
{ .compatible = "adi,adis16545-3" },
1515
+
{ .compatible = "adi,adis16547-1" },
1516
+
{ .compatible = "adi,adis16547-2" },
1517
+
{ .compatible = "adi,adis16547-3" },
1799
1518
{ },
1800
1519
};
1801
1520
MODULE_DEVICE_TABLE(of, adis16480_of_match);
+18
-14
drivers/iio/imu/adis_buffer.c
+18
-14
drivers/iio/imu/adis_buffer.c
···
175
175
}
176
176
177
177
/**
178
-
* devm_adis_setup_buffer_and_trigger() - Sets up buffer and trigger for
179
-
* the managed adis device
178
+
* devm_adis_setup_buffer_and_trigger_with_attrs() - Sets up buffer and trigger
179
+
* for the managed adis device with buffer attributes.
180
180
* @adis: The adis device
181
181
* @indio_dev: The IIO device
182
-
* @trigger_handler: Optional trigger handler, may be NULL.
182
+
* @trigger_handler: Trigger handler: should handle the buffer readings.
183
+
* @ops: Optional buffer setup functions, may be NULL.
184
+
* @buffer_attrs: Extra buffer attributes.
183
185
*
184
186
* Returns 0 on success, a negative error code otherwise.
185
187
*
186
-
* This function sets up the buffer and trigger for a adis devices. If
187
-
* 'trigger_handler' is NULL the default trigger handler will be used. The
188
-
* default trigger handler will simply read the registers assigned to the
189
-
* currently active channels.
188
+
* This function sets up the buffer (with buffer setup functions and extra
189
+
* buffer attributes) and trigger for a adis devices with buffer attributes.
190
190
*/
191
191
int
192
-
devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
193
-
irq_handler_t trigger_handler)
192
+
devm_adis_setup_buffer_and_trigger_with_attrs(struct adis *adis, struct iio_dev *indio_dev,
193
+
irq_handler_t trigger_handler,
194
+
const struct iio_buffer_setup_ops *ops,
195
+
const struct iio_dev_attr **buffer_attrs)
194
196
{
195
197
int ret;
196
198
197
199
if (!trigger_handler)
198
200
trigger_handler = adis_trigger_handler;
199
201
200
-
ret = devm_iio_triggered_buffer_setup(&adis->spi->dev, indio_dev,
201
-
&iio_pollfunc_store_time,
202
-
trigger_handler, NULL);
202
+
ret = devm_iio_triggered_buffer_setup_ext(&adis->spi->dev, indio_dev,
203
+
&iio_pollfunc_store_time,
204
+
trigger_handler,
205
+
IIO_BUFFER_DIRECTION_IN,
206
+
ops,
207
+
buffer_attrs);
203
208
if (ret)
204
209
return ret;
205
210
···
217
212
return devm_add_action_or_reset(&adis->spi->dev, adis_buffer_cleanup,
218
213
adis);
219
214
}
220
-
EXPORT_SYMBOL_NS_GPL(devm_adis_setup_buffer_and_trigger, IIO_ADISLIB);
221
-
215
+
EXPORT_SYMBOL_NS_GPL(devm_adis_setup_buffer_and_trigger_with_attrs, IIO_ADISLIB);
+26
-11
drivers/iio/imu/adis_trigger.c
+26
-11
drivers/iio/imu/adis_trigger.c
···
34
34
if (adis->data->unmasked_drdy)
35
35
adis->irq_flag |= IRQF_NO_AUTOEN;
36
36
/*
37
-
* Typically this devices have data ready either on the rising edge or
38
-
* on the falling edge of the data ready pin. This checks enforces that
39
-
* one of those is set in the drivers... It defaults to
40
-
* IRQF_TRIGGER_RISING for backward compatibility with devices that
41
-
* don't support changing the pin polarity.
37
+
* Typically adis devices without FIFO have data ready either on the
38
+
* rising edge or on the falling edge of the data ready pin.
39
+
* IMU devices with FIFO support have the watermark pin level driven
40
+
* either high or low when the FIFO is filled with the desired number
41
+
* of samples.
42
+
* It defaults to IRQF_TRIGGER_RISING for backward compatibility with
43
+
* devices that don't support changing the pin polarity.
42
44
*/
43
45
if (direction == IRQF_TRIGGER_NONE) {
44
46
adis->irq_flag |= IRQF_TRIGGER_RISING;
45
47
return 0;
46
48
} else if (direction != IRQF_TRIGGER_RISING &&
47
-
direction != IRQF_TRIGGER_FALLING) {
49
+
direction != IRQF_TRIGGER_FALLING && !adis->data->has_fifo) {
50
+
dev_err(&adis->spi->dev, "Invalid IRQ mask: %08lx\n",
51
+
adis->irq_flag);
52
+
return -EINVAL;
53
+
} else if (direction != IRQF_TRIGGER_HIGH &&
54
+
direction != IRQF_TRIGGER_LOW && adis->data->has_fifo) {
48
55
dev_err(&adis->spi->dev, "Invalid IRQ mask: %08lx\n",
49
56
adis->irq_flag);
50
57
return -EINVAL;
···
84
77
if (ret)
85
78
return ret;
86
79
87
-
ret = devm_request_irq(&adis->spi->dev, adis->spi->irq,
88
-
&iio_trigger_generic_data_rdy_poll,
89
-
adis->irq_flag,
90
-
indio_dev->name,
91
-
adis->trig);
80
+
if (adis->data->has_fifo)
81
+
ret = devm_request_threaded_irq(&adis->spi->dev, adis->spi->irq,
82
+
NULL,
83
+
&iio_trigger_generic_data_rdy_poll,
84
+
adis->irq_flag | IRQF_ONESHOT,
85
+
indio_dev->name,
86
+
adis->trig);
87
+
else
88
+
ret = devm_request_irq(&adis->spi->dev, adis->spi->irq,
89
+
&iio_trigger_generic_data_rdy_poll,
90
+
adis->irq_flag,
91
+
indio_dev->name,
92
+
adis->trig);
92
93
if (ret)
93
94
return ret;
94
95
+20
-6
drivers/iio/imu/bmi160/bmi160_core.c
+20
-6
drivers/iio/imu/bmi160/bmi160_core.c
···
26
26
#include "bmi160.h"
27
27
28
28
#define BMI160_REG_CHIP_ID 0x00
29
+
#define BMI120_CHIP_ID_VAL 0xD3
29
30
#define BMI160_CHIP_ID_VAL 0xD1
30
31
31
32
#define BMI160_REG_PMU_STATUS 0x03
···
112
111
}, \
113
112
.ext_info = bmi160_ext_info, \
114
113
}
114
+
115
+
static const u8 bmi_chip_ids[] = {
116
+
BMI120_CHIP_ID_VAL,
117
+
BMI160_CHIP_ID_VAL,
118
+
};
115
119
116
120
/* scan indexes follow DATA register order */
117
121
enum bmi160_scan_axis {
···
710
704
return bmi160_probe_trigger(indio_dev, irq, irq_type);
711
705
}
712
706
707
+
static int bmi160_check_chip_id(const u8 chip_id)
708
+
{
709
+
for (int i = 0; i < ARRAY_SIZE(bmi_chip_ids); i++) {
710
+
if (chip_id == bmi_chip_ids[i])
711
+
return 0;
712
+
}
713
+
714
+
return -ENODEV;
715
+
}
716
+
713
717
static int bmi160_chip_init(struct bmi160_data *data, bool use_spi)
714
718
{
715
719
int ret;
···
753
737
dev_err(dev, "Error reading chip id\n");
754
738
goto disable_regulator;
755
739
}
756
-
if (val != BMI160_CHIP_ID_VAL) {
757
-
dev_err(dev, "Wrong chip id, got %x expected %x\n",
758
-
val, BMI160_CHIP_ID_VAL);
759
-
ret = -ENODEV;
760
-
goto disable_regulator;
761
-
}
740
+
741
+
ret = bmi160_check_chip_id(val);
742
+
if (ret)
743
+
dev_warn(dev, "Chip id not found: %x\n", val);
762
744
763
745
ret = bmi160_set_mode(data, BMI160_ACCEL, true);
764
746
if (ret)
+4
-1
drivers/iio/imu/bmi160/bmi160_i2c.c
+4
-1
drivers/iio/imu/bmi160/bmi160_i2c.c
···
37
37
}
38
38
39
39
static const struct i2c_device_id bmi160_i2c_id[] = {
40
-
{"bmi160", 0},
40
+
{ "bmi120" },
41
+
{ "bmi160" },
41
42
{}
42
43
};
43
44
MODULE_DEVICE_TABLE(i2c, bmi160_i2c_id);
···
53
52
* the affected devices are from 2021/2022.
54
53
*/
55
54
{"10EC5280", 0},
55
+
{"BMI0120", 0},
56
56
{"BMI0160", 0},
57
57
{ },
58
58
};
59
59
MODULE_DEVICE_TABLE(acpi, bmi160_acpi_match);
60
60
61
61
static const struct of_device_id bmi160_of_match[] = {
62
+
{ .compatible = "bosch,bmi120" },
62
63
{ .compatible = "bosch,bmi160" },
63
64
{ },
64
65
};
+3
drivers/iio/imu/bmi160/bmi160_spi.c
+3
drivers/iio/imu/bmi160/bmi160_spi.c
···
34
34
}
35
35
36
36
static const struct spi_device_id bmi160_spi_id[] = {
37
+
{"bmi120", 0},
37
38
{"bmi160", 0},
38
39
{}
39
40
};
40
41
MODULE_DEVICE_TABLE(spi, bmi160_spi_id);
41
42
42
43
static const struct acpi_device_id bmi160_acpi_match[] = {
44
+
{"BMI0120", 0},
43
45
{"BMI0160", 0},
44
46
{ },
45
47
};
46
48
MODULE_DEVICE_TABLE(acpi, bmi160_acpi_match);
47
49
48
50
static const struct of_device_id bmi160_of_match[] = {
51
+
{ .compatible = "bosch,bmi120" },
49
52
{ .compatible = "bosch,bmi160" },
50
53
{ },
51
54
};
+5
-3
drivers/iio/imu/bmi323/bmi323_core.c
+5
-3
drivers/iio/imu/bmi323/bmi323_core.c
···
2083
2083
if (ret)
2084
2084
return -EINVAL;
2085
2085
2086
-
ret = iio_read_mount_matrix(dev, &data->orientation);
2087
-
if (ret)
2088
-
return ret;
2086
+
if (!iio_read_acpi_mount_matrix(dev, &data->orientation, "ROTM")) {
2087
+
ret = iio_read_mount_matrix(dev, &data->orientation);
2088
+
if (ret)
2089
+
return ret;
2090
+
}
2089
2091
2090
2092
indio_dev->name = "bmi323-imu";
2091
2093
indio_dev->info = &bmi323_info;
+1
-1
drivers/iio/imu/bno055/bno055_i2c.c
+1
-1
drivers/iio/imu/bno055/bno055_i2c.c
+1
-1
drivers/iio/imu/fxos8700_i2c.c
+1
-1
drivers/iio/imu/fxos8700_i2c.c
+4
drivers/iio/imu/inv_icm42600/inv_icm42600.h
+4
drivers/iio/imu/inv_icm42600/inv_icm42600.h
···
177
177
* struct inv_icm42600_sensor_state - sensor state variables
178
178
* @scales: table of scales.
179
179
* @scales_len: length (nb of items) of the scales table.
180
+
* @power_mode: sensor requested power mode (for common frequencies)
181
+
* @filter: sensor filter.
180
182
* @ts: timestamp module states.
181
183
*/
182
184
struct inv_icm42600_sensor_state {
183
185
const int *scales;
184
186
size_t scales_len;
187
+
enum inv_icm42600_sensor_mode power_mode;
188
+
enum inv_icm42600_filter filter;
185
189
struct inv_sensors_timestamp ts;
186
190
};
187
191
+120
-4
drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c
+120
-4
drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c
···
55
55
INV_ICM42600_ACCEL_SCAN_TIMESTAMP,
56
56
};
57
57
58
+
static const char * const inv_icm42600_accel_power_mode_items[] = {
59
+
"low-noise",
60
+
"low-power",
61
+
};
62
+
static const int inv_icm42600_accel_power_mode_values[] = {
63
+
INV_ICM42600_SENSOR_MODE_LOW_NOISE,
64
+
INV_ICM42600_SENSOR_MODE_LOW_POWER,
65
+
};
66
+
static const int inv_icm42600_accel_filter_values[] = {
67
+
INV_ICM42600_FILTER_BW_ODR_DIV_2,
68
+
INV_ICM42600_FILTER_AVG_16X,
69
+
};
70
+
71
+
static int inv_icm42600_accel_power_mode_set(struct iio_dev *indio_dev,
72
+
const struct iio_chan_spec *chan,
73
+
unsigned int idx)
74
+
{
75
+
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
76
+
struct inv_icm42600_sensor_state *accel_st = iio_priv(indio_dev);
77
+
int power_mode, filter;
78
+
79
+
if (chan->type != IIO_ACCEL)
80
+
return -EINVAL;
81
+
82
+
if (idx >= ARRAY_SIZE(inv_icm42600_accel_power_mode_values))
83
+
return -EINVAL;
84
+
85
+
if (iio_buffer_enabled(indio_dev))
86
+
return -EBUSY;
87
+
88
+
power_mode = inv_icm42600_accel_power_mode_values[idx];
89
+
filter = inv_icm42600_accel_filter_values[idx];
90
+
91
+
guard(mutex)(&st->lock);
92
+
93
+
/* prevent change if power mode is not supported by the ODR */
94
+
switch (power_mode) {
95
+
case INV_ICM42600_SENSOR_MODE_LOW_NOISE:
96
+
if (st->conf.accel.odr >= INV_ICM42600_ODR_6_25HZ_LP &&
97
+
st->conf.accel.odr <= INV_ICM42600_ODR_1_5625HZ_LP)
98
+
return -EPERM;
99
+
break;
100
+
case INV_ICM42600_SENSOR_MODE_LOW_POWER:
101
+
default:
102
+
if (st->conf.accel.odr <= INV_ICM42600_ODR_1KHZ_LN)
103
+
return -EPERM;
104
+
break;
105
+
}
106
+
107
+
accel_st->power_mode = power_mode;
108
+
accel_st->filter = filter;
109
+
110
+
return 0;
111
+
}
112
+
113
+
static int inv_icm42600_accel_power_mode_get(struct iio_dev *indio_dev,
114
+
const struct iio_chan_spec *chan)
115
+
{
116
+
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
117
+
struct inv_icm42600_sensor_state *accel_st = iio_priv(indio_dev);
118
+
unsigned int idx;
119
+
int power_mode;
120
+
121
+
if (chan->type != IIO_ACCEL)
122
+
return -EINVAL;
123
+
124
+
guard(mutex)(&st->lock);
125
+
126
+
/* if sensor is on, returns actual power mode and not configured one */
127
+
switch (st->conf.accel.mode) {
128
+
case INV_ICM42600_SENSOR_MODE_LOW_POWER:
129
+
case INV_ICM42600_SENSOR_MODE_LOW_NOISE:
130
+
power_mode = st->conf.accel.mode;
131
+
break;
132
+
default:
133
+
power_mode = accel_st->power_mode;
134
+
break;
135
+
}
136
+
137
+
for (idx = 0; idx < ARRAY_SIZE(inv_icm42600_accel_power_mode_values); ++idx) {
138
+
if (power_mode == inv_icm42600_accel_power_mode_values[idx])
139
+
break;
140
+
}
141
+
if (idx >= ARRAY_SIZE(inv_icm42600_accel_power_mode_values))
142
+
return -EINVAL;
143
+
144
+
return idx;
145
+
}
146
+
147
+
static const struct iio_enum inv_icm42600_accel_power_mode_enum = {
148
+
.items = inv_icm42600_accel_power_mode_items,
149
+
.num_items = ARRAY_SIZE(inv_icm42600_accel_power_mode_items),
150
+
.set = inv_icm42600_accel_power_mode_set,
151
+
.get = inv_icm42600_accel_power_mode_get,
152
+
};
153
+
58
154
static const struct iio_chan_spec_ext_info inv_icm42600_accel_ext_infos[] = {
59
155
IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, inv_icm42600_get_mount_matrix),
156
+
IIO_ENUM_AVAILABLE("power_mode", IIO_SHARED_BY_TYPE,
157
+
&inv_icm42600_accel_power_mode_enum),
158
+
IIO_ENUM("power_mode", IIO_SHARED_BY_TYPE,
159
+
&inv_icm42600_accel_power_mode_enum),
60
160
{},
61
161
};
62
162
···
220
120
221
121
if (*scan_mask & INV_ICM42600_SCAN_MASK_ACCEL_3AXIS) {
222
122
/* enable accel sensor */
223
-
conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE;
123
+
conf.mode = accel_st->power_mode;
124
+
conf.filter = accel_st->filter;
224
125
ret = inv_icm42600_set_accel_conf(st, &conf, &sleep_accel);
225
126
if (ret)
226
127
goto out_unlock;
···
245
144
return ret;
246
145
}
247
146
248
-
static int inv_icm42600_accel_read_sensor(struct inv_icm42600_state *st,
147
+
static int inv_icm42600_accel_read_sensor(struct iio_dev *indio_dev,
249
148
struct iio_chan_spec const *chan,
250
149
int16_t *val)
251
150
{
151
+
struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
152
+
struct inv_icm42600_sensor_state *accel_st = iio_priv(indio_dev);
252
153
struct device *dev = regmap_get_device(st->map);
253
154
struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
254
155
unsigned int reg;
···
278
175
mutex_lock(&st->lock);
279
176
280
177
/* enable accel sensor */
281
-
conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE;
178
+
conf.mode = accel_st->power_mode;
179
+
conf.filter = accel_st->filter;
282
180
ret = inv_icm42600_set_accel_conf(st, &conf, NULL);
283
181
if (ret)
284
182
goto exit;
···
381
277
382
278
/* IIO format int + micro */
383
279
static const int inv_icm42600_accel_odr[] = {
280
+
/* 1.5625Hz */
281
+
1, 562500,
282
+
/* 3.125Hz */
283
+
3, 125000,
284
+
/* 6.25Hz */
285
+
6, 250000,
384
286
/* 12.5Hz */
385
287
12, 500000,
386
288
/* 25Hz */
···
406
296
};
407
297
408
298
static const int inv_icm42600_accel_odr_conv[] = {
299
+
INV_ICM42600_ODR_1_5625HZ_LP,
300
+
INV_ICM42600_ODR_3_125HZ_LP,
301
+
INV_ICM42600_ODR_6_25HZ_LP,
409
302
INV_ICM42600_ODR_12_5HZ,
410
303
INV_ICM42600_ODR_25HZ,
411
304
INV_ICM42600_ODR_50HZ,
···
694
581
ret = iio_device_claim_direct_mode(indio_dev);
695
582
if (ret)
696
583
return ret;
697
-
ret = inv_icm42600_accel_read_sensor(st, chan, &data);
584
+
ret = inv_icm42600_accel_read_sensor(indio_dev, chan, &data);
698
585
iio_device_release_direct_mode(indio_dev);
699
586
if (ret)
700
587
return ret;
···
867
754
accel_st->scales_len = ARRAY_SIZE(inv_icm42600_accel_scale);
868
755
break;
869
756
}
757
+
/* low-power by default at init */
758
+
accel_st->power_mode = INV_ICM42600_SENSOR_MODE_LOW_POWER;
759
+
accel_st->filter = INV_ICM42600_FILTER_AVG_16X;
870
760
871
761
/*
872
762
* clock period is 32kHz (31250ns)
+71
drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
+71
drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
···
34
34
},
35
35
};
36
36
37
+
static const struct regmap_range inv_icm42600_regmap_volatile_yes_ranges[] = {
38
+
/* Sensor data registers */
39
+
regmap_reg_range(0x001D, 0x002A),
40
+
/* INT status, FIFO, APEX data */
41
+
regmap_reg_range(0x002D, 0x0038),
42
+
/* Signal path reset */
43
+
regmap_reg_range(0x004B, 0x004B),
44
+
/* FIFO lost packets */
45
+
regmap_reg_range(0x006C, 0x006D),
46
+
/* Timestamp value */
47
+
regmap_reg_range(0x1062, 0x1064),
48
+
};
49
+
50
+
static const struct regmap_range inv_icm42600_regmap_volatile_no_ranges[] = {
51
+
regmap_reg_range(0x0000, 0x001C),
52
+
regmap_reg_range(0x006E, 0x1061),
53
+
regmap_reg_range(0x1065, 0x4FFF),
54
+
};
55
+
56
+
static const struct regmap_access_table inv_icm42600_regmap_volatile_accesses[] = {
57
+
{
58
+
.yes_ranges = inv_icm42600_regmap_volatile_yes_ranges,
59
+
.n_yes_ranges = ARRAY_SIZE(inv_icm42600_regmap_volatile_yes_ranges),
60
+
.no_ranges = inv_icm42600_regmap_volatile_no_ranges,
61
+
.n_no_ranges = ARRAY_SIZE(inv_icm42600_regmap_volatile_no_ranges),
62
+
},
63
+
};
64
+
65
+
static const struct regmap_range inv_icm42600_regmap_rd_noinc_no_ranges[] = {
66
+
regmap_reg_range(0x0000, INV_ICM42600_REG_FIFO_DATA - 1),
67
+
regmap_reg_range(INV_ICM42600_REG_FIFO_DATA + 1, 0x4FFF),
68
+
};
69
+
70
+
static const struct regmap_access_table inv_icm42600_regmap_rd_noinc_accesses[] = {
71
+
{
72
+
.no_ranges = inv_icm42600_regmap_rd_noinc_no_ranges,
73
+
.n_no_ranges = ARRAY_SIZE(inv_icm42600_regmap_rd_noinc_no_ranges),
74
+
},
75
+
};
76
+
37
77
const struct regmap_config inv_icm42600_regmap_config = {
78
+
.name = "inv_icm42600",
38
79
.reg_bits = 8,
39
80
.val_bits = 8,
40
81
.max_register = 0x4FFF,
41
82
.ranges = inv_icm42600_regmap_ranges,
42
83
.num_ranges = ARRAY_SIZE(inv_icm42600_regmap_ranges),
84
+
.volatile_table = inv_icm42600_regmap_volatile_accesses,
85
+
.rd_noinc_table = inv_icm42600_regmap_rd_noinc_accesses,
86
+
.cache_type = REGCACHE_RBTREE,
43
87
};
44
88
EXPORT_SYMBOL_NS_GPL(inv_icm42600_regmap_config, IIO_ICM42600);
45
89
···
292
248
if (conf->filter < 0)
293
249
conf->filter = oldconf->filter;
294
250
251
+
/* force power mode against ODR when sensor is on */
252
+
switch (conf->mode) {
253
+
case INV_ICM42600_SENSOR_MODE_LOW_POWER:
254
+
case INV_ICM42600_SENSOR_MODE_LOW_NOISE:
255
+
if (conf->odr <= INV_ICM42600_ODR_1KHZ_LN) {
256
+
conf->mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE;
257
+
conf->filter = INV_ICM42600_FILTER_BW_ODR_DIV_2;
258
+
} else if (conf->odr >= INV_ICM42600_ODR_6_25HZ_LP &&
259
+
conf->odr <= INV_ICM42600_ODR_1_5625HZ_LP) {
260
+
conf->mode = INV_ICM42600_SENSOR_MODE_LOW_POWER;
261
+
conf->filter = INV_ICM42600_FILTER_AVG_16X;
262
+
}
263
+
break;
264
+
default:
265
+
break;
266
+
}
267
+
295
268
/* set ACCEL_CONFIG0 register (accel fullscale & odr) */
296
269
if (conf->fs != oldconf->fs || conf->odr != oldconf->odr) {
297
270
val = INV_ICM42600_ACCEL_CONFIG0_FS(conf->fs) |
···
499
438
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0,
500
439
INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN,
501
440
INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN);
441
+
if (ret)
442
+
return ret;
443
+
444
+
/*
445
+
* Use RC clock for accel low-power to fix glitches when switching
446
+
* gyro on/off while accel low-power is on.
447
+
*/
448
+
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG1,
449
+
INV_ICM42600_INTF_CONFIG1_ACCEL_LP_CLK_RC,
450
+
INV_ICM42600_INTF_CONFIG1_ACCEL_LP_CLK_RC);
502
451
if (ret)
503
452
return ret;
504
453
+1
-1
drivers/iio/imu/kmx61.c
+1
-1
drivers/iio/imu/kmx61.c
+98
-31
drivers/iio/industrialio-buffer.c
+98
-31
drivers/iio/industrialio-buffer.c
···
365
365
struct device_attribute *attr,
366
366
char *buf)
367
367
{
368
+
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
368
369
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
369
-
u8 type = this_attr->c->scan_type.endianness;
370
+
const struct iio_scan_type *scan_type;
371
+
u8 type;
372
+
373
+
scan_type = iio_get_current_scan_type(indio_dev, this_attr->c);
374
+
if (IS_ERR(scan_type))
375
+
return PTR_ERR(scan_type);
376
+
377
+
type = scan_type->endianness;
370
378
371
379
if (type == IIO_CPU) {
372
380
#ifdef __LITTLE_ENDIAN
···
383
375
type = IIO_BE;
384
376
#endif
385
377
}
386
-
if (this_attr->c->scan_type.repeat > 1)
378
+
if (scan_type->repeat > 1)
387
379
return sysfs_emit(buf, "%s:%c%d/%dX%d>>%u\n",
388
380
iio_endian_prefix[type],
389
-
this_attr->c->scan_type.sign,
390
-
this_attr->c->scan_type.realbits,
391
-
this_attr->c->scan_type.storagebits,
392
-
this_attr->c->scan_type.repeat,
393
-
this_attr->c->scan_type.shift);
381
+
scan_type->sign,
382
+
scan_type->realbits,
383
+
scan_type->storagebits,
384
+
scan_type->repeat,
385
+
scan_type->shift);
394
386
else
395
387
return sysfs_emit(buf, "%s:%c%d/%d>>%u\n",
396
388
iio_endian_prefix[type],
397
-
this_attr->c->scan_type.sign,
398
-
this_attr->c->scan_type.realbits,
399
-
this_attr->c->scan_type.storagebits,
400
-
this_attr->c->scan_type.shift);
389
+
scan_type->sign,
390
+
scan_type->realbits,
391
+
scan_type->storagebits,
392
+
scan_type->shift);
401
393
}
402
394
403
395
static ssize_t iio_scan_el_show(struct device *dev,
···
698
690
return sysfs_emit(buf, "%d\n", iio_buffer_is_active(buffer));
699
691
}
700
692
701
-
static unsigned int iio_storage_bytes_for_si(struct iio_dev *indio_dev,
702
-
unsigned int scan_index)
693
+
static int iio_storage_bytes_for_si(struct iio_dev *indio_dev,
694
+
unsigned int scan_index)
703
695
{
704
696
const struct iio_chan_spec *ch;
697
+
const struct iio_scan_type *scan_type;
705
698
unsigned int bytes;
706
699
707
700
ch = iio_find_channel_from_si(indio_dev, scan_index);
708
-
bytes = ch->scan_type.storagebits / 8;
709
-
if (ch->scan_type.repeat > 1)
710
-
bytes *= ch->scan_type.repeat;
701
+
scan_type = iio_get_current_scan_type(indio_dev, ch);
702
+
if (IS_ERR(scan_type))
703
+
return PTR_ERR(scan_type);
704
+
705
+
bytes = scan_type->storagebits / 8;
706
+
707
+
if (scan_type->repeat > 1)
708
+
bytes *= scan_type->repeat;
709
+
711
710
return bytes;
712
711
}
713
712
714
-
static unsigned int iio_storage_bytes_for_timestamp(struct iio_dev *indio_dev)
713
+
static int iio_storage_bytes_for_timestamp(struct iio_dev *indio_dev)
715
714
{
716
715
struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev);
717
716
···
736
721
for_each_set_bit(i, mask,
737
722
indio_dev->masklength) {
738
723
length = iio_storage_bytes_for_si(indio_dev, i);
724
+
if (length < 0)
725
+
return length;
726
+
739
727
bytes = ALIGN(bytes, length);
740
728
bytes += length;
741
729
largest = max(largest, length);
···
746
728
747
729
if (timestamp) {
748
730
length = iio_storage_bytes_for_timestamp(indio_dev);
731
+
if (length < 0)
732
+
return length;
733
+
749
734
bytes = ALIGN(bytes, length);
750
735
bytes += length;
751
736
largest = max(largest, length);
···
1028
1007
indio_dev->masklength,
1029
1008
in_ind + 1);
1030
1009
while (in_ind != out_ind) {
1031
-
length = iio_storage_bytes_for_si(indio_dev, in_ind);
1010
+
ret = iio_storage_bytes_for_si(indio_dev, in_ind);
1011
+
if (ret < 0)
1012
+
goto error_clear_mux_table;
1013
+
1014
+
length = ret;
1032
1015
/* Make sure we are aligned */
1033
1016
in_loc = roundup(in_loc, length) + length;
1034
1017
in_ind = find_next_bit(indio_dev->active_scan_mask,
1035
1018
indio_dev->masklength,
1036
1019
in_ind + 1);
1037
1020
}
1038
-
length = iio_storage_bytes_for_si(indio_dev, in_ind);
1021
+
ret = iio_storage_bytes_for_si(indio_dev, in_ind);
1022
+
if (ret < 0)
1023
+
goto error_clear_mux_table;
1024
+
1025
+
length = ret;
1039
1026
out_loc = roundup(out_loc, length);
1040
1027
in_loc = roundup(in_loc, length);
1041
1028
ret = iio_buffer_add_demux(buffer, &p, in_loc, out_loc, length);
···
1054
1025
}
1055
1026
/* Relies on scan_timestamp being last */
1056
1027
if (buffer->scan_timestamp) {
1057
-
length = iio_storage_bytes_for_timestamp(indio_dev);
1028
+
ret = iio_storage_bytes_for_timestamp(indio_dev);
1029
+
if (ret < 0)
1030
+
goto error_clear_mux_table;
1031
+
1032
+
length = ret;
1058
1033
out_loc = roundup(out_loc, length);
1059
1034
in_loc = roundup(in_loc, length);
1060
1035
ret = iio_buffer_add_demux(buffer, &p, in_loc, out_loc, length);
···
1625
1592
}
1626
1593
}
1627
1594
1595
+
static int iio_channel_validate_scan_type(struct device *dev, int ch,
1596
+
const struct iio_scan_type *scan_type)
1597
+
{
1598
+
/* Verify that sample bits fit into storage */
1599
+
if (scan_type->storagebits < scan_type->realbits + scan_type->shift) {
1600
+
dev_err(dev,
1601
+
"Channel %d storagebits (%d) < shifted realbits (%d + %d)\n",
1602
+
ch, scan_type->storagebits,
1603
+
scan_type->realbits,
1604
+
scan_type->shift);
1605
+
return -EINVAL;
1606
+
}
1607
+
1608
+
return 0;
1609
+
}
1610
+
1628
1611
static int __iio_buffer_alloc_sysfs_and_mask(struct iio_buffer *buffer,
1629
1612
struct iio_dev *indio_dev,
1630
1613
int index)
···
1665
1616
if (channels) {
1666
1617
/* new magic */
1667
1618
for (i = 0; i < indio_dev->num_channels; i++) {
1619
+
const struct iio_scan_type *scan_type;
1620
+
1668
1621
if (channels[i].scan_index < 0)
1669
1622
continue;
1670
1623
1671
-
/* Verify that sample bits fit into storage */
1672
-
if (channels[i].scan_type.storagebits <
1673
-
channels[i].scan_type.realbits +
1674
-
channels[i].scan_type.shift) {
1675
-
dev_err(&indio_dev->dev,
1676
-
"Channel %d storagebits (%d) < shifted realbits (%d + %d)\n",
1677
-
i, channels[i].scan_type.storagebits,
1678
-
channels[i].scan_type.realbits,
1679
-
channels[i].scan_type.shift);
1680
-
ret = -EINVAL;
1681
-
goto error_cleanup_dynamic;
1624
+
if (channels[i].has_ext_scan_type) {
1625
+
int j;
1626
+
1627
+
/*
1628
+
* get_current_scan_type is required when using
1629
+
* extended scan types.
1630
+
*/
1631
+
if (!indio_dev->info->get_current_scan_type) {
1632
+
ret = -EINVAL;
1633
+
goto error_cleanup_dynamic;
1634
+
}
1635
+
1636
+
for (j = 0; j < channels[i].num_ext_scan_type; j++) {
1637
+
scan_type = &channels[i].ext_scan_type[j];
1638
+
1639
+
ret = iio_channel_validate_scan_type(
1640
+
&indio_dev->dev, i, scan_type);
1641
+
if (ret)
1642
+
goto error_cleanup_dynamic;
1643
+
}
1644
+
} else {
1645
+
scan_type = &channels[i].scan_type;
1646
+
1647
+
ret = iio_channel_validate_scan_type(
1648
+
&indio_dev->dev, i, scan_type);
1649
+
if (ret)
1650
+
goto error_cleanup_dynamic;
1682
1651
}
1683
1652
1684
1653
ret = iio_buffer_add_channel_sysfs(indio_dev, buffer,
+6
-1
drivers/iio/industrialio-core.c
+6
-1
drivers/iio/industrialio-core.c
···
758
758
INDIO_MAX_RAW_ELEMENTS,
759
759
vals, &val_len,
760
760
this_attr->address);
761
-
else
761
+
else if (indio_dev->info->read_raw)
762
762
ret = indio_dev->info->read_raw(indio_dev, this_attr->c,
763
763
&vals[0], &vals[1], this_attr->address);
764
+
else
765
+
return -EINVAL;
764
766
765
767
if (ret < 0)
766
768
return ret;
···
843
841
int ret;
844
842
int length;
845
843
int type;
844
+
845
+
if (!indio_dev->info->read_avail)
846
+
return -EINVAL;
846
847
847
848
ret = indio_dev->info->read_avail(indio_dev, this_attr->c,
848
849
&vals, &type, &length,
+11
-2
drivers/iio/industrialio-event.c
+11
-2
drivers/iio/industrialio-event.c
···
285
285
if (ret < 0)
286
286
return ret;
287
287
288
+
if (!indio_dev->info->write_event_config)
289
+
return -EINVAL;
290
+
288
291
ret = indio_dev->info->write_event_config(indio_dev,
289
292
this_attr->c, iio_ev_attr_type(this_attr),
290
293
iio_ev_attr_dir(this_attr), val);
···
302
299
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
303
300
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
304
301
int val;
302
+
303
+
if (!indio_dev->info->read_event_config)
304
+
return -EINVAL;
305
305
306
306
val = indio_dev->info->read_event_config(indio_dev,
307
307
this_attr->c, iio_ev_attr_type(this_attr),
···
323
317
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
324
318
int val, val2, val_arr[2];
325
319
int ret;
320
+
321
+
if (!indio_dev->info->read_event_value)
322
+
return -EINVAL;
326
323
327
324
ret = indio_dev->info->read_event_value(indio_dev,
328
325
this_attr->c, iio_ev_attr_type(this_attr),
···
581
572
iio_check_for_dynamic_events(indio_dev)))
582
573
return 0;
583
574
584
-
ev_int = kzalloc(sizeof(struct iio_event_interface), GFP_KERNEL);
585
-
if (ev_int == NULL)
575
+
ev_int = kzalloc(sizeof(*ev_int), GFP_KERNEL);
576
+
if (!ev_int)
586
577
return -ENOMEM;
587
578
588
579
iio_dev_opaque->event_interface = ev_int;
+5
-2
drivers/iio/industrialio-gts-helper.c
+5
-2
drivers/iio/industrialio-gts-helper.c
···
362
362
for (i = gts->num_itime - 1; i >= 0; i--) {
363
363
int new = gts->itime_table[i].time_us;
364
364
365
-
if (times[idx] < new) {
365
+
if (idx == 0 || times[idx - 1] < new) {
366
366
times[idx++] = new;
367
367
continue;
368
368
}
369
369
370
-
for (j = 0; j <= idx; j++) {
370
+
for (j = 0; j < idx; j++) {
371
+
if (times[j] == new)
372
+
break;
371
373
if (times[j] > new) {
372
374
memmove(×[j + 1], ×[j],
373
375
(idx - j) * sizeof(int));
374
376
times[j] = new;
375
377
idx++;
378
+
break;
376
379
}
377
380
}
378
381
}
+22
-10
drivers/iio/inkern.c
+22
-10
drivers/iio/inkern.c
···
543
543
static int iio_channel_read(struct iio_channel *chan, int *val, int *val2,
544
544
enum iio_chan_info_enum info)
545
545
{
546
+
const struct iio_info *iio_info = chan->indio_dev->info;
546
547
int unused;
547
548
int vals[INDIO_MAX_RAW_ELEMENTS];
548
549
int ret;
···
555
554
if (!iio_channel_has_info(chan->channel, info))
556
555
return -EINVAL;
557
556
558
-
if (chan->indio_dev->info->read_raw_multi) {
559
-
ret = chan->indio_dev->info->read_raw_multi(chan->indio_dev,
560
-
chan->channel, INDIO_MAX_RAW_ELEMENTS,
561
-
vals, &val_len, info);
557
+
if (iio_info->read_raw_multi) {
558
+
ret = iio_info->read_raw_multi(chan->indio_dev,
559
+
chan->channel,
560
+
INDIO_MAX_RAW_ELEMENTS,
561
+
vals, &val_len, info);
562
562
*val = vals[0];
563
563
*val2 = vals[1];
564
+
} else if (iio_info->read_raw) {
565
+
ret = iio_info->read_raw(chan->indio_dev,
566
+
chan->channel, val, val2, info);
564
567
} else {
565
-
ret = chan->indio_dev->info->read_raw(chan->indio_dev,
566
-
chan->channel, val, val2, info);
568
+
return -EINVAL;
567
569
}
568
570
569
571
return ret;
···
754
750
const int **vals, int *type, int *length,
755
751
enum iio_chan_info_enum info)
756
752
{
753
+
const struct iio_info *iio_info = chan->indio_dev->info;
754
+
757
755
if (!iio_channel_has_available(chan->channel, info))
758
756
return -EINVAL;
759
757
760
-
return chan->indio_dev->info->read_avail(chan->indio_dev, chan->channel,
761
-
vals, type, length, info);
758
+
if (iio_info->read_avail)
759
+
return iio_info->read_avail(chan->indio_dev, chan->channel,
760
+
vals, type, length, info);
761
+
return -EINVAL;
762
762
}
763
763
764
764
int iio_read_avail_channel_attribute(struct iio_channel *chan,
···
925
917
static int iio_channel_write(struct iio_channel *chan, int val, int val2,
926
918
enum iio_chan_info_enum info)
927
919
{
928
-
return chan->indio_dev->info->write_raw(chan->indio_dev,
929
-
chan->channel, val, val2, info);
920
+
const struct iio_info *iio_info = chan->indio_dev->info;
921
+
922
+
if (iio_info->write_raw)
923
+
return iio_info->write_raw(chan->indio_dev,
924
+
chan->channel, val, val2, info);
925
+
return -EINVAL;
930
926
}
931
927
932
928
int iio_write_channel_attribute(struct iio_channel *chan, int val, int val2,
+11
drivers/iio/light/Kconfig
+11
drivers/iio/light/Kconfig
···
666
666
To compile this driver as a module, choose M here: the
667
667
module will be called veml6030.
668
668
669
+
config VEML6040
670
+
tristate "VEML6040 RGBW light sensor"
671
+
select REGMAP_I2C
672
+
depends on I2C
673
+
help
674
+
Say Y here if you want to build a driver for the Vishay VEML6040
675
+
RGBW light sensor.
676
+
677
+
To compile this driver as a module, choose M here: the
678
+
module will be called veml6040.
679
+
669
680
config VEML6070
670
681
tristate "VEML6070 UV A light sensor"
671
682
depends on I2C
+1
drivers/iio/light/Makefile
+1
drivers/iio/light/Makefile
+1
-1
drivers/iio/light/adjd_s311.c
+1
-1
drivers/iio/light/adjd_s311.c
+1
-1
drivers/iio/light/adux1020.c
+1
-1
drivers/iio/light/adux1020.c
+1
-1
drivers/iio/light/al3320a.c
+1
-1
drivers/iio/light/al3320a.c
+1
-1
drivers/iio/light/apds9300.c
+1
-1
drivers/iio/light/apds9300.c
+1
-1
drivers/iio/light/apds9960.c
+1
-1
drivers/iio/light/apds9960.c
+2
-2
drivers/iio/light/bh1780.c
+2
-2
drivers/iio/light/bh1780.c
+1
-1
drivers/iio/light/cm3232.c
+1
-1
drivers/iio/light/cm3232.c
+1
-1
drivers/iio/light/cm3323.c
+1
-1
drivers/iio/light/cm3323.c
+1
-1
drivers/iio/light/cm36651.c
+1
-1
drivers/iio/light/cm36651.c
+2
-2
drivers/iio/light/gp2ap002.c
+2
-2
drivers/iio/light/gp2ap002.c
+1
-2
drivers/iio/light/gp2ap020a00f.c
+1
-2
drivers/iio/light/gp2ap020a00f.c
···
237
237
};
238
238
239
239
struct gp2ap020a00f_data {
240
-
const struct gp2ap020a00f_platform_data *pdata;
241
240
struct i2c_client *client;
242
241
struct mutex lock;
243
242
char *buffer;
···
1591
1592
}
1592
1593
1593
1594
static const struct i2c_device_id gp2ap020a00f_id[] = {
1594
-
{ GP2A_I2C_NAME, 0 },
1595
+
{ GP2A_I2C_NAME },
1595
1596
{ }
1596
1597
};
1597
1598
+2
-2
drivers/iio/light/isl29028.c
+2
-2
drivers/iio/light/isl29028.c
+1
-1
drivers/iio/light/isl29125.c
+1
-1
drivers/iio/light/isl29125.c
+1
-1
drivers/iio/light/jsa1212.c
+1
-1
drivers/iio/light/jsa1212.c
+1
-1
drivers/iio/light/lv0104cs.c
+1
-1
drivers/iio/light/lv0104cs.c
+1
-1
drivers/iio/light/max44000.c
+1
-1
drivers/iio/light/max44000.c
+1
-1
drivers/iio/light/max44009.c
+1
-1
drivers/iio/light/max44009.c
+1
-1
drivers/iio/light/noa1305.c
+1
-1
drivers/iio/light/noa1305.c
+1
-1
drivers/iio/light/opt3001.c
+1
-1
drivers/iio/light/opt3001.c
+1
-1
drivers/iio/light/pa12203001.c
+1
-1
drivers/iio/light/pa12203001.c
-6
drivers/iio/light/rohm-bu27034.c
-6
drivers/iio/light/rohm-bu27034.c
+1
-1
drivers/iio/light/rpr0521.c
+1
-1
drivers/iio/light/rpr0521.c
+1
-1
drivers/iio/light/si1133.c
+1
-1
drivers/iio/light/si1133.c
+27
-10
drivers/iio/light/stk3310.c
+27
-10
drivers/iio/light/stk3310.c
···
37
37
38
38
#define STK3310_CHIP_ID_VAL 0x13
39
39
#define STK3311_CHIP_ID_VAL 0x1D
40
+
#define STK3311A_CHIP_ID_VAL 0x15
41
+
#define STK3311S34_CHIP_ID_VAL 0x1E
40
42
#define STK3311X_CHIP_ID_VAL 0x12
41
43
#define STK3335_CHIP_ID_VAL 0x51
42
44
#define STK3310_PSINT_EN 0x01
···
82
80
REG_FIELD(STK3310_REG_FLAG, 4, 4);
83
81
static const struct reg_field stk3310_reg_field_flag_nf =
84
82
REG_FIELD(STK3310_REG_FLAG, 0, 0);
83
+
84
+
static const u8 stk3310_chip_ids[] = {
85
+
STK3310_CHIP_ID_VAL,
86
+
STK3311A_CHIP_ID_VAL,
87
+
STK3311S34_CHIP_ID_VAL,
88
+
STK3311X_CHIP_ID_VAL,
89
+
STK3311_CHIP_ID_VAL,
90
+
STK3335_CHIP_ID_VAL,
91
+
};
85
92
86
93
/* Estimate maximum proximity values with regard to measurement scale. */
87
94
static const int stk3310_ps_max[4] = {
···
207
196
static const struct attribute_group stk3310_attribute_group = {
208
197
.attrs = stk3310_attributes
209
198
};
199
+
200
+
static int stk3310_check_chip_id(const u8 chip_id)
201
+
{
202
+
for (int i = 0; i < ARRAY_SIZE(stk3310_chip_ids); i++) {
203
+
if (chip_id == stk3310_chip_ids[i])
204
+
return 0;
205
+
}
206
+
207
+
return -ENODEV;
208
+
}
210
209
211
210
static int stk3310_get_index(const int table[][2], int table_size,
212
211
int val, int val2)
···
494
473
if (ret < 0)
495
474
return ret;
496
475
497
-
if (chipid != STK3310_CHIP_ID_VAL &&
498
-
chipid != STK3311_CHIP_ID_VAL &&
499
-
chipid != STK3311X_CHIP_ID_VAL &&
500
-
chipid != STK3335_CHIP_ID_VAL) {
501
-
dev_err(&client->dev, "invalid chip id: 0x%x\n", chipid);
502
-
return -ENODEV;
503
-
}
476
+
ret = stk3310_check_chip_id(chipid);
477
+
if (ret < 0)
478
+
dev_warn(&client->dev, "unknown chip id: 0x%x\n", chipid);
504
479
505
480
state = STK3310_STATE_EN_ALS | STK3310_STATE_EN_PS;
506
481
ret = stk3310_set_state(data, state);
···
700
683
stk3310_resume);
701
684
702
685
static const struct i2c_device_id stk3310_i2c_id[] = {
703
-
{"STK3310", 0},
704
-
{"STK3311", 0},
705
-
{"STK3335", 0},
686
+
{ "STK3310" },
687
+
{ "STK3311" },
688
+
{ "STK3335" },
706
689
{}
707
690
};
708
691
MODULE_DEVICE_TABLE(i2c, stk3310_i2c_id);
+1
-1
drivers/iio/light/tcs3414.c
+1
-1
drivers/iio/light/tcs3414.c
+1
-1
drivers/iio/light/tcs3472.c
+1
-1
drivers/iio/light/tcs3472.c
+1
-1
drivers/iio/light/tsl4531.c
+1
-1
drivers/iio/light/tsl4531.c
+1
-1
drivers/iio/light/us5182d.c
+1
-1
drivers/iio/light/us5182d.c
+1
-1
drivers/iio/light/vcnl4035.c
+1
-1
drivers/iio/light/vcnl4035.c
+1
-1
drivers/iio/light/veml6030.c
+1
-1
drivers/iio/light/veml6030.c
+281
drivers/iio/light/veml6040.c
+281
drivers/iio/light/veml6040.c
···
1
+
// SPDX-License-Identifier: GPL-2.0+
2
+
/*
3
+
* Vishay VEML6040 RGBW light sensor driver
4
+
*
5
+
* Copyright (C) 2024 Sentec AG
6
+
* Author: Arthur Becker <arthur.becker@sentec.com>
7
+
*
8
+
*/
9
+
10
+
#include <linux/bitfield.h>
11
+
#include <linux/err.h>
12
+
#include <linux/i2c.h>
13
+
#include <linux/iio/iio.h>
14
+
#include <linux/iio/sysfs.h>
15
+
#include <linux/module.h>
16
+
#include <linux/regmap.h>
17
+
18
+
/* VEML6040 Configuration Registers
19
+
*
20
+
* SD: Shutdown
21
+
* AF: Auto / Force Mode (Auto Measurements On:0, Off:1)
22
+
* TR: Trigger Measurement (when AF Bit is set)
23
+
* IT: Integration Time
24
+
*/
25
+
#define VEML6040_CONF_REG 0x000
26
+
#define VEML6040_CONF_SD_MSK BIT(0)
27
+
#define VEML6040_CONF_AF_MSK BIT(1)
28
+
#define VEML6040_CONF_TR_MSK BIT(2)
29
+
#define VEML6040_CONF_IT_MSK GENMASK(6, 4)
30
+
#define VEML6040_CONF_IT_40_MS 0
31
+
#define VEML6040_CONF_IT_80_MS 1
32
+
#define VEML6040_CONF_IT_160_MS 2
33
+
#define VEML6040_CONF_IT_320_MS 3
34
+
#define VEML6040_CONF_IT_640_MS 4
35
+
#define VEML6040_CONF_IT_1280_MS 5
36
+
37
+
/* VEML6040 Read Only Registers */
38
+
#define VEML6040_REG_R 0x08
39
+
#define VEML6040_REG_G 0x09
40
+
#define VEML6040_REG_B 0x0A
41
+
#define VEML6040_REG_W 0x0B
42
+
43
+
static const int veml6040_it_ms[] = { 40, 80, 160, 320, 640, 1280 };
44
+
45
+
enum veml6040_chan {
46
+
CH_RED,
47
+
CH_GREEN,
48
+
CH_BLUE,
49
+
CH_WHITE,
50
+
};
51
+
52
+
struct veml6040_data {
53
+
struct i2c_client *client;
54
+
struct regmap *regmap;
55
+
};
56
+
57
+
static const struct regmap_config veml6040_regmap_config = {
58
+
.name = "veml6040_regmap",
59
+
.reg_bits = 8,
60
+
.val_bits = 16,
61
+
.max_register = VEML6040_REG_W,
62
+
.val_format_endian = REGMAP_ENDIAN_LITTLE,
63
+
};
64
+
65
+
static int veml6040_read_raw(struct iio_dev *indio_dev,
66
+
struct iio_chan_spec const *chan, int *val,
67
+
int *val2, long mask)
68
+
{
69
+
int ret, reg, it_index;
70
+
struct veml6040_data *data = iio_priv(indio_dev);
71
+
struct regmap *regmap = data->regmap;
72
+
struct device *dev = &data->client->dev;
73
+
74
+
switch (mask) {
75
+
case IIO_CHAN_INFO_RAW:
76
+
ret = regmap_read(regmap, chan->address, ®);
77
+
if (ret) {
78
+
dev_err(dev, "Data read failed: %d\n", ret);
79
+
return ret;
80
+
}
81
+
*val = reg;
82
+
return IIO_VAL_INT;
83
+
84
+
case IIO_CHAN_INFO_INT_TIME:
85
+
ret = regmap_read(regmap, VEML6040_CONF_REG, ®);
86
+
if (ret) {
87
+
dev_err(dev, "Data read failed: %d\n", ret);
88
+
return ret;
89
+
}
90
+
it_index = FIELD_GET(VEML6040_CONF_IT_MSK, reg);
91
+
if (it_index >= ARRAY_SIZE(veml6040_it_ms)) {
92
+
dev_err(dev, "Invalid Integration Time Set");
93
+
return -EINVAL;
94
+
}
95
+
*val = veml6040_it_ms[it_index];
96
+
return IIO_VAL_INT;
97
+
98
+
default:
99
+
return -EINVAL;
100
+
}
101
+
}
102
+
103
+
static int veml6040_write_raw(struct iio_dev *indio_dev,
104
+
struct iio_chan_spec const *chan, int val,
105
+
int val2, long mask)
106
+
{
107
+
struct veml6040_data *data = iio_priv(indio_dev);
108
+
109
+
switch (mask) {
110
+
case IIO_CHAN_INFO_INT_TIME:
111
+
for (int i = 0; i < ARRAY_SIZE(veml6040_it_ms); i++) {
112
+
if (veml6040_it_ms[i] != val)
113
+
continue;
114
+
115
+
return regmap_update_bits(data->regmap,
116
+
VEML6040_CONF_REG,
117
+
VEML6040_CONF_IT_MSK,
118
+
FIELD_PREP(VEML6040_CONF_IT_MSK, i));
119
+
}
120
+
return -EINVAL;
121
+
default:
122
+
return -EINVAL;
123
+
}
124
+
}
125
+
126
+
static int veml6040_read_avail(struct iio_dev *indio_dev,
127
+
struct iio_chan_spec const *chan,
128
+
const int **vals, int *type, int *length,
129
+
long mask)
130
+
{
131
+
switch (mask) {
132
+
case IIO_CHAN_INFO_INT_TIME:
133
+
*length = ARRAY_SIZE(veml6040_it_ms);
134
+
*vals = veml6040_it_ms;
135
+
*type = IIO_VAL_INT;
136
+
return IIO_AVAIL_LIST;
137
+
138
+
default:
139
+
return -EINVAL;
140
+
}
141
+
}
142
+
143
+
static const struct iio_info veml6040_info = {
144
+
.read_raw = veml6040_read_raw,
145
+
.write_raw = veml6040_write_raw,
146
+
.read_avail = veml6040_read_avail,
147
+
};
148
+
149
+
static const struct iio_chan_spec veml6040_channels[] = {
150
+
{
151
+
.type = IIO_INTENSITY,
152
+
.address = VEML6040_REG_R,
153
+
.channel = CH_RED,
154
+
.channel2 = IIO_MOD_LIGHT_RED,
155
+
.modified = 1,
156
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
157
+
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_INT_TIME),
158
+
.info_mask_shared_by_type_available =
159
+
BIT(IIO_CHAN_INFO_INT_TIME),
160
+
},
161
+
{
162
+
.type = IIO_INTENSITY,
163
+
.address = VEML6040_REG_G,
164
+
.channel = CH_GREEN,
165
+
.channel2 = IIO_MOD_LIGHT_GREEN,
166
+
.modified = 1,
167
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
168
+
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_INT_TIME),
169
+
.info_mask_shared_by_type_available =
170
+
BIT(IIO_CHAN_INFO_INT_TIME),
171
+
},
172
+
{
173
+
.type = IIO_INTENSITY,
174
+
.address = VEML6040_REG_B,
175
+
.channel = CH_BLUE,
176
+
.channel2 = IIO_MOD_LIGHT_BLUE,
177
+
.modified = 1,
178
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
179
+
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_INT_TIME),
180
+
.info_mask_shared_by_type_available =
181
+
BIT(IIO_CHAN_INFO_INT_TIME),
182
+
},
183
+
{
184
+
.type = IIO_INTENSITY,
185
+
.address = VEML6040_REG_W,
186
+
.channel = CH_WHITE,
187
+
.channel2 = IIO_MOD_LIGHT_CLEAR,
188
+
.modified = 1,
189
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
190
+
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_INT_TIME),
191
+
.info_mask_shared_by_type_available =
192
+
BIT(IIO_CHAN_INFO_INT_TIME),
193
+
}
194
+
};
195
+
196
+
static void veml6040_shutdown_action(void *data)
197
+
{
198
+
struct veml6040_data *veml6040_data = data;
199
+
200
+
regmap_update_bits(veml6040_data->regmap, VEML6040_CONF_REG,
201
+
VEML6040_CONF_SD_MSK, VEML6040_CONF_SD_MSK);
202
+
}
203
+
204
+
static int veml6040_probe(struct i2c_client *client)
205
+
{
206
+
struct device *dev = &client->dev;
207
+
struct veml6040_data *data;
208
+
struct iio_dev *indio_dev;
209
+
struct regmap *regmap;
210
+
const int init_config =
211
+
FIELD_PREP(VEML6040_CONF_IT_MSK, VEML6040_CONF_IT_40_MS) |
212
+
FIELD_PREP(VEML6040_CONF_AF_MSK, 0) |
213
+
FIELD_PREP(VEML6040_CONF_SD_MSK, 0);
214
+
int ret;
215
+
216
+
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
217
+
return dev_err_probe(dev, -EOPNOTSUPP,
218
+
"I2C adapter doesn't support plain I2C\n");
219
+
220
+
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
221
+
if (!indio_dev)
222
+
return dev_err_probe(dev, -ENOMEM,
223
+
"IIO device allocation failed\n");
224
+
225
+
regmap = devm_regmap_init_i2c(client, &veml6040_regmap_config);
226
+
if (IS_ERR(regmap))
227
+
return dev_err_probe(dev, PTR_ERR(regmap),
228
+
"Regmap setup failed\n");
229
+
230
+
data = iio_priv(indio_dev);
231
+
i2c_set_clientdata(client, indio_dev);
232
+
data->client = client;
233
+
data->regmap = regmap;
234
+
235
+
indio_dev->name = "veml6040";
236
+
indio_dev->info = &veml6040_info;
237
+
indio_dev->channels = veml6040_channels;
238
+
indio_dev->num_channels = ARRAY_SIZE(veml6040_channels);
239
+
indio_dev->modes = INDIO_DIRECT_MODE;
240
+
241
+
ret = devm_regulator_get_enable(dev, "vdd");
242
+
if (ret)
243
+
return ret;
244
+
245
+
ret = regmap_write(regmap, VEML6040_CONF_REG, init_config);
246
+
if (ret)
247
+
return dev_err_probe(dev, ret,
248
+
"Could not set initial config\n");
249
+
250
+
ret = devm_add_action_or_reset(dev, veml6040_shutdown_action, data);
251
+
if (ret)
252
+
return ret;
253
+
254
+
return devm_iio_device_register(dev, indio_dev);
255
+
}
256
+
257
+
static const struct i2c_device_id veml6040_id_table[] = {
258
+
{"veml6040"},
259
+
{}
260
+
};
261
+
MODULE_DEVICE_TABLE(i2c, veml6040_id_table);
262
+
263
+
static const struct of_device_id veml6040_of_match[] = {
264
+
{.compatible = "vishay,veml6040"},
265
+
{}
266
+
};
267
+
MODULE_DEVICE_TABLE(of, veml6040_of_match);
268
+
269
+
static struct i2c_driver veml6040_driver = {
270
+
.probe = veml6040_probe,
271
+
.id_table = veml6040_id_table,
272
+
.driver = {
273
+
.name = "veml6040",
274
+
.of_match_table = veml6040_of_match,
275
+
},
276
+
};
277
+
module_i2c_driver(veml6040_driver);
278
+
279
+
MODULE_DESCRIPTION("veml6040 RGBW light sensor driver");
280
+
MODULE_AUTHOR("Arthur Becker <arthur.becker@sentec.com>");
281
+
MODULE_LICENSE("GPL");
+1
-1
drivers/iio/light/veml6070.c
+1
-1
drivers/iio/light/veml6070.c
+1
-1
drivers/iio/light/vl6180.c
+1
-1
drivers/iio/light/vl6180.c
+1
-1
drivers/iio/light/zopt2201.c
+1
-1
drivers/iio/light/zopt2201.c
+1
-1
drivers/iio/magnetometer/af8133j.c
+1
-1
drivers/iio/magnetometer/af8133j.c
+4
-4
drivers/iio/magnetometer/ak8974.c
+4
-4
drivers/iio/magnetometer/ak8974.c
···
1025
1025
ak8974_runtime_resume, NULL);
1026
1026
1027
1027
static const struct i2c_device_id ak8974_id[] = {
1028
-
{"ami305", 0 },
1029
-
{"ami306", 0 },
1030
-
{"ak8974", 0 },
1031
-
{"hscdtd008a", 0 },
1028
+
{ "ami305" },
1029
+
{ "ami306" },
1030
+
{ "ak8974" },
1031
+
{ "hscdtd008a" },
1032
1032
{}
1033
1033
};
1034
1034
MODULE_DEVICE_TABLE(i2c, ak8974_id);
+3
-3
drivers/iio/magnetometer/bmc150_magn_i2c.c
+3
-3
drivers/iio/magnetometer/bmc150_magn_i2c.c
···
47
47
MODULE_DEVICE_TABLE(acpi, bmc150_magn_acpi_match);
48
48
49
49
static const struct i2c_device_id bmc150_magn_i2c_id[] = {
50
-
{"bmc150_magn", 0},
51
-
{"bmc156_magn", 0},
52
-
{"bmm150_magn", 0},
50
+
{ "bmc150_magn" },
51
+
{ "bmc156_magn" },
52
+
{ "bmm150_magn" },
53
53
{}
54
54
};
55
55
MODULE_DEVICE_TABLE(i2c, bmc150_magn_i2c_id);
+1
-1
drivers/iio/magnetometer/mag3110.c
+1
-1
drivers/iio/magnetometer/mag3110.c
+1
-1
drivers/iio/magnetometer/mmc35240.c
+1
-1
drivers/iio/magnetometer/mmc35240.c
-2
drivers/iio/magnetometer/tmag5273.c
-2
drivers/iio/magnetometer/tmag5273.c
···
118
118
unsigned int version;
119
119
char name[16];
120
120
unsigned int conv_avg;
121
-
unsigned int scale;
122
121
enum tmag5273_scale_index scale_index;
123
122
unsigned int angle_measurement;
124
123
struct regmap *map;
125
-
struct regulator *vcc;
126
124
127
125
/*
128
126
* Locks the sensor for exclusive use during a measurement (which
-1
drivers/iio/multiplexer/iio-mux.c
-1
drivers/iio/multiplexer/iio-mux.c
+2
-2
drivers/iio/potentiostat/lmp91000.c
+2
-2
drivers/iio/potentiostat/lmp91000.c
+480
-355
drivers/iio/pressure/bmp280-core.c
+480
-355
drivers/iio/pressure/bmp280-core.c
···
27
27
28
28
#include <linux/bitops.h>
29
29
#include <linux/bitfield.h>
30
+
#include <linux/cleanup.h>
30
31
#include <linux/completion.h>
31
32
#include <linux/delay.h>
32
33
#include <linux/device.h>
···
52
51
* coefficients for BMP180.
53
52
*/
54
53
enum { AC1, AC2, AC3, AC4, AC5, AC6, B1, B2, MB, MC, MD };
55
-
56
54
57
55
enum bmp380_odr {
58
56
BMP380_ODR_200HZ,
···
181
181
struct bmp280_calib *calib = &data->calib.bmp280;
182
182
int ret;
183
183
184
-
185
184
/* Read temperature and pressure calibration values. */
186
185
ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_TEMP_START,
187
-
data->bmp280_cal_buf, sizeof(data->bmp280_cal_buf));
188
-
if (ret < 0) {
186
+
data->bmp280_cal_buf,
187
+
sizeof(data->bmp280_cal_buf));
188
+
if (ret) {
189
189
dev_err(data->dev,
190
-
"failed to read temperature and pressure calibration parameters\n");
190
+
"failed to read calibration parameters\n");
191
191
return ret;
192
192
}
193
193
194
-
/* Toss the temperature and pressure calibration data into the entropy pool */
195
-
add_device_randomness(data->bmp280_cal_buf, sizeof(data->bmp280_cal_buf));
194
+
/* Toss calibration data into the entropy pool */
195
+
add_device_randomness(data->bmp280_cal_buf,
196
+
sizeof(data->bmp280_cal_buf));
196
197
197
198
/* Parse temperature calibration values. */
198
199
calib->T1 = le16_to_cpu(data->bmp280_cal_buf[T1]);
···
223
222
224
223
/* Load shared calibration params with bmp280 first */
225
224
ret = bmp280_read_calib(data);
226
-
if (ret < 0) {
227
-
dev_err(dev, "failed to read common bmp280 calibration parameters\n");
225
+
if (ret)
228
226
return ret;
229
-
}
230
227
231
228
/*
232
229
* Read humidity calibration values.
···
234
235
* Humidity data is only available on BME280.
235
236
*/
236
237
237
-
ret = regmap_read(data->regmap, BMP280_REG_COMP_H1, &tmp);
238
-
if (ret < 0) {
238
+
ret = regmap_read(data->regmap, BME280_REG_COMP_H1, &tmp);
239
+
if (ret) {
239
240
dev_err(dev, "failed to read H1 comp value\n");
240
241
return ret;
241
242
}
242
243
calib->H1 = tmp;
243
244
244
-
ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H2,
245
+
ret = regmap_bulk_read(data->regmap, BME280_REG_COMP_H2,
245
246
&data->le16, sizeof(data->le16));
246
-
if (ret < 0) {
247
+
if (ret) {
247
248
dev_err(dev, "failed to read H2 comp value\n");
248
249
return ret;
249
250
}
250
251
calib->H2 = sign_extend32(le16_to_cpu(data->le16), 15);
251
252
252
-
ret = regmap_read(data->regmap, BMP280_REG_COMP_H3, &tmp);
253
-
if (ret < 0) {
253
+
ret = regmap_read(data->regmap, BME280_REG_COMP_H3, &tmp);
254
+
if (ret) {
254
255
dev_err(dev, "failed to read H3 comp value\n");
255
256
return ret;
256
257
}
257
258
calib->H3 = tmp;
258
259
259
-
ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H4,
260
+
ret = regmap_bulk_read(data->regmap, BME280_REG_COMP_H4,
260
261
&data->be16, sizeof(data->be16));
261
-
if (ret < 0) {
262
+
if (ret) {
262
263
dev_err(dev, "failed to read H4 comp value\n");
263
264
return ret;
264
265
}
265
266
calib->H4 = sign_extend32(((be16_to_cpu(data->be16) >> 4) & 0xff0) |
266
267
(be16_to_cpu(data->be16) & 0xf), 11);
267
268
268
-
ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H5,
269
+
ret = regmap_bulk_read(data->regmap, BME280_REG_COMP_H5,
269
270
&data->le16, sizeof(data->le16));
270
-
if (ret < 0) {
271
+
if (ret) {
271
272
dev_err(dev, "failed to read H5 comp value\n");
272
273
return ret;
273
274
}
274
-
calib->H5 = sign_extend32(FIELD_GET(BMP280_COMP_H5_MASK, le16_to_cpu(data->le16)), 11);
275
+
calib->H5 = sign_extend32(FIELD_GET(BME280_COMP_H5_MASK, le16_to_cpu(data->le16)), 11);
275
276
276
-
ret = regmap_read(data->regmap, BMP280_REG_COMP_H6, &tmp);
277
-
if (ret < 0) {
277
+
ret = regmap_read(data->regmap, BME280_REG_COMP_H6, &tmp);
278
+
if (ret) {
278
279
dev_err(dev, "failed to read H6 comp value\n");
279
280
return ret;
280
281
}
···
282
283
283
284
return 0;
284
285
}
286
+
287
+
static int bme280_read_humid_adc(struct bmp280_data *data, u16 *adc_humidity)
288
+
{
289
+
u16 value_humidity;
290
+
int ret;
291
+
292
+
ret = regmap_bulk_read(data->regmap, BME280_REG_HUMIDITY_MSB,
293
+
&data->be16, sizeof(data->be16));
294
+
if (ret) {
295
+
dev_err(data->dev, "failed to read humidity\n");
296
+
return ret;
297
+
}
298
+
299
+
value_humidity = be16_to_cpu(data->be16);
300
+
if (value_humidity == BMP280_HUMIDITY_SKIPPED) {
301
+
dev_err(data->dev, "reading humidity skipped\n");
302
+
return -EIO;
303
+
}
304
+
*adc_humidity = value_humidity;
305
+
306
+
return 0;
307
+
}
308
+
285
309
/*
286
310
* Returns humidity in percent, resolution is 0.01 percent. Output value of
287
311
* "47445" represents 47445/1024 = 46.333 %RH.
288
312
*
289
313
* Taken from BME280 datasheet, Section 4.2.3, "Compensation formula".
290
314
*/
291
-
static u32 bmp280_compensate_humidity(struct bmp280_data *data,
292
-
s32 adc_humidity)
315
+
static u32 bme280_compensate_humidity(struct bmp280_data *data,
316
+
u16 adc_humidity, s32 t_fine)
293
317
{
294
318
struct bmp280_calib *calib = &data->calib.bmp280;
295
319
s32 var;
296
320
297
-
var = ((s32)data->t_fine) - (s32)76800;
298
-
var = ((((adc_humidity << 14) - (calib->H4 << 20) - (calib->H5 * var))
321
+
var = t_fine - (s32)76800;
322
+
var = (((((s32)adc_humidity << 14) - (calib->H4 << 20) - (calib->H5 * var))
299
323
+ (s32)16384) >> 15) * (((((((var * calib->H6) >> 10)
300
324
* (((var * (s32)calib->H3) >> 11) + (s32)32768)) >> 10)
301
325
+ (s32)2097152) * calib->H2 + 8192) >> 14);
···
327
305
var = clamp_val(var, 0, 419430400);
328
306
329
307
return var >> 12;
330
-
};
308
+
}
309
+
310
+
static int bmp280_read_temp_adc(struct bmp280_data *data, u32 *adc_temp)
311
+
{
312
+
u32 value_temp;
313
+
int ret;
314
+
315
+
ret = regmap_bulk_read(data->regmap, BMP280_REG_TEMP_MSB,
316
+
data->buf, sizeof(data->buf));
317
+
if (ret) {
318
+
dev_err(data->dev, "failed to read temperature\n");
319
+
return ret;
320
+
}
321
+
322
+
value_temp = FIELD_GET(BMP280_MEAS_TRIM_MASK, get_unaligned_be24(data->buf));
323
+
if (value_temp == BMP280_TEMP_SKIPPED) {
324
+
dev_err(data->dev, "reading temperature skipped\n");
325
+
return -EIO;
326
+
}
327
+
*adc_temp = value_temp;
328
+
329
+
return 0;
330
+
}
331
331
332
332
/*
333
333
* Returns temperature in DegC, resolution is 0.01 DegC. Output value of
···
358
314
*
359
315
* Taken from datasheet, Section 3.11.3, "Compensation formula".
360
316
*/
361
-
static s32 bmp280_compensate_temp(struct bmp280_data *data,
362
-
s32 adc_temp)
317
+
static s32 bmp280_calc_t_fine(struct bmp280_data *data, u32 adc_temp)
363
318
{
364
319
struct bmp280_calib *calib = &data->calib.bmp280;
365
320
s32 var1, var2;
366
321
367
-
var1 = (((adc_temp >> 3) - ((s32)calib->T1 << 1)) *
322
+
var1 = (((((s32)adc_temp) >> 3) - ((s32)calib->T1 << 1)) *
368
323
((s32)calib->T2)) >> 11;
369
-
var2 = (((((adc_temp >> 4) - ((s32)calib->T1)) *
370
-
((adc_temp >> 4) - ((s32)calib->T1))) >> 12) *
371
-
((s32)calib->T3)) >> 14;
372
-
data->t_fine = var1 + var2;
324
+
var2 = (((((((s32)adc_temp) >> 4) - ((s32)calib->T1)) *
325
+
((((s32)adc_temp >> 4) - ((s32)calib->T1))) >> 12) *
326
+
((s32)calib->T3))) >> 14;
327
+
return var1 + var2; /* t_fine = var1 + var2 */
328
+
}
373
329
374
-
return (data->t_fine * 5 + 128) >> 8;
330
+
static int bmp280_get_t_fine(struct bmp280_data *data, s32 *t_fine)
331
+
{
332
+
u32 adc_temp;
333
+
int ret;
334
+
335
+
ret = bmp280_read_temp_adc(data, &adc_temp);
336
+
if (ret)
337
+
return ret;
338
+
339
+
*t_fine = bmp280_calc_t_fine(data, adc_temp);
340
+
341
+
return 0;
342
+
}
343
+
344
+
static s32 bmp280_compensate_temp(struct bmp280_data *data, u32 adc_temp)
345
+
{
346
+
return (bmp280_calc_t_fine(data, adc_temp) * 5 + 128) / 256;
347
+
}
348
+
349
+
static int bmp280_read_press_adc(struct bmp280_data *data, u32 *adc_press)
350
+
{
351
+
u32 value_press;
352
+
int ret;
353
+
354
+
ret = regmap_bulk_read(data->regmap, BMP280_REG_PRESS_MSB,
355
+
data->buf, sizeof(data->buf));
356
+
if (ret) {
357
+
dev_err(data->dev, "failed to read pressure\n");
358
+
return ret;
359
+
}
360
+
361
+
value_press = FIELD_GET(BMP280_MEAS_TRIM_MASK, get_unaligned_be24(data->buf));
362
+
if (value_press == BMP280_PRESS_SKIPPED) {
363
+
dev_err(data->dev, "reading pressure skipped\n");
364
+
return -EIO;
365
+
}
366
+
*adc_press = value_press;
367
+
368
+
return 0;
375
369
}
376
370
377
371
/*
···
420
338
* Taken from datasheet, Section 3.11.3, "Compensation formula".
421
339
*/
422
340
static u32 bmp280_compensate_press(struct bmp280_data *data,
423
-
s32 adc_press)
341
+
u32 adc_press, s32 t_fine)
424
342
{
425
343
struct bmp280_calib *calib = &data->calib.bmp280;
426
344
s64 var1, var2, p;
427
345
428
-
var1 = ((s64)data->t_fine) - 128000;
346
+
var1 = ((s64)t_fine) - 128000;
429
347
var2 = var1 * var1 * (s64)calib->P6;
430
348
var2 += (var1 * (s64)calib->P5) << 17;
431
349
var2 += ((s64)calib->P4) << 35;
···
436
354
if (var1 == 0)
437
355
return 0;
438
356
439
-
p = ((((s64)1048576 - adc_press) << 31) - var2) * 3125;
357
+
p = ((((s64)1048576 - (s32)adc_press) << 31) - var2) * 3125;
440
358
p = div64_s64(p, var1);
441
359
var1 = (((s64)calib->P9) * (p >> 13) * (p >> 13)) >> 25;
442
360
var2 = ((s64)(calib->P8) * p) >> 19;
···
448
366
static int bmp280_read_temp(struct bmp280_data *data,
449
367
int *val, int *val2)
450
368
{
451
-
s32 adc_temp, comp_temp;
369
+
s32 comp_temp;
370
+
u32 adc_temp;
452
371
int ret;
453
372
454
-
ret = regmap_bulk_read(data->regmap, BMP280_REG_TEMP_MSB,
455
-
data->buf, sizeof(data->buf));
456
-
if (ret < 0) {
457
-
dev_err(data->dev, "failed to read temperature\n");
373
+
ret = bmp280_read_temp_adc(data, &adc_temp);
374
+
if (ret)
458
375
return ret;
459
-
}
460
376
461
-
adc_temp = FIELD_GET(BMP280_MEAS_TRIM_MASK, get_unaligned_be24(data->buf));
462
-
if (adc_temp == BMP280_TEMP_SKIPPED) {
463
-
/* reading was skipped */
464
-
dev_err(data->dev, "reading temperature skipped\n");
465
-
return -EIO;
466
-
}
467
377
comp_temp = bmp280_compensate_temp(data, adc_temp);
468
378
469
-
/*
470
-
* val might be NULL if we're called by the read_press routine,
471
-
* who only cares about the carry over t_fine value.
472
-
*/
473
-
if (val) {
474
-
*val = comp_temp * 10;
475
-
return IIO_VAL_INT;
476
-
}
477
-
478
-
return 0;
379
+
*val = comp_temp * 10;
380
+
return IIO_VAL_INT;
479
381
}
480
382
481
383
static int bmp280_read_press(struct bmp280_data *data,
482
384
int *val, int *val2)
483
385
{
484
-
u32 comp_press;
485
-
s32 adc_press;
386
+
u32 comp_press, adc_press, t_fine;
486
387
int ret;
487
388
488
-
/* Read and compensate temperature so we get a reading of t_fine. */
489
-
ret = bmp280_read_temp(data, NULL, NULL);
490
-
if (ret < 0)
389
+
ret = bmp280_get_t_fine(data, &t_fine);
390
+
if (ret)
491
391
return ret;
492
392
493
-
ret = regmap_bulk_read(data->regmap, BMP280_REG_PRESS_MSB,
494
-
data->buf, sizeof(data->buf));
495
-
if (ret < 0) {
496
-
dev_err(data->dev, "failed to read pressure\n");
393
+
ret = bmp280_read_press_adc(data, &adc_press);
394
+
if (ret)
497
395
return ret;
498
-
}
499
396
500
-
adc_press = FIELD_GET(BMP280_MEAS_TRIM_MASK, get_unaligned_be24(data->buf));
501
-
if (adc_press == BMP280_PRESS_SKIPPED) {
502
-
/* reading was skipped */
503
-
dev_err(data->dev, "reading pressure skipped\n");
504
-
return -EIO;
505
-
}
506
-
comp_press = bmp280_compensate_press(data, adc_press);
397
+
comp_press = bmp280_compensate_press(data, adc_press, t_fine);
507
398
508
399
*val = comp_press;
509
400
*val2 = 256000;
···
484
429
return IIO_VAL_FRACTIONAL;
485
430
}
486
431
487
-
static int bmp280_read_humid(struct bmp280_data *data, int *val, int *val2)
432
+
static int bme280_read_humid(struct bmp280_data *data, int *val, int *val2)
488
433
{
489
434
u32 comp_humidity;
490
-
s32 adc_humidity;
435
+
u16 adc_humidity;
436
+
s32 t_fine;
491
437
int ret;
492
438
493
-
/* Read and compensate temperature so we get a reading of t_fine. */
494
-
ret = bmp280_read_temp(data, NULL, NULL);
495
-
if (ret < 0)
439
+
ret = bmp280_get_t_fine(data, &t_fine);
440
+
if (ret)
496
441
return ret;
497
442
498
-
ret = regmap_bulk_read(data->regmap, BMP280_REG_HUMIDITY_MSB,
499
-
&data->be16, sizeof(data->be16));
500
-
if (ret < 0) {
501
-
dev_err(data->dev, "failed to read humidity\n");
443
+
ret = bme280_read_humid_adc(data, &adc_humidity);
444
+
if (ret)
502
445
return ret;
503
-
}
504
446
505
-
adc_humidity = be16_to_cpu(data->be16);
506
-
if (adc_humidity == BMP280_HUMIDITY_SKIPPED) {
507
-
/* reading was skipped */
508
-
dev_err(data->dev, "reading humidity skipped\n");
509
-
return -EIO;
510
-
}
511
-
comp_humidity = bmp280_compensate_humidity(data, adc_humidity);
447
+
comp_humidity = bme280_compensate_humidity(data, adc_humidity, t_fine);
512
448
513
449
*val = comp_humidity * 1000 / 1024;
514
450
515
451
return IIO_VAL_INT;
452
+
}
453
+
454
+
static int bmp280_read_raw_impl(struct iio_dev *indio_dev,
455
+
struct iio_chan_spec const *chan,
456
+
int *val, int *val2, long mask)
457
+
{
458
+
struct bmp280_data *data = iio_priv(indio_dev);
459
+
460
+
guard(mutex)(&data->lock);
461
+
462
+
switch (mask) {
463
+
case IIO_CHAN_INFO_PROCESSED:
464
+
switch (chan->type) {
465
+
case IIO_HUMIDITYRELATIVE:
466
+
return data->chip_info->read_humid(data, val, val2);
467
+
case IIO_PRESSURE:
468
+
return data->chip_info->read_press(data, val, val2);
469
+
case IIO_TEMP:
470
+
return data->chip_info->read_temp(data, val, val2);
471
+
default:
472
+
return -EINVAL;
473
+
}
474
+
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
475
+
switch (chan->type) {
476
+
case IIO_HUMIDITYRELATIVE:
477
+
*val = 1 << data->oversampling_humid;
478
+
return IIO_VAL_INT;
479
+
case IIO_PRESSURE:
480
+
*val = 1 << data->oversampling_press;
481
+
return IIO_VAL_INT;
482
+
case IIO_TEMP:
483
+
*val = 1 << data->oversampling_temp;
484
+
return IIO_VAL_INT;
485
+
default:
486
+
return -EINVAL;
487
+
}
488
+
case IIO_CHAN_INFO_SAMP_FREQ:
489
+
if (!data->chip_info->sampling_freq_avail)
490
+
return -EINVAL;
491
+
492
+
*val = data->chip_info->sampling_freq_avail[data->sampling_freq][0];
493
+
*val2 = data->chip_info->sampling_freq_avail[data->sampling_freq][1];
494
+
return IIO_VAL_INT_PLUS_MICRO;
495
+
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
496
+
if (!data->chip_info->iir_filter_coeffs_avail)
497
+
return -EINVAL;
498
+
499
+
*val = (1 << data->iir_filter_coeff) - 1;
500
+
return IIO_VAL_INT;
501
+
default:
502
+
return -EINVAL;
503
+
}
516
504
}
517
505
518
506
static int bmp280_read_raw(struct iio_dev *indio_dev,
···
566
468
int ret;
567
469
568
470
pm_runtime_get_sync(data->dev);
569
-
mutex_lock(&data->lock);
570
-
571
-
switch (mask) {
572
-
case IIO_CHAN_INFO_PROCESSED:
573
-
switch (chan->type) {
574
-
case IIO_HUMIDITYRELATIVE:
575
-
ret = data->chip_info->read_humid(data, val, val2);
576
-
break;
577
-
case IIO_PRESSURE:
578
-
ret = data->chip_info->read_press(data, val, val2);
579
-
break;
580
-
case IIO_TEMP:
581
-
ret = data->chip_info->read_temp(data, val, val2);
582
-
break;
583
-
default:
584
-
ret = -EINVAL;
585
-
break;
586
-
}
587
-
break;
588
-
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
589
-
switch (chan->type) {
590
-
case IIO_HUMIDITYRELATIVE:
591
-
*val = 1 << data->oversampling_humid;
592
-
ret = IIO_VAL_INT;
593
-
break;
594
-
case IIO_PRESSURE:
595
-
*val = 1 << data->oversampling_press;
596
-
ret = IIO_VAL_INT;
597
-
break;
598
-
case IIO_TEMP:
599
-
*val = 1 << data->oversampling_temp;
600
-
ret = IIO_VAL_INT;
601
-
break;
602
-
default:
603
-
ret = -EINVAL;
604
-
break;
605
-
}
606
-
break;
607
-
case IIO_CHAN_INFO_SAMP_FREQ:
608
-
if (!data->chip_info->sampling_freq_avail) {
609
-
ret = -EINVAL;
610
-
break;
611
-
}
612
-
613
-
*val = data->chip_info->sampling_freq_avail[data->sampling_freq][0];
614
-
*val2 = data->chip_info->sampling_freq_avail[data->sampling_freq][1];
615
-
ret = IIO_VAL_INT_PLUS_MICRO;
616
-
break;
617
-
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
618
-
if (!data->chip_info->iir_filter_coeffs_avail) {
619
-
ret = -EINVAL;
620
-
break;
621
-
}
622
-
623
-
*val = (1 << data->iir_filter_coeff) - 1;
624
-
ret = IIO_VAL_INT;
625
-
break;
626
-
default:
627
-
ret = -EINVAL;
628
-
break;
629
-
}
630
-
631
-
mutex_unlock(&data->lock);
471
+
ret = bmp280_read_raw_impl(indio_dev, chan, val, val2, mask);
632
472
pm_runtime_mark_last_busy(data->dev);
633
473
pm_runtime_put_autosuspend(data->dev);
634
474
635
475
return ret;
636
476
}
637
477
638
-
static int bmp280_write_oversampling_ratio_humid(struct bmp280_data *data,
639
-
int val)
478
+
static int bme280_write_oversampling_ratio_humid(struct bmp280_data *data,
479
+
int val)
640
480
{
641
481
const int *avail = data->chip_info->oversampling_humid_avail;
642
482
const int n = data->chip_info->num_oversampling_humid_avail;
···
599
563
}
600
564
601
565
static int bmp280_write_oversampling_ratio_temp(struct bmp280_data *data,
602
-
int val)
566
+
int val)
603
567
{
604
568
const int *avail = data->chip_info->oversampling_temp_avail;
605
569
const int n = data->chip_info->num_oversampling_temp_avail;
···
624
588
}
625
589
626
590
static int bmp280_write_oversampling_ratio_press(struct bmp280_data *data,
627
-
int val)
591
+
int val)
628
592
{
629
593
const int *avail = data->chip_info->oversampling_press_avail;
630
594
const int n = data->chip_info->num_oversampling_press_avail;
···
698
662
return -EINVAL;
699
663
}
700
664
701
-
static int bmp280_write_raw(struct iio_dev *indio_dev,
702
-
struct iio_chan_spec const *chan,
703
-
int val, int val2, long mask)
665
+
static int bmp280_write_raw_impl(struct iio_dev *indio_dev,
666
+
struct iio_chan_spec const *chan,
667
+
int val, int val2, long mask)
704
668
{
705
669
struct bmp280_data *data = iio_priv(indio_dev);
706
-
int ret = 0;
670
+
671
+
guard(mutex)(&data->lock);
707
672
708
673
/*
709
674
* Helper functions to update sensor running configuration.
···
714
677
*/
715
678
switch (mask) {
716
679
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
717
-
pm_runtime_get_sync(data->dev);
718
-
mutex_lock(&data->lock);
719
680
switch (chan->type) {
720
681
case IIO_HUMIDITYRELATIVE:
721
-
ret = bmp280_write_oversampling_ratio_humid(data, val);
722
-
break;
682
+
return bme280_write_oversampling_ratio_humid(data, val);
723
683
case IIO_PRESSURE:
724
-
ret = bmp280_write_oversampling_ratio_press(data, val);
725
-
break;
684
+
return bmp280_write_oversampling_ratio_press(data, val);
726
685
case IIO_TEMP:
727
-
ret = bmp280_write_oversampling_ratio_temp(data, val);
728
-
break;
686
+
return bmp280_write_oversampling_ratio_temp(data, val);
729
687
default:
730
-
ret = -EINVAL;
731
-
break;
688
+
return -EINVAL;
732
689
}
733
-
mutex_unlock(&data->lock);
734
-
pm_runtime_mark_last_busy(data->dev);
735
-
pm_runtime_put_autosuspend(data->dev);
736
-
break;
737
690
case IIO_CHAN_INFO_SAMP_FREQ:
738
-
pm_runtime_get_sync(data->dev);
739
-
mutex_lock(&data->lock);
740
-
ret = bmp280_write_sampling_frequency(data, val, val2);
741
-
mutex_unlock(&data->lock);
742
-
pm_runtime_mark_last_busy(data->dev);
743
-
pm_runtime_put_autosuspend(data->dev);
744
-
break;
691
+
return bmp280_write_sampling_frequency(data, val, val2);
745
692
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
746
-
pm_runtime_get_sync(data->dev);
747
-
mutex_lock(&data->lock);
748
-
ret = bmp280_write_iir_filter_coeffs(data, val);
749
-
mutex_unlock(&data->lock);
750
-
pm_runtime_mark_last_busy(data->dev);
751
-
pm_runtime_put_autosuspend(data->dev);
752
-
break;
693
+
return bmp280_write_iir_filter_coeffs(data, val);
753
694
default:
754
695
return -EINVAL;
755
696
}
697
+
}
698
+
699
+
static int bmp280_write_raw(struct iio_dev *indio_dev,
700
+
struct iio_chan_spec const *chan,
701
+
int val, int val2, long mask)
702
+
{
703
+
struct bmp280_data *data = iio_priv(indio_dev);
704
+
int ret;
705
+
706
+
pm_runtime_get_sync(data->dev);
707
+
ret = bmp280_write_raw_impl(indio_dev, chan, val, val2, mask);
708
+
pm_runtime_mark_last_busy(data->dev);
709
+
pm_runtime_put_autosuspend(data->dev);
756
710
757
711
return ret;
758
712
}
···
800
772
int ret;
801
773
802
774
ret = regmap_write_bits(data->regmap, BMP280_REG_CTRL_MEAS,
803
-
BMP280_OSRS_TEMP_MASK |
804
-
BMP280_OSRS_PRESS_MASK |
805
-
BMP280_MODE_MASK,
806
-
osrs | BMP280_MODE_NORMAL);
807
-
if (ret < 0) {
808
-
dev_err(data->dev,
809
-
"failed to write ctrl_meas register\n");
775
+
BMP280_OSRS_TEMP_MASK |
776
+
BMP280_OSRS_PRESS_MASK |
777
+
BMP280_MODE_MASK,
778
+
osrs | BMP280_MODE_NORMAL);
779
+
if (ret) {
780
+
dev_err(data->dev, "failed to write ctrl_meas register\n");
810
781
return ret;
811
782
}
812
783
813
784
ret = regmap_update_bits(data->regmap, BMP280_REG_CONFIG,
814
785
BMP280_FILTER_MASK,
815
786
BMP280_FILTER_4X);
816
-
if (ret < 0) {
817
-
dev_err(data->dev,
818
-
"failed to write config register\n");
787
+
if (ret) {
788
+
dev_err(data->dev, "failed to write config register\n");
819
789
return ret;
820
790
}
821
791
···
859
833
860
834
static int bme280_chip_config(struct bmp280_data *data)
861
835
{
862
-
u8 osrs = FIELD_PREP(BMP280_OSRS_HUMIDITY_MASK, data->oversampling_humid + 1);
836
+
u8 osrs = FIELD_PREP(BME280_OSRS_HUMIDITY_MASK, data->oversampling_humid + 1);
863
837
int ret;
864
838
865
839
/*
866
840
* Oversampling of humidity must be set before oversampling of
867
841
* temperature/pressure is set to become effective.
868
842
*/
869
-
ret = regmap_update_bits(data->regmap, BMP280_REG_CTRL_HUMIDITY,
870
-
BMP280_OSRS_HUMIDITY_MASK, osrs);
871
-
872
-
if (ret < 0)
843
+
ret = regmap_update_bits(data->regmap, BME280_REG_CTRL_HUMIDITY,
844
+
BME280_OSRS_HUMIDITY_MASK, osrs);
845
+
if (ret) {
846
+
dev_err(data->dev, "failed to set humidity oversampling");
873
847
return ret;
848
+
}
874
849
875
850
return bmp280_chip_config(data);
876
851
}
···
897
870
898
871
.oversampling_humid_avail = bmp280_oversampling_avail,
899
872
.num_oversampling_humid_avail = ARRAY_SIZE(bmp280_oversampling_avail),
900
-
.oversampling_humid_default = BMP280_OSRS_HUMIDITY_16X - 1,
873
+
.oversampling_humid_default = BME280_OSRS_HUMIDITY_16X - 1,
901
874
902
875
.chip_config = bme280_chip_config,
903
876
.read_temp = bmp280_read_temp,
904
877
.read_press = bmp280_read_press,
905
-
.read_humid = bmp280_read_humid,
878
+
.read_humid = bme280_read_humid,
906
879
.read_calib = bme280_read_calib,
907
880
};
908
881
EXPORT_SYMBOL_NS(bme280_chip_info, IIO_BMP280);
···
952
925
return 0;
953
926
}
954
927
928
+
static int bmp380_read_temp_adc(struct bmp280_data *data, u32 *adc_temp)
929
+
{
930
+
u32 value_temp;
931
+
int ret;
932
+
933
+
ret = regmap_bulk_read(data->regmap, BMP380_REG_TEMP_XLSB,
934
+
data->buf, sizeof(data->buf));
935
+
if (ret) {
936
+
dev_err(data->dev, "failed to read temperature\n");
937
+
return ret;
938
+
}
939
+
940
+
value_temp = get_unaligned_le24(data->buf);
941
+
if (value_temp == BMP380_TEMP_SKIPPED) {
942
+
dev_err(data->dev, "reading temperature skipped\n");
943
+
return -EIO;
944
+
}
945
+
*adc_temp = value_temp;
946
+
947
+
return 0;
948
+
}
949
+
955
950
/*
956
-
* Returns temperature in Celsius degrees, resolution is 0.01º C. Output value of
957
-
* "5123" equals 51.2º C. t_fine carries fine temperature as global value.
951
+
* Returns temperature in Celsius degrees, resolution is 0.01º C. Output value
952
+
* of "5123" equals 51.2º C. t_fine carries fine temperature as global value.
958
953
*
959
954
* Taken from datasheet, Section Appendix 9, "Compensation formula" and repo
960
955
* https://github.com/BoschSensortec/BMP3-Sensor-API.
961
956
*/
962
-
static s32 bmp380_compensate_temp(struct bmp280_data *data, u32 adc_temp)
957
+
static s32 bmp380_calc_t_fine(struct bmp280_data *data, u32 adc_temp)
963
958
{
964
-
s64 var1, var2, var3, var4, var5, var6, comp_temp;
959
+
s64 var1, var2, var3, var4, var5, var6;
965
960
struct bmp380_calib *calib = &data->calib.bmp380;
966
961
967
962
var1 = ((s64) adc_temp) - (((s64) calib->T1) << 8);
···
992
943
var4 = var3 * ((s64) calib->T3);
993
944
var5 = (var2 << 18) + var4;
994
945
var6 = var5 >> 32;
995
-
data->t_fine = (s32) var6;
946
+
return (s32)var6; /* t_fine = var6 */
947
+
}
948
+
949
+
static int bmp380_get_t_fine(struct bmp280_data *data, s32 *t_fine)
950
+
{
951
+
s32 adc_temp;
952
+
int ret;
953
+
954
+
ret = bmp380_read_temp_adc(data, &adc_temp);
955
+
if (ret)
956
+
return ret;
957
+
958
+
*t_fine = bmp380_calc_t_fine(data, adc_temp);
959
+
960
+
return 0;
961
+
}
962
+
963
+
static int bmp380_compensate_temp(struct bmp280_data *data, u32 adc_temp)
964
+
{
965
+
s64 comp_temp;
966
+
s32 var6;
967
+
968
+
var6 = bmp380_calc_t_fine(data, adc_temp);
996
969
comp_temp = (var6 * 25) >> 14;
997
970
998
971
comp_temp = clamp_val(comp_temp, BMP380_MIN_TEMP, BMP380_MAX_TEMP);
999
972
return (s32) comp_temp;
973
+
}
974
+
975
+
static int bmp380_read_press_adc(struct bmp280_data *data, u32 *adc_press)
976
+
{
977
+
u32 value_press;
978
+
int ret;
979
+
980
+
ret = regmap_bulk_read(data->regmap, BMP380_REG_PRESS_XLSB,
981
+
data->buf, sizeof(data->buf));
982
+
if (ret) {
983
+
dev_err(data->dev, "failed to read pressure\n");
984
+
return ret;
985
+
}
986
+
987
+
value_press = get_unaligned_le24(data->buf);
988
+
if (value_press == BMP380_PRESS_SKIPPED) {
989
+
dev_err(data->dev, "reading pressure skipped\n");
990
+
return -EIO;
991
+
}
992
+
*adc_press = value_press;
993
+
994
+
return 0;
1000
995
}
1001
996
1002
997
/*
···
1050
957
* Taken from datasheet, Section 9.3. "Pressure compensation" and repository
1051
958
* https://github.com/BoschSensortec/BMP3-Sensor-API.
1052
959
*/
1053
-
static u32 bmp380_compensate_press(struct bmp280_data *data, u32 adc_press)
960
+
static u32 bmp380_compensate_press(struct bmp280_data *data,
961
+
u32 adc_press, s32 t_fine)
1054
962
{
1055
963
s64 var1, var2, var3, var4, var5, var6, offset, sensitivity;
1056
964
struct bmp380_calib *calib = &data->calib.bmp380;
1057
965
u32 comp_press;
1058
966
1059
-
var1 = (s64)data->t_fine * (s64)data->t_fine;
967
+
var1 = (s64)t_fine * (s64)t_fine;
1060
968
var2 = var1 >> 6;
1061
-
var3 = (var2 * ((s64) data->t_fine)) >> 8;
969
+
var3 = (var2 * ((s64)t_fine)) >> 8;
1062
970
var4 = ((s64)calib->P8 * var3) >> 5;
1063
971
var5 = ((s64)calib->P7 * var1) << 4;
1064
-
var6 = ((s64)calib->P6 * (s64)data->t_fine) << 22;
972
+
var6 = ((s64)calib->P6 * (s64)t_fine) << 22;
1065
973
offset = ((s64)calib->P5 << 47) + var4 + var5 + var6;
1066
974
var2 = ((s64)calib->P4 * var3) >> 5;
1067
975
var4 = ((s64)calib->P3 * var1) << 2;
1068
976
var5 = ((s64)calib->P2 - ((s64)1 << 14)) *
1069
-
((s64)data->t_fine << 21);
977
+
((s64)t_fine << 21);
1070
978
sensitivity = (((s64) calib->P1 - ((s64) 1 << 14)) << 46) +
1071
979
var2 + var4 + var5;
1072
980
var1 = (sensitivity >> 24) * (s64)adc_press;
1073
-
var2 = (s64)calib->P10 * (s64)data->t_fine;
981
+
var2 = (s64)calib->P10 * (s64)t_fine;
1074
982
var3 = var2 + ((s64)calib->P9 << 16);
1075
983
var4 = (var3 * (s64)adc_press) >> 13;
1076
984
···
1097
1003
u32 adc_temp;
1098
1004
int ret;
1099
1005
1100
-
ret = regmap_bulk_read(data->regmap, BMP380_REG_TEMP_XLSB,
1101
-
data->buf, sizeof(data->buf));
1102
-
if (ret) {
1103
-
dev_err(data->dev, "failed to read temperature\n");
1006
+
ret = bmp380_read_temp_adc(data, &adc_temp);
1007
+
if (ret)
1104
1008
return ret;
1105
-
}
1106
1009
1107
-
adc_temp = get_unaligned_le24(data->buf);
1108
-
if (adc_temp == BMP380_TEMP_SKIPPED) {
1109
-
dev_err(data->dev, "reading temperature skipped\n");
1110
-
return -EIO;
1111
-
}
1112
1010
comp_temp = bmp380_compensate_temp(data, adc_temp);
1113
1011
1114
-
/*
1115
-
* Val might be NULL if we're called by the read_press routine,
1116
-
* who only cares about the carry over t_fine value.
1117
-
*/
1118
-
if (val) {
1119
-
/* IIO reports temperatures in milli Celsius */
1120
-
*val = comp_temp * 10;
1121
-
return IIO_VAL_INT;
1122
-
}
1123
-
1124
-
return 0;
1012
+
*val = comp_temp * 10;
1013
+
return IIO_VAL_INT;
1125
1014
}
1126
1015
1127
1016
static int bmp380_read_press(struct bmp280_data *data, int *val, int *val2)
1128
1017
{
1129
-
s32 comp_press;
1130
-
u32 adc_press;
1018
+
u32 adc_press, comp_press, t_fine;
1131
1019
int ret;
1132
1020
1133
-
/* Read and compensate for temperature so we get a reading of t_fine */
1134
-
ret = bmp380_read_temp(data, NULL, NULL);
1021
+
ret = bmp380_get_t_fine(data, &t_fine);
1135
1022
if (ret)
1136
1023
return ret;
1137
1024
1138
-
ret = regmap_bulk_read(data->regmap, BMP380_REG_PRESS_XLSB,
1139
-
data->buf, sizeof(data->buf));
1140
-
if (ret) {
1141
-
dev_err(data->dev, "failed to read pressure\n");
1025
+
ret = bmp380_read_press_adc(data, &adc_press);
1026
+
if (ret)
1142
1027
return ret;
1143
-
}
1144
1028
1145
-
adc_press = get_unaligned_le24(data->buf);
1146
-
if (adc_press == BMP380_PRESS_SKIPPED) {
1147
-
dev_err(data->dev, "reading pressure skipped\n");
1148
-
return -EIO;
1149
-
}
1150
-
comp_press = bmp380_compensate_press(data, adc_press);
1029
+
comp_press = bmp380_compensate_press(data, adc_press, t_fine);
1151
1030
1152
1031
*val = comp_press;
1153
-
/* Compensated pressure is in cPa (centipascals) */
1154
1032
*val2 = 100000;
1155
1033
1156
1034
return IIO_VAL_FRACTIONAL;
···
1135
1069
1136
1070
/* Read temperature and pressure calibration data */
1137
1071
ret = regmap_bulk_read(data->regmap, BMP380_REG_CALIB_TEMP_START,
1138
-
data->bmp380_cal_buf, sizeof(data->bmp380_cal_buf));
1072
+
data->bmp380_cal_buf,
1073
+
sizeof(data->bmp380_cal_buf));
1139
1074
if (ret) {
1140
1075
dev_err(data->dev,
1141
-
"failed to read temperature calibration parameters\n");
1076
+
"failed to read calibration parameters\n");
1142
1077
return ret;
1143
1078
}
1144
1079
1145
1080
/* Toss the temperature calibration data into the entropy pool */
1146
-
add_device_randomness(data->bmp380_cal_buf, sizeof(data->bmp380_cal_buf));
1081
+
add_device_randomness(data->bmp380_cal_buf,
1082
+
sizeof(data->bmp380_cal_buf));
1147
1083
1148
1084
/* Parse calibration values */
1149
1085
calib->T1 = get_unaligned_le16(&data->bmp380_cal_buf[BMP380_T1]);
···
1227
1159
1228
1160
/* Configure output data rate */
1229
1161
ret = regmap_update_bits_check(data->regmap, BMP380_REG_ODR,
1230
-
BMP380_ODRS_MASK, data->sampling_freq, &aux);
1162
+
BMP380_ODRS_MASK, data->sampling_freq,
1163
+
&aux);
1231
1164
if (ret) {
1232
1165
dev_err(data->dev, "failed to write ODR selection register\n");
1233
1166
return ret;
···
1247
1178
1248
1179
if (change) {
1249
1180
/*
1250
-
* The configurations errors are detected on the fly during a measurement
1251
-
* cycle. If the sampling frequency is too low, it's faster to reset
1252
-
* the measurement loop than wait until the next measurement is due.
1181
+
* The configurations errors are detected on the fly during a
1182
+
* measurement cycle. If the sampling frequency is too low, it's
1183
+
* faster to reset the measurement loop than wait until the next
1184
+
* measurement is due.
1253
1185
*
1254
-
* Resets sensor measurement loop toggling between sleep and normal
1255
-
* operating modes.
1186
+
* Resets sensor measurement loop toggling between sleep and
1187
+
* normal operating modes.
1256
1188
*/
1257
1189
ret = regmap_write_bits(data->regmap, BMP380_REG_POWER_CONTROL,
1258
1190
BMP380_MODE_MASK,
···
1271
1201
return ret;
1272
1202
}
1273
1203
/*
1274
-
* Waits for measurement before checking configuration error flag.
1275
-
* Selected longest measure time indicated in section 3.9.1
1276
-
* in the datasheet.
1204
+
* Waits for measurement before checking configuration error
1205
+
* flag. Selected longest measure time indicated in
1206
+
* section 3.9.1 in the datasheet.
1277
1207
*/
1278
1208
msleep(80);
1279
1209
1280
1210
/* Check config error flag */
1281
1211
ret = regmap_read(data->regmap, BMP380_REG_ERROR, &tmp);
1282
1212
if (ret) {
1283
-
dev_err(data->dev,
1284
-
"failed to read error register\n");
1213
+
dev_err(data->dev, "failed to read error register\n");
1285
1214
return ret;
1286
1215
}
1287
1216
if (tmp & BMP380_ERR_CONF_MASK) {
1288
1217
dev_warn(data->dev,
1289
-
"sensor flagged configuration as incompatible\n");
1218
+
"sensor flagged configuration as incompatible\n");
1290
1219
return -EINVAL;
1291
1220
}
1292
1221
}
···
1386
1317
}
1387
1318
1388
1319
/* Start NVM operation sequence */
1389
-
ret = regmap_write(data->regmap, BMP580_REG_CMD, BMP580_CMD_NVM_OP_SEQ_0);
1320
+
ret = regmap_write(data->regmap, BMP580_REG_CMD,
1321
+
BMP580_CMD_NVM_OP_SEQ_0);
1390
1322
if (ret) {
1391
-
dev_err(data->dev, "failed to send nvm operation's first sequence\n");
1323
+
dev_err(data->dev,
1324
+
"failed to send nvm operation's first sequence\n");
1392
1325
return ret;
1393
1326
}
1394
1327
if (is_write) {
···
1398
1327
ret = regmap_write(data->regmap, BMP580_REG_CMD,
1399
1328
BMP580_CMD_NVM_WRITE_SEQ_1);
1400
1329
if (ret) {
1401
-
dev_err(data->dev, "failed to send nvm write sequence\n");
1330
+
dev_err(data->dev,
1331
+
"failed to send nvm write sequence\n");
1402
1332
return ret;
1403
1333
}
1404
1334
/* Datasheet says on 4.8.1.2 it takes approximately 10ms */
···
1410
1338
ret = regmap_write(data->regmap, BMP580_REG_CMD,
1411
1339
BMP580_CMD_NVM_READ_SEQ_1);
1412
1340
if (ret) {
1413
-
dev_err(data->dev, "failed to send nvm read sequence\n");
1341
+
dev_err(data->dev,
1342
+
"failed to send nvm read sequence\n");
1414
1343
return ret;
1415
1344
}
1416
1345
/* Datasheet says on 4.8.1.1 it takes approximately 200us */
1417
1346
poll = 50;
1418
1347
timeout = 400;
1419
-
}
1420
-
if (ret) {
1421
-
dev_err(data->dev, "failed to write command sequence\n");
1422
-
return -EIO;
1423
1348
}
1424
1349
1425
1350
/* Wait until NVM is ready again */
···
1534
1465
1535
1466
static const int bmp580_nvmem_addrs[] = { 0x20, 0x21, 0x22 };
1536
1467
1537
-
static int bmp580_nvmem_read(void *priv, unsigned int offset, void *val,
1538
-
size_t bytes)
1468
+
static int bmp580_nvmem_read_impl(void *priv, unsigned int offset, void *val,
1469
+
size_t bytes)
1539
1470
{
1540
1471
struct bmp280_data *data = priv;
1541
1472
u16 *dst = val;
1542
1473
int ret, addr;
1543
1474
1544
-
pm_runtime_get_sync(data->dev);
1545
-
mutex_lock(&data->lock);
1475
+
guard(mutex)(&data->lock);
1546
1476
1547
1477
/* Set sensor in standby mode */
1548
1478
ret = regmap_update_bits(data->regmap, BMP580_REG_ODR_CONFIG,
···
1569
1501
if (ret)
1570
1502
goto exit;
1571
1503
1572
-
ret = regmap_bulk_read(data->regmap, BMP580_REG_NVM_DATA_LSB, &data->le16,
1573
-
sizeof(data->le16));
1504
+
ret = regmap_bulk_read(data->regmap, BMP580_REG_NVM_DATA_LSB,
1505
+
&data->le16, sizeof(data->le16));
1574
1506
if (ret) {
1575
1507
dev_err(data->dev, "error reading nvm data regs\n");
1576
1508
goto exit;
···
1583
1515
exit:
1584
1516
/* Restore chip config */
1585
1517
data->chip_info->chip_config(data);
1586
-
mutex_unlock(&data->lock);
1587
-
pm_runtime_mark_last_busy(data->dev);
1588
-
pm_runtime_put_autosuspend(data->dev);
1589
1518
return ret;
1590
1519
}
1591
1520
1592
-
static int bmp580_nvmem_write(void *priv, unsigned int offset, void *val,
1593
-
size_t bytes)
1521
+
static int bmp580_nvmem_read(void *priv, unsigned int offset, void *val,
1522
+
size_t bytes)
1523
+
{
1524
+
struct bmp280_data *data = priv;
1525
+
int ret;
1526
+
1527
+
pm_runtime_get_sync(data->dev);
1528
+
ret = bmp580_nvmem_read_impl(priv, offset, val, bytes);
1529
+
pm_runtime_mark_last_busy(data->dev);
1530
+
pm_runtime_put_autosuspend(data->dev);
1531
+
1532
+
return ret;
1533
+
}
1534
+
1535
+
static int bmp580_nvmem_write_impl(void *priv, unsigned int offset, void *val,
1536
+
size_t bytes)
1594
1537
{
1595
1538
struct bmp280_data *data = priv;
1596
1539
u16 *buf = val;
1597
1540
int ret, addr;
1598
1541
1599
-
pm_runtime_get_sync(data->dev);
1600
-
mutex_lock(&data->lock);
1542
+
guard(mutex)(&data->lock);
1601
1543
1602
1544
/* Set sensor in standby mode */
1603
1545
ret = regmap_update_bits(data->regmap, BMP580_REG_ODR_CONFIG,
···
1624
1546
while (bytes >= sizeof(*buf)) {
1625
1547
addr = bmp580_nvmem_addrs[offset / sizeof(*buf)];
1626
1548
1627
-
ret = regmap_write(data->regmap, BMP580_REG_NVM_ADDR, BMP580_NVM_PROG_EN |
1549
+
ret = regmap_write(data->regmap, BMP580_REG_NVM_ADDR,
1550
+
BMP580_NVM_PROG_EN |
1628
1551
FIELD_PREP(BMP580_NVM_ROW_ADDR_MASK, addr));
1629
1552
if (ret) {
1630
1553
dev_err(data->dev, "error writing nvm address\n");
···
1633
1554
}
1634
1555
data->le16 = cpu_to_le16(*buf++);
1635
1556
1636
-
ret = regmap_bulk_write(data->regmap, BMP580_REG_NVM_DATA_LSB, &data->le16,
1637
-
sizeof(data->le16));
1557
+
ret = regmap_bulk_write(data->regmap, BMP580_REG_NVM_DATA_LSB,
1558
+
&data->le16, sizeof(data->le16));
1638
1559
if (ret) {
1639
1560
dev_err(data->dev, "error writing LSB NVM data regs\n");
1640
1561
goto exit;
···
1658
1579
exit:
1659
1580
/* Restore chip config */
1660
1581
data->chip_info->chip_config(data);
1661
-
mutex_unlock(&data->lock);
1582
+
return ret;
1583
+
}
1584
+
1585
+
static int bmp580_nvmem_write(void *priv, unsigned int offset, void *val,
1586
+
size_t bytes)
1587
+
{
1588
+
struct bmp280_data *data = priv;
1589
+
int ret;
1590
+
1591
+
pm_runtime_get_sync(data->dev);
1592
+
ret = bmp580_nvmem_write_impl(priv, offset, val, bytes);
1662
1593
pm_runtime_mark_last_busy(data->dev);
1663
1594
pm_runtime_put_autosuspend(data->dev);
1595
+
1664
1596
return ret;
1665
1597
}
1666
1598
···
1697
1607
1698
1608
/* Post powerup sequence */
1699
1609
ret = regmap_read(data->regmap, BMP580_REG_CHIP_ID, ®);
1700
-
if (ret)
1610
+
if (ret) {
1611
+
dev_err(data->dev, "failed to establish comms with the chip\n");
1701
1612
return ret;
1613
+
}
1702
1614
1703
1615
/* Print warn message if we don't know the chip id */
1704
1616
if (reg != BMP580_CHIP_ID && reg != BMP580_CHIP_ID_ALT)
1705
-
dev_warn(data->dev, "preinit: unexpected chip_id\n");
1617
+
dev_warn(data->dev, "unexpected chip_id\n");
1706
1618
1707
1619
ret = regmap_read(data->regmap, BMP580_REG_STATUS, ®);
1708
-
if (ret)
1620
+
if (ret) {
1621
+
dev_err(data->dev, "failed to read nvm status\n");
1709
1622
return ret;
1623
+
}
1710
1624
1711
1625
/* Check nvm status */
1712
1626
if (!(reg & BMP580_STATUS_NVM_RDY_MASK) || (reg & BMP580_STATUS_NVM_ERR_MASK)) {
1713
-
dev_err(data->dev, "preinit: nvm error on powerup sequence\n");
1627
+
dev_err(data->dev, "nvm error on powerup sequence\n");
1714
1628
return -EIO;
1715
1629
}
1716
1630
···
1749
1655
BMP580_DSP_COMP_MASK |
1750
1656
BMP580_DSP_SHDW_IIR_TEMP_EN |
1751
1657
BMP580_DSP_SHDW_IIR_PRESS_EN, reg_val);
1658
+
if (ret) {
1659
+
dev_err(data->dev, "failed to change DSP mode settings\n");
1660
+
return ret;
1661
+
}
1752
1662
1753
1663
/* Configure oversampling */
1754
1664
reg_val = FIELD_PREP(BMP580_OSR_TEMP_MASK, data->oversampling_temp) |
···
1760
1662
BMP580_OSR_PRESS_EN;
1761
1663
1762
1664
ret = regmap_update_bits_check(data->regmap, BMP580_REG_OSR_CONFIG,
1763
-
BMP580_OSR_TEMP_MASK | BMP580_OSR_PRESS_MASK |
1665
+
BMP580_OSR_TEMP_MASK |
1666
+
BMP580_OSR_PRESS_MASK |
1764
1667
BMP580_OSR_PRESS_EN,
1765
1668
reg_val, &aux);
1766
1669
if (ret) {
···
1812
1713
*/
1813
1714
ret = regmap_read(data->regmap, BMP580_REG_EFF_OSR, &tmp);
1814
1715
if (ret) {
1815
-
dev_err(data->dev, "error reading effective OSR register\n");
1716
+
dev_err(data->dev,
1717
+
"error reading effective OSR register\n");
1816
1718
return ret;
1817
1719
}
1818
1720
if (!(tmp & BMP580_EFF_OSR_VALID_ODR)) {
···
1863
1763
};
1864
1764
EXPORT_SYMBOL_NS(bmp580_chip_info, IIO_BMP280);
1865
1765
1866
-
static int bmp180_measure(struct bmp280_data *data, u8 ctrl_meas)
1766
+
static int bmp180_wait_for_eoc(struct bmp280_data *data, u8 ctrl_meas)
1867
1767
{
1868
1768
const int conversion_time_max[] = { 4500, 7500, 13500, 25500 };
1869
1769
unsigned int delay_us;
···
1874
1774
reinit_completion(&data->done);
1875
1775
1876
1776
ret = regmap_write(data->regmap, BMP280_REG_CTRL_MEAS, ctrl_meas);
1877
-
if (ret)
1777
+
if (ret) {
1778
+
dev_err(data->dev, "failed to write crtl_meas register\n");
1878
1779
return ret;
1780
+
}
1879
1781
1880
1782
if (data->use_eoc) {
1881
1783
/*
···
1900
1798
}
1901
1799
1902
1800
ret = regmap_read(data->regmap, BMP280_REG_CTRL_MEAS, &ctrl);
1903
-
if (ret)
1801
+
if (ret) {
1802
+
dev_err(data->dev, "failed to read ctrl_meas register\n");
1904
1803
return ret;
1804
+
}
1905
1805
1906
1806
/* The value of this bit reset to "0" after conversion is complete */
1907
-
if (ctrl & BMP180_MEAS_SCO)
1807
+
if (ctrl & BMP180_MEAS_SCO) {
1808
+
dev_err(data->dev, "conversion didn't complete\n");
1908
1809
return -EIO;
1810
+
}
1909
1811
1910
1812
return 0;
1911
1813
}
1912
1814
1913
-
static int bmp180_read_adc_temp(struct bmp280_data *data, int *val)
1815
+
static int bmp180_read_temp_adc(struct bmp280_data *data, u32 *adc_temp)
1914
1816
{
1915
1817
int ret;
1916
1818
1917
-
ret = bmp180_measure(data,
1918
-
FIELD_PREP(BMP180_MEAS_CTRL_MASK, BMP180_MEAS_TEMP) |
1919
-
BMP180_MEAS_SCO);
1819
+
ret = bmp180_wait_for_eoc(data,
1820
+
FIELD_PREP(BMP180_MEAS_CTRL_MASK, BMP180_MEAS_TEMP) |
1821
+
BMP180_MEAS_SCO);
1920
1822
if (ret)
1921
1823
return ret;
1922
1824
1923
1825
ret = regmap_bulk_read(data->regmap, BMP180_REG_OUT_MSB,
1924
1826
&data->be16, sizeof(data->be16));
1925
-
if (ret)
1827
+
if (ret) {
1828
+
dev_err(data->dev, "failed to read temperature\n");
1926
1829
return ret;
1830
+
}
1927
1831
1928
-
*val = be16_to_cpu(data->be16);
1832
+
*adc_temp = be16_to_cpu(data->be16);
1929
1833
1930
1834
return 0;
1931
1835
}
···
1944
1836
1945
1837
ret = regmap_bulk_read(data->regmap, BMP180_REG_CALIB_START,
1946
1838
data->bmp180_cal_buf, sizeof(data->bmp180_cal_buf));
1947
-
1948
-
if (ret < 0)
1839
+
if (ret) {
1840
+
dev_err(data->dev, "failed to read calibration parameters\n");
1949
1841
return ret;
1842
+
}
1950
1843
1951
1844
/* None of the words has the value 0 or 0xFFFF */
1952
1845
for (i = 0; i < ARRAY_SIZE(data->bmp180_cal_buf); i++) {
···
1957
1848
}
1958
1849
1959
1850
/* Toss the calibration data into the entropy pool */
1960
-
add_device_randomness(data->bmp180_cal_buf, sizeof(data->bmp180_cal_buf));
1851
+
add_device_randomness(data->bmp180_cal_buf,
1852
+
sizeof(data->bmp180_cal_buf));
1961
1853
1962
1854
calib->AC1 = be16_to_cpu(data->bmp180_cal_buf[AC1]);
1963
1855
calib->AC2 = be16_to_cpu(data->bmp180_cal_buf[AC2]);
···
1981
1871
*
1982
1872
* Taken from datasheet, Section 3.5, "Calculating pressure and temperature".
1983
1873
*/
1984
-
static s32 bmp180_compensate_temp(struct bmp280_data *data, s32 adc_temp)
1874
+
1875
+
static s32 bmp180_calc_t_fine(struct bmp280_data *data, u32 adc_temp)
1985
1876
{
1986
1877
struct bmp180_calib *calib = &data->calib.bmp180;
1987
1878
s32 x1, x2;
1988
1879
1989
-
x1 = ((adc_temp - calib->AC6) * calib->AC5) >> 15;
1880
+
x1 = ((((s32)adc_temp) - calib->AC6) * calib->AC5) >> 15;
1990
1881
x2 = (calib->MC << 11) / (x1 + calib->MD);
1991
-
data->t_fine = x1 + x2;
1882
+
return x1 + x2; /* t_fine = x1 + x2; */
1883
+
}
1992
1884
1993
-
return (data->t_fine + 8) >> 4;
1885
+
static int bmp180_get_t_fine(struct bmp280_data *data, s32 *t_fine)
1886
+
{
1887
+
s32 adc_temp;
1888
+
int ret;
1889
+
1890
+
ret = bmp180_read_temp_adc(data, &adc_temp);
1891
+
if (ret)
1892
+
return ret;
1893
+
1894
+
*t_fine = bmp180_calc_t_fine(data, adc_temp);
1895
+
1896
+
return 0;
1897
+
}
1898
+
1899
+
static s32 bmp180_compensate_temp(struct bmp280_data *data, u32 adc_temp)
1900
+
{
1901
+
return (bmp180_calc_t_fine(data, adc_temp) + 8) / 16;
1994
1902
}
1995
1903
1996
1904
static int bmp180_read_temp(struct bmp280_data *data, int *val, int *val2)
1997
1905
{
1998
-
s32 adc_temp, comp_temp;
1906
+
s32 comp_temp;
1907
+
u32 adc_temp;
1999
1908
int ret;
2000
1909
2001
-
ret = bmp180_read_adc_temp(data, &adc_temp);
1910
+
ret = bmp180_read_temp_adc(data, &adc_temp);
2002
1911
if (ret)
2003
1912
return ret;
2004
1913
2005
1914
comp_temp = bmp180_compensate_temp(data, adc_temp);
2006
1915
2007
-
/*
2008
-
* val might be NULL if we're called by the read_press routine,
2009
-
* who only cares about the carry over t_fine value.
2010
-
*/
2011
-
if (val) {
2012
-
*val = comp_temp * 100;
2013
-
return IIO_VAL_INT;
2014
-
}
2015
-
2016
-
return 0;
1916
+
*val = comp_temp * 100;
1917
+
return IIO_VAL_INT;
2017
1918
}
2018
1919
2019
-
static int bmp180_read_adc_press(struct bmp280_data *data, int *val)
1920
+
static int bmp180_read_press_adc(struct bmp280_data *data, u32 *adc_press)
2020
1921
{
2021
1922
u8 oss = data->oversampling_press;
2022
1923
int ret;
2023
1924
2024
-
ret = bmp180_measure(data,
2025
-
FIELD_PREP(BMP180_MEAS_CTRL_MASK, BMP180_MEAS_PRESS) |
2026
-
FIELD_PREP(BMP180_OSRS_PRESS_MASK, oss) |
2027
-
BMP180_MEAS_SCO);
1925
+
ret = bmp180_wait_for_eoc(data,
1926
+
FIELD_PREP(BMP180_MEAS_CTRL_MASK, BMP180_MEAS_PRESS) |
1927
+
FIELD_PREP(BMP180_OSRS_PRESS_MASK, oss) |
1928
+
BMP180_MEAS_SCO);
2028
1929
if (ret)
2029
1930
return ret;
2030
1931
2031
1932
ret = regmap_bulk_read(data->regmap, BMP180_REG_OUT_MSB,
2032
1933
data->buf, sizeof(data->buf));
2033
-
if (ret)
1934
+
if (ret) {
1935
+
dev_err(data->dev, "failed to read pressure\n");
2034
1936
return ret;
1937
+
}
2035
1938
2036
-
*val = get_unaligned_be24(data->buf) >> (8 - oss);
1939
+
*adc_press = get_unaligned_be24(data->buf) >> (8 - oss);
2037
1940
2038
1941
return 0;
2039
1942
}
···
2056
1933
*
2057
1934
* Taken from datasheet, Section 3.5, "Calculating pressure and temperature".
2058
1935
*/
2059
-
static u32 bmp180_compensate_press(struct bmp280_data *data, s32 adc_press)
1936
+
static u32 bmp180_compensate_press(struct bmp280_data *data, u32 adc_press,
1937
+
s32 t_fine)
2060
1938
{
2061
1939
struct bmp180_calib *calib = &data->calib.bmp180;
2062
1940
s32 oss = data->oversampling_press;
···
2065
1941
s32 b3, b6;
2066
1942
u32 b4, b7;
2067
1943
2068
-
b6 = data->t_fine - 4000;
1944
+
b6 = t_fine - 4000;
2069
1945
x1 = (calib->B2 * (b6 * b6 >> 12)) >> 11;
2070
1946
x2 = calib->AC2 * b6 >> 11;
2071
1947
x3 = x1 + x2;
···
2074
1950
x2 = (calib->B1 * ((b6 * b6) >> 12)) >> 16;
2075
1951
x3 = (x1 + x2 + 2) >> 2;
2076
1952
b4 = calib->AC4 * (u32)(x3 + 32768) >> 15;
2077
-
b7 = ((u32)adc_press - b3) * (50000 >> oss);
1953
+
b7 = (adc_press - b3) * (50000 >> oss);
2078
1954
if (b7 < 0x80000000)
2079
1955
p = (b7 * 2) / b4;
2080
1956
else
···
2087
1963
return p + ((x1 + x2 + 3791) >> 4);
2088
1964
}
2089
1965
2090
-
static int bmp180_read_press(struct bmp280_data *data,
2091
-
int *val, int *val2)
1966
+
static int bmp180_read_press(struct bmp280_data *data, int *val, int *val2)
2092
1967
{
2093
-
u32 comp_press;
2094
-
s32 adc_press;
1968
+
u32 comp_press, adc_press;
1969
+
s32 t_fine;
2095
1970
int ret;
2096
1971
2097
-
/* Read and compensate temperature so we get a reading of t_fine. */
2098
-
ret = bmp180_read_temp(data, NULL, NULL);
1972
+
ret = bmp180_get_t_fine(data, &t_fine);
2099
1973
if (ret)
2100
1974
return ret;
2101
1975
2102
-
ret = bmp180_read_adc_press(data, &adc_press);
1976
+
ret = bmp180_read_press_adc(data, &adc_press);
2103
1977
if (ret)
2104
1978
return ret;
2105
1979
2106
-
comp_press = bmp180_compensate_press(data, adc_press);
1980
+
comp_press = bmp180_compensate_press(data, adc_press, t_fine);
2107
1981
2108
1982
*val = comp_press;
2109
1983
*val2 = 1000;
···
2276
2154
data->regmap = regmap;
2277
2155
2278
2156
ret = regmap_read(regmap, data->chip_info->id_reg, &chip_id);
2279
-
if (ret < 0)
2157
+
if (ret) {
2158
+
dev_err(data->dev, "failed to read chip id\n");
2280
2159
return ret;
2160
+
}
2281
2161
2282
2162
for (i = 0; i < data->chip_info->num_chip_id; i++) {
2283
2163
if (chip_id == data->chip_info->chip_id[i]) {
···
2299
2175
}
2300
2176
2301
2177
ret = data->chip_info->chip_config(data);
2302
-
if (ret < 0)
2178
+
if (ret)
2303
2179
return ret;
2304
2180
2305
2181
dev_set_drvdata(dev, indio_dev);
···
2312
2188
2313
2189
if (data->chip_info->read_calib) {
2314
2190
ret = data->chip_info->read_calib(data);
2315
-
if (ret < 0)
2191
+
if (ret)
2316
2192
return dev_err_probe(data->dev, ret,
2317
2193
"failed to read calibration coefficients\n");
2318
2194
}
···
2365
2241
ret = regulator_bulk_enable(BMP280_NUM_SUPPLIES, data->supplies);
2366
2242
if (ret)
2367
2243
return ret;
2244
+
2368
2245
usleep_range(data->start_up_time, data->start_up_time + 100);
2369
2246
return data->chip_info->chip_config(data);
2370
2247
}
+4
-4
drivers/iio/pressure/bmp280-regmap.c
+4
-4
drivers/iio/pressure/bmp280-regmap.c
···
45
45
{
46
46
switch (reg) {
47
47
case BMP280_REG_CONFIG:
48
-
case BMP280_REG_CTRL_HUMIDITY:
48
+
case BME280_REG_CTRL_HUMIDITY:
49
49
case BMP280_REG_CTRL_MEAS:
50
50
case BMP280_REG_RESET:
51
51
return true;
···
57
57
static bool bmp280_is_volatile_reg(struct device *dev, unsigned int reg)
58
58
{
59
59
switch (reg) {
60
-
case BMP280_REG_HUMIDITY_LSB:
61
-
case BMP280_REG_HUMIDITY_MSB:
60
+
case BME280_REG_HUMIDITY_LSB:
61
+
case BME280_REG_HUMIDITY_MSB:
62
62
case BMP280_REG_TEMP_XLSB:
63
63
case BMP280_REG_TEMP_LSB:
64
64
case BMP280_REG_TEMP_MSB:
···
167
167
.reg_bits = 8,
168
168
.val_bits = 8,
169
169
170
-
.max_register = BMP280_REG_HUMIDITY_LSB,
170
+
.max_register = BME280_REG_HUMIDITY_LSB,
171
171
.cache_type = REGCACHE_RBTREE,
172
172
173
173
.writeable_reg = bmp280_is_writeable_reg,
+2
-2
drivers/iio/pressure/bmp280-spi.c
+2
-2
drivers/iio/pressure/bmp280-spi.c
···
13
13
#include "bmp280.h"
14
14
15
15
static int bmp280_regmap_spi_write(void *context, const void *data,
16
-
size_t count)
16
+
size_t count)
17
17
{
18
18
struct spi_device *spi = to_spi_device(context);
19
19
u8 buf[2];
···
29
29
}
30
30
31
31
static int bmp280_regmap_spi_read(void *context, const void *reg,
32
-
size_t reg_size, void *val, size_t val_size)
32
+
size_t reg_size, void *val, size_t val_size)
33
33
{
34
34
struct spi_device *spi = to_spi_device(context);
35
35
+31
-34
drivers/iio/pressure/bmp280.h
+31
-34
drivers/iio/pressure/bmp280.h
···
192
192
#define BMP380_PRESS_SKIPPED 0x800000
193
193
194
194
/* BMP280 specific registers */
195
-
#define BMP280_REG_HUMIDITY_LSB 0xFE
196
-
#define BMP280_REG_HUMIDITY_MSB 0xFD
197
195
#define BMP280_REG_TEMP_XLSB 0xFC
198
196
#define BMP280_REG_TEMP_LSB 0xFB
199
197
#define BMP280_REG_TEMP_MSB 0xFA
···
205
207
#define BMP280_REG_CONFIG 0xF5
206
208
#define BMP280_REG_CTRL_MEAS 0xF4
207
209
#define BMP280_REG_STATUS 0xF3
208
-
#define BMP280_REG_CTRL_HUMIDITY 0xF2
209
-
210
-
/* Due to non linear mapping, and data sizes we can't do a bulk read */
211
-
#define BMP280_REG_COMP_H1 0xA1
212
-
#define BMP280_REG_COMP_H2 0xE1
213
-
#define BMP280_REG_COMP_H3 0xE3
214
-
#define BMP280_REG_COMP_H4 0xE4
215
-
#define BMP280_REG_COMP_H5 0xE5
216
-
#define BMP280_REG_COMP_H6 0xE7
217
210
218
211
#define BMP280_REG_COMP_TEMP_START 0x88
219
212
#define BMP280_COMP_TEMP_REG_COUNT 6
220
213
221
214
#define BMP280_REG_COMP_PRESS_START 0x8E
222
215
#define BMP280_COMP_PRESS_REG_COUNT 18
223
-
224
-
#define BMP280_COMP_H5_MASK GENMASK(15, 4)
225
216
226
217
#define BMP280_CONTIGUOUS_CALIB_REGS (BMP280_COMP_TEMP_REG_COUNT + \
227
218
BMP280_COMP_PRESS_REG_COUNT)
···
221
234
#define BMP280_FILTER_4X 2
222
235
#define BMP280_FILTER_8X 3
223
236
#define BMP280_FILTER_16X 4
224
-
225
-
#define BMP280_OSRS_HUMIDITY_MASK GENMASK(2, 0)
226
-
#define BMP280_OSRS_HUMIDITY_SKIP 0
227
-
#define BMP280_OSRS_HUMIDITY_1X 1
228
-
#define BMP280_OSRS_HUMIDITY_2X 2
229
-
#define BMP280_OSRS_HUMIDITY_4X 3
230
-
#define BMP280_OSRS_HUMIDITY_8X 4
231
-
#define BMP280_OSRS_HUMIDITY_16X 5
232
237
233
238
#define BMP280_OSRS_TEMP_MASK GENMASK(7, 5)
234
239
#define BMP280_OSRS_TEMP_SKIP 0
···
242
263
#define BMP280_MODE_SLEEP 0
243
264
#define BMP280_MODE_FORCED 1
244
265
#define BMP280_MODE_NORMAL 3
266
+
267
+
/* BME280 specific registers */
268
+
#define BME280_REG_HUMIDITY_LSB 0xFE
269
+
#define BME280_REG_HUMIDITY_MSB 0xFD
270
+
271
+
#define BME280_REG_CTRL_HUMIDITY 0xF2
272
+
273
+
/* Due to non linear mapping, and data sizes we can't do a bulk read */
274
+
#define BME280_REG_COMP_H1 0xA1
275
+
#define BME280_REG_COMP_H2 0xE1
276
+
#define BME280_REG_COMP_H3 0xE3
277
+
#define BME280_REG_COMP_H4 0xE4
278
+
#define BME280_REG_COMP_H5 0xE5
279
+
#define BME280_REG_COMP_H6 0xE7
280
+
281
+
#define BME280_COMP_H5_MASK GENMASK(15, 4)
282
+
283
+
#define BME280_OSRS_HUMIDITY_MASK GENMASK(2, 0)
284
+
#define BME280_OSRS_HUMIDITY_SKIP 0
285
+
#define BME280_OSRS_HUMIDITY_1X 1
286
+
#define BME280_OSRS_HUMIDITY_2X 2
287
+
#define BME280_OSRS_HUMIDITY_4X 3
288
+
#define BME280_OSRS_HUMIDITY_8X 4
289
+
#define BME280_OSRS_HUMIDITY_16X 5
245
290
246
291
/* BMP180 specific registers */
247
292
#define BMP180_REG_OUT_XLSB 0xF8
···
398
395
int sampling_freq;
399
396
400
397
/*
401
-
* Carryover value from temperature conversion, used in pressure
402
-
* calculation.
403
-
*/
404
-
s32 t_fine;
405
-
406
-
/*
407
398
* DMA (thus cache coherency maintenance) may require the
408
399
* transfer buffers to live in their own cache lines.
409
400
*/
···
446
449
int num_sampling_freq_avail;
447
450
int sampling_freq_default;
448
451
449
-
int (*chip_config)(struct bmp280_data *);
450
-
int (*read_temp)(struct bmp280_data *, int *, int *);
451
-
int (*read_press)(struct bmp280_data *, int *, int *);
452
-
int (*read_humid)(struct bmp280_data *, int *, int *);
453
-
int (*read_calib)(struct bmp280_data *);
454
-
int (*preinit)(struct bmp280_data *);
452
+
int (*chip_config)(struct bmp280_data *data);
453
+
int (*read_temp)(struct bmp280_data *data, int *val, int *val2);
454
+
int (*read_press)(struct bmp280_data *data, int *val, int *val2);
455
+
int (*read_humid)(struct bmp280_data *data, int *val, int *val2);
456
+
int (*read_calib)(struct bmp280_data *data);
457
+
int (*preinit)(struct bmp280_data *data);
455
458
};
456
459
457
460
/* Chip infos for each variant */
···
470
473
/* Probe called from different transports */
471
474
int bmp280_common_probe(struct device *dev,
472
475
struct regmap *regmap,
473
-
const struct bmp280_chip_info *,
476
+
const struct bmp280_chip_info *chip_info,
474
477
const char *name,
475
478
int irq);
476
479
+1
-1
drivers/iio/pressure/dps310.c
+1
-1
drivers/iio/pressure/dps310.c
+2
-2
drivers/iio/pressure/hp03.c
+2
-2
drivers/iio/pressure/hp03.c
+1
-1
drivers/iio/pressure/icp10100.c
+1
-1
drivers/iio/pressure/icp10100.c
+1
-1
drivers/iio/pressure/mpl115_i2c.c
+1
-1
drivers/iio/pressure/mpl115_i2c.c
+1
-1
drivers/iio/pressure/mpl3115.c
+1
-1
drivers/iio/pressure/mpl3115.c
+1
-1
drivers/iio/pressure/t5403.c
+1
-1
drivers/iio/pressure/t5403.c
+2
-2
drivers/iio/pressure/zpa2326_i2c.c
+2
-2
drivers/iio/pressure/zpa2326_i2c.c
+1
-1
drivers/iio/proximity/isl29501.c
+1
-1
drivers/iio/proximity/isl29501.c
+3
-3
drivers/iio/proximity/pulsedlight-lidar-lite-v2.c
+3
-3
drivers/iio/proximity/pulsedlight-lidar-lite-v2.c
+1
-1
drivers/iio/proximity/rfd77402.c
+1
-1
drivers/iio/proximity/rfd77402.c
+2
-2
drivers/iio/proximity/sx9500.c
+2
-2
drivers/iio/proximity/sx9500.c
+1
-1
drivers/iio/proximity/vl53l0x-i2c.c
+1
-1
drivers/iio/proximity/vl53l0x-i2c.c
-1
drivers/iio/temperature/max30208.c
-1
drivers/iio/temperature/max30208.c
+349
-14
drivers/iio/temperature/mcp9600.c
+349
-14
drivers/iio/temperature/mcp9600.c
···
6
6
* Author: <andrew.hepp@ahepp.dev>
7
7
*/
8
8
9
+
#include <linux/bitfield.h>
10
+
#include <linux/bitops.h>
11
+
#include <linux/bits.h>
9
12
#include <linux/err.h>
10
13
#include <linux/i2c.h>
11
14
#include <linux/init.h>
15
+
#include <linux/interrupt.h>
16
+
#include <linux/irq.h>
17
+
#include <linux/math.h>
18
+
#include <linux/minmax.h>
12
19
#include <linux/mod_devicetable.h>
13
20
#include <linux/module.h>
14
21
22
+
#include <linux/iio/events.h>
15
23
#include <linux/iio/iio.h>
16
24
17
25
/* MCP9600 registers */
18
26
#define MCP9600_HOT_JUNCTION 0x0
19
27
#define MCP9600_COLD_JUNCTION 0x2
28
+
#define MCP9600_STATUS 0x4
29
+
#define MCP9600_STATUS_ALERT(x) BIT(x)
30
+
#define MCP9600_ALERT_CFG1 0x8
31
+
#define MCP9600_ALERT_CFG(x) (MCP9600_ALERT_CFG1 + (x - 1))
32
+
#define MCP9600_ALERT_CFG_ENABLE BIT(0)
33
+
#define MCP9600_ALERT_CFG_ACTIVE_HIGH BIT(2)
34
+
#define MCP9600_ALERT_CFG_FALLING BIT(3)
35
+
#define MCP9600_ALERT_CFG_COLD_JUNCTION BIT(4)
36
+
#define MCP9600_ALERT_HYSTERESIS1 0xc
37
+
#define MCP9600_ALERT_HYSTERESIS(x) (MCP9600_ALERT_HYSTERESIS1 + (x - 1))
38
+
#define MCP9600_ALERT_LIMIT1 0x10
39
+
#define MCP9600_ALERT_LIMIT(x) (MCP9600_ALERT_LIMIT1 + (x - 1))
40
+
#define MCP9600_ALERT_LIMIT_MASK GENMASK(15, 2)
20
41
#define MCP9600_DEVICE_ID 0x20
21
42
22
43
/* MCP9600 device id value */
23
44
#define MCP9600_DEVICE_ID_MCP9600 0x40
24
45
25
-
static const struct iio_chan_spec mcp9600_channels[] = {
46
+
#define MCP9600_ALERT_COUNT 4
47
+
48
+
#define MCP9600_MIN_TEMP_HOT_JUNCTION_MICRO -200000000
49
+
#define MCP9600_MAX_TEMP_HOT_JUNCTION_MICRO 1800000000
50
+
51
+
#define MCP9600_MIN_TEMP_COLD_JUNCTION_MICRO -40000000
52
+
#define MCP9600_MAX_TEMP_COLD_JUNCTION_MICRO 125000000
53
+
54
+
enum mcp9600_alert {
55
+
MCP9600_ALERT1,
56
+
MCP9600_ALERT2,
57
+
MCP9600_ALERT3,
58
+
MCP9600_ALERT4
59
+
};
60
+
61
+
static const char * const mcp9600_alert_name[MCP9600_ALERT_COUNT] = {
62
+
[MCP9600_ALERT1] = "alert1",
63
+
[MCP9600_ALERT2] = "alert2",
64
+
[MCP9600_ALERT3] = "alert3",
65
+
[MCP9600_ALERT4] = "alert4",
66
+
};
67
+
68
+
static const struct iio_event_spec mcp9600_events[] = {
26
69
{
27
-
.type = IIO_TEMP,
28
-
.address = MCP9600_HOT_JUNCTION,
29
-
.info_mask_separate =
30
-
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
70
+
.type = IIO_EV_TYPE_THRESH,
71
+
.dir = IIO_EV_DIR_RISING,
72
+
.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
73
+
BIT(IIO_EV_INFO_VALUE) |
74
+
BIT(IIO_EV_INFO_HYSTERESIS),
31
75
},
32
76
{
33
-
.type = IIO_TEMP,
34
-
.address = MCP9600_COLD_JUNCTION,
35
-
.channel2 = IIO_MOD_TEMP_AMBIENT,
36
-
.modified = 1,
37
-
.info_mask_separate =
38
-
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
77
+
.type = IIO_EV_TYPE_THRESH,
78
+
.dir = IIO_EV_DIR_FALLING,
79
+
.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
80
+
BIT(IIO_EV_INFO_VALUE) |
81
+
BIT(IIO_EV_INFO_HYSTERESIS),
39
82
},
83
+
};
84
+
85
+
#define MCP9600_CHANNELS(hj_num_ev, hj_ev_spec_off, cj_num_ev, cj_ev_spec_off) \
86
+
{ \
87
+
{ \
88
+
.type = IIO_TEMP, \
89
+
.address = MCP9600_HOT_JUNCTION, \
90
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
91
+
BIT(IIO_CHAN_INFO_SCALE), \
92
+
.event_spec = &mcp9600_events[hj_ev_spec_off], \
93
+
.num_event_specs = hj_num_ev, \
94
+
}, \
95
+
{ \
96
+
.type = IIO_TEMP, \
97
+
.address = MCP9600_COLD_JUNCTION, \
98
+
.channel2 = IIO_MOD_TEMP_AMBIENT, \
99
+
.modified = 1, \
100
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
101
+
BIT(IIO_CHAN_INFO_SCALE), \
102
+
.event_spec = &mcp9600_events[cj_ev_spec_off], \
103
+
.num_event_specs = cj_num_ev, \
104
+
}, \
105
+
}
106
+
107
+
static const struct iio_chan_spec mcp9600_channels[][2] = {
108
+
MCP9600_CHANNELS(0, 0, 0, 0), /* Alerts: - - - - */
109
+
MCP9600_CHANNELS(1, 0, 0, 0), /* Alerts: 1 - - - */
110
+
MCP9600_CHANNELS(1, 1, 0, 0), /* Alerts: - 2 - - */
111
+
MCP9600_CHANNELS(2, 0, 0, 0), /* Alerts: 1 2 - - */
112
+
MCP9600_CHANNELS(0, 0, 1, 0), /* Alerts: - - 3 - */
113
+
MCP9600_CHANNELS(1, 0, 1, 0), /* Alerts: 1 - 3 - */
114
+
MCP9600_CHANNELS(1, 1, 1, 0), /* Alerts: - 2 3 - */
115
+
MCP9600_CHANNELS(2, 0, 1, 0), /* Alerts: 1 2 3 - */
116
+
MCP9600_CHANNELS(0, 0, 1, 1), /* Alerts: - - - 4 */
117
+
MCP9600_CHANNELS(1, 0, 1, 1), /* Alerts: 1 - - 4 */
118
+
MCP9600_CHANNELS(1, 1, 1, 1), /* Alerts: - 2 - 4 */
119
+
MCP9600_CHANNELS(2, 0, 1, 1), /* Alerts: 1 2 - 4 */
120
+
MCP9600_CHANNELS(0, 0, 2, 0), /* Alerts: - - 3 4 */
121
+
MCP9600_CHANNELS(1, 0, 2, 0), /* Alerts: 1 - 3 4 */
122
+
MCP9600_CHANNELS(1, 1, 2, 0), /* Alerts: - 2 3 4 */
123
+
MCP9600_CHANNELS(2, 0, 2, 0), /* Alerts: 1 2 3 4 */
40
124
};
41
125
42
126
struct mcp9600_data {
···
164
80
}
165
81
}
166
82
83
+
static int mcp9600_get_alert_index(int channel2, enum iio_event_direction dir)
84
+
{
85
+
if (channel2 == IIO_MOD_TEMP_AMBIENT) {
86
+
if (dir == IIO_EV_DIR_RISING)
87
+
return MCP9600_ALERT3;
88
+
else
89
+
return MCP9600_ALERT4;
90
+
} else {
91
+
if (dir == IIO_EV_DIR_RISING)
92
+
return MCP9600_ALERT1;
93
+
else
94
+
return MCP9600_ALERT2;
95
+
}
96
+
}
97
+
98
+
static int mcp9600_read_event_config(struct iio_dev *indio_dev,
99
+
const struct iio_chan_spec *chan,
100
+
enum iio_event_type type,
101
+
enum iio_event_direction dir)
102
+
{
103
+
struct mcp9600_data *data = iio_priv(indio_dev);
104
+
struct i2c_client *client = data->client;
105
+
int i, ret;
106
+
107
+
i = mcp9600_get_alert_index(chan->channel2, dir);
108
+
ret = i2c_smbus_read_byte_data(client, MCP9600_ALERT_CFG(i + 1));
109
+
if (ret < 0)
110
+
return ret;
111
+
112
+
return FIELD_GET(MCP9600_ALERT_CFG_ENABLE, ret);
113
+
}
114
+
115
+
static int mcp9600_write_event_config(struct iio_dev *indio_dev,
116
+
const struct iio_chan_spec *chan,
117
+
enum iio_event_type type,
118
+
enum iio_event_direction dir,
119
+
int state)
120
+
{
121
+
struct mcp9600_data *data = iio_priv(indio_dev);
122
+
struct i2c_client *client = data->client;
123
+
int i, ret;
124
+
125
+
i = mcp9600_get_alert_index(chan->channel2, dir);
126
+
ret = i2c_smbus_read_byte_data(client, MCP9600_ALERT_CFG(i + 1));
127
+
if (ret < 0)
128
+
return ret;
129
+
130
+
if (state)
131
+
ret |= MCP9600_ALERT_CFG_ENABLE;
132
+
else
133
+
ret &= ~MCP9600_ALERT_CFG_ENABLE;
134
+
135
+
return i2c_smbus_write_byte_data(client, MCP9600_ALERT_CFG(i + 1), ret);
136
+
}
137
+
138
+
static int mcp9600_read_thresh(struct iio_dev *indio_dev,
139
+
const struct iio_chan_spec *chan,
140
+
enum iio_event_type type,
141
+
enum iio_event_direction dir,
142
+
enum iio_event_info info, int *val, int *val2)
143
+
{
144
+
struct mcp9600_data *data = iio_priv(indio_dev);
145
+
struct i2c_client *client = data->client;
146
+
s32 ret;
147
+
int i;
148
+
149
+
i = mcp9600_get_alert_index(chan->channel2, dir);
150
+
switch (info) {
151
+
case IIO_EV_INFO_VALUE:
152
+
ret = i2c_smbus_read_word_swapped(client, MCP9600_ALERT_LIMIT(i + 1));
153
+
if (ret < 0)
154
+
return ret;
155
+
/*
156
+
* Temperature is stored in two’s complement format in
157
+
* bits(15:2), LSB is 0.25 degree celsius.
158
+
*/
159
+
*val = sign_extend32(FIELD_GET(MCP9600_ALERT_LIMIT_MASK, ret), 13);
160
+
*val2 = 4;
161
+
return IIO_VAL_FRACTIONAL;
162
+
case IIO_EV_INFO_HYSTERESIS:
163
+
ret = i2c_smbus_read_byte_data(client, MCP9600_ALERT_HYSTERESIS(i + 1));
164
+
if (ret < 0)
165
+
return ret;
166
+
167
+
*val = ret;
168
+
return IIO_VAL_INT;
169
+
default:
170
+
return -EINVAL;
171
+
}
172
+
}
173
+
174
+
static int mcp9600_write_thresh(struct iio_dev *indio_dev,
175
+
const struct iio_chan_spec *chan,
176
+
enum iio_event_type type,
177
+
enum iio_event_direction dir,
178
+
enum iio_event_info info, int val, int val2)
179
+
{
180
+
struct mcp9600_data *data = iio_priv(indio_dev);
181
+
struct i2c_client *client = data->client;
182
+
int s_val, i;
183
+
s16 thresh;
184
+
u8 hyst;
185
+
186
+
i = mcp9600_get_alert_index(chan->channel2, dir);
187
+
switch (info) {
188
+
case IIO_EV_INFO_VALUE:
189
+
/* Scale value to include decimal part into calculations */
190
+
s_val = (val < 0) ? ((val * 1000000) - val2) :
191
+
((val * 1000000) + val2);
192
+
if (chan->channel2 == IIO_MOD_TEMP_AMBIENT) {
193
+
s_val = max(s_val, MCP9600_MIN_TEMP_COLD_JUNCTION_MICRO);
194
+
s_val = min(s_val, MCP9600_MAX_TEMP_COLD_JUNCTION_MICRO);
195
+
} else {
196
+
s_val = max(s_val, MCP9600_MIN_TEMP_HOT_JUNCTION_MICRO);
197
+
s_val = min(s_val, MCP9600_MAX_TEMP_HOT_JUNCTION_MICRO);
198
+
}
199
+
200
+
/*
201
+
* Shift length 4 bits = 2(15:2) + 2(0.25 LSB), temperature is
202
+
* stored in two’s complement format.
203
+
*/
204
+
thresh = (s16)(s_val / (1000000 >> 4));
205
+
return i2c_smbus_write_word_swapped(client,
206
+
MCP9600_ALERT_LIMIT(i + 1),
207
+
thresh);
208
+
case IIO_EV_INFO_HYSTERESIS:
209
+
hyst = min(abs(val), 255);
210
+
return i2c_smbus_write_byte_data(client,
211
+
MCP9600_ALERT_HYSTERESIS(i + 1),
212
+
hyst);
213
+
default:
214
+
return -EINVAL;
215
+
}
216
+
}
217
+
167
218
static const struct iio_info mcp9600_info = {
168
219
.read_raw = mcp9600_read_raw,
220
+
.read_event_config = mcp9600_read_event_config,
221
+
.write_event_config = mcp9600_write_event_config,
222
+
.read_event_value = mcp9600_read_thresh,
223
+
.write_event_value = mcp9600_write_thresh,
169
224
};
225
+
226
+
static irqreturn_t mcp9600_alert_handler(void *private,
227
+
enum mcp9600_alert alert,
228
+
enum iio_modifier mod,
229
+
enum iio_event_direction dir)
230
+
{
231
+
struct iio_dev *indio_dev = private;
232
+
struct mcp9600_data *data = iio_priv(indio_dev);
233
+
int ret;
234
+
235
+
ret = i2c_smbus_read_byte_data(data->client, MCP9600_STATUS);
236
+
if (ret < 0)
237
+
return IRQ_HANDLED;
238
+
239
+
if (!(ret & MCP9600_STATUS_ALERT(alert)))
240
+
return IRQ_NONE;
241
+
242
+
iio_push_event(indio_dev,
243
+
IIO_MOD_EVENT_CODE(IIO_TEMP, 0, mod, IIO_EV_TYPE_THRESH,
244
+
dir),
245
+
iio_get_time_ns(indio_dev));
246
+
247
+
return IRQ_HANDLED;
248
+
}
249
+
250
+
static irqreturn_t mcp9600_alert1_handler(int irq, void *private)
251
+
{
252
+
return mcp9600_alert_handler(private, MCP9600_ALERT1, IIO_NO_MOD,
253
+
IIO_EV_DIR_RISING);
254
+
}
255
+
256
+
static irqreturn_t mcp9600_alert2_handler(int irq, void *private)
257
+
{
258
+
return mcp9600_alert_handler(private, MCP9600_ALERT2, IIO_NO_MOD,
259
+
IIO_EV_DIR_FALLING);
260
+
}
261
+
262
+
static irqreturn_t mcp9600_alert3_handler(int irq, void *private)
263
+
{
264
+
return mcp9600_alert_handler(private, MCP9600_ALERT3,
265
+
IIO_MOD_TEMP_AMBIENT, IIO_EV_DIR_RISING);
266
+
}
267
+
268
+
static irqreturn_t mcp9600_alert4_handler(int irq, void *private)
269
+
{
270
+
return mcp9600_alert_handler(private, MCP9600_ALERT4,
271
+
IIO_MOD_TEMP_AMBIENT, IIO_EV_DIR_FALLING);
272
+
}
273
+
274
+
static irqreturn_t (*mcp9600_alert_handler_func[MCP9600_ALERT_COUNT]) (int, void *) = {
275
+
mcp9600_alert1_handler,
276
+
mcp9600_alert2_handler,
277
+
mcp9600_alert3_handler,
278
+
mcp9600_alert4_handler,
279
+
};
280
+
281
+
static int mcp9600_probe_alerts(struct iio_dev *indio_dev)
282
+
{
283
+
struct mcp9600_data *data = iio_priv(indio_dev);
284
+
struct i2c_client *client = data->client;
285
+
struct device *dev = &client->dev;
286
+
struct fwnode_handle *fwnode = dev_fwnode(dev);
287
+
unsigned int irq_type;
288
+
int ret, irq, i;
289
+
u8 val, ch_sel;
290
+
291
+
/*
292
+
* alert1: hot junction, rising temperature
293
+
* alert2: hot junction, falling temperature
294
+
* alert3: cold junction, rising temperature
295
+
* alert4: cold junction, falling temperature
296
+
*/
297
+
ch_sel = 0;
298
+
for (i = 0; i < MCP9600_ALERT_COUNT; i++) {
299
+
irq = fwnode_irq_get_byname(fwnode, mcp9600_alert_name[i]);
300
+
if (irq <= 0)
301
+
continue;
302
+
303
+
val = 0;
304
+
irq_type = irq_get_trigger_type(irq);
305
+
if (irq_type == IRQ_TYPE_EDGE_RISING)
306
+
val |= MCP9600_ALERT_CFG_ACTIVE_HIGH;
307
+
308
+
if (i == MCP9600_ALERT2 || i == MCP9600_ALERT4)
309
+
val |= MCP9600_ALERT_CFG_FALLING;
310
+
311
+
if (i == MCP9600_ALERT3 || i == MCP9600_ALERT4)
312
+
val |= MCP9600_ALERT_CFG_COLD_JUNCTION;
313
+
314
+
ret = i2c_smbus_write_byte_data(client,
315
+
MCP9600_ALERT_CFG(i + 1),
316
+
val);
317
+
if (ret < 0)
318
+
return ret;
319
+
320
+
ret = devm_request_threaded_irq(dev, irq, NULL,
321
+
mcp9600_alert_handler_func[i],
322
+
IRQF_ONESHOT, "mcp9600",
323
+
indio_dev);
324
+
if (ret)
325
+
return ret;
326
+
327
+
ch_sel |= BIT(i);
328
+
}
329
+
330
+
return ch_sel;
331
+
}
170
332
171
333
static int mcp9600_probe(struct i2c_client *client)
172
334
{
173
335
struct iio_dev *indio_dev;
174
336
struct mcp9600_data *data;
175
-
int ret;
337
+
int ret, ch_sel;
176
338
177
339
ret = i2c_smbus_read_byte_data(client, MCP9600_DEVICE_ID);
178
340
if (ret < 0)
···
434
104
data = iio_priv(indio_dev);
435
105
data->client = client;
436
106
107
+
ch_sel = mcp9600_probe_alerts(indio_dev);
108
+
if (ch_sel < 0)
109
+
return ch_sel;
110
+
437
111
indio_dev->info = &mcp9600_info;
438
112
indio_dev->name = "mcp9600";
439
113
indio_dev->modes = INDIO_DIRECT_MODE;
440
-
indio_dev->channels = mcp9600_channels;
441
-
indio_dev->num_channels = ARRAY_SIZE(mcp9600_channels);
114
+
indio_dev->channels = mcp9600_channels[ch_sel];
115
+
indio_dev->num_channels = ARRAY_SIZE(mcp9600_channels[ch_sel]);
442
116
443
117
return devm_iio_device_register(&client->dev, indio_dev);
444
118
}
···
469
135
};
470
136
module_i2c_driver(mcp9600_driver);
471
137
138
+
MODULE_AUTHOR("Dimitri Fedrau <dima.fedrau@gmail.com>");
472
139
MODULE_AUTHOR("Andrew Hepp <andrew.hepp@ahepp.dev>");
473
140
MODULE_DESCRIPTION("Microchip MCP9600 thermocouple EMF converter driver");
474
141
MODULE_LICENSE("GPL");
+1
-1
drivers/iio/temperature/mlx90632.c
+1
-1
drivers/iio/temperature/mlx90632.c
+1
-1
drivers/iio/temperature/tmp006.c
+1
-1
drivers/iio/temperature/tmp006.c
+1
-1
drivers/iio/temperature/tmp007.c
+1
-1
drivers/iio/temperature/tmp007.c
+1
-1
drivers/iio/temperature/tsys01.c
+1
-1
drivers/iio/temperature/tsys01.c
+1
-1
drivers/iio/temperature/tsys02d.c
+1
-1
drivers/iio/temperature/tsys02d.c
+5
-3
drivers/iio/test/iio-test-gts.c
+5
-3
drivers/iio/test/iio-test-gts.c
···
70
70
*/
71
71
static struct iio_gts gts;
72
72
73
+
/* Keep the gain and time tables unsorted to test the sorting */
73
74
static const struct iio_gain_sel_pair gts_test_gains[] = {
74
75
GAIN_SCALE_GAIN(1, TEST_GSEL_1),
75
76
GAIN_SCALE_GAIN(4, TEST_GSEL_4),
···
80
79
GAIN_SCALE_GAIN(256, TEST_GSEL_256),
81
80
GAIN_SCALE_GAIN(512, TEST_GSEL_512),
82
81
GAIN_SCALE_GAIN(1024, TEST_GSEL_1024),
83
-
GAIN_SCALE_GAIN(2048, TEST_GSEL_2048),
84
82
GAIN_SCALE_GAIN(4096, TEST_GSEL_4096),
83
+
GAIN_SCALE_GAIN(2048, TEST_GSEL_2048),
85
84
#define HWGAIN_MAX 4096
86
85
};
87
86
88
87
static const struct iio_itime_sel_mul gts_test_itimes[] = {
89
-
GAIN_SCALE_ITIME_US(400 * 1000, TEST_TSEL_400, 8),
90
-
GAIN_SCALE_ITIME_US(200 * 1000, TEST_TSEL_200, 4),
91
88
GAIN_SCALE_ITIME_US(100 * 1000, TEST_TSEL_100, 2),
89
+
GAIN_SCALE_ITIME_US(400 * 1000, TEST_TSEL_400, 8),
90
+
GAIN_SCALE_ITIME_US(400 * 1000, TEST_TSEL_400, 8),
92
91
GAIN_SCALE_ITIME_US(50 * 1000, TEST_TSEL_50, 1),
92
+
GAIN_SCALE_ITIME_US(200 * 1000, TEST_TSEL_200, 4),
93
93
#define TIMEGAIN_MAX 8
94
94
};
95
95
#define TOTAL_GAIN_MAX (HWGAIN_MAX * TIMEGAIN_MAX)
+6
-6
drivers/staging/iio/addac/adt7316-i2c.c
+6
-6
drivers/staging/iio/addac/adt7316-i2c.c
···
109
109
}
110
110
111
111
static const struct i2c_device_id adt7316_i2c_id[] = {
112
-
{ "adt7316", 0 },
113
-
{ "adt7317", 0 },
114
-
{ "adt7318", 0 },
115
-
{ "adt7516", 0 },
116
-
{ "adt7517", 0 },
117
-
{ "adt7519", 0 },
112
+
{ "adt7316" },
113
+
{ "adt7317" },
114
+
{ "adt7318" },
115
+
{ "adt7516" },
116
+
{ "adt7517" },
117
+
{ "adt7519" },
118
118
{ }
119
119
};
120
120
-9
drivers/staging/iio/addac/adt7316.c
-9
drivers/staging/iio/addac/adt7316.c
···
209
209
#define ADT7316_TEMP_AIN_INT_MASK \
210
210
(ADT7316_TEMP_INT_MASK)
211
211
212
-
/*
213
-
* struct adt7316_chip_info - chip specific information
214
-
*/
215
-
216
-
struct adt7316_limit_regs {
217
-
u16 data_high;
218
-
u16 data_low;
219
-
};
220
-
221
212
static ssize_t adt7316_show_enabled(struct device *dev,
222
213
struct device_attribute *attr,
223
214
char *buf)
+2
-2
drivers/staging/iio/impedance-analyzer/ad5933.c
+2
-2
drivers/staging/iio/impedance-analyzer/ad5933.c
+74
-20
include/linux/iio/iio.h
+74
-20
include/linux/iio/iio.h
···
174
174
};
175
175
176
176
/**
177
+
* struct iio_scan_type - specification for channel data format in buffer
178
+
* @sign: 's' or 'u' to specify signed or unsigned
179
+
* @realbits: Number of valid bits of data
180
+
* @storagebits: Realbits + padding
181
+
* @shift: Shift right by this before masking out realbits.
182
+
* @repeat: Number of times real/storage bits repeats. When the
183
+
* repeat element is more than 1, then the type element in
184
+
* sysfs will show a repeat value. Otherwise, the number
185
+
* of repetitions is omitted.
186
+
* @endianness: little or big endian
187
+
*/
188
+
struct iio_scan_type {
189
+
char sign;
190
+
u8 realbits;
191
+
u8 storagebits;
192
+
u8 shift;
193
+
u8 repeat;
194
+
enum iio_endian endianness;
195
+
};
196
+
197
+
/**
177
198
* struct iio_chan_spec - specification of a single channel
178
199
* @type: What type of measurement is the channel making.
179
200
* @channel: What number do we wish to assign the channel.
···
204
183
* @address: Driver specific identifier.
205
184
* @scan_index: Monotonic index to give ordering in scans when read
206
185
* from a buffer.
207
-
* @scan_type: struct describing the scan type
208
-
* @scan_type.sign: 's' or 'u' to specify signed or unsigned
209
-
* @scan_type.realbits: Number of valid bits of data
210
-
* @scan_type.storagebits: Realbits + padding
211
-
* @scan_type.shift: Shift right by this before masking out
212
-
* realbits.
213
-
* @scan_type.repeat: Number of times real/storage bits repeats.
214
-
* When the repeat element is more than 1, then
215
-
* the type element in sysfs will show a repeat
216
-
* value. Otherwise, the number of repetitions
217
-
* is omitted.
218
-
* @scan_type.endianness: little or big endian
186
+
* @scan_type: struct describing the scan type - mutually exclusive
187
+
* with ext_scan_type.
188
+
* @ext_scan_type: Used in rare cases where there is more than one scan
189
+
* format for a channel. When this is used, the flag
190
+
* has_ext_scan_type must be set and the driver must
191
+
* implement get_current_scan_type in struct iio_info.
192
+
* @num_ext_scan_type: Number of elements in ext_scan_type.
219
193
* @info_mask_separate: What information is to be exported that is specific to
220
194
* this channel.
221
195
* @info_mask_separate_available: What availability information is to be
···
254
238
* attributes but not for event codes.
255
239
* @output: Channel is output.
256
240
* @differential: Channel is differential.
241
+
* @has_ext_scan_type: True if ext_scan_type is used instead of scan_type.
257
242
*/
258
243
struct iio_chan_spec {
259
244
enum iio_chan_type type;
···
262
245
int channel2;
263
246
unsigned long address;
264
247
int scan_index;
265
-
struct {
266
-
char sign;
267
-
u8 realbits;
268
-
u8 storagebits;
269
-
u8 shift;
270
-
u8 repeat;
271
-
enum iio_endian endianness;
272
-
} scan_type;
248
+
union {
249
+
struct iio_scan_type scan_type;
250
+
struct {
251
+
const struct iio_scan_type *ext_scan_type;
252
+
unsigned int num_ext_scan_type;
253
+
};
254
+
};
273
255
long info_mask_separate;
274
256
long info_mask_separate_available;
275
257
long info_mask_shared_by_type;
···
286
270
unsigned indexed:1;
287
271
unsigned output:1;
288
272
unsigned differential:1;
273
+
unsigned has_ext_scan_type:1;
289
274
};
290
275
291
276
···
449
432
* for better event identification.
450
433
* @validate_trigger: function to validate the trigger when the
451
434
* current trigger gets changed.
435
+
* @get_current_scan_type: must be implemented by drivers that use ext_scan_type
436
+
* in the channel spec to return the index of the currently
437
+
* active ext_scan type for a channel.
452
438
* @update_scan_mode: function to configure device and scan buffer when
453
439
* channels have changed
454
440
* @debugfs_reg_access: function to read or write register value of device
···
536
516
537
517
int (*validate_trigger)(struct iio_dev *indio_dev,
538
518
struct iio_trigger *trig);
519
+
int (*get_current_scan_type)(const struct iio_dev *indio_dev,
520
+
const struct iio_chan_spec *chan);
539
521
int (*update_scan_mode)(struct iio_dev *indio_dev,
540
522
const unsigned long *scan_mask);
541
523
int (*debugfs_reg_access)(struct iio_dev *indio_dev,
···
822
800
return false;
823
801
}
824
802
#endif
803
+
804
+
/**
805
+
* iio_get_current_scan_type - Get the current scan type for a channel
806
+
* @indio_dev: the IIO device to get the scan type for
807
+
* @chan: the channel to get the scan type for
808
+
*
809
+
* Most devices only have one scan type per channel and can just access it
810
+
* directly without calling this function. Core IIO code and drivers that
811
+
* implement ext_scan_type in the channel spec should use this function to
812
+
* get the current scan type for a channel.
813
+
*
814
+
* Returns: the current scan type for the channel or error.
815
+
*/
816
+
static inline const struct iio_scan_type
817
+
*iio_get_current_scan_type(const struct iio_dev *indio_dev,
818
+
const struct iio_chan_spec *chan)
819
+
{
820
+
int ret;
821
+
822
+
if (chan->has_ext_scan_type) {
823
+
ret = indio_dev->info->get_current_scan_type(indio_dev, chan);
824
+
if (ret < 0)
825
+
return ERR_PTR(ret);
826
+
827
+
if (ret >= chan->num_ext_scan_type)
828
+
return ERR_PTR(-EINVAL);
829
+
830
+
return &chan->ext_scan_type[ret];
831
+
}
832
+
833
+
return &chan->scan_type;
834
+
}
825
835
826
836
ssize_t iio_format_value(char *buf, unsigned int type, int size, int *vals);
827
837
+17
-4
include/linux/iio/imu/adis.h
+17
-4
include/linux/iio/imu/adis.h
···
21
21
#define ADIS_REG_PAGE_ID 0x00
22
22
23
23
struct adis;
24
+
struct iio_dev_attr;
24
25
25
26
/**
26
27
* struct adis_timeouts - ADIS chip variant timeouts
···
85
84
bool unmasked_drdy;
86
85
87
86
bool has_paging;
87
+
bool has_fifo;
88
88
89
89
unsigned int burst_reg_cmd;
90
90
unsigned int burst_len;
···
517
515
#define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) \
518
516
ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, info_all, bits)
519
517
518
+
#define devm_adis_setup_buffer_and_trigger(adis, indio_dev, trigger_handler) \
519
+
devm_adis_setup_buffer_and_trigger_with_attrs((adis), (indio_dev), \
520
+
(trigger_handler), NULL, \
521
+
NULL)
522
+
520
523
#ifdef CONFIG_IIO_ADIS_LIB_BUFFER
521
524
522
525
int
523
-
devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
524
-
irq_handler_t trigger_handler);
526
+
devm_adis_setup_buffer_and_trigger_with_attrs(struct adis *adis,
527
+
struct iio_dev *indio_dev,
528
+
irq_handler_t trigger_handler,
529
+
const struct iio_buffer_setup_ops *ops,
530
+
const struct iio_dev_attr **buffer_attrs);
525
531
526
532
int devm_adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev);
527
533
···
539
529
#else /* CONFIG_IIO_BUFFER */
540
530
541
531
static inline int
542
-
devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
543
-
irq_handler_t trigger_handler)
532
+
devm_adis_setup_buffer_and_trigger_with_attrs(struct adis *adis,
533
+
struct iio_dev *indio_dev,
534
+
irq_handler_t trigger_handler,
535
+
const struct iio_buffer_setup_ops *ops,
536
+
const struct iio_dev_attr **buffer_attrs)
544
537
{
545
538
return 0;
546
539
}