Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'regulator-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"This has been a quiet release for the regulator API, a few new drivers
and the usual fixes and cleanup traffic but not much else going on:
- Optimisations for the handling of voltage enumeration, especially
with sparse selector sets, from Claudiu Beznea.
- Support for several ARM SCMI regulators, Dialog DA9121, NXP PF8x00,
Qualcomm PMX55, PM8350 and PM8350c
The addition of the SCMI regulator driver (which controls regulators
via system firmware) means that we've pulled in the support for the
underlying firmware operations from the firmware tree"
* tag 'regulator-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (53 commits)
regulator: mc13892-regulator: convert comma to semicolon
regulator: pfuze100: Convert the driver to DT-only
regulator: max14577: Add proper module aliases strings
regulator: da9121: Potential Oops in da9121_assign_chip_model()
regulator: da9121: Fix index used for DT property
regulator: da9121: Remove uninitialised string variable
regulator: axp20x: Fix DLDO2 voltage control register mask for AXP22x
regulator: qcom-rpmh: Add support for PM8350/PM8350c
regulator: dt-bindings: Add PM8350x compatibles
regulator: da9121: include linux/gpio/consumer.h
regulator: da9121: Mark some symbols with static keyword
regulator: da9121: Request IRQ directly and free in release function to avoid masking race
regulator: da9121: add interrupt support
regulator: da9121: add mode support
regulator: da9121: add current support
regulator: da9121: Update registration to support multiple buck variants
regulator: da9121: Add support for device variants via devicetree
regulator: da9121: Add device variant descriptors
regulator: da9121: Add device variant regmaps
regulator: da9121: Add device variants
...
+3876
-84
+34
Documentation/devicetree/bindings/arm/arm,scmi.txt
+34
Documentation/devicetree/bindings/arm/arm,scmi.txt
···
62
62
- #power-domain-cells : Should be 1. Contains the device or the power
63
63
domain ID value used by SCMI commands.
64
64
65
+
Regulator bindings for the SCMI Regulator based on SCMI Message Protocol
66
+
------------------------------------------------------------
67
+
An SCMI Regulator is permanently bound to a well defined SCMI Voltage Domain,
68
+
and should be always positioned as a root regulator.
69
+
It does not support any current operation.
70
+
71
+
SCMI Regulators are grouped under a 'regulators' node which in turn is a child
72
+
of the SCMI Voltage protocol node inside the desired SCMI instance node.
73
+
74
+
This binding uses the common regulator binding[6].
75
+
76
+
Required properties:
77
+
- reg : shall identify an existent SCMI Voltage Domain.
78
+
65
79
Sensor bindings for the sensors based on SCMI Message Protocol
66
80
--------------------------------------------------------------
67
81
SCMI provides an API to access the various sensors on the SoC.
···
119
105
[3] Documentation/devicetree/bindings/thermal/thermal*.yaml
120
106
[4] Documentation/devicetree/bindings/sram/sram.yaml
121
107
[5] Documentation/devicetree/bindings/reset/reset.txt
108
+
[6] Documentation/devicetree/bindings/regulator/regulator.yaml
122
109
123
110
Example:
124
111
···
183
168
scmi_reset: protocol@16 {
184
169
reg = <0x16>;
185
170
#reset-cells = <1>;
171
+
};
172
+
173
+
scmi_voltage: protocol@17 {
174
+
reg = <0x17>;
175
+
176
+
regulators {
177
+
regulator_devX: regulator@0 {
178
+
reg = <0x0>;
179
+
regulator-max-microvolt = <3300000>;
180
+
};
181
+
182
+
regulator_devY: regulator@9 {
183
+
reg = <0x9>;
184
+
regulator-min-microvolt = <500000>;
185
+
regulator-max-microvolt = <4200000>;
186
+
};
187
+
188
+
...
189
+
};
186
190
};
187
191
};
188
192
};
+189
Documentation/devicetree/bindings/regulator/dlg,da9121.yaml
+189
Documentation/devicetree/bindings/regulator/dlg,da9121.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/regulator/dlg,da9121.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Dialog Semiconductor DA9121 voltage regulator
8
+
9
+
maintainers:
10
+
- Adam Ward <Adam.Ward.opensource@diasemi.com>
11
+
12
+
description: |
13
+
Dialog Semiconductor DA9121 Single-channel 10A double-phase buck converter
14
+
Dialog Semiconductor DA9122 Double-channel 5A single-phase buck converter
15
+
Dialog Semiconductor DA9220 Double-channel 3A single-phase buck converter
16
+
Dialog Semiconductor DA9217 Single-channel 6A double-phase buck converter
17
+
Dialog Semiconductor DA9130 Single-channel 10A double-phase buck converter
18
+
Dialog Semiconductor DA9131 Double-channel 5A single-phase buck converter
19
+
Dialog Semiconductor DA9132 Double-channel 3A single-phase buck converter
20
+
21
+
Current limits
22
+
23
+
This is PER PHASE, and the current limit setting in the devices reflect
24
+
that with a maximum 10A limit. Allowing for transients at/near double
25
+
the rated current, this translates across the device range to per
26
+
channel figures as so...
27
+
28
+
| DA9121 DA9122 DA9220 DA9217 DA9140
29
+
| /DA9130 /DA9131 /DA9132
30
+
-----------------------------------------------------------------------------
31
+
Output current / channel | 10000000 5000000 3000000 6000000 40000000
32
+
Output current / phase | 5000000 5000000 3000000 3000000 9500000
33
+
-----------------------------------------------------------------------------
34
+
Min regulator-min-microvolt| 300000 300000 300000 300000 500000
35
+
Max regulator-max-microvolt| 1900000 1900000 1900000 1900000 1000000
36
+
Device hardware default | 1000000 1000000 1000000 1000000 1000000
37
+
-----------------------------------------------------------------------------
38
+
Min regulator-min-microamp | 7000000 3500000 3500000 7000000 26000000
39
+
Max regulator-max-microamp | 20000000 10000000 6000000 12000000 78000000
40
+
Device hardware default | 15000000 7500000 5500000 11000000 58000000
41
+
42
+
properties:
43
+
$nodename:
44
+
pattern: "pmic@[0-9a-f]{1,2}"
45
+
compatible:
46
+
enum:
47
+
- dlg,da9121
48
+
- dlg,da9122
49
+
- dlg,da9220
50
+
- dlg,da9217
51
+
- dlg,da9130
52
+
- dlg,da9131
53
+
- dlg,da9132
54
+
- dlg,da9140
55
+
56
+
reg:
57
+
maxItems: 1
58
+
description: Specifies the I2C slave address.
59
+
60
+
interrupts:
61
+
maxItems: 1
62
+
description: IRQ line information.
63
+
64
+
dlg,irq-polling-delay-passive-ms:
65
+
$ref: "/schemas/types.yaml#/definitions/uint32"
66
+
minimum: 1000
67
+
maximum: 10000
68
+
description: |
69
+
Specify the polling period, measured in milliseconds, between interrupt status
70
+
update checks. Range 1000-10000 ms.
71
+
72
+
regulators:
73
+
type: object
74
+
$ref: regulator.yaml#
75
+
description: |
76
+
This node defines the settings for the BUCK. The content of the
77
+
sub-node is defined by the standard binding for regulators; see regulator.yaml.
78
+
The DA9121 regulator is bound using their names listed below
79
+
buck1 - BUCK1
80
+
buck2 - BUCK2 //DA9122, DA9220, DA9131, DA9132 only
81
+
82
+
patternProperties:
83
+
"^buck([1-2])$":
84
+
type: object
85
+
$ref: regulator.yaml#
86
+
87
+
properties:
88
+
regulator-mode:
89
+
maxItems: 1
90
+
description: Defined in include/dt-bindings/regulator/dlg,da9121-regulator.h
91
+
92
+
regulator-initial-mode:
93
+
maxItems: 1
94
+
description: Defined in include/dt-bindings/regulator/dlg,da9121-regulator.h
95
+
96
+
enable-gpios:
97
+
maxItems: 1
98
+
description: Specify a valid GPIO for platform control of the regulator
99
+
100
+
dlg,ripple-cancel:
101
+
$ref: "/schemas/types.yaml#/definitions/uint32"
102
+
description: |
103
+
Defined in include/dt-bindings/regulator/dlg,da9121-regulator.h
104
+
Only present on multi-channel devices (DA9122, DA9220, DA9131, DA9132)
105
+
106
+
unevaluatedProperties: false
107
+
108
+
required:
109
+
- compatible
110
+
- reg
111
+
- regulators
112
+
113
+
additionalProperties: false
114
+
115
+
examples:
116
+
- |
117
+
#include <dt-bindings/gpio/gpio.h>
118
+
#include <dt-bindings/interrupt-controller/irq.h>
119
+
#include <dt-bindings/regulator/dlg,da9121-regulator.h>
120
+
i2c {
121
+
#address-cells = <1>;
122
+
#size-cells = <0>;
123
+
pmic@68 {
124
+
compatible = "dlg,da9121";
125
+
reg = <0x68>;
126
+
127
+
interrupt-parent = <&gpio6>;
128
+
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
129
+
130
+
dlg,irq-polling-delay-passive-ms = <2000>;
131
+
132
+
regulators {
133
+
DA9121_BUCK1: buck1 {
134
+
regulator-name = "BUCK1";
135
+
regulator-min-microvolt = <300000>;
136
+
regulator-max-microvolt = <1900000>;
137
+
regulator-min-microamp = <7000000>;
138
+
regulator-max-microamp = <20000000>;
139
+
regulator-boot-on;
140
+
regulator-initial-mode = <DA9121_BUCK_MODE_AUTO>;
141
+
enable-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
142
+
};
143
+
};
144
+
};
145
+
};
146
+
147
+
- |
148
+
#include <dt-bindings/gpio/gpio.h>
149
+
#include <dt-bindings/interrupt-controller/irq.h>
150
+
#include <dt-bindings/regulator/dlg,da9121-regulator.h>
151
+
i2c {
152
+
#address-cells = <1>;
153
+
#size-cells = <0>;
154
+
pmic@68 {
155
+
compatible = "dlg,da9122";
156
+
reg = <0x68>;
157
+
158
+
interrupt-parent = <&gpio6>;
159
+
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
160
+
161
+
dlg,irq-polling-delay-passive-ms = <2000>;
162
+
163
+
regulators {
164
+
DA9122_BUCK1: buck1 {
165
+
regulator-name = "BUCK1";
166
+
regulator-min-microvolt = <300000>;
167
+
regulator-max-microvolt = <1900000>;
168
+
regulator-min-microamp = <3500000>;
169
+
regulator-max-microamp = <10000000>;
170
+
regulator-boot-on;
171
+
regulator-initial-mode = <DA9121_BUCK_MODE_AUTO>;
172
+
enable-gpios = <&gpio6 1 GPIO_ACTIVE_HIGH>;
173
+
dlg,ripple-cancel = <DA9121_BUCK_RIPPLE_CANCEL_NONE>;
174
+
};
175
+
DA9122_BUCK2: buck2 {
176
+
regulator-name = "BUCK2";
177
+
regulator-min-microvolt = <300000>;
178
+
regulator-max-microvolt = <1900000>;
179
+
regulator-min-microamp = <3500000>;
180
+
regulator-max-microamp = <10000000>;
181
+
regulator-boot-on;
182
+
regulator-initial-mode = <DA9121_BUCK_MODE_AUTO>;
183
+
enable-gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
184
+
dlg,ripple-cancel = <DA9121_BUCK_RIPPLE_CANCEL_NONE>;
185
+
};
186
+
};
187
+
};
188
+
};
189
+
...
+47
Documentation/devicetree/bindings/regulator/fixed-regulator.yaml
+47
Documentation/devicetree/bindings/regulator/fixed-regulator.yaml
···
26
26
const: regulator-fixed-clock
27
27
required:
28
28
- clocks
29
+
else:
30
+
if:
31
+
properties:
32
+
compatible:
33
+
contains:
34
+
const: regulator-fixed-domain
35
+
required:
36
+
- power-domains
37
+
- required-opps
29
38
30
39
properties:
31
40
compatible:
32
41
enum:
33
42
- regulator-fixed
34
43
- regulator-fixed-clock
44
+
- regulator-fixed-domain
35
45
36
46
regulator-name: true
37
47
···
54
44
clock to use for enable control. This binding is only available if
55
45
the compatible is chosen to regulator-fixed-clock. The clock binding
56
46
is mandatory if compatible is chosen to regulator-fixed-clock.
47
+
maxItems: 1
48
+
49
+
power-domains:
50
+
description:
51
+
Power domain to use for enable control. This binding is only
52
+
available if the compatible is chosen to regulator-fixed-domain.
53
+
maxItems: 1
54
+
55
+
required-opps:
56
+
description:
57
+
Performance state to use for enable control. This binding is only
58
+
available if the compatible is chosen to regulator-fixed-domain. The
59
+
power-domain binding is mandatory if compatible is chosen to
60
+
regulator-fixed-domain.
57
61
maxItems: 1
58
62
59
63
startup-delay-us:
···
111
87
enable-active-high;
112
88
regulator-boot-on;
113
89
gpio-open-drain;
90
+
vin-supply = <&parent_reg>;
91
+
};
92
+
reg_1v8_clk: regulator-1v8-clk {
93
+
compatible = "regulator-fixed-clock";
94
+
regulator-name = "1v8";
95
+
regulator-min-microvolt = <1800000>;
96
+
regulator-max-microvolt = <1800000>;
97
+
clocks = <&clock1>;
98
+
startup-delay-us = <70000>;
99
+
enable-active-high;
100
+
regulator-boot-on;
101
+
vin-supply = <&parent_reg>;
102
+
};
103
+
reg_1v8_domain: regulator-1v8-domain {
104
+
compatible = "regulator-fixed-domain";
105
+
regulator-name = "1v8";
106
+
regulator-min-microvolt = <1800000>;
107
+
regulator-max-microvolt = <1800000>;
108
+
power-domains = <&domain1>;
109
+
required-opps = <&domain1_state1>;
110
+
startup-delay-us = <70000>;
111
+
enable-active-high;
112
+
regulator-boot-on;
114
113
vin-supply = <&parent_reg>;
115
114
};
116
115
...
+1
-1
Documentation/devicetree/bindings/regulator/mcp16502-regulator.txt
+1
-1
Documentation/devicetree/bindings/regulator/mcp16502-regulator.txt
···
10
10
name. The content of each sub-node is defined by the
11
11
standard binding for regulators; see regulator.txt.
12
12
13
-
Regualtors of MCP16502 PMIC:
13
+
Regulators of MCP16502 PMIC:
14
14
1) VDD_IO - Buck (1.2 - 3.7 V)
15
15
2) VDD_DDR - Buck (0.6 - 1.85 V)
16
16
3) VDD_CORE - Buck (0.6 - 1.85 V)
+211
Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml
+211
Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/regulator/nxp,pf8x00-regulator.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: NXP PF8100/PF8121A/PF8200 PMIC regulators
8
+
9
+
maintainers:
10
+
- Jagan Teki <jagan@amarulasolutions.com>
11
+
- Troy Kisky <troy.kisky@boundarydevices.com>
12
+
13
+
description: |
14
+
PF8100/PF8121A/PF8200 is a PMIC designed for highperformance consumer
15
+
applications. It features seven high efficiency buck converters, four
16
+
linear and one vsnvs regulators. It has built-in one time programmable
17
+
fuse bank for device configurations.
18
+
19
+
properties:
20
+
compatible:
21
+
enum:
22
+
- nxp,pf8x00
23
+
24
+
reg:
25
+
maxItems: 1
26
+
27
+
regulators:
28
+
type: object
29
+
description: |
30
+
list of regulators provided by this controller
31
+
32
+
patternProperties:
33
+
"^ldo[1-4]$":
34
+
type: object
35
+
$ref: regulator.yaml#
36
+
description:
37
+
Properties for single LDO regulator.
38
+
39
+
properties:
40
+
regulator-name:
41
+
pattern: "^ldo[1-4]$"
42
+
description:
43
+
should be "ldo1", ..., "ldo4"
44
+
45
+
unevaluatedProperties: false
46
+
47
+
"^buck[1-7]$":
48
+
type: object
49
+
$ref: regulator.yaml#
50
+
description:
51
+
Properties for single BUCK regulator.
52
+
53
+
properties:
54
+
regulator-name:
55
+
pattern: "^buck[1-7]$"
56
+
description:
57
+
should be "buck1", ..., "buck7"
58
+
59
+
nxp,ilim-ma:
60
+
$ref: "/schemas/types.yaml#/definitions/uint32"
61
+
minimum: 2100
62
+
maximum: 4500
63
+
description:
64
+
BUCK regulators current limit in mA.
65
+
66
+
Listed current limits in mA are,
67
+
2100 (default)
68
+
2600
69
+
3000
70
+
4500
71
+
72
+
nxp,phase-shift:
73
+
$ref: "/schemas/types.yaml#/definitions/uint32"
74
+
minimum: 45
75
+
maximum: 0
76
+
description:
77
+
BUCK regulators phase shift control in degrees.
78
+
79
+
Listed phase shift control values in degrees are,
80
+
45
81
+
90
82
+
135
83
+
180
84
+
225
85
+
270
86
+
315
87
+
0 (default)
88
+
89
+
unevaluatedProperties: false
90
+
91
+
"^vsnvs$":
92
+
type: object
93
+
$ref: regulator.yaml#
94
+
description:
95
+
Properties for single VSNVS regulator.
96
+
97
+
properties:
98
+
regulator-name:
99
+
pattern: "^vsnvs$"
100
+
description:
101
+
should be "vsnvs"
102
+
103
+
unevaluatedProperties: false
104
+
105
+
additionalProperties: false
106
+
107
+
required:
108
+
- compatible
109
+
- reg
110
+
- regulators
111
+
112
+
additionalProperties: false
113
+
114
+
examples:
115
+
- |
116
+
i2c1 {
117
+
#address-cells = <1>;
118
+
#size-cells = <0>;
119
+
120
+
pmic@8 {
121
+
compatible = "nxp,pf8x00";
122
+
reg = <0x08>;
123
+
124
+
regulators {
125
+
reg_ldo1: ldo1 {
126
+
regulator-always-on;
127
+
regulator-boot-on;
128
+
regulator-max-microvolt = <5000000>;
129
+
regulator-min-microvolt = <1500000>;
130
+
};
131
+
132
+
reg_ldo2: ldo2 {
133
+
regulator-always-on;
134
+
regulator-boot-on;
135
+
regulator-max-microvolt = <5000000>;
136
+
regulator-min-microvolt = <1500000>;
137
+
};
138
+
139
+
reg_ldo3: ldo3 {
140
+
regulator-always-on;
141
+
regulator-boot-on;
142
+
regulator-max-microvolt = <5000000>;
143
+
regulator-min-microvolt = <1500000>;
144
+
};
145
+
146
+
reg_ldo4: ldo4 {
147
+
regulator-always-on;
148
+
regulator-boot-on;
149
+
regulator-max-microvolt = <5000000>;
150
+
regulator-min-microvolt = <1500000>;
151
+
};
152
+
153
+
reg_buck1: buck1 {
154
+
nxp,ilim-ma = <4500>;
155
+
regulator-always-on;
156
+
regulator-boot-on;
157
+
regulator-max-microvolt = <1800000>;
158
+
regulator-min-microvolt = <400000>;
159
+
};
160
+
161
+
reg_buck2: buck2 {
162
+
regulator-always-on;
163
+
regulator-boot-on;
164
+
regulator-max-microvolt = <1800000>;
165
+
regulator-min-microvolt = <400000>;
166
+
};
167
+
168
+
reg_buck3: buck3 {
169
+
regulator-always-on;
170
+
regulator-boot-on;
171
+
regulator-max-microvolt = <1800000>;
172
+
regulator-min-microvolt = <400000>;
173
+
};
174
+
175
+
reg_buck4: buck4 {
176
+
regulator-always-on;
177
+
regulator-boot-on;
178
+
regulator-max-microvolt = <1800000>;
179
+
regulator-min-microvolt = <400000>;
180
+
};
181
+
182
+
reg_buck5: buck5 {
183
+
regulator-always-on;
184
+
regulator-boot-on;
185
+
regulator-max-microvolt = <1800000>;
186
+
regulator-min-microvolt = <400000>;
187
+
};
188
+
189
+
reg_buck6: buck6 {
190
+
regulator-always-on;
191
+
regulator-boot-on;
192
+
regulator-max-microvolt = <1800000>;
193
+
regulator-min-microvolt = <400000>;
194
+
};
195
+
196
+
reg_buck7: buck7 {
197
+
regulator-always-on;
198
+
regulator-boot-on;
199
+
regulator-max-microvolt = <3300000>;
200
+
regulator-min-microvolt = <3300000>;
201
+
};
202
+
203
+
reg_vsnvs: vsnvs {
204
+
regulator-always-on;
205
+
regulator-boot-on;
206
+
regulator-max-microvolt = <3300000>;
207
+
regulator-min-microvolt = <1800000>;
208
+
};
209
+
};
210
+
};
211
+
};
+6
Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.txt
+6
Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.txt
···
26
26
PM8009: smps1 - smps2, ldo1 - ldo7
27
27
PM8150: smps1 - smps10, ldo1 - ldo18
28
28
PM8150L: smps1 - smps8, ldo1 - ldo11, bob, flash, rgb
29
+
PM8350: smps1 - smps12, ldo1 - ldo10,
30
+
PM8350C: smps1 - smps10, ldo1 - ldo13, bob
29
31
PM8998: smps1 - smps13, ldo1 - ldo28, lvs1 - lvs2
30
32
PMI8998: bob
31
33
PM6150: smps1 - smps5, ldo1 - ldo19
32
34
PM6150L: smps1 - smps8, ldo1 - ldo11, bob
35
+
PMX55: smps1 - smps7, ldo1 - ldo16
33
36
34
37
========================
35
38
First Level Nodes - PMIC
···
46
43
"qcom,pm8009-rpmh-regulators"
47
44
"qcom,pm8150-rpmh-regulators"
48
45
"qcom,pm8150l-rpmh-regulators"
46
+
"qcom,pm8350-rpmh-regulators"
47
+
"qcom,pm8350c-rpmh-regulators"
49
48
"qcom,pm8998-rpmh-regulators"
50
49
"qcom,pmi8998-rpmh-regulators"
51
50
"qcom,pm6150-rpmh-regulators"
52
51
"qcom,pm6150l-rpmh-regulators"
52
+
"qcom,pmx55-rpmh-regulators"
53
53
54
54
- qcom,pmic-id
55
55
Usage: required
+48
Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml
+48
Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml
···
105
105
PMIC hardware state machine.
106
106
type: boolean
107
107
108
+
# Setups where regulator (especially the buck8) output voltage is scaled
109
+
# by adding external connection where some other regulator output is
110
+
# connected to feedback-pin (over suitable resistors) is getting popular
111
+
# amongst users of BD71837. (This allows for example scaling down the
112
+
# buck8 voltages to suit lover GPU voltages for projects where buck8 is
113
+
# (ab)used to supply power for GPU.
114
+
#
115
+
# So we allow describing this external connection from DT and scale the
116
+
# voltages accordingly. This is what the connection should look like:
117
+
#
118
+
# |---------------|
119
+
# | buck 8 |-------+----->Vout
120
+
# | | |
121
+
# |---------------| |
122
+
# | |
123
+
# | |
124
+
# +-------+--R2----+
125
+
# |
126
+
# R1
127
+
# |
128
+
# V FB-pull-up
129
+
#
130
+
# Here the buck output is sifted according to formula:
131
+
#
132
+
# Vout_o = Vo - (Vpu - Vo)*R2/R1
133
+
# Linear_step = step_orig*(R1+R2)/R1
134
+
#
135
+
# where:
136
+
# Vout_o is adjusted voltage output at vsel reg value 0
137
+
# Vo is original voltage output at vsel reg value 0
138
+
# Vpu is the pull-up voltage V FB-pull-up in the picture
139
+
# R1 and R2 are resistor values.
140
+
141
+
rohm,fb-pull-up-microvolt:
142
+
description:
143
+
Feedback-pin has pull-up connection to adjust voltage range. This is
144
+
the used pull-up voltage before R1.
145
+
146
+
rohm,feedback-pull-up-r1-ohms:
147
+
description:
148
+
Feedback-pin has pull-up connection to adjust voltage range. This is
149
+
the used R1 resistor.
150
+
151
+
rohm,feedback-pull-up-r2-ohms:
152
+
description:
153
+
Feedback-pin has pull-up connection to adjust voltage range. This is
154
+
the used R2 resistor.
155
+
108
156
required:
109
157
- regulator-name
110
158
+49
Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml
+49
Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml
···
99
99
Enable/Disable control of this regulator must be left to the
100
100
PMIC hardware state machine.
101
101
type: boolean
102
+
103
+
# Setups where regulator (especially the buck8) output voltage is scaled
104
+
# by adding external connection where some other regulator output is
105
+
# connected to feedback-pin (over suitable resistors) is getting popular
106
+
# amongst users of BD71837. (This allows for example scaling down the
107
+
# buck8 voltages to suit lover GPU voltages for projects where buck8 is
108
+
# (ab)used to supply power for GPU.
109
+
#
110
+
# So we allow describing this external connection from DT and scale the
111
+
# voltages accordingly. This is what the connection should look like:
112
+
#
113
+
# |---------------|
114
+
# | buck 8 |-------+----->Vout
115
+
# | | |
116
+
# |---------------| |
117
+
# | |
118
+
# | |
119
+
# +-------+--R2----+
120
+
# |
121
+
# R1
122
+
# |
123
+
# V FB-pull-up
124
+
#
125
+
# Here the buck output is sifted according to formula:
126
+
#
127
+
# Vout_o = Vo - (Vpu - Vo)*R2/R1
128
+
# Linear_step = step_orig*(R1+R2)/R1
129
+
#
130
+
# where:
131
+
# Vout_o is adjusted voltage output at vsel reg value 0
132
+
# Vo is original voltage output at vsel reg value 0
133
+
# Vpu is the pull-up voltage V FB-pull-up in the picture
134
+
# R1 and R2 are resistor values.
135
+
136
+
rohm,fb-pull-up-microvolt:
137
+
description:
138
+
Feedback-pin has pull-up connection to adjust voltage range. This is
139
+
the used pull-up voltage before R1.
140
+
141
+
rohm,feedback-pull-up-r1-ohms:
142
+
description:
143
+
Feedback-pin has pull-up connection to adjust voltage range. This is
144
+
the used R1 resistor.
145
+
146
+
rohm,feedback-pull-up-r2-ohms:
147
+
description:
148
+
Feedback-pin has pull-up connection to adjust voltage range. This is
149
+
the used R2 resistor.
150
+
102
151
required:
103
152
- regulator-name
104
153
+8
MAINTAINERS
+8
MAINTAINERS
···
5138
5138
W: http://www.dialog-semiconductor.com/products
5139
5139
F: Documentation/devicetree/bindings/input/da90??-onkey.txt
5140
5140
F: Documentation/devicetree/bindings/mfd/da90*.txt
5141
+
F: Documentation/devicetree/bindings/regulator/dlg,da9*.yaml
5141
5142
F: Documentation/devicetree/bindings/regulator/da92*.txt
5142
5143
F: Documentation/devicetree/bindings/regulator/slg51000.txt
5143
5144
F: Documentation/devicetree/bindings/sound/da[79]*.txt
···
5163
5162
F: drivers/thermal/da90??-thermal.c
5164
5163
F: drivers/video/backlight/da90??_bl.c
5165
5164
F: drivers/watchdog/da90??_wdt.c
5165
+
F: include/dt-bindings/regulator/dlg,da9*-regulator.h
5166
5166
F: include/linux/mfd/da903x.h
5167
5167
F: include/linux/mfd/da9052/
5168
5168
F: include/linux/mfd/da9055/
···
12667
12665
S: Maintained
12668
12666
F: Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
12669
12667
F: drivers/gpu/drm/imx/dcss/
12668
+
12669
+
NXP PF8100/PF8121A/PF8200 PMIC REGULATOR DEVICE DRIVER
12670
+
M: Jagan Teki <jagan@amarulasolutions.com>
12671
+
S: Maintained
12672
+
F: Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml
12673
+
F: drivers/regulator/pf8x00-regulator.c
12670
12674
12671
12675
NXP PTN5150A CC LOGIC AND EXTCON DRIVER
12672
12676
M: Krzysztof Kozlowski <krzk@kernel.org>
+1
-1
drivers/firmware/arm_scmi/Makefile
+1
-1
drivers/firmware/arm_scmi/Makefile
···
4
4
scmi-transport-y = shmem.o
5
5
scmi-transport-$(CONFIG_MAILBOX) += mailbox.o
6
6
scmi-transport-$(CONFIG_HAVE_ARM_SMCCC_DISCOVERY) += smc.o
7
-
scmi-protocols-y = base.o clock.o perf.o power.o reset.o sensors.o system.o
7
+
scmi-protocols-y = base.o clock.o perf.o power.o reset.o sensors.o system.o voltage.o
8
8
scmi-module-objs := $(scmi-bus-y) $(scmi-driver-y) $(scmi-protocols-y) \
9
9
$(scmi-transport-y)
10
10
obj-$(CONFIG_ARM_SCMI_PROTOCOL) += scmi-module.o
+1
drivers/firmware/arm_scmi/common.h
+1
drivers/firmware/arm_scmi/common.h
···
169
169
DECLARE_SCMI_REGISTER_UNREGISTER(power);
170
170
DECLARE_SCMI_REGISTER_UNREGISTER(reset);
171
171
DECLARE_SCMI_REGISTER_UNREGISTER(sensors);
172
+
DECLARE_SCMI_REGISTER_UNREGISTER(voltage);
172
173
DECLARE_SCMI_REGISTER_UNREGISTER(system);
173
174
174
175
#define DEFINE_SCMI_PROTOCOL_REGISTER_UNREGISTER(id, name) \
+3
drivers/firmware/arm_scmi/driver.c
+3
drivers/firmware/arm_scmi/driver.c
···
743
743
{ SCMI_PROTOCOL_CLOCK, { "clocks" },},
744
744
{ SCMI_PROTOCOL_SENSOR, { "hwmon" },},
745
745
{ SCMI_PROTOCOL_RESET, { "reset" },},
746
+
{ SCMI_PROTOCOL_VOLTAGE, { "regulator" },},
746
747
};
747
748
748
749
static inline void
···
947
946
scmi_power_register();
948
947
scmi_reset_register();
949
948
scmi_sensors_register();
949
+
scmi_voltage_register();
950
950
scmi_system_register();
951
951
952
952
return platform_driver_register(&scmi_driver);
···
963
961
scmi_power_unregister();
964
962
scmi_reset_unregister();
965
963
scmi_sensors_unregister();
964
+
scmi_voltage_unregister();
966
965
scmi_system_unregister();
967
966
968
967
platform_driver_unregister(&scmi_driver);
+380
drivers/firmware/arm_scmi/voltage.c
+380
drivers/firmware/arm_scmi/voltage.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* System Control and Management Interface (SCMI) Voltage Protocol
4
+
*
5
+
* Copyright (C) 2020 ARM Ltd.
6
+
*/
7
+
8
+
#include <linux/scmi_protocol.h>
9
+
10
+
#include "common.h"
11
+
12
+
#define VOLTAGE_DOMS_NUM_MASK GENMASK(15, 0)
13
+
#define REMAINING_LEVELS_MASK GENMASK(31, 16)
14
+
#define RETURNED_LEVELS_MASK GENMASK(11, 0)
15
+
16
+
enum scmi_voltage_protocol_cmd {
17
+
VOLTAGE_DOMAIN_ATTRIBUTES = 0x3,
18
+
VOLTAGE_DESCRIBE_LEVELS = 0x4,
19
+
VOLTAGE_CONFIG_SET = 0x5,
20
+
VOLTAGE_CONFIG_GET = 0x6,
21
+
VOLTAGE_LEVEL_SET = 0x7,
22
+
VOLTAGE_LEVEL_GET = 0x8,
23
+
};
24
+
25
+
#define NUM_VOLTAGE_DOMAINS(x) ((u16)(FIELD_GET(VOLTAGE_DOMS_NUM_MASK, (x))))
26
+
27
+
struct scmi_msg_resp_domain_attributes {
28
+
__le32 attr;
29
+
u8 name[SCMI_MAX_STR_SIZE];
30
+
};
31
+
32
+
struct scmi_msg_cmd_describe_levels {
33
+
__le32 domain_id;
34
+
__le32 level_index;
35
+
};
36
+
37
+
struct scmi_msg_resp_describe_levels {
38
+
__le32 flags;
39
+
#define NUM_REMAINING_LEVELS(f) ((u16)(FIELD_GET(REMAINING_LEVELS_MASK, (f))))
40
+
#define NUM_RETURNED_LEVELS(f) ((u16)(FIELD_GET(RETURNED_LEVELS_MASK, (f))))
41
+
#define SUPPORTS_SEGMENTED_LEVELS(f) ((f) & BIT(12))
42
+
__le32 voltage[];
43
+
};
44
+
45
+
struct scmi_msg_cmd_config_set {
46
+
__le32 domain_id;
47
+
__le32 config;
48
+
};
49
+
50
+
struct scmi_msg_cmd_level_set {
51
+
__le32 domain_id;
52
+
__le32 flags;
53
+
__le32 voltage_level;
54
+
};
55
+
56
+
struct voltage_info {
57
+
unsigned int version;
58
+
unsigned int num_domains;
59
+
struct scmi_voltage_info *domains;
60
+
};
61
+
62
+
static int scmi_protocol_attributes_get(const struct scmi_handle *handle,
63
+
struct voltage_info *vinfo)
64
+
{
65
+
int ret;
66
+
struct scmi_xfer *t;
67
+
68
+
ret = scmi_xfer_get_init(handle, PROTOCOL_ATTRIBUTES,
69
+
SCMI_PROTOCOL_VOLTAGE, 0, sizeof(__le32), &t);
70
+
if (ret)
71
+
return ret;
72
+
73
+
ret = scmi_do_xfer(handle, t);
74
+
if (!ret)
75
+
vinfo->num_domains =
76
+
NUM_VOLTAGE_DOMAINS(get_unaligned_le32(t->rx.buf));
77
+
78
+
scmi_xfer_put(handle, t);
79
+
return ret;
80
+
}
81
+
82
+
static int scmi_init_voltage_levels(struct device *dev,
83
+
struct scmi_voltage_info *v,
84
+
u32 num_returned, u32 num_remaining,
85
+
bool segmented)
86
+
{
87
+
u32 num_levels;
88
+
89
+
num_levels = num_returned + num_remaining;
90
+
/*
91
+
* segmented levels entries are represented by a single triplet
92
+
* returned all in one go.
93
+
*/
94
+
if (!num_levels ||
95
+
(segmented && (num_remaining || num_returned != 3))) {
96
+
dev_err(dev,
97
+
"Invalid level descriptor(%d/%d/%d) for voltage dom %d\n",
98
+
num_levels, num_returned, num_remaining, v->id);
99
+
return -EINVAL;
100
+
}
101
+
102
+
v->levels_uv = devm_kcalloc(dev, num_levels, sizeof(u32), GFP_KERNEL);
103
+
if (!v->levels_uv)
104
+
return -ENOMEM;
105
+
106
+
v->num_levels = num_levels;
107
+
v->segmented = segmented;
108
+
109
+
return 0;
110
+
}
111
+
112
+
static int scmi_voltage_descriptors_get(const struct scmi_handle *handle,
113
+
struct voltage_info *vinfo)
114
+
{
115
+
int ret, dom;
116
+
struct scmi_xfer *td, *tl;
117
+
struct device *dev = handle->dev;
118
+
struct scmi_msg_resp_domain_attributes *resp_dom;
119
+
struct scmi_msg_resp_describe_levels *resp_levels;
120
+
121
+
ret = scmi_xfer_get_init(handle, VOLTAGE_DOMAIN_ATTRIBUTES,
122
+
SCMI_PROTOCOL_VOLTAGE, sizeof(__le32),
123
+
sizeof(*resp_dom), &td);
124
+
if (ret)
125
+
return ret;
126
+
resp_dom = td->rx.buf;
127
+
128
+
ret = scmi_xfer_get_init(handle, VOLTAGE_DESCRIBE_LEVELS,
129
+
SCMI_PROTOCOL_VOLTAGE, sizeof(__le64), 0, &tl);
130
+
if (ret)
131
+
goto outd;
132
+
resp_levels = tl->rx.buf;
133
+
134
+
for (dom = 0; dom < vinfo->num_domains; dom++) {
135
+
u32 desc_index = 0;
136
+
u16 num_returned = 0, num_remaining = 0;
137
+
struct scmi_msg_cmd_describe_levels *cmd;
138
+
struct scmi_voltage_info *v;
139
+
140
+
/* Retrieve domain attributes at first ... */
141
+
put_unaligned_le32(dom, td->tx.buf);
142
+
ret = scmi_do_xfer(handle, td);
143
+
/* Skip domain on comms error */
144
+
if (ret)
145
+
continue;
146
+
147
+
v = vinfo->domains + dom;
148
+
v->id = dom;
149
+
v->attributes = le32_to_cpu(resp_dom->attr);
150
+
strlcpy(v->name, resp_dom->name, SCMI_MAX_STR_SIZE);
151
+
152
+
cmd = tl->tx.buf;
153
+
/* ...then retrieve domain levels descriptions */
154
+
do {
155
+
u32 flags;
156
+
int cnt;
157
+
158
+
cmd->domain_id = cpu_to_le32(v->id);
159
+
cmd->level_index = desc_index;
160
+
ret = scmi_do_xfer(handle, tl);
161
+
if (ret)
162
+
break;
163
+
164
+
flags = le32_to_cpu(resp_levels->flags);
165
+
num_returned = NUM_RETURNED_LEVELS(flags);
166
+
num_remaining = NUM_REMAINING_LEVELS(flags);
167
+
168
+
/* Allocate space for num_levels if not already done */
169
+
if (!v->num_levels) {
170
+
ret = scmi_init_voltage_levels(dev, v,
171
+
num_returned,
172
+
num_remaining,
173
+
SUPPORTS_SEGMENTED_LEVELS(flags));
174
+
if (ret)
175
+
break;
176
+
}
177
+
178
+
if (desc_index + num_returned > v->num_levels) {
179
+
dev_err(handle->dev,
180
+
"No. of voltage levels can't exceed %d\n",
181
+
v->num_levels);
182
+
ret = -EINVAL;
183
+
break;
184
+
}
185
+
186
+
for (cnt = 0; cnt < num_returned; cnt++) {
187
+
s32 val;
188
+
189
+
val =
190
+
(s32)le32_to_cpu(resp_levels->voltage[cnt]);
191
+
v->levels_uv[desc_index + cnt] = val;
192
+
if (val < 0)
193
+
v->negative_volts_allowed = true;
194
+
}
195
+
196
+
desc_index += num_returned;
197
+
198
+
scmi_reset_rx_to_maxsz(handle, tl);
199
+
/* check both to avoid infinite loop due to buggy fw */
200
+
} while (num_returned && num_remaining);
201
+
202
+
if (ret) {
203
+
v->num_levels = 0;
204
+
devm_kfree(dev, v->levels_uv);
205
+
}
206
+
207
+
scmi_reset_rx_to_maxsz(handle, td);
208
+
}
209
+
210
+
scmi_xfer_put(handle, tl);
211
+
outd:
212
+
scmi_xfer_put(handle, td);
213
+
214
+
return ret;
215
+
}
216
+
217
+
static int __scmi_voltage_get_u32(const struct scmi_handle *handle,
218
+
u8 cmd_id, u32 domain_id, u32 *value)
219
+
{
220
+
int ret;
221
+
struct scmi_xfer *t;
222
+
struct voltage_info *vinfo = handle->voltage_priv;
223
+
224
+
if (domain_id >= vinfo->num_domains)
225
+
return -EINVAL;
226
+
227
+
ret = scmi_xfer_get_init(handle, cmd_id,
228
+
SCMI_PROTOCOL_VOLTAGE,
229
+
sizeof(__le32), 0, &t);
230
+
if (ret)
231
+
return ret;
232
+
233
+
put_unaligned_le32(domain_id, t->tx.buf);
234
+
ret = scmi_do_xfer(handle, t);
235
+
if (!ret)
236
+
*value = get_unaligned_le32(t->rx.buf);
237
+
238
+
scmi_xfer_put(handle, t);
239
+
return ret;
240
+
}
241
+
242
+
static int scmi_voltage_config_set(const struct scmi_handle *handle,
243
+
u32 domain_id, u32 config)
244
+
{
245
+
int ret;
246
+
struct scmi_xfer *t;
247
+
struct voltage_info *vinfo = handle->voltage_priv;
248
+
struct scmi_msg_cmd_config_set *cmd;
249
+
250
+
if (domain_id >= vinfo->num_domains)
251
+
return -EINVAL;
252
+
253
+
ret = scmi_xfer_get_init(handle, VOLTAGE_CONFIG_SET,
254
+
SCMI_PROTOCOL_VOLTAGE,
255
+
sizeof(*cmd), 0, &t);
256
+
if (ret)
257
+
return ret;
258
+
259
+
cmd = t->tx.buf;
260
+
cmd->domain_id = cpu_to_le32(domain_id);
261
+
cmd->config = cpu_to_le32(config & GENMASK(3, 0));
262
+
263
+
ret = scmi_do_xfer(handle, t);
264
+
265
+
scmi_xfer_put(handle, t);
266
+
return ret;
267
+
}
268
+
269
+
static int scmi_voltage_config_get(const struct scmi_handle *handle,
270
+
u32 domain_id, u32 *config)
271
+
{
272
+
return __scmi_voltage_get_u32(handle, VOLTAGE_CONFIG_GET,
273
+
domain_id, config);
274
+
}
275
+
276
+
static int scmi_voltage_level_set(const struct scmi_handle *handle,
277
+
u32 domain_id, u32 flags, s32 volt_uV)
278
+
{
279
+
int ret;
280
+
struct scmi_xfer *t;
281
+
struct voltage_info *vinfo = handle->voltage_priv;
282
+
struct scmi_msg_cmd_level_set *cmd;
283
+
284
+
if (domain_id >= vinfo->num_domains)
285
+
return -EINVAL;
286
+
287
+
ret = scmi_xfer_get_init(handle, VOLTAGE_LEVEL_SET,
288
+
SCMI_PROTOCOL_VOLTAGE,
289
+
sizeof(*cmd), 0, &t);
290
+
if (ret)
291
+
return ret;
292
+
293
+
cmd = t->tx.buf;
294
+
cmd->domain_id = cpu_to_le32(domain_id);
295
+
cmd->flags = cpu_to_le32(flags);
296
+
cmd->voltage_level = cpu_to_le32(volt_uV);
297
+
298
+
ret = scmi_do_xfer(handle, t);
299
+
300
+
scmi_xfer_put(handle, t);
301
+
return ret;
302
+
}
303
+
304
+
static int scmi_voltage_level_get(const struct scmi_handle *handle,
305
+
u32 domain_id, s32 *volt_uV)
306
+
{
307
+
return __scmi_voltage_get_u32(handle, VOLTAGE_LEVEL_GET,
308
+
domain_id, (u32 *)volt_uV);
309
+
}
310
+
311
+
static const struct scmi_voltage_info * __must_check
312
+
scmi_voltage_info_get(const struct scmi_handle *handle, u32 domain_id)
313
+
{
314
+
struct voltage_info *vinfo = handle->voltage_priv;
315
+
316
+
if (domain_id >= vinfo->num_domains ||
317
+
!vinfo->domains[domain_id].num_levels)
318
+
return NULL;
319
+
320
+
return vinfo->domains + domain_id;
321
+
}
322
+
323
+
static int scmi_voltage_domains_num_get(const struct scmi_handle *handle)
324
+
{
325
+
struct voltage_info *vinfo = handle->voltage_priv;
326
+
327
+
return vinfo->num_domains;
328
+
}
329
+
330
+
static struct scmi_voltage_ops voltage_ops = {
331
+
.num_domains_get = scmi_voltage_domains_num_get,
332
+
.info_get = scmi_voltage_info_get,
333
+
.config_set = scmi_voltage_config_set,
334
+
.config_get = scmi_voltage_config_get,
335
+
.level_set = scmi_voltage_level_set,
336
+
.level_get = scmi_voltage_level_get,
337
+
};
338
+
339
+
static int scmi_voltage_protocol_init(struct scmi_handle *handle)
340
+
{
341
+
int ret;
342
+
u32 version;
343
+
struct voltage_info *vinfo;
344
+
345
+
ret = scmi_version_get(handle, SCMI_PROTOCOL_VOLTAGE, &version);
346
+
if (ret)
347
+
return ret;
348
+
349
+
dev_dbg(handle->dev, "Voltage Version %d.%d\n",
350
+
PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version));
351
+
352
+
vinfo = devm_kzalloc(handle->dev, sizeof(*vinfo), GFP_KERNEL);
353
+
if (!vinfo)
354
+
return -ENOMEM;
355
+
vinfo->version = version;
356
+
357
+
ret = scmi_protocol_attributes_get(handle, vinfo);
358
+
if (ret)
359
+
return ret;
360
+
361
+
if (vinfo->num_domains) {
362
+
vinfo->domains = devm_kcalloc(handle->dev, vinfo->num_domains,
363
+
sizeof(*vinfo->domains),
364
+
GFP_KERNEL);
365
+
if (!vinfo->domains)
366
+
return -ENOMEM;
367
+
ret = scmi_voltage_descriptors_get(handle, vinfo);
368
+
if (ret)
369
+
return ret;
370
+
} else {
371
+
dev_warn(handle->dev, "No Voltage domains found.\n");
372
+
}
373
+
374
+
handle->voltage_ops = &voltage_ops;
375
+
handle->voltage_priv = vinfo;
376
+
377
+
return 0;
378
+
}
379
+
380
+
DEFINE_SCMI_PROTOCOL_REGISTER_UNREGISTER(SCMI_PROTOCOL_VOLTAGE, voltage)
+39
-2
drivers/regulator/Kconfig
+39
-2
drivers/regulator/Kconfig
···
155
155
and Wolfson Microelectronic Arizona codecs
156
156
devices.
157
157
158
+
config REGULATOR_ARM_SCMI
159
+
tristate "SCMI based regulator driver"
160
+
depends on ARM_SCMI_PROTOCOL && OF
161
+
help
162
+
This adds the regulator driver support for ARM platforms using SCMI
163
+
protocol for device voltage management.
164
+
This driver uses SCMI Message Protocol driver to interact with the
165
+
firmware providing the device Voltage functionality.
166
+
158
167
config REGULATOR_AS3711
159
168
tristate "AS3711 PMIC"
160
169
depends on MFD_AS3711
···
311
302
312
303
This driver can also be built as a module. If so, the module
313
304
will be called da9063-regulator.
305
+
306
+
config REGULATOR_DA9121
307
+
tristate "Dialog Semiconductor DA9121/DA9122/DA9220/DA9217/DA9130/DA9131/DA9132 regulator"
308
+
depends on I2C && OF
309
+
select REGMAP_I2C
310
+
help
311
+
Say y here to support for the Dialog Semiconductor DA9121. The
312
+
DA9121 is a single channel dual-phase buck converter controlled
313
+
through an I2C interface.
314
+
315
+
DA9121 Single-channel dual-phase 10A buck converter
316
+
DA9130 Single-channel dual-phase 10A buck converter (Automotive)
317
+
DA9217 Single-channel dual-phase 6A buck converter
318
+
DA9122 Dual-channel single-phase 5A buck converter
319
+
DA9131 Dual-channel single-phase 5A buck converter (Automotive)
320
+
DA9220 Dual-channel single-phase 3A buck converter
321
+
DA9132 Dual-channel single-phase 3A buck converter (Automotive)
322
+
323
+
This driver can also be built as a module. If so, the module
324
+
will be called da9121-regulator.
314
325
315
326
config REGULATOR_DA9210
316
327
tristate "Dialog Semiconductor DA9210 regulator"
···
820
791
Say Y here to support the voltage regulators and converters
821
792
on PCF50633
822
793
794
+
config REGULATOR_PF8X00
795
+
tristate "NXP PF8100/PF8121A/PF8200 regulator driver"
796
+
depends on I2C && OF
797
+
select REGMAP_I2C
798
+
help
799
+
Say y here to support the regulators found on the NXP
800
+
PF8100/PF8121A/PF8200 PMIC.
801
+
823
802
config REGULATOR_PFUZE100
824
803
tristate "Freescale PFUZE100/200/3000/3001 regulator driver"
825
-
depends on I2C
804
+
depends on I2C && OF
826
805
select REGMAP_I2C
827
806
help
828
807
Say y here to support the regulators found on the Freescale
···
880
843
881
844
config REGULATOR_QCOM_RPMH
882
845
tristate "Qualcomm Technologies, Inc. RPMh regulator driver"
883
-
depends on QCOM_RPMH || COMPILE_TEST
846
+
depends on QCOM_RPMH || (QCOM_RPMH=n && COMPILE_TEST)
884
847
help
885
848
This driver supports control of PMIC regulators via the RPMh hardware
886
849
block found on Qualcomm Technologies Inc. SoCs. RPMh regulator
+3
drivers/regulator/Makefile
+3
drivers/regulator/Makefile
···
24
24
obj-$(CONFIG_REGULATOR_ANATOP) += anatop-regulator.o
25
25
obj-$(CONFIG_REGULATOR_ARIZONA_LDO1) += arizona-ldo1.o
26
26
obj-$(CONFIG_REGULATOR_ARIZONA_MICSUPP) += arizona-micsupp.o
27
+
obj-$(CONFIG_REGULATOR_ARM_SCMI) += scmi-regulator.o
27
28
obj-$(CONFIG_REGULATOR_AS3711) += as3711-regulator.o
28
29
obj-$(CONFIG_REGULATOR_AS3722) += as3722-regulator.o
29
30
obj-$(CONFIG_REGULATOR_AXP20X) += axp20x-regulator.o
···
39
38
obj-$(CONFIG_REGULATOR_DA9055) += da9055-regulator.o
40
39
obj-$(CONFIG_REGULATOR_DA9062) += da9062-regulator.o
41
40
obj-$(CONFIG_REGULATOR_DA9063) += da9063-regulator.o
41
+
obj-$(CONFIG_REGULATOR_DA9121) += da9121-regulator.o
42
42
obj-$(CONFIG_REGULATOR_DA9210) += da9210-regulator.o
43
43
obj-$(CONFIG_REGULATOR_DA9211) += da9211-regulator.o
44
44
obj-$(CONFIG_REGULATOR_DBX500_PRCMU) += dbx500-prcmu.o
···
102
100
obj-$(CONFIG_REGULATOR_QCOM_USB_VBUS) += qcom_usb_vbus-regulator.o
103
101
obj-$(CONFIG_REGULATOR_PALMAS) += palmas-regulator.o
104
102
obj-$(CONFIG_REGULATOR_PCA9450) += pca9450-regulator.o
103
+
obj-$(CONFIG_REGULATOR_PF8X00) += pf8x00-regulator.o
105
104
obj-$(CONFIG_REGULATOR_PFUZE100) += pfuze100-regulator.o
106
105
obj-$(CONFIG_REGULATOR_PV88060) += pv88060-regulator.o
107
106
obj-$(CONFIG_REGULATOR_PV88080) += pv88080-regulator.o
+2
-1
drivers/regulator/as3722-regulator.c
+2
-1
drivers/regulator/as3722-regulator.c
+1
-1
drivers/regulator/axp20x-regulator.c
+1
-1
drivers/regulator/axp20x-regulator.c
···
594
594
AXP22X_DLDO1_V_OUT, AXP22X_DLDO1_V_OUT_MASK,
595
595
AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK),
596
596
AXP_DESC(AXP22X, DLDO2, "dldo2", "dldoin", 700, 3300, 100,
597
-
AXP22X_DLDO2_V_OUT, AXP22X_PWR_OUT_DLDO2_MASK,
597
+
AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT_MASK,
598
598
AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK),
599
599
AXP_DESC(AXP22X, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
600
600
AXP22X_DLDO3_V_OUT, AXP22X_DLDO3_V_OUT_MASK,
+157
-7
drivers/regulator/bd718x7-regulator.c
+157
-7
drivers/regulator/bd718x7-regulator.c
···
1323
1323
dev_warn(dev, "Bad regulator node\n");
1324
1324
}
1325
1325
1326
-
static int get_hw_controlled_regulators(struct device *dev,
1327
-
struct bd718xx_regulator_data *reg_data,
1328
-
unsigned int num_reg_data, int *info)
1326
+
/*
1327
+
* Setups where regulator (especially the buck8) output voltage is scaled
1328
+
* by adding external connection where some other regulator output is connected
1329
+
* to feedback-pin (over suitable resistors) is getting popular amongst users
1330
+
* of BD71837. (This allows for example scaling down the buck8 voltages to suit
1331
+
* lover GPU voltages for projects where buck8 is (ab)used to supply power
1332
+
* for GPU. Additionally some setups do allow DVS for buck8 but as this do
1333
+
* produce voltage spikes the HW must be evaluated to be able to survive this
1334
+
* - hence I keep the DVS disabled for non DVS bucks by default. I don't want
1335
+
* to help you burn your proto board)
1336
+
*
1337
+
* So we allow describing this external connection from DT and scale the
1338
+
* voltages accordingly. This is what the connection should look like:
1339
+
*
1340
+
* |------------|
1341
+
* | buck 8 |-------+----->Vout
1342
+
* | | |
1343
+
* |------------| |
1344
+
* | FB pin |
1345
+
* | |
1346
+
* +-------+--R2---+
1347
+
* |
1348
+
* R1
1349
+
* |
1350
+
* V FB-pull-up
1351
+
*
1352
+
* Here the buck output is sifted according to formula:
1353
+
*
1354
+
* Vout_o = Vo - (Vpu - Vo)*R2/R1
1355
+
* Linear_step = step_orig*(R1+R2)/R1
1356
+
*
1357
+
* where:
1358
+
* Vout_o is adjusted voltage output at vsel reg value 0
1359
+
* Vo is original voltage output at vsel reg value 0
1360
+
* Vpu is the pull-up voltage V FB-pull-up in the picture
1361
+
* R1 and R2 are resistor values.
1362
+
*
1363
+
* As a real world example for buck8 and a specific GPU:
1364
+
* VLDO = 1.6V (used as FB-pull-up)
1365
+
* R1 = 1000ohms
1366
+
* R2 = 150ohms
1367
+
* VSEL 0x0 => 0.8V – (VLDO – 0.8) * R2 / R1 = 0.68V
1368
+
* Linear Step = 10mV * (R1 + R2) / R1 = 11.5mV
1369
+
*/
1370
+
static int setup_feedback_loop(struct device *dev, struct device_node *np,
1371
+
struct bd718xx_regulator_data *reg_data,
1372
+
unsigned int num_reg_data, int fb_uv)
1329
1373
{
1374
+
int i, r1, r2, ret;
1375
+
1376
+
/*
1377
+
* We do adjust the values in the global desc based on DT settings.
1378
+
* This may not be best approach as it can cause problems if more than
1379
+
* one PMIC is controlled from same processor. I don't see such use-case
1380
+
* for BD718x7 now - so we spare some bits.
1381
+
*
1382
+
* If this will point out to be a problem - then we can allocate new
1383
+
* bd718xx_regulator_data array at probe and just use the global
1384
+
* array as a template where we copy initial values. Then we can
1385
+
* use allocated descs for regultor registration and do IC specific
1386
+
* modifications to this copy while leaving other PMICs untouched. But
1387
+
* that means allocating new array for each PMIC - and currently I see
1388
+
* no need for that.
1389
+
*/
1390
+
1391
+
for (i = 0; i < num_reg_data; i++) {
1392
+
struct regulator_desc *desc = ®_data[i].desc;
1393
+
int j;
1394
+
1395
+
if (!of_node_name_eq(np, desc->of_match))
1396
+
continue;
1397
+
1398
+
pr_info("Looking at node '%s'\n", desc->of_match);
1399
+
1400
+
/* The feedback loop connection does not make sense for LDOs */
1401
+
if (desc->id >= BD718XX_LDO1)
1402
+
return -EINVAL;
1403
+
1404
+
ret = of_property_read_u32(np, "rohm,feedback-pull-up-r1-ohms",
1405
+
&r1);
1406
+
if (ret)
1407
+
return ret;
1408
+
1409
+
if (!r1)
1410
+
return -EINVAL;
1411
+
1412
+
ret = of_property_read_u32(np, "rohm,feedback-pull-up-r2-ohms",
1413
+
&r2);
1414
+
if (ret)
1415
+
return ret;
1416
+
1417
+
if (desc->n_linear_ranges && desc->linear_ranges) {
1418
+
struct linear_range *new;
1419
+
1420
+
new = devm_kzalloc(dev, desc->n_linear_ranges *
1421
+
sizeof(struct linear_range),
1422
+
GFP_KERNEL);
1423
+
if (!new)
1424
+
return -ENOMEM;
1425
+
1426
+
for (j = 0; j < desc->n_linear_ranges; j++) {
1427
+
int min = desc->linear_ranges[j].min;
1428
+
int step = desc->linear_ranges[j].step;
1429
+
1430
+
min -= (fb_uv - min)*r2/r1;
1431
+
step = step * (r1 + r2);
1432
+
step /= r1;
1433
+
1434
+
new[j].min = min;
1435
+
new[j].step = step;
1436
+
1437
+
dev_dbg(dev, "%s: old range min %d, step %d\n",
1438
+
desc->name, desc->linear_ranges[j].min,
1439
+
desc->linear_ranges[j].step);
1440
+
dev_dbg(dev, "new range min %d, step %d\n", min,
1441
+
step);
1442
+
}
1443
+
desc->linear_ranges = new;
1444
+
}
1445
+
dev_dbg(dev, "regulator '%s' has FB pull-up configured\n",
1446
+
desc->name);
1447
+
1448
+
return 0;
1449
+
}
1450
+
1451
+
return -ENODEV;
1452
+
}
1453
+
1454
+
static int get_special_regulators(struct device *dev,
1455
+
struct bd718xx_regulator_data *reg_data,
1456
+
unsigned int num_reg_data, int *info)
1457
+
{
1458
+
int ret;
1330
1459
struct device_node *np;
1331
1460
struct device_node *nproot = dev->of_node;
1332
-
const char *prop = "rohm,no-regulator-enable-control";
1461
+
int uv;
1333
1462
1334
1463
*info = 0;
1335
1464
···
1467
1338
dev_err(dev, "failed to find regulators node\n");
1468
1339
return -ENODEV;
1469
1340
}
1470
-
for_each_child_of_node(nproot, np)
1471
-
if (of_property_read_bool(np, prop))
1341
+
for_each_child_of_node(nproot, np) {
1342
+
if (of_property_read_bool(np, "rohm,no-regulator-enable-control"))
1472
1343
mark_hw_controlled(dev, np, reg_data, num_reg_data,
1473
1344
info);
1345
+
ret = of_property_read_u32(np, "rohm,fb-pull-up-microvolt",
1346
+
&uv);
1347
+
if (ret) {
1348
+
if (ret == -EINVAL)
1349
+
continue;
1350
+
else
1351
+
goto err_out;
1352
+
}
1353
+
1354
+
ret = setup_feedback_loop(dev, np, reg_data, num_reg_data, uv);
1355
+
if (ret)
1356
+
goto err_out;
1357
+
}
1474
1358
1475
1359
of_node_put(nproot);
1476
1360
return 0;
1361
+
1362
+
err_out:
1363
+
of_node_put(np);
1364
+
of_node_put(nproot);
1365
+
1366
+
return ret;
1477
1367
}
1478
1368
1479
1369
static int bd718xx_probe(struct platform_device *pdev)
···
1580
1432
* be affected by PMIC state machine - Eg. regulator is likely to stay
1581
1433
* on even in SUSPEND
1582
1434
*/
1583
-
get_hw_controlled_regulators(pdev->dev.parent, reg_data, num_reg_data,
1435
+
err = get_special_regulators(pdev->dev.parent, reg_data, num_reg_data,
1584
1436
&omit_enable);
1437
+
if (err)
1438
+
return err;
1585
1439
1586
1440
for (i = 0; i < num_reg_data; i++) {
1587
1441
+13
-1
drivers/regulator/core.c
+13
-1
drivers/regulator/core.c
···
2958
2958
if (ops->list_voltage) {
2959
2959
if (selector >= rdev->desc->n_voltages)
2960
2960
return -EINVAL;
2961
+
if (selector < rdev->desc->linear_min_sel)
2962
+
return 0;
2961
2963
if (lock)
2962
2964
regulator_lock(rdev);
2963
2965
ret = ops->list_voltage(rdev, selector);
···
3111
3109
3112
3110
if (selector >= rdev->desc->n_voltages)
3113
3111
return -EINVAL;
3112
+
if (selector < rdev->desc->linear_min_sel)
3113
+
return 0;
3114
3114
if (ops->set_voltage_sel != regulator_set_voltage_sel_regmap)
3115
3115
return -EOPNOTSUPP;
3116
3116
···
4034
4030
4035
4031
for (i = 0; i < rdev->desc->n_voltages; i++) {
4036
4032
/* We only look for exact voltage matches here */
4033
+
if (i < rdev->desc->linear_min_sel)
4034
+
continue;
4035
+
4036
+
if (old_sel >= 0 && new_sel >= 0)
4037
+
break;
4038
+
4037
4039
voltage = regulator_list_voltage(regulator, i);
4038
4040
if (voltage < 0)
4039
4041
return -EINVAL;
···
5315
5305
/* FIXME: this currently triggers a chicken-and-egg problem
5316
5306
* when creating -SUPPLY symlink in sysfs to a regulator
5317
5307
* that is just being created */
5308
+
rdev_dbg(rdev, "will resolve supply early: %s\n",
5309
+
rdev->supply_name);
5318
5310
ret = regulator_resolve_supply(rdev);
5319
5311
if (!ret)
5320
5312
ret = set_machine_constraints(rdev);
···
5549
5537
EXPORT_SYMBOL_GPL(regulator_set_drvdata);
5550
5538
5551
5539
/**
5552
-
* regulator_get_id - get regulator ID
5540
+
* rdev_get_id - get regulator ID
5553
5541
* @rdev: regulator
5554
5542
*/
5555
5543
int rdev_get_id(struct regulator_dev *rdev)
+1075
drivers/regulator/da9121-regulator.c
+1075
drivers/regulator/da9121-regulator.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-only
2
+
//
3
+
// DA9121 Single-channel dual-phase 10A buck converter
4
+
//
5
+
// Copyright (C) 2020 Axis Communications AB
6
+
//
7
+
// DA9130 Single-channel dual-phase 10A buck converter (Automotive)
8
+
// DA9217 Single-channel dual-phase 6A buck converter
9
+
// DA9122 Dual-channel single-phase 5A buck converter
10
+
// DA9131 Dual-channel single-phase 5A buck converter (Automotive)
11
+
// DA9220 Dual-channel single-phase 3A buck converter
12
+
// DA9132 Dual-channel single-phase 3A buck converter (Automotive)
13
+
//
14
+
// Copyright (C) 2020 Dialog Semiconductor
15
+
16
+
#include <linux/of_device.h>
17
+
#include <linux/of_gpio.h>
18
+
#include <linux/gpio/consumer.h>
19
+
#include <linux/regulator/of_regulator.h>
20
+
#include <linux/regulator/machine.h>
21
+
#include <linux/regulator/driver.h>
22
+
#include <linux/module.h>
23
+
#include <linux/regmap.h>
24
+
#include <linux/err.h>
25
+
#include <linux/i2c.h>
26
+
#include <linux/regulator/da9121.h>
27
+
#include <linux/interrupt.h>
28
+
#include <linux/workqueue.h>
29
+
30
+
#include "da9121-regulator.h"
31
+
32
+
/* Chip data */
33
+
struct da9121 {
34
+
struct device *dev;
35
+
struct delayed_work work;
36
+
struct da9121_pdata *pdata;
37
+
struct regmap *regmap;
38
+
struct regulator_dev *rdev[DA9121_IDX_MAX];
39
+
unsigned int persistent[2];
40
+
unsigned int passive_delay;
41
+
int chip_irq;
42
+
int variant_id;
43
+
};
44
+
45
+
/* Define ranges for different variants, enabling translation to/from
46
+
* registers. Maximums give scope to allow for transients.
47
+
*/
48
+
struct da9121_range {
49
+
int val_min;
50
+
int val_max;
51
+
int val_stp;
52
+
int reg_min;
53
+
int reg_max;
54
+
};
55
+
56
+
static struct da9121_range da9121_10A_2phase_current = {
57
+
.val_min = 7000000,
58
+
.val_max = 20000000,
59
+
.val_stp = 1000000,
60
+
.reg_min = 1,
61
+
.reg_max = 14,
62
+
};
63
+
64
+
static struct da9121_range da9121_6A_2phase_current = {
65
+
.val_min = 7000000,
66
+
.val_max = 12000000,
67
+
.val_stp = 1000000,
68
+
.reg_min = 1,
69
+
.reg_max = 6,
70
+
};
71
+
72
+
static struct da9121_range da9121_5A_1phase_current = {
73
+
.val_min = 3500000,
74
+
.val_max = 10000000,
75
+
.val_stp = 500000,
76
+
.reg_min = 1,
77
+
.reg_max = 14,
78
+
};
79
+
80
+
static struct da9121_range da9121_3A_1phase_current = {
81
+
.val_min = 3500000,
82
+
.val_max = 6000000,
83
+
.val_stp = 500000,
84
+
.reg_min = 1,
85
+
.reg_max = 6,
86
+
};
87
+
88
+
struct da9121_variant_info {
89
+
int num_bucks;
90
+
int num_phases;
91
+
struct da9121_range *current_range;
92
+
};
93
+
94
+
static const struct da9121_variant_info variant_parameters[] = {
95
+
{ 1, 2, &da9121_10A_2phase_current }, //DA9121_TYPE_DA9121_DA9130
96
+
{ 2, 1, &da9121_3A_1phase_current }, //DA9121_TYPE_DA9220_DA9132
97
+
{ 2, 1, &da9121_5A_1phase_current }, //DA9121_TYPE_DA9122_DA9131
98
+
{ 1, 2, &da9121_6A_2phase_current }, //DA9121_TYPE_DA9217
99
+
};
100
+
101
+
struct da9121_field {
102
+
unsigned int reg;
103
+
unsigned int msk;
104
+
};
105
+
106
+
static const struct da9121_field da9121_current_field[2] = {
107
+
{ DA9121_REG_BUCK_BUCK1_2, DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM },
108
+
{ DA9xxx_REG_BUCK_BUCK2_2, DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM },
109
+
};
110
+
111
+
static const struct da9121_field da9121_mode_field[2] = {
112
+
{ DA9121_REG_BUCK_BUCK1_4, DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE },
113
+
{ DA9xxx_REG_BUCK_BUCK2_4, DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE },
114
+
};
115
+
116
+
struct status_event_data {
117
+
int buck_id; /* 0=core, 1/2-buck */
118
+
int reg_index; /* index for status/event/mask register selection */
119
+
int status_bit; /* bit masks... */
120
+
int event_bit;
121
+
int mask_bit;
122
+
unsigned long notification; /* Notification for status inception */
123
+
char *warn; /* if NULL, notify - otherwise dev_warn this string */
124
+
};
125
+
126
+
#define DA9121_STATUS(id, bank, name, notification, warning) \
127
+
{ id, bank, \
128
+
DA9121_MASK_SYS_STATUS_##bank##_##name, \
129
+
DA9121_MASK_SYS_EVENT_##bank##_E_##name, \
130
+
DA9121_MASK_SYS_MASK_##bank##_M_##name, \
131
+
notification, warning }
132
+
133
+
/* For second buck related event bits that are specific to DA9122, DA9220 variants */
134
+
#define DA9xxx_STATUS(id, bank, name, notification, warning) \
135
+
{ id, bank, \
136
+
DA9xxx_MASK_SYS_STATUS_##bank##_##name, \
137
+
DA9xxx_MASK_SYS_EVENT_##bank##_E_##name, \
138
+
DA9xxx_MASK_SYS_MASK_##bank##_M_##name, \
139
+
notification, warning }
140
+
141
+
/* The status signals that may need servicing, depending on device variant.
142
+
* After assertion, they persist; so event is notified, the IRQ disabled,
143
+
* and status polled until clear again and IRQ is reenabled.
144
+
*
145
+
* SG/PG1/PG2 should be set when device first powers up and should never
146
+
* re-occur. When this driver starts, it is expected that these will have
147
+
* self-cleared for when the IRQs are enabled, so these should never be seen.
148
+
* If seen, the implication is that the device has reset.
149
+
*
150
+
* GPIO0/1/2 are not configured for use by default, so should not be seen.
151
+
*/
152
+
static const struct status_event_data status_event_handling[] = {
153
+
DA9xxx_STATUS(0, 0, SG, 0, "Handled E_SG\n"),
154
+
DA9121_STATUS(0, 0, TEMP_CRIT, (REGULATOR_EVENT_OVER_TEMP|REGULATOR_EVENT_DISABLE), NULL),
155
+
DA9121_STATUS(0, 0, TEMP_WARN, REGULATOR_EVENT_OVER_TEMP, NULL),
156
+
DA9121_STATUS(1, 1, PG1, 0, "Handled E_PG1\n"),
157
+
DA9121_STATUS(1, 1, OV1, REGULATOR_EVENT_REGULATION_OUT, NULL),
158
+
DA9121_STATUS(1, 1, UV1, REGULATOR_EVENT_UNDER_VOLTAGE, NULL),
159
+
DA9121_STATUS(1, 1, OC1, REGULATOR_EVENT_OVER_CURRENT, NULL),
160
+
DA9xxx_STATUS(2, 1, PG2, 0, "Handled E_PG2\n"),
161
+
DA9xxx_STATUS(2, 1, OV2, REGULATOR_EVENT_REGULATION_OUT, NULL),
162
+
DA9xxx_STATUS(2, 1, UV2, REGULATOR_EVENT_UNDER_VOLTAGE, NULL),
163
+
DA9xxx_STATUS(2, 1, OC2, REGULATOR_EVENT_OVER_CURRENT, NULL),
164
+
DA9121_STATUS(0, 2, GPIO0, 0, "Handled E_GPIO0\n"),
165
+
DA9121_STATUS(0, 2, GPIO1, 0, "Handled E_GPIO1\n"),
166
+
DA9121_STATUS(0, 2, GPIO2, 0, "Handled E_GPIO2\n"),
167
+
};
168
+
169
+
static int da9121_get_current_limit(struct regulator_dev *rdev)
170
+
{
171
+
struct da9121 *chip = rdev_get_drvdata(rdev);
172
+
int id = rdev_get_id(rdev);
173
+
struct da9121_range *range =
174
+
variant_parameters[chip->variant_id].current_range;
175
+
unsigned int val = 0;
176
+
int ret = 0;
177
+
178
+
ret = regmap_read(chip->regmap, da9121_current_field[id].reg, &val);
179
+
if (ret < 0) {
180
+
dev_err(chip->dev, "Cannot read BUCK register: %d\n", ret);
181
+
goto error;
182
+
}
183
+
184
+
if (val < range->reg_min) {
185
+
ret = -EACCES;
186
+
goto error;
187
+
}
188
+
189
+
if (val > range->reg_max) {
190
+
ret = -EINVAL;
191
+
goto error;
192
+
}
193
+
194
+
return range->val_min + (range->val_stp * (val - range->reg_min));
195
+
error:
196
+
return ret;
197
+
}
198
+
199
+
static int da9121_ceiling_selector(struct regulator_dev *rdev,
200
+
int min, int max,
201
+
unsigned int *selector)
202
+
{
203
+
struct da9121 *chip = rdev_get_drvdata(rdev);
204
+
struct da9121_range *range =
205
+
variant_parameters[chip->variant_id].current_range;
206
+
unsigned int level;
207
+
unsigned int i = 0;
208
+
unsigned int sel = 0;
209
+
int ret = 0;
210
+
211
+
if (range->val_min > max || range->val_max < min) {
212
+
dev_err(chip->dev,
213
+
"Requested current out of regulator capability\n");
214
+
ret = -EINVAL;
215
+
goto error;
216
+
}
217
+
218
+
level = range->val_max;
219
+
for (i = range->reg_max; i >= range->reg_min; i--) {
220
+
if (level <= max) {
221
+
sel = i;
222
+
break;
223
+
}
224
+
level -= range->val_stp;
225
+
}
226
+
227
+
if (level < min) {
228
+
dev_err(chip->dev,
229
+
"Best match falls below minimum requested current\n");
230
+
ret = -EINVAL;
231
+
goto error;
232
+
}
233
+
234
+
*selector = sel;
235
+
error:
236
+
return ret;
237
+
}
238
+
239
+
static int da9121_set_current_limit(struct regulator_dev *rdev,
240
+
int min_ua, int max_ua)
241
+
{
242
+
struct da9121 *chip = rdev_get_drvdata(rdev);
243
+
int id = rdev_get_id(rdev);
244
+
struct da9121_range *range =
245
+
variant_parameters[chip->variant_id].current_range;
246
+
unsigned int sel = 0;
247
+
int ret = 0;
248
+
249
+
if (min_ua < range->val_min ||
250
+
max_ua > range->val_max) {
251
+
ret = -EINVAL;
252
+
goto error;
253
+
}
254
+
255
+
ret = da9121_ceiling_selector(rdev, min_ua, max_ua, &sel);
256
+
if (ret < 0)
257
+
goto error;
258
+
259
+
ret = regmap_update_bits(chip->regmap,
260
+
da9121_current_field[id].reg,
261
+
da9121_current_field[id].msk,
262
+
(unsigned int)sel);
263
+
if (ret < 0)
264
+
dev_err(chip->dev, "Cannot update BUCK current limit, err: %d\n", ret);
265
+
266
+
error:
267
+
return ret;
268
+
}
269
+
270
+
static unsigned int da9121_map_mode(unsigned int mode)
271
+
{
272
+
switch (mode) {
273
+
case DA9121_BUCK_MODE_FORCE_PWM:
274
+
return REGULATOR_MODE_FAST;
275
+
case DA9121_BUCK_MODE_FORCE_PWM_SHEDDING:
276
+
return REGULATOR_MODE_NORMAL;
277
+
case DA9121_BUCK_MODE_AUTO:
278
+
return REGULATOR_MODE_IDLE;
279
+
case DA9121_BUCK_MODE_FORCE_PFM:
280
+
return REGULATOR_MODE_STANDBY;
281
+
default:
282
+
return -EINVAL;
283
+
}
284
+
}
285
+
286
+
static int da9121_buck_set_mode(struct regulator_dev *rdev, unsigned int mode)
287
+
{
288
+
struct da9121 *chip = rdev_get_drvdata(rdev);
289
+
int id = rdev_get_id(rdev);
290
+
unsigned int val;
291
+
292
+
switch (mode) {
293
+
case REGULATOR_MODE_FAST:
294
+
val = DA9121_BUCK_MODE_FORCE_PWM;
295
+
break;
296
+
case REGULATOR_MODE_NORMAL:
297
+
val = DA9121_BUCK_MODE_FORCE_PWM_SHEDDING;
298
+
break;
299
+
case REGULATOR_MODE_IDLE:
300
+
val = DA9121_BUCK_MODE_AUTO;
301
+
break;
302
+
case REGULATOR_MODE_STANDBY:
303
+
val = DA9121_BUCK_MODE_FORCE_PFM;
304
+
break;
305
+
default:
306
+
return -EINVAL;
307
+
}
308
+
309
+
return regmap_update_bits(chip->regmap,
310
+
da9121_mode_field[id].reg,
311
+
da9121_mode_field[id].msk,
312
+
val);
313
+
}
314
+
315
+
static unsigned int da9121_buck_get_mode(struct regulator_dev *rdev)
316
+
{
317
+
struct da9121 *chip = rdev_get_drvdata(rdev);
318
+
int id = rdev_get_id(rdev);
319
+
unsigned int val;
320
+
int ret = 0;
321
+
322
+
ret = regmap_read(chip->regmap, da9121_mode_field[id].reg, &val);
323
+
if (ret < 0) {
324
+
dev_err(chip->dev, "Cannot read BUCK register: %d\n", ret);
325
+
return -EINVAL;
326
+
}
327
+
328
+
return da9121_map_mode(val & da9121_mode_field[id].msk);
329
+
}
330
+
331
+
static const struct regulator_ops da9121_buck_ops = {
332
+
.enable = regulator_enable_regmap,
333
+
.disable = regulator_disable_regmap,
334
+
.is_enabled = regulator_is_enabled_regmap,
335
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
336
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
337
+
.list_voltage = regulator_list_voltage_linear,
338
+
.get_current_limit = da9121_get_current_limit,
339
+
.set_current_limit = da9121_set_current_limit,
340
+
.set_mode = da9121_buck_set_mode,
341
+
.get_mode = da9121_buck_get_mode,
342
+
};
343
+
344
+
static struct of_regulator_match da9121_matches[] = {
345
+
[DA9121_IDX_BUCK1] = { .name = "buck1" },
346
+
[DA9121_IDX_BUCK2] = { .name = "buck2" },
347
+
};
348
+
349
+
static int da9121_of_parse_cb(struct device_node *np,
350
+
const struct regulator_desc *desc,
351
+
struct regulator_config *config)
352
+
{
353
+
struct da9121 *chip = config->driver_data;
354
+
struct da9121_pdata *pdata;
355
+
struct gpio_desc *ena_gpiod;
356
+
357
+
if (chip->pdata == NULL) {
358
+
pdata = devm_kzalloc(chip->dev, sizeof(*pdata), GFP_KERNEL);
359
+
if (!pdata)
360
+
return -ENOMEM;
361
+
} else {
362
+
pdata = chip->pdata;
363
+
}
364
+
365
+
pdata->num_buck++;
366
+
367
+
if (pdata->num_buck > variant_parameters[chip->variant_id].num_bucks) {
368
+
dev_err(chip->dev, "Error: excessive regulators for device\n");
369
+
return -ENODEV;
370
+
}
371
+
372
+
ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), "enable", 0,
373
+
GPIOD_OUT_HIGH |
374
+
GPIOD_FLAGS_BIT_NONEXCLUSIVE,
375
+
"da9121-enable");
376
+
if (!IS_ERR(ena_gpiod))
377
+
config->ena_gpiod = ena_gpiod;
378
+
379
+
if (variant_parameters[chip->variant_id].num_bucks == 2) {
380
+
uint32_t ripple_cancel;
381
+
uint32_t ripple_reg;
382
+
int ret;
383
+
384
+
if (of_property_read_u32(da9121_matches[pdata->num_buck-1].of_node,
385
+
"dlg,ripple-cancel", &ripple_cancel)) {
386
+
if (pdata->num_buck > 1)
387
+
ripple_reg = DA9xxx_REG_BUCK_BUCK2_7;
388
+
else
389
+
ripple_reg = DA9121_REG_BUCK_BUCK1_7;
390
+
391
+
ret = regmap_update_bits(chip->regmap, ripple_reg,
392
+
DA9xxx_MASK_BUCK_BUCKx_7_CHx_RIPPLE_CANCEL,
393
+
ripple_cancel);
394
+
if (ret < 0)
395
+
dev_err(chip->dev, "Cannot set ripple mode, err: %d\n", ret);
396
+
}
397
+
}
398
+
399
+
return 0;
400
+
}
401
+
402
+
#define DA9121_MIN_MV 300
403
+
#define DA9121_MAX_MV 1900
404
+
#define DA9121_STEP_MV 10
405
+
#define DA9121_MIN_SEL (DA9121_MIN_MV / DA9121_STEP_MV)
406
+
#define DA9121_N_VOLTAGES (((DA9121_MAX_MV - DA9121_MIN_MV) / DA9121_STEP_MV) \
407
+
+ 1 + DA9121_MIN_SEL)
408
+
409
+
static const struct regulator_desc da9121_reg = {
410
+
.id = DA9121_IDX_BUCK1,
411
+
.name = "da9121",
412
+
.of_match = "buck1",
413
+
.of_parse_cb = da9121_of_parse_cb,
414
+
.owner = THIS_MODULE,
415
+
.regulators_node = of_match_ptr("regulators"),
416
+
.of_map_mode = da9121_map_mode,
417
+
.ops = &da9121_buck_ops,
418
+
.type = REGULATOR_VOLTAGE,
419
+
.n_voltages = DA9121_N_VOLTAGES,
420
+
.min_uV = DA9121_MIN_MV * 1000,
421
+
.uV_step = DA9121_STEP_MV * 1000,
422
+
.linear_min_sel = DA9121_MIN_SEL,
423
+
.vsel_reg = DA9121_REG_BUCK_BUCK1_5,
424
+
.vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
425
+
.enable_reg = DA9121_REG_BUCK_BUCK1_0,
426
+
.enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
427
+
/* Default value of BUCK_BUCK1_0.CH1_SRC_DVC_UP */
428
+
.ramp_delay = 20000,
429
+
/* tBUCK_EN */
430
+
.enable_time = 20,
431
+
};
432
+
433
+
static const struct regulator_desc da9220_reg[2] = {
434
+
{
435
+
.id = DA9121_IDX_BUCK1,
436
+
.name = "DA9220/DA9132 BUCK1",
437
+
.of_match = "buck1",
438
+
.of_parse_cb = da9121_of_parse_cb,
439
+
.owner = THIS_MODULE,
440
+
.regulators_node = of_match_ptr("regulators"),
441
+
.of_map_mode = da9121_map_mode,
442
+
.ops = &da9121_buck_ops,
443
+
.type = REGULATOR_VOLTAGE,
444
+
.n_voltages = DA9121_N_VOLTAGES,
445
+
.min_uV = DA9121_MIN_MV * 1000,
446
+
.uV_step = DA9121_STEP_MV * 1000,
447
+
.linear_min_sel = DA9121_MIN_SEL,
448
+
.enable_reg = DA9121_REG_BUCK_BUCK1_0,
449
+
.enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
450
+
.vsel_reg = DA9121_REG_BUCK_BUCK1_5,
451
+
.vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
452
+
},
453
+
{
454
+
.id = DA9121_IDX_BUCK2,
455
+
.name = "DA9220/DA9132 BUCK2",
456
+
.of_match = "buck2",
457
+
.of_parse_cb = da9121_of_parse_cb,
458
+
.owner = THIS_MODULE,
459
+
.regulators_node = of_match_ptr("regulators"),
460
+
.of_map_mode = da9121_map_mode,
461
+
.ops = &da9121_buck_ops,
462
+
.type = REGULATOR_VOLTAGE,
463
+
.n_voltages = DA9121_N_VOLTAGES,
464
+
.min_uV = DA9121_MIN_MV * 1000,
465
+
.uV_step = DA9121_STEP_MV * 1000,
466
+
.linear_min_sel = DA9121_MIN_SEL,
467
+
.enable_reg = DA9xxx_REG_BUCK_BUCK2_0,
468
+
.enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
469
+
.vsel_reg = DA9xxx_REG_BUCK_BUCK2_5,
470
+
.vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
471
+
}
472
+
};
473
+
474
+
static const struct regulator_desc da9122_reg[2] = {
475
+
{
476
+
.id = DA9121_IDX_BUCK1,
477
+
.name = "DA9122/DA9131 BUCK1",
478
+
.of_match = "buck1",
479
+
.of_parse_cb = da9121_of_parse_cb,
480
+
.owner = THIS_MODULE,
481
+
.regulators_node = of_match_ptr("regulators"),
482
+
.of_map_mode = da9121_map_mode,
483
+
.ops = &da9121_buck_ops,
484
+
.type = REGULATOR_VOLTAGE,
485
+
.n_voltages = DA9121_N_VOLTAGES,
486
+
.min_uV = DA9121_MIN_MV * 1000,
487
+
.uV_step = DA9121_STEP_MV * 1000,
488
+
.linear_min_sel = DA9121_MIN_SEL,
489
+
.enable_reg = DA9121_REG_BUCK_BUCK1_0,
490
+
.enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
491
+
.vsel_reg = DA9121_REG_BUCK_BUCK1_5,
492
+
.vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
493
+
},
494
+
{
495
+
.id = DA9121_IDX_BUCK2,
496
+
.name = "DA9122/DA9131 BUCK2",
497
+
.of_match = "buck2",
498
+
.of_parse_cb = da9121_of_parse_cb,
499
+
.owner = THIS_MODULE,
500
+
.regulators_node = of_match_ptr("regulators"),
501
+
.of_map_mode = da9121_map_mode,
502
+
.ops = &da9121_buck_ops,
503
+
.type = REGULATOR_VOLTAGE,
504
+
.n_voltages = DA9121_N_VOLTAGES,
505
+
.min_uV = DA9121_MIN_MV * 1000,
506
+
.uV_step = DA9121_STEP_MV * 1000,
507
+
.linear_min_sel = DA9121_MIN_SEL,
508
+
.enable_reg = DA9xxx_REG_BUCK_BUCK2_0,
509
+
.enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
510
+
.vsel_reg = DA9xxx_REG_BUCK_BUCK2_5,
511
+
.vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
512
+
}
513
+
};
514
+
515
+
static const struct regulator_desc da9217_reg = {
516
+
.id = DA9121_IDX_BUCK1,
517
+
.name = "DA9217 BUCK1",
518
+
.of_match = "buck1",
519
+
.of_parse_cb = da9121_of_parse_cb,
520
+
.owner = THIS_MODULE,
521
+
.regulators_node = of_match_ptr("regulators"),
522
+
.of_map_mode = da9121_map_mode,
523
+
.ops = &da9121_buck_ops,
524
+
.type = REGULATOR_VOLTAGE,
525
+
.n_voltages = DA9121_N_VOLTAGES,
526
+
.min_uV = DA9121_MIN_MV * 1000,
527
+
.uV_step = DA9121_STEP_MV * 1000,
528
+
.linear_min_sel = DA9121_MIN_SEL,
529
+
.enable_reg = DA9121_REG_BUCK_BUCK1_0,
530
+
.enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
531
+
.vsel_reg = DA9121_REG_BUCK_BUCK1_5,
532
+
.vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
533
+
};
534
+
535
+
static const struct regulator_desc *local_da9121_regulators[][DA9121_IDX_MAX] = {
536
+
[DA9121_TYPE_DA9121_DA9130] = { &da9121_reg, NULL },
537
+
[DA9121_TYPE_DA9220_DA9132] = { &da9220_reg[0], &da9220_reg[1] },
538
+
[DA9121_TYPE_DA9122_DA9131] = { &da9122_reg[0], &da9122_reg[1] },
539
+
[DA9121_TYPE_DA9217] = { &da9217_reg, NULL },
540
+
};
541
+
542
+
static void da9121_status_poll_on(struct work_struct *work)
543
+
{
544
+
struct da9121 *chip = container_of(work, struct da9121, work.work);
545
+
int status[3] = {0};
546
+
int clear[3] = {0};
547
+
unsigned long delay;
548
+
int i;
549
+
int ret;
550
+
551
+
ret = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_STATUS_0, status, 2);
552
+
if (ret < 0) {
553
+
dev_err(chip->dev,
554
+
"Failed to read STATUS registers: %d\n", ret);
555
+
goto error;
556
+
}
557
+
558
+
/* Possible events are tested to be within range for the variant, potentially
559
+
* masked by the IRQ handler (not just warned about), as having been masked,
560
+
* and the respective state cleared - then flagged to unmask for next IRQ.
561
+
*/
562
+
for (i = 0; i < ARRAY_SIZE(status_event_handling); i++) {
563
+
const struct status_event_data *item = &status_event_handling[i];
564
+
int reg_idx = item->reg_index;
565
+
bool relevant = (item->buck_id <= variant_parameters[chip->variant_id].num_bucks);
566
+
bool supported = (item->warn == NULL);
567
+
bool persisting = (chip->persistent[reg_idx] & item->event_bit);
568
+
bool now_cleared = !(status[reg_idx] & item->status_bit);
569
+
570
+
if (relevant && supported && persisting && now_cleared) {
571
+
clear[reg_idx] |= item->mask_bit;
572
+
chip->persistent[reg_idx] &= ~item->event_bit;
573
+
}
574
+
}
575
+
576
+
for (i = 0; i < 2; i++) {
577
+
if (clear[i]) {
578
+
unsigned int reg = DA9121_REG_SYS_MASK_0 + i;
579
+
unsigned int mbit = clear[i];
580
+
581
+
ret = regmap_update_bits(chip->regmap, reg, mbit, 0);
582
+
if (ret < 0) {
583
+
dev_err(chip->dev,
584
+
"Failed to unmask 0x%02x %d\n",
585
+
reg, ret);
586
+
goto error;
587
+
}
588
+
}
589
+
}
590
+
591
+
if (chip->persistent[0] | chip->persistent[1]) {
592
+
delay = msecs_to_jiffies(chip->passive_delay);
593
+
queue_delayed_work(system_freezable_wq, &chip->work, delay);
594
+
}
595
+
596
+
error:
597
+
return;
598
+
}
599
+
600
+
static irqreturn_t da9121_irq_handler(int irq, void *data)
601
+
{
602
+
struct da9121 *chip = data;
603
+
struct regulator_dev *rdev;
604
+
int event[3] = {0};
605
+
int handled[3] = {0};
606
+
int mask[3] = {0};
607
+
int ret = IRQ_NONE;
608
+
int i;
609
+
int err;
610
+
611
+
err = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_EVENT_0, event, 3);
612
+
if (err < 0) {
613
+
dev_err(chip->dev, "Failed to read EVENT registers %d\n", err);
614
+
ret = IRQ_NONE;
615
+
goto error;
616
+
}
617
+
618
+
err = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_MASK_0, mask, 3);
619
+
if (err < 0) {
620
+
dev_err(chip->dev,
621
+
"Failed to read MASK registers: %d\n", ret);
622
+
ret = IRQ_NONE;
623
+
goto error;
624
+
}
625
+
626
+
rdev = chip->rdev[DA9121_IDX_BUCK1];
627
+
628
+
/* Possible events are tested to be within range for the variant, currently
629
+
* enabled, and having triggered this IRQ. The event may then be notified,
630
+
* or a warning given for unexpected events - those from device POR, and
631
+
* currently unsupported GPIO configurations.
632
+
*/
633
+
for (i = 0; i < ARRAY_SIZE(status_event_handling); i++) {
634
+
const struct status_event_data *item = &status_event_handling[i];
635
+
int reg_idx = item->reg_index;
636
+
bool relevant = (item->buck_id <= variant_parameters[chip->variant_id].num_bucks);
637
+
bool enabled = !(mask[reg_idx] & item->mask_bit);
638
+
bool active = (event[reg_idx] & item->event_bit);
639
+
bool notify = (item->warn == NULL);
640
+
641
+
if (relevant && enabled && active) {
642
+
if (notify) {
643
+
chip->persistent[reg_idx] |= item->event_bit;
644
+
regulator_notifier_call_chain(rdev, item->notification, NULL);
645
+
} else {
646
+
dev_warn(chip->dev, item->warn);
647
+
handled[reg_idx] |= item->event_bit;
648
+
ret = IRQ_HANDLED;
649
+
}
650
+
}
651
+
}
652
+
653
+
for (i = 0; i < 3; i++) {
654
+
if (event[i] != handled[i]) {
655
+
dev_warn(chip->dev,
656
+
"Unhandled event(s) in bank%d 0x%02x\n", i,
657
+
event[i] ^ handled[i]);
658
+
}
659
+
}
660
+
661
+
/* Mask the interrupts for persistent events OV, OC, UV, WARN, CRIT */
662
+
for (i = 0; i < 2; i++) {
663
+
if (handled[i]) {
664
+
unsigned int reg = DA9121_REG_SYS_MASK_0 + i;
665
+
unsigned int mbit = handled[i];
666
+
667
+
err = regmap_update_bits(chip->regmap, reg, mbit, mbit);
668
+
if (err < 0) {
669
+
dev_err(chip->dev,
670
+
"Failed to mask 0x%02x interrupt %d\n",
671
+
reg, err);
672
+
ret = IRQ_NONE;
673
+
goto error;
674
+
}
675
+
}
676
+
}
677
+
678
+
/* clear the events */
679
+
if (handled[0] | handled[1] | handled[2]) {
680
+
err = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_EVENT_0, handled, 3);
681
+
if (err < 0) {
682
+
dev_err(chip->dev, "Fail to write EVENTs %d\n", err);
683
+
ret = IRQ_NONE;
684
+
goto error;
685
+
}
686
+
}
687
+
688
+
queue_delayed_work(system_freezable_wq, &chip->work, 0);
689
+
error:
690
+
return ret;
691
+
}
692
+
693
+
static int da9121_set_regulator_config(struct da9121 *chip)
694
+
{
695
+
struct regulator_config config = { };
696
+
unsigned int max_matches = variant_parameters[chip->variant_id].num_bucks;
697
+
int ret = 0;
698
+
int i;
699
+
700
+
for (i = 0; i < max_matches; i++) {
701
+
const struct regulator_desc *regl_desc =
702
+
local_da9121_regulators[chip->variant_id][i];
703
+
704
+
config.dev = chip->dev;
705
+
config.driver_data = chip;
706
+
config.regmap = chip->regmap;
707
+
708
+
chip->rdev[i] = devm_regulator_register(chip->dev,
709
+
regl_desc, &config);
710
+
if (IS_ERR(chip->rdev[i])) {
711
+
dev_err(chip->dev, "Failed to register regulator %s, %d/%d\n",
712
+
regl_desc->name, (i+1), max_matches);
713
+
ret = PTR_ERR(chip->rdev[i]);
714
+
goto error;
715
+
}
716
+
}
717
+
718
+
error:
719
+
return ret;
720
+
}
721
+
722
+
/* DA9121 chip register model */
723
+
static const struct regmap_range da9121_1ch_readable_ranges[] = {
724
+
regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_MASK_3),
725
+
regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
726
+
regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
727
+
regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_6),
728
+
regmap_reg_range(DA9121_REG_OTP_DEVICE_ID, DA9121_REG_OTP_CONFIG_ID),
729
+
};
730
+
731
+
static const struct regmap_access_table da9121_1ch_readable_table = {
732
+
.yes_ranges = da9121_1ch_readable_ranges,
733
+
.n_yes_ranges = ARRAY_SIZE(da9121_1ch_readable_ranges),
734
+
};
735
+
736
+
static const struct regmap_range da9121_2ch_readable_ranges[] = {
737
+
regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_MASK_3),
738
+
regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
739
+
regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
740
+
regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_7),
741
+
regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_0, DA9xxx_REG_BUCK_BUCK2_7),
742
+
regmap_reg_range(DA9121_REG_OTP_DEVICE_ID, DA9121_REG_OTP_CONFIG_ID),
743
+
};
744
+
745
+
static const struct regmap_access_table da9121_2ch_readable_table = {
746
+
.yes_ranges = da9121_2ch_readable_ranges,
747
+
.n_yes_ranges = ARRAY_SIZE(da9121_2ch_readable_ranges),
748
+
};
749
+
750
+
static const struct regmap_range da9121_1ch_writeable_ranges[] = {
751
+
regmap_reg_range(DA9121_REG_SYS_EVENT_0, DA9121_REG_SYS_MASK_3),
752
+
regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
753
+
regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
754
+
regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_2),
755
+
regmap_reg_range(DA9121_REG_BUCK_BUCK1_4, DA9121_REG_BUCK_BUCK1_6),
756
+
};
757
+
758
+
static const struct regmap_access_table da9121_1ch_writeable_table = {
759
+
.yes_ranges = da9121_1ch_writeable_ranges,
760
+
.n_yes_ranges = ARRAY_SIZE(da9121_1ch_writeable_ranges),
761
+
};
762
+
763
+
static const struct regmap_range da9121_2ch_writeable_ranges[] = {
764
+
regmap_reg_range(DA9121_REG_SYS_EVENT_0, DA9121_REG_SYS_MASK_3),
765
+
regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
766
+
regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
767
+
regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_2),
768
+
regmap_reg_range(DA9121_REG_BUCK_BUCK1_4, DA9121_REG_BUCK_BUCK1_7),
769
+
regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_0, DA9xxx_REG_BUCK_BUCK2_2),
770
+
regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_4, DA9xxx_REG_BUCK_BUCK2_7),
771
+
};
772
+
773
+
static const struct regmap_access_table da9121_2ch_writeable_table = {
774
+
.yes_ranges = da9121_2ch_writeable_ranges,
775
+
.n_yes_ranges = ARRAY_SIZE(da9121_2ch_writeable_ranges),
776
+
};
777
+
778
+
779
+
static const struct regmap_range da9121_volatile_ranges[] = {
780
+
regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_EVENT_2),
781
+
regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
782
+
regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_6),
783
+
};
784
+
785
+
static const struct regmap_access_table da9121_volatile_table = {
786
+
.yes_ranges = da9121_volatile_ranges,
787
+
.n_yes_ranges = ARRAY_SIZE(da9121_volatile_ranges),
788
+
};
789
+
790
+
/* DA9121 regmap config for 1 channel variants */
791
+
static struct regmap_config da9121_1ch_regmap_config = {
792
+
.reg_bits = 8,
793
+
.val_bits = 8,
794
+
.max_register = DA9121_REG_OTP_CONFIG_ID,
795
+
.rd_table = &da9121_1ch_readable_table,
796
+
.wr_table = &da9121_1ch_writeable_table,
797
+
.volatile_table = &da9121_volatile_table,
798
+
.cache_type = REGCACHE_RBTREE,
799
+
};
800
+
801
+
/* DA9121 regmap config for 2 channel variants */
802
+
static struct regmap_config da9121_2ch_regmap_config = {
803
+
.reg_bits = 8,
804
+
.val_bits = 8,
805
+
.max_register = DA9121_REG_OTP_CONFIG_ID,
806
+
.rd_table = &da9121_2ch_readable_table,
807
+
.wr_table = &da9121_2ch_writeable_table,
808
+
.volatile_table = &da9121_volatile_table,
809
+
.cache_type = REGCACHE_RBTREE,
810
+
};
811
+
812
+
static int da9121_check_device_type(struct i2c_client *i2c, struct da9121 *chip)
813
+
{
814
+
u32 device_id;
815
+
u8 chip_id = chip->variant_id;
816
+
u32 variant_id;
817
+
u8 variant_mrc, variant_vrc;
818
+
char *type;
819
+
bool config_match = false;
820
+
int ret = 0;
821
+
822
+
ret = regmap_read(chip->regmap, DA9121_REG_OTP_DEVICE_ID, &device_id);
823
+
if (ret < 0) {
824
+
dev_err(chip->dev, "Cannot read device ID: %d\n", ret);
825
+
goto error;
826
+
}
827
+
828
+
ret = regmap_read(chip->regmap, DA9121_REG_OTP_VARIANT_ID, &variant_id);
829
+
if (ret < 0) {
830
+
dev_err(chip->dev, "Cannot read variant ID: %d\n", ret);
831
+
goto error;
832
+
}
833
+
834
+
if (device_id != DA9121_DEVICE_ID) {
835
+
dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id);
836
+
ret = -ENODEV;
837
+
goto error;
838
+
}
839
+
840
+
variant_vrc = variant_id & DA9121_MASK_OTP_VARIANT_ID_VRC;
841
+
842
+
switch (variant_vrc) {
843
+
case DA9121_VARIANT_VRC:
844
+
type = "DA9121/DA9130";
845
+
config_match = (chip_id == DA9121_TYPE_DA9121_DA9130);
846
+
break;
847
+
case DA9220_VARIANT_VRC:
848
+
type = "DA9220/DA9132";
849
+
config_match = (chip_id == DA9121_TYPE_DA9220_DA9132);
850
+
break;
851
+
case DA9122_VARIANT_VRC:
852
+
type = "DA9122/DA9131";
853
+
config_match = (chip_id == DA9121_TYPE_DA9122_DA9131);
854
+
break;
855
+
case DA9217_VARIANT_VRC:
856
+
type = "DA9217";
857
+
config_match = (chip_id == DA9121_TYPE_DA9217);
858
+
break;
859
+
default:
860
+
type = "Unknown";
861
+
break;
862
+
}
863
+
864
+
dev_info(chip->dev,
865
+
"Device detected (device-ID: 0x%02X, var-ID: 0x%02X, %s)\n",
866
+
device_id, variant_id, type);
867
+
868
+
if (!config_match) {
869
+
dev_err(chip->dev, "Device tree configuration does not match detected device.\n");
870
+
ret = -EINVAL;
871
+
goto error;
872
+
}
873
+
874
+
variant_mrc = (variant_id & DA9121_MASK_OTP_VARIANT_ID_MRC)
875
+
>> DA9121_SHIFT_OTP_VARIANT_ID_MRC;
876
+
877
+
if ((device_id == DA9121_DEVICE_ID) &&
878
+
(variant_mrc < DA9121_VARIANT_MRC_BASE)) {
879
+
dev_err(chip->dev,
880
+
"Cannot support variant MRC: 0x%02X\n", variant_mrc);
881
+
ret = -EINVAL;
882
+
}
883
+
error:
884
+
return ret;
885
+
}
886
+
887
+
static int da9121_assign_chip_model(struct i2c_client *i2c,
888
+
struct da9121 *chip)
889
+
{
890
+
struct regmap_config *regmap;
891
+
int ret = 0;
892
+
893
+
chip->dev = &i2c->dev;
894
+
895
+
switch (chip->variant_id) {
896
+
case DA9121_TYPE_DA9121_DA9130:
897
+
fallthrough;
898
+
case DA9121_TYPE_DA9217:
899
+
regmap = &da9121_1ch_regmap_config;
900
+
break;
901
+
case DA9121_TYPE_DA9122_DA9131:
902
+
fallthrough;
903
+
case DA9121_TYPE_DA9220_DA9132:
904
+
regmap = &da9121_2ch_regmap_config;
905
+
break;
906
+
}
907
+
908
+
/* Set these up for of_regulator_match call which may want .of_map_modes */
909
+
da9121_matches[0].desc = local_da9121_regulators[chip->variant_id][0];
910
+
da9121_matches[1].desc = local_da9121_regulators[chip->variant_id][1];
911
+
912
+
chip->regmap = devm_regmap_init_i2c(i2c, regmap);
913
+
if (IS_ERR(chip->regmap)) {
914
+
ret = PTR_ERR(chip->regmap);
915
+
dev_err(chip->dev, "Failed to configure a register map: %d\n",
916
+
ret);
917
+
return ret;
918
+
}
919
+
920
+
ret = da9121_check_device_type(i2c, chip);
921
+
922
+
return ret;
923
+
}
924
+
925
+
static int da9121_config_irq(struct i2c_client *i2c,
926
+
struct da9121 *chip)
927
+
{
928
+
unsigned int p_delay = DA9121_DEFAULT_POLLING_PERIOD_MS;
929
+
const int mask_all[4] = { 0, 0, 0xFF, 0xFF };
930
+
int ret = 0;
931
+
932
+
chip->chip_irq = i2c->irq;
933
+
934
+
if (chip->chip_irq != 0) {
935
+
if (!of_property_read_u32(chip->dev->of_node,
936
+
"dlg,irq-polling-delay-passive-ms",
937
+
&p_delay)) {
938
+
if (p_delay < DA9121_MIN_POLLING_PERIOD_MS ||
939
+
p_delay > DA9121_MAX_POLLING_PERIOD_MS) {
940
+
dev_warn(chip->dev,
941
+
"Out-of-range polling period %d ms\n",
942
+
p_delay);
943
+
p_delay = DA9121_DEFAULT_POLLING_PERIOD_MS;
944
+
}
945
+
}
946
+
947
+
chip->passive_delay = p_delay;
948
+
949
+
ret = request_threaded_irq(chip->chip_irq, NULL,
950
+
da9121_irq_handler,
951
+
IRQF_TRIGGER_LOW|IRQF_ONESHOT,
952
+
"da9121", chip);
953
+
if (ret != 0) {
954
+
dev_err(chip->dev, "Failed IRQ request: %d\n",
955
+
chip->chip_irq);
956
+
goto error;
957
+
}
958
+
959
+
ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
960
+
if (ret != 0) {
961
+
dev_err(chip->dev, "Failed to set IRQ masks: %d\n",
962
+
ret);
963
+
goto regmap_error;
964
+
}
965
+
966
+
INIT_DELAYED_WORK(&chip->work, da9121_status_poll_on);
967
+
dev_info(chip->dev, "Interrupt polling period set at %d ms\n",
968
+
chip->passive_delay);
969
+
}
970
+
error:
971
+
return ret;
972
+
regmap_error:
973
+
free_irq(chip->chip_irq, chip);
974
+
return ret;
975
+
}
976
+
977
+
static const struct of_device_id da9121_dt_ids[] = {
978
+
{ .compatible = "dlg,da9121", .data = (void *) DA9121_TYPE_DA9121_DA9130 },
979
+
{ .compatible = "dlg,da9130", .data = (void *) DA9121_TYPE_DA9121_DA9130 },
980
+
{ .compatible = "dlg,da9217", .data = (void *) DA9121_TYPE_DA9217 },
981
+
{ .compatible = "dlg,da9122", .data = (void *) DA9121_TYPE_DA9122_DA9131 },
982
+
{ .compatible = "dlg,da9131", .data = (void *) DA9121_TYPE_DA9122_DA9131 },
983
+
{ .compatible = "dlg,da9220", .data = (void *) DA9121_TYPE_DA9220_DA9132 },
984
+
{ .compatible = "dlg,da9132", .data = (void *) DA9121_TYPE_DA9220_DA9132 },
985
+
{ }
986
+
};
987
+
MODULE_DEVICE_TABLE(of, da9121_dt_ids);
988
+
989
+
static inline int da9121_of_get_id(struct device *dev)
990
+
{
991
+
const struct of_device_id *id = of_match_device(da9121_dt_ids, dev);
992
+
993
+
if (!id) {
994
+
dev_err(dev, "%s: Failed\n", __func__);
995
+
return -EINVAL;
996
+
}
997
+
return (uintptr_t)id->data;
998
+
}
999
+
1000
+
static int da9121_i2c_probe(struct i2c_client *i2c,
1001
+
const struct i2c_device_id *id)
1002
+
{
1003
+
struct da9121 *chip;
1004
+
const int mask_all[4] = { 0xFF, 0xFF, 0xFF, 0xFF };
1005
+
int ret = 0;
1006
+
1007
+
chip = devm_kzalloc(&i2c->dev, sizeof(struct da9121), GFP_KERNEL);
1008
+
if (!chip) {
1009
+
ret = -ENOMEM;
1010
+
goto error;
1011
+
}
1012
+
1013
+
chip->pdata = i2c->dev.platform_data;
1014
+
chip->variant_id = da9121_of_get_id(&i2c->dev);
1015
+
1016
+
ret = da9121_assign_chip_model(i2c, chip);
1017
+
if (ret < 0)
1018
+
goto error;
1019
+
1020
+
ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
1021
+
if (ret != 0) {
1022
+
dev_err(chip->dev, "Failed to set IRQ masks: %d\n", ret);
1023
+
goto error;
1024
+
}
1025
+
1026
+
ret = da9121_set_regulator_config(chip);
1027
+
if (ret < 0)
1028
+
goto error;
1029
+
1030
+
ret = da9121_config_irq(i2c, chip);
1031
+
1032
+
error:
1033
+
return ret;
1034
+
}
1035
+
1036
+
static int da9121_i2c_remove(struct i2c_client *i2c)
1037
+
{
1038
+
struct da9121 *chip = i2c_get_clientdata(i2c);
1039
+
const int mask_all[4] = { 0xFF, 0xFF, 0xFF, 0xFF };
1040
+
int ret = 0;
1041
+
1042
+
free_irq(chip->chip_irq, chip);
1043
+
cancel_delayed_work_sync(&chip->work);
1044
+
1045
+
ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
1046
+
if (ret != 0)
1047
+
dev_err(chip->dev, "Failed to set IRQ masks: %d\n", ret);
1048
+
return ret;
1049
+
}
1050
+
1051
+
static const struct i2c_device_id da9121_i2c_id[] = {
1052
+
{"da9121", DA9121_TYPE_DA9121_DA9130},
1053
+
{"da9130", DA9121_TYPE_DA9121_DA9130},
1054
+
{"da9217", DA9121_TYPE_DA9217},
1055
+
{"da9122", DA9121_TYPE_DA9122_DA9131},
1056
+
{"da9131", DA9121_TYPE_DA9122_DA9131},
1057
+
{"da9220", DA9121_TYPE_DA9220_DA9132},
1058
+
{"da9132", DA9121_TYPE_DA9220_DA9132},
1059
+
{},
1060
+
};
1061
+
MODULE_DEVICE_TABLE(i2c, da9121_i2c_id);
1062
+
1063
+
static struct i2c_driver da9121_regulator_driver = {
1064
+
.driver = {
1065
+
.name = "da9121",
1066
+
.of_match_table = of_match_ptr(da9121_dt_ids),
1067
+
},
1068
+
.probe = da9121_i2c_probe,
1069
+
.remove = da9121_i2c_remove,
1070
+
.id_table = da9121_i2c_id,
1071
+
};
1072
+
1073
+
module_i2c_driver(da9121_regulator_driver);
1074
+
1075
+
MODULE_LICENSE("GPL v2");
+291
drivers/regulator/da9121-regulator.h
+291
drivers/regulator/da9121-regulator.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0+ */
2
+
/*
3
+
* DA9121 Single-channel dual-phase 10A buck converter
4
+
* DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5
+
* DA9217 Single-channel dual-phase 6A buck converter
6
+
* DA9122 Dual-channel single-phase 5A buck converter
7
+
* DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8
+
* DA9220 Dual-channel single-phase 3A buck converter
9
+
* DA9132 Dual-channel single-phase 3A buck converter (Automotive)
10
+
*
11
+
* Copyright (C) 2020 Dialog Semiconductor
12
+
*
13
+
* Authors: Steve Twiss, Dialog Semiconductor
14
+
* Adam Ward, Dialog Semiconductor
15
+
*/
16
+
17
+
#ifndef __DA9121_REGISTERS_H__
18
+
#define __DA9121_REGISTERS_H__
19
+
20
+
/* Values for: DA9121_REG_BUCK_BUCKx_4 registers, fields CHx_y_MODE
21
+
* DA9121_REG_BUCK_BUCKx_7 registers, fields CHx_RIPPLE_CANCEL
22
+
*/
23
+
#include <dt-bindings/regulator/dlg,da9121-regulator.h>
24
+
25
+
enum da9121_variant {
26
+
DA9121_TYPE_DA9121_DA9130,
27
+
DA9121_TYPE_DA9220_DA9132,
28
+
DA9121_TYPE_DA9122_DA9131,
29
+
DA9121_TYPE_DA9217
30
+
};
31
+
32
+
/* Minimum, maximum and default polling millisecond periods are provided
33
+
* here as an example. It is expected that any final implementation will
34
+
* include a modification of these settings to match the required
35
+
* application.
36
+
*/
37
+
#define DA9121_DEFAULT_POLLING_PERIOD_MS 3000
38
+
#define DA9121_MAX_POLLING_PERIOD_MS 10000
39
+
#define DA9121_MIN_POLLING_PERIOD_MS 1000
40
+
41
+
/* Registers */
42
+
43
+
#define DA9121_REG_SYS_STATUS_0 0x01
44
+
#define DA9121_REG_SYS_STATUS_1 0x02
45
+
#define DA9121_REG_SYS_STATUS_2 0x03
46
+
#define DA9121_REG_SYS_EVENT_0 0x04
47
+
#define DA9121_REG_SYS_EVENT_1 0x05
48
+
#define DA9121_REG_SYS_EVENT_2 0x06
49
+
#define DA9121_REG_SYS_MASK_0 0x07
50
+
#define DA9121_REG_SYS_MASK_1 0x08
51
+
#define DA9121_REG_SYS_MASK_2 0x09
52
+
#define DA9121_REG_SYS_MASK_3 0x0A
53
+
#define DA9121_REG_SYS_CONFIG_0 0x0B
54
+
#define DA9121_REG_SYS_CONFIG_1 0x0C
55
+
#define DA9121_REG_SYS_CONFIG_2 0x0D
56
+
#define DA9121_REG_SYS_CONFIG_3 0x0E
57
+
#define DA9121_REG_SYS_GPIO0_0 0x10
58
+
#define DA9121_REG_SYS_GPIO0_1 0x11
59
+
#define DA9121_REG_SYS_GPIO1_0 0x12
60
+
#define DA9121_REG_SYS_GPIO1_1 0x13
61
+
#define DA9121_REG_SYS_GPIO2_0 0x14
62
+
#define DA9121_REG_SYS_GPIO2_1 0x15
63
+
#define DA9121_REG_BUCK_BUCK1_0 0x20
64
+
#define DA9121_REG_BUCK_BUCK1_1 0x21
65
+
#define DA9121_REG_BUCK_BUCK1_2 0x22
66
+
#define DA9121_REG_BUCK_BUCK1_3 0x23
67
+
#define DA9121_REG_BUCK_BUCK1_4 0x24
68
+
#define DA9121_REG_BUCK_BUCK1_5 0x25
69
+
#define DA9121_REG_BUCK_BUCK1_6 0x26
70
+
#define DA9121_REG_BUCK_BUCK1_7 0x27
71
+
#define DA9xxx_REG_BUCK_BUCK2_0 0x28
72
+
#define DA9xxx_REG_BUCK_BUCK2_1 0x29
73
+
#define DA9xxx_REG_BUCK_BUCK2_2 0x2A
74
+
#define DA9xxx_REG_BUCK_BUCK2_3 0x2B
75
+
#define DA9xxx_REG_BUCK_BUCK2_4 0x2C
76
+
#define DA9xxx_REG_BUCK_BUCK2_5 0x2D
77
+
#define DA9xxx_REG_BUCK_BUCK2_6 0x2E
78
+
#define DA9xxx_REG_BUCK_BUCK2_7 0x2F
79
+
#define DA9121_REG_OTP_DEVICE_ID 0x48
80
+
#define DA9121_REG_OTP_VARIANT_ID 0x49
81
+
#define DA9121_REG_OTP_CUSTOMER_ID 0x4A
82
+
#define DA9121_REG_OTP_CONFIG_ID 0x4B
83
+
84
+
/* Register bits */
85
+
86
+
/* DA9121_REG_SYS_STATUS_0 */
87
+
88
+
#define DA9xxx_MASK_SYS_STATUS_0_SG BIT(2)
89
+
#define DA9121_MASK_SYS_STATUS_0_TEMP_CRIT BIT(1)
90
+
#define DA9121_MASK_SYS_STATUS_0_TEMP_WARN BIT(0)
91
+
92
+
/* DA9121_REG_SYS_STATUS_1 */
93
+
94
+
#define DA9xxx_MASK_SYS_STATUS_1_PG2 BIT(7)
95
+
#define DA9xxx_MASK_SYS_STATUS_1_OV2 BIT(6)
96
+
#define DA9xxx_MASK_SYS_STATUS_1_UV2 BIT(5)
97
+
#define DA9xxx_MASK_SYS_STATUS_1_OC2 BIT(4)
98
+
#define DA9121_MASK_SYS_STATUS_1_PG1 BIT(3)
99
+
#define DA9121_MASK_SYS_STATUS_1_OV1 BIT(2)
100
+
#define DA9121_MASK_SYS_STATUS_1_UV1 BIT(1)
101
+
#define DA9121_MASK_SYS_STATUS_1_OC1 BIT(0)
102
+
103
+
/* DA9121_REG_SYS_STATUS_2 */
104
+
105
+
#define DA9121_MASK_SYS_STATUS_2_GPIO2 BIT(2)
106
+
#define DA9121_MASK_SYS_STATUS_2_GPIO1 BIT(1)
107
+
#define DA9121_MASK_SYS_STATUS_2_GPIO0 BIT(0)
108
+
109
+
/* DA9121_REG_SYS_EVENT_0 */
110
+
111
+
#define DA9xxx_MASK_SYS_EVENT_0_E_SG BIT(2)
112
+
#define DA9121_MASK_SYS_EVENT_0_E_TEMP_CRIT BIT(1)
113
+
#define DA9121_MASK_SYS_EVENT_0_E_TEMP_WARN BIT(0)
114
+
115
+
/* DA9121_REG_SYS_EVENT_1 */
116
+
117
+
#define DA9xxx_MASK_SYS_EVENT_1_E_PG2 BIT(7)
118
+
#define DA9xxx_MASK_SYS_EVENT_1_E_OV2 BIT(6)
119
+
#define DA9xxx_MASK_SYS_EVENT_1_E_UV2 BIT(5)
120
+
#define DA9xxx_MASK_SYS_EVENT_1_E_OC2 BIT(4)
121
+
#define DA9121_MASK_SYS_EVENT_1_E_PG1 BIT(3)
122
+
#define DA9121_MASK_SYS_EVENT_1_E_OV1 BIT(2)
123
+
#define DA9121_MASK_SYS_EVENT_1_E_UV1 BIT(1)
124
+
#define DA9121_MASK_SYS_EVENT_1_E_OC1 BIT(0)
125
+
126
+
/* DA9121_REG_SYS_EVENT_2 */
127
+
128
+
#define DA9121_MASK_SYS_EVENT_2_E_GPIO2 BIT(2)
129
+
#define DA9121_MASK_SYS_EVENT_2_E_GPIO1 BIT(1)
130
+
#define DA9121_MASK_SYS_EVENT_2_E_GPIO0 BIT(0)
131
+
132
+
/* DA9121_REG_SYS_MASK_0 */
133
+
134
+
#define DA9xxx_MASK_SYS_MASK_0_M_SG BIT(2)
135
+
#define DA9121_MASK_SYS_MASK_0_M_TEMP_CRIT BIT(1)
136
+
#define DA9121_MASK_SYS_MASK_0_M_TEMP_WARN BIT(0)
137
+
138
+
/* DA9121_REG_SYS_MASK_1 */
139
+
140
+
#define DA9xxx_MASK_SYS_MASK_1_M_PG2 BIT(7)
141
+
#define DA9xxx_MASK_SYS_MASK_1_M_OV2 BIT(6)
142
+
#define DA9xxx_MASK_SYS_MASK_1_M_UV2 BIT(5)
143
+
#define DA9xxx_MASK_SYS_MASK_1_M_OC2 BIT(4)
144
+
#define DA9121_MASK_SYS_MASK_1_M_PG1 BIT(3)
145
+
#define DA9121_MASK_SYS_MASK_1_M_OV1 BIT(2)
146
+
#define DA9121_MASK_SYS_MASK_1_M_UV1 BIT(1)
147
+
#define DA9121_MASK_SYS_MASK_1_M_OC1 BIT(0)
148
+
149
+
/* DA9121_REG_SYS_MASK_2 */
150
+
151
+
#define DA9121_MASK_SYS_MASK_2_M_GPIO2 BIT(2)
152
+
#define DA9121_MASK_SYS_MASK_2_M_GPIO1 BIT(1)
153
+
#define DA9121_MASK_SYS_MASK_2_M_GPIO0 BIT(0)
154
+
155
+
/* DA9122_REG_SYS_MASK_3 */
156
+
157
+
#define DA9121_MASK_SYS_MASK_3_M_VR_HOT BIT(3)
158
+
#define DA9xxx_MASK_SYS_MASK_3_M_SG_STAT BIT(2)
159
+
#define DA9xxx_MASK_SYS_MASK_3_M_PG2_STAT BIT(1)
160
+
#define DA9121_MASK_SYS_MASK_3_M_PG1_STAT BIT(0)
161
+
162
+
/* DA9121_REG_SYS_CONFIG_0 */
163
+
164
+
#define DA9121_MASK_SYS_CONFIG_0_CH1_DIS_DLY 0xF0
165
+
#define DA9121_MASK_SYS_CONFIG_0_CH1_EN_DLY 0x0F
166
+
167
+
/* DA9xxx_REG_SYS_CONFIG_1 */
168
+
169
+
#define DA9xxx_MASK_SYS_CONFIG_1_CH2_DIS_DLY 0xF0
170
+
#define DA9xxx_MASK_SYS_CONFIG_1_CH2_EN_DLY 0x0F
171
+
172
+
/* DA9121_REG_SYS_CONFIG_2 */
173
+
174
+
#define DA9121_MASK_SYS_CONFIG_2_OC_LATCHOFF 0x60
175
+
#define DA9121_MASK_SYS_CONFIG_2_OC_DVC_MASK BIT(4)
176
+
#define DA9121_MASK_SYS_CONFIG_2_PG_DVC_MASK 0x0C
177
+
178
+
/* DA9121_REG_SYS_CONFIG_3 */
179
+
180
+
#define DA9121_MASK_SYS_CONFIG_3_OSC_TUNE 0X70
181
+
#define DA9121_MASK_SYS_CONFIG_3_I2C_TIMEOUT BIT(1)
182
+
183
+
/* DA9121_REG_SYS_GPIO0_0 */
184
+
185
+
#define DA9121_MASK_SYS_GPIO0_0_GPIO0_MODE 0X1E
186
+
#define DA9121_MASK_SYS_GPIO0_0_GPIO0_OBUF BIT(0)
187
+
188
+
/* DA9121_REG_SYS_GPIO0_1 */
189
+
190
+
#define DA9121_MASK_SYS_GPIO0_1_GPIO0_DEB_FALL BIT(7)
191
+
#define DA9121_MASK_SYS_GPIO0_1_GPIO0_DEB_RISE BIT(6)
192
+
#define DA9121_MASK_SYS_GPIO0_1_GPIO0_DEB 0x30
193
+
#define DA9121_MASK_SYS_GPIO0_1_GPIO0_PUPD BIT(3)
194
+
#define DA9121_MASK_SYS_GPIO0_1_GPIO0_POL BIT(2)
195
+
#define DA9121_MASK_SYS_GPIO0_1_GPIO0_TRIG 0x03
196
+
197
+
/* DA9121_REG_SYS_GPIO1_0 */
198
+
199
+
#define DA9121_MASK_SYS_GPIO1_0_GPIO1_MODE 0x1E
200
+
#define DA9121_MASK_SYS_GPIO1_0_GPIO1_OBUF BIT(0)
201
+
202
+
/* DA9121_REG_SYS_GPIO1_1 */
203
+
204
+
#define DA9121_MASK_SYS_GPIO1_1_GPIO1_DEB_FALL BIT(7)
205
+
#define DA9121_MASK_SYS_GPIO1_1_GPIO1_DEB_RISE BIT(6)
206
+
#define DA9121_MASK_SYS_GPIO1_1_GPIO1_DEB 0x30
207
+
#define DA9121_MASK_SYS_GPIO1_1_GPIO1_PUPD BIT(3)
208
+
#define DA9121_MASK_SYS_GPIO1_1_GPIO1_POL BIT(2)
209
+
#define DA9121_MASK_SYS_GPIO1_1_GPIO1_TRIG 0x03
210
+
211
+
/* DA9121_REG_SYS_GPIO2_0 */
212
+
213
+
#define DA9121_MASK_SYS_GPIO2_0_GPIO2_MODE 0x1E
214
+
#define DA9121_MASK_SYS_GPIO2_0_GPIO2_OBUF BIT(0)
215
+
216
+
/* DA9121_REG_SYS_GPIO2_1 */
217
+
218
+
#define DA9121_MASK_SYS_GPIO2_1_GPIO2_DEB_FALL BIT(7)
219
+
#define DA9121_MASK_SYS_GPIO2_1_GPIO2_DEB_RISE BIT(6)
220
+
#define DA9121_MASK_SYS_GPIO2_1_GPIO2_DEB 0x30
221
+
#define DA9121_MASK_SYS_GPIO2_1_GPIO2_PUPD BIT(3)
222
+
#define DA9121_MASK_SYS_GPIO2_1_GPIO2_POL BIT(2)
223
+
#define DA9121_MASK_SYS_GPIO2_1_GPIO2_TRIG 0x03
224
+
225
+
/* DA9121_REG_BUCK_BUCK1_0 / DA9xxx_REG_BUCK_BUCK2_0 */
226
+
227
+
#define DA9121_MASK_BUCK_BUCKx_0_CHx_SR_DVC_DWN 0x70
228
+
#define DA9121_MASK_BUCK_BUCKx_0_CHx_SR_DVC_UP 0x0E
229
+
#define DA9121_MASK_BUCK_BUCKx_0_CHx_EN BIT(0)
230
+
231
+
/* DA9121_REG_BUCK_BUCK1_1 / DA9xxx_REG_BUCK_BUCK2_1 */
232
+
233
+
#define DA9121_MASK_BUCK_BUCKx_1_CHx_SR_SHDN 0x70
234
+
#define DA9121_MASK_BUCK_BUCKx_1_CHx_SR_STARTUP 0x0E
235
+
#define DA9121_MASK_BUCK_BUCKx_1_CHx_PD_DIS BIT(0)
236
+
237
+
/* DA9121_REG_BUCK_BUCK1_2 / DA9xxx_REG_BUCK_BUCK2_2 */
238
+
239
+
#define DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM 0x0F
240
+
241
+
/* DA9121_REG_BUCK_BUCK1_3 / DA9xxx_REG_BUCK_BUCK2_3 */
242
+
243
+
#define DA9121_MASK_BUCK_BUCKx_3_CHx_VMAX 0xFF
244
+
245
+
/* DA9121_REG_BUCK_BUCK1_4 / DA9xxx_REG_BUCK_BUCK2_4 */
246
+
247
+
#define DA9121_MASK_BUCK_BUCKx_4_CHx_VSEL BIT(4)
248
+
#define DA9121_MASK_BUCK_BUCKx_4_CHx_B_MODE 0x0C
249
+
#define DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE 0x03
250
+
251
+
/* DA9121_REG_BUCK_BUCK1_5 / DA9xxx_REG_BUCK_BUCK2_5 */
252
+
253
+
#define DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT 0xFF
254
+
255
+
/* DA9121_REG_BUCK_BUCK1_6 / DA9xxx_REG_BUCK_BUCK2_6 */
256
+
257
+
#define DA9121_MASK_BUCK_BUCKx_6_CHx_B_VOUT 0xFF
258
+
259
+
/* DA9121_REG_BUCK_BUCK1_7 / DA9xxx_REG_BUCK_BUCK2_7 */
260
+
261
+
#define DA9xxx_MASK_BUCK_BUCKx_7_CHx_RIPPLE_CANCEL 0x03
262
+
263
+
264
+
/* DA9121_REG_OTP_DEVICE_ID */
265
+
266
+
#define DA9121_MASK_OTP_DEVICE_ID_DEV_ID 0xFF
267
+
268
+
#define DA9121_DEVICE_ID 0x05
269
+
270
+
/* DA9121_REG_OTP_VARIANT_ID */
271
+
272
+
#define DA9121_SHIFT_OTP_VARIANT_ID_MRC 4
273
+
#define DA9121_MASK_OTP_VARIANT_ID_MRC 0xF0
274
+
#define DA9121_SHIFT_OTP_VARIANT_ID_VRC 0
275
+
#define DA9121_MASK_OTP_VARIANT_ID_VRC 0x0F
276
+
277
+
#define DA9121_VARIANT_MRC_BASE 0x2
278
+
#define DA9121_VARIANT_VRC 0x1
279
+
#define DA9220_VARIANT_VRC 0x0
280
+
#define DA9122_VARIANT_VRC 0x2
281
+
#define DA9217_VARIANT_VRC 0x7
282
+
283
+
/* DA9121_REG_OTP_CUSTOMER_ID */
284
+
285
+
#define DA9121_MASK_OTP_CUSTOMER_ID_CUST_ID 0xFF
286
+
287
+
/* DA9121_REG_OTP_CONFIG_ID */
288
+
289
+
#define DA9121_MASK_OTP_CONFIG_ID_CONFIG_REV 0xFF
290
+
291
+
#endif /* __DA9121_REGISTERS_H__ */
+57
-6
drivers/regulator/fixed.c
+57
-6
drivers/regulator/fixed.c
···
18
18
#include <linux/mutex.h>
19
19
#include <linux/module.h>
20
20
#include <linux/platform_device.h>
21
+
#include <linux/pm_domain.h>
22
+
#include <linux/pm_opp.h>
21
23
#include <linux/regulator/driver.h>
22
24
#include <linux/regulator/fixed.h>
23
25
#include <linux/gpio/consumer.h>
···
36
34
struct regulator_dev *dev;
37
35
38
36
struct clk *enable_clock;
39
-
unsigned int clk_enable_counter;
37
+
unsigned int enable_counter;
38
+
int performance_state;
40
39
};
41
40
42
41
struct fixed_dev_type {
43
42
bool has_enable_clock;
43
+
bool has_performance_state;
44
44
};
45
45
46
46
static int reg_clock_enable(struct regulator_dev *rdev)
···
54
50
if (ret)
55
51
return ret;
56
52
57
-
priv->clk_enable_counter++;
53
+
priv->enable_counter++;
58
54
59
55
return ret;
60
56
}
···
64
60
struct fixed_voltage_data *priv = rdev_get_drvdata(rdev);
65
61
66
62
clk_disable_unprepare(priv->enable_clock);
67
-
priv->clk_enable_counter--;
63
+
priv->enable_counter--;
68
64
69
65
return 0;
70
66
}
71
67
72
-
static int reg_clock_is_enabled(struct regulator_dev *rdev)
68
+
static int reg_domain_enable(struct regulator_dev *rdev)
69
+
{
70
+
struct fixed_voltage_data *priv = rdev_get_drvdata(rdev);
71
+
struct device *dev = rdev->dev.parent;
72
+
int ret;
73
+
74
+
ret = dev_pm_genpd_set_performance_state(dev, priv->performance_state);
75
+
if (ret)
76
+
return ret;
77
+
78
+
priv->enable_counter++;
79
+
80
+
return ret;
81
+
}
82
+
83
+
static int reg_domain_disable(struct regulator_dev *rdev)
84
+
{
85
+
struct fixed_voltage_data *priv = rdev_get_drvdata(rdev);
86
+
struct device *dev = rdev->dev.parent;
87
+
88
+
priv->enable_counter--;
89
+
90
+
return dev_pm_genpd_set_performance_state(dev, 0);
91
+
}
92
+
93
+
static int reg_is_enabled(struct regulator_dev *rdev)
73
94
{
74
95
struct fixed_voltage_data *priv = rdev_get_drvdata(rdev);
75
96
76
-
return priv->clk_enable_counter > 0;
97
+
return priv->enable_counter > 0;
77
98
}
78
99
79
100
···
158
129
static const struct regulator_ops fixed_voltage_clkenabled_ops = {
159
130
.enable = reg_clock_enable,
160
131
.disable = reg_clock_disable,
161
-
.is_enabled = reg_clock_is_enabled,
132
+
.is_enabled = reg_is_enabled,
133
+
};
134
+
135
+
static const struct regulator_ops fixed_voltage_domain_ops = {
136
+
.enable = reg_domain_enable,
137
+
.disable = reg_domain_disable,
138
+
.is_enabled = reg_is_enabled,
162
139
};
163
140
164
141
static int reg_fixed_voltage_probe(struct platform_device *pdev)
···
211
176
if (IS_ERR(drvdata->enable_clock)) {
212
177
dev_err(dev, "Can't get enable-clock from devicetree\n");
213
178
return -ENOENT;
179
+
}
180
+
} else if (drvtype && drvtype->has_performance_state) {
181
+
drvdata->desc.ops = &fixed_voltage_domain_ops;
182
+
183
+
drvdata->performance_state = of_get_required_opp_performance_state(dev->of_node, 0);
184
+
if (drvdata->performance_state < 0) {
185
+
dev_err(dev, "Can't get performance state from devicetree\n");
186
+
return drvdata->performance_state;
214
187
}
215
188
} else {
216
189
drvdata->desc.ops = &fixed_voltage_ops;
···
303
260
.has_enable_clock = true,
304
261
};
305
262
263
+
static const struct fixed_dev_type fixed_domain_data = {
264
+
.has_performance_state = true,
265
+
};
266
+
306
267
static const struct of_device_id fixed_of_match[] = {
307
268
{
308
269
.compatible = "regulator-fixed",
···
315
268
{
316
269
.compatible = "regulator-fixed-clock",
317
270
.data = &fixed_clkenable_data,
271
+
},
272
+
{
273
+
.compatible = "regulator-fixed-domain",
274
+
.data = &fixed_domain_data,
318
275
},
319
276
{
320
277
},
+2
drivers/regulator/helpers.c
+2
drivers/regulator/helpers.c
+1
-1
drivers/regulator/lp872x.c
+1
-1
drivers/regulator/lp872x.c
+2
drivers/regulator/max14577-regulator.c
+2
drivers/regulator/max14577-regulator.c
+2
-2
drivers/regulator/mc13892-regulator.c
+2
-2
drivers/regulator/mc13892-regulator.c
···
582
582
/* update mc13892_vcam ops */
583
583
memcpy(&mc13892_vcam_ops, mc13892_regulators[MC13892_VCAM].desc.ops,
584
584
sizeof(struct regulator_ops));
585
-
mc13892_vcam_ops.set_mode = mc13892_vcam_set_mode,
586
-
mc13892_vcam_ops.get_mode = mc13892_vcam_get_mode,
585
+
mc13892_vcam_ops.set_mode = mc13892_vcam_set_mode;
586
+
mc13892_vcam_ops.get_mode = mc13892_vcam_get_mode;
587
587
mc13892_regulators[MC13892_VCAM].desc.ops = &mc13892_vcam_ops;
588
588
589
589
mc13xxx_data = mc13xxx_parse_regulators_dt(pdev, mc13892_regulators,
+115
-20
drivers/regulator/mcp16502.c
+115
-20
drivers/regulator/mcp16502.c
···
22
22
#define VDD_LOW_SEL 0x0D
23
23
#define VDD_HIGH_SEL 0x3F
24
24
25
-
#define MCP16502_FLT BIT(7)
26
-
#define MCP16502_ENS BIT(0)
25
+
#define MCP16502_FLT BIT(7)
26
+
#define MCP16502_DVSR GENMASK(3, 2)
27
+
#define MCP16502_ENS BIT(0)
27
28
28
29
/*
29
30
* The PMIC has four sets of registers corresponding to four power modes:
···
55
54
* This function is useful for iterating over all regulators and accessing their
56
55
* registers in a generic way or accessing a regulator device by its id.
57
56
*/
58
-
#define MCP16502_BASE(i) (((i) + 1) << 4)
57
+
#define MCP16502_REG_BASE(i, r) ((((i) + 1) << 4) + MCP16502_REG_##r)
59
58
#define MCP16502_STAT_BASE(i) ((i) + 5)
60
-
61
-
#define MCP16502_OFFSET_MODE_A 0
62
-
#define MCP16502_OFFSET_MODE_LPM 1
63
-
#define MCP16502_OFFSET_MODE_HIB 2
64
59
65
60
#define MCP16502_OPMODE_ACTIVE REGULATOR_MODE_NORMAL
66
61
#define MCP16502_OPMODE_LPM REGULATOR_MODE_IDLE
···
71
74
72
75
#define MCP16502_MIN_REG 0x0
73
76
#define MCP16502_MAX_REG 0x65
77
+
78
+
/**
79
+
* enum mcp16502_reg - MCP16502 regulators's registers
80
+
* @MCP16502_REG_A: active state register
81
+
* @MCP16502_REG_LPM: low power mode state register
82
+
* @MCP16502_REG_HIB: hibernate state register
83
+
* @MCP16502_REG_SEQ: startup sequence register
84
+
* @MCP16502_REG_CFG: configuration register
85
+
*/
86
+
enum mcp16502_reg {
87
+
MCP16502_REG_A,
88
+
MCP16502_REG_LPM,
89
+
MCP16502_REG_HIB,
90
+
MCP16502_REG_HPM,
91
+
MCP16502_REG_SEQ,
92
+
MCP16502_REG_CFG,
93
+
};
94
+
95
+
/* Ramp delay (uV/us) for buck1, ldo1, ldo2. */
96
+
static const int mcp16502_ramp_b1l12[] = { 6250, 3125, 2083, 1563 };
97
+
98
+
/* Ramp delay (uV/us) for buck2, buck3, buck4. */
99
+
static const int mcp16502_ramp_b234[] = { 3125, 1563, 1042, 781 };
74
100
75
101
static unsigned int mcp16502_of_map_mode(unsigned int mode)
76
102
{
···
113
93
.owner = THIS_MODULE, \
114
94
.n_voltages = MCP16502_VSEL + 1, \
115
95
.linear_ranges = _ranges, \
96
+
.linear_min_sel = VDD_LOW_SEL, \
116
97
.n_linear_ranges = ARRAY_SIZE(_ranges), \
117
98
.of_match = of_match_ptr(_name), \
118
99
.of_map_mode = mcp16502_of_map_mode, \
···
135
114
136
115
/*
137
116
* struct mcp16502 - PMIC representation
138
-
* @rdev: the regulators belonging to this chip
139
-
* @rmap: regmap to be used for I2C communication
140
117
* @lpm: LPM GPIO descriptor
141
118
*/
142
119
struct mcp16502 {
···
162
143
}
163
144
164
145
/*
165
-
* mcp16502_get_reg() - get the PMIC's configuration register for opmode
146
+
* mcp16502_get_reg() - get the PMIC's state configuration register for opmode
166
147
*
167
148
* @rdev: the regulator whose register we are searching
168
149
* @opmode: the PMIC's operating mode ACTIVE, Low-power, Hibernate
169
150
*/
170
-
static int mcp16502_get_reg(struct regulator_dev *rdev, int opmode)
151
+
static int mcp16502_get_state_reg(struct regulator_dev *rdev, int opmode)
171
152
{
172
-
int reg = MCP16502_BASE(rdev_get_id(rdev));
173
-
174
153
switch (opmode) {
175
154
case MCP16502_OPMODE_ACTIVE:
176
-
return reg + MCP16502_OFFSET_MODE_A;
155
+
return MCP16502_REG_BASE(rdev_get_id(rdev), A);
177
156
case MCP16502_OPMODE_LPM:
178
-
return reg + MCP16502_OFFSET_MODE_LPM;
157
+
return MCP16502_REG_BASE(rdev_get_id(rdev), LPM);
179
158
case MCP16502_OPMODE_HIB:
180
-
return reg + MCP16502_OFFSET_MODE_HIB;
159
+
return MCP16502_REG_BASE(rdev_get_id(rdev), HIB);
181
160
default:
182
161
return -EINVAL;
183
162
}
···
195
178
unsigned int val;
196
179
int ret, reg;
197
180
198
-
reg = mcp16502_get_reg(rdev, MCP16502_OPMODE_ACTIVE);
181
+
reg = mcp16502_get_state_reg(rdev, MCP16502_OPMODE_ACTIVE);
199
182
if (reg < 0)
200
183
return reg;
201
184
···
226
209
int val;
227
210
int reg;
228
211
229
-
reg = mcp16502_get_reg(rdev, op_mode);
212
+
reg = mcp16502_get_state_reg(rdev, op_mode);
230
213
if (reg < 0)
231
214
return reg;
232
215
···
276
259
return REGULATOR_STATUS_UNDEFINED;
277
260
}
278
261
262
+
static int mcp16502_set_voltage_time_sel(struct regulator_dev *rdev,
263
+
unsigned int old_sel,
264
+
unsigned int new_sel)
265
+
{
266
+
static const u8 us_ramp[] = { 8, 16, 24, 32 };
267
+
int id = rdev_get_id(rdev);
268
+
unsigned int uV_delta, val;
269
+
int ret;
270
+
271
+
ret = regmap_read(rdev->regmap, MCP16502_REG_BASE(id, CFG), &val);
272
+
if (ret)
273
+
return ret;
274
+
275
+
val = (val & MCP16502_DVSR) >> 2;
276
+
uV_delta = abs(new_sel * rdev->desc->linear_ranges->step -
277
+
old_sel * rdev->desc->linear_ranges->step);
278
+
switch (id) {
279
+
case BUCK1:
280
+
case LDO1:
281
+
case LDO2:
282
+
ret = DIV_ROUND_CLOSEST(uV_delta * us_ramp[val],
283
+
mcp16502_ramp_b1l12[val]);
284
+
break;
285
+
286
+
case BUCK2:
287
+
case BUCK3:
288
+
case BUCK4:
289
+
ret = DIV_ROUND_CLOSEST(uV_delta * us_ramp[val],
290
+
mcp16502_ramp_b234[val]);
291
+
break;
292
+
293
+
default:
294
+
return -EINVAL;
295
+
}
296
+
297
+
return ret;
298
+
}
299
+
300
+
static int mcp16502_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
301
+
{
302
+
const int *ramp;
303
+
int id = rdev_get_id(rdev);
304
+
unsigned int i, size;
305
+
306
+
switch (id) {
307
+
case BUCK1:
308
+
case LDO1:
309
+
case LDO2:
310
+
ramp = mcp16502_ramp_b1l12;
311
+
size = ARRAY_SIZE(mcp16502_ramp_b1l12);
312
+
break;
313
+
314
+
case BUCK2:
315
+
case BUCK3:
316
+
case BUCK4:
317
+
ramp = mcp16502_ramp_b234;
318
+
size = ARRAY_SIZE(mcp16502_ramp_b234);
319
+
break;
320
+
321
+
default:
322
+
return -EINVAL;
323
+
}
324
+
325
+
for (i = 0; i < size; i++) {
326
+
if (ramp[i] == ramp_delay)
327
+
break;
328
+
}
329
+
if (i == size)
330
+
return -EINVAL;
331
+
332
+
return regmap_update_bits(rdev->regmap, MCP16502_REG_BASE(id, CFG),
333
+
MCP16502_DVSR, (i << 2));
334
+
}
335
+
279
336
#ifdef CONFIG_SUSPEND
280
337
/*
281
338
* mcp16502_suspend_get_target_reg() - get the reg of the target suspend PMIC
···
359
268
{
360
269
switch (pm_suspend_target_state) {
361
270
case PM_SUSPEND_STANDBY:
362
-
return mcp16502_get_reg(rdev, MCP16502_OPMODE_LPM);
271
+
return mcp16502_get_state_reg(rdev, MCP16502_OPMODE_LPM);
363
272
case PM_SUSPEND_ON:
364
273
case PM_SUSPEND_MEM:
365
-
return mcp16502_get_reg(rdev, MCP16502_OPMODE_HIB);
274
+
return mcp16502_get_state_reg(rdev, MCP16502_OPMODE_HIB);
366
275
default:
367
276
dev_err(&rdev->dev, "invalid suspend target: %d\n",
368
277
pm_suspend_target_state);
···
444
353
.disable = regulator_disable_regmap,
445
354
.is_enabled = regulator_is_enabled_regmap,
446
355
.get_status = mcp16502_get_status,
356
+
.set_voltage_time_sel = mcp16502_set_voltage_time_sel,
357
+
.set_ramp_delay = mcp16502_set_ramp_delay,
447
358
448
359
.set_mode = mcp16502_set_mode,
449
360
.get_mode = mcp16502_get_mode,
···
470
377
.disable = regulator_disable_regmap,
471
378
.is_enabled = regulator_is_enabled_regmap,
472
379
.get_status = mcp16502_get_status,
380
+
.set_voltage_time_sel = mcp16502_set_voltage_time_sel,
381
+
.set_ramp_delay = mcp16502_set_ramp_delay,
473
382
474
383
#ifdef CONFIG_SUSPEND
475
384
.set_suspend_voltage = mcp16502_set_suspend_voltage,
+6
-2
drivers/regulator/of_regulator.c
+6
-2
drivers/regulator/of_regulator.c
···
413
413
414
414
for_each_available_child_of_node(search, child) {
415
415
name = of_get_property(child, "regulator-compatible", NULL);
416
-
if (!name)
417
-
name = child->name;
416
+
if (!name) {
417
+
if (!desc->of_match_full_name)
418
+
name = child->name;
419
+
else
420
+
name = child->full_name;
421
+
}
418
422
419
423
if (!strcmp(desc->of_match, name)) {
420
424
of_node_put(search);
+496
drivers/regulator/pf8x00-regulator.c
+496
drivers/regulator/pf8x00-regulator.c
···
1
+
// SPDX-License-Identifier: GPL-2.0+
2
+
/*
3
+
* Copyright (C) 2017 NXP
4
+
* Copyright (C) 2019 Boundary Devices
5
+
* Copyright (C) 2020 Amarula Solutions(India)
6
+
*/
7
+
8
+
#include <linux/delay.h>
9
+
#include <linux/err.h>
10
+
#include <linux/gpio/consumer.h>
11
+
#include <linux/i2c.h>
12
+
#include <linux/module.h>
13
+
#include <linux/regmap.h>
14
+
#include <linux/regulator/driver.h>
15
+
#include <linux/regulator/machine.h>
16
+
17
+
/* registers */
18
+
#define PF8X00_DEVICEID 0x00
19
+
#define PF8X00_REVID 0x01
20
+
#define PF8X00_EMREV 0x02
21
+
#define PF8X00_PROGID 0x03
22
+
#define PF8X00_IMS_INT 0x04
23
+
#define PF8X00_IMS_THERM 0x07
24
+
#define PF8X00_SW_MODE_INT 0x0a
25
+
#define PF8X00_SW_MODE_MASK 0x0b
26
+
#define PF8X00_IMS_SW_ILIM 0x12
27
+
#define PF8X00_IMS_LDO_ILIM 0x15
28
+
#define PF8X00_IMS_SW_UV 0x18
29
+
#define PF8X00_IMS_SW_OV 0x1b
30
+
#define PF8X00_IMS_LDO_UV 0x1e
31
+
#define PF8X00_IMS_LDO_OV 0x21
32
+
#define PF8X00_IMS_PWRON 0x24
33
+
#define PF8X00_SYS_INT 0x27
34
+
#define PF8X00_HARD_FAULT 0x29
35
+
#define PF8X00_FSOB_FLAGS 0x2a
36
+
#define PF8X00_FSOB_SELECT 0x2b
37
+
#define PF8X00_ABIST_OV1 0x2c
38
+
#define PF8X00_ABIST_OV2 0x2d
39
+
#define PF8X00_ABIST_UV1 0x2e
40
+
#define PF8X00_ABIST_UV2 0x2f
41
+
#define PF8X00_TEST_FLAGS 0x30
42
+
#define PF8X00_ABIST_RUN 0x31
43
+
#define PF8X00_RANDOM_GEN 0x33
44
+
#define PF8X00_RANDOM_CHK 0x34
45
+
#define PF8X00_VMONEN1 0x35
46
+
#define PF8X00_VMONEN2 0x36
47
+
#define PF8X00_CTRL1 0x37
48
+
#define PF8X00_CTRL2 0x38
49
+
#define PF8X00_CTRL3 0x39
50
+
#define PF8X00_PWRUP_CTRL 0x3a
51
+
#define PF8X00_RESETBMCU 0x3c
52
+
#define PF8X00_PGOOD 0x3d
53
+
#define PF8X00_PWRDN_DLY1 0x3e
54
+
#define PF8X00_PWRDN_DLY2 0x3f
55
+
#define PF8X00_FREQ_CTRL 0x40
56
+
#define PF8X00_COINCELL_CTRL 0x41
57
+
#define PF8X00_PWRON 0x42
58
+
#define PF8X00_WD_CONFIG 0x43
59
+
#define PF8X00_WD_CLEAR 0x44
60
+
#define PF8X00_WD_EXPIRE 0x45
61
+
#define PF8X00_WD_COUNTER 0x46
62
+
#define PF8X00_FAULT_COUNTER 0x47
63
+
#define PF8X00_FSAFE_COUNTER 0x48
64
+
#define PF8X00_FAULT_TIMER 0x49
65
+
#define PF8X00_AMUX 0x4a
66
+
#define PF8X00_SW1_CONFIG1 0x4d
67
+
#define PF8X00_LDO1_CONFIG1 0x85
68
+
#define PF8X00_VSNVS_CONFIG1 0x9d
69
+
#define PF8X00_PAGE_SELECT 0x9f
70
+
71
+
/* regulators */
72
+
enum pf8x00_regulators {
73
+
PF8X00_LDO1,
74
+
PF8X00_LDO2,
75
+
PF8X00_LDO3,
76
+
PF8X00_LDO4,
77
+
PF8X00_BUCK1,
78
+
PF8X00_BUCK2,
79
+
PF8X00_BUCK3,
80
+
PF8X00_BUCK4,
81
+
PF8X00_BUCK5,
82
+
PF8X00_BUCK6,
83
+
PF8X00_BUCK7,
84
+
PF8X00_VSNVS,
85
+
86
+
PF8X00_MAX_REGULATORS,
87
+
};
88
+
89
+
enum pf8x00_buck_states {
90
+
SW_CONFIG1,
91
+
SW_CONFIG2,
92
+
SW_PWRUP,
93
+
SW_MODE1,
94
+
SW_RUN_VOLT,
95
+
SW_STBY_VOLT,
96
+
};
97
+
#define PF8X00_SW_BASE(i) (8 * (i - PF8X00_BUCK1) + PF8X00_SW1_CONFIG1)
98
+
99
+
enum pf8x00_ldo_states {
100
+
LDO_CONFIG1,
101
+
LDO_CONFIG2,
102
+
LDO_PWRUP,
103
+
LDO_RUN_VOLT,
104
+
LDO_STBY_VOLT,
105
+
};
106
+
#define PF8X00_LDO_BASE(i) (6 * (i - PF8X00_LDO1) + PF8X00_LDO1_CONFIG1)
107
+
108
+
enum swxilim_bits {
109
+
SWXILIM_2100_MA,
110
+
SWXILIM_2600_MA,
111
+
SWXILIM_3000_MA,
112
+
SWXILIM_4500_MA,
113
+
};
114
+
#define PF8X00_SWXILIM_SHIFT 3
115
+
#define PF8X00_SWXILIM_MASK GENMASK(4, 3)
116
+
#define PF8X00_SWXPHASE_MASK GENMASK(2, 0)
117
+
#define PF8X00_SWXPHASE_DEFAULT 0
118
+
#define PF8X00_SWXPHASE_SHIFT 7
119
+
120
+
enum pf8x00_devid {
121
+
PF8100 = 0x0,
122
+
PF8121A = BIT(1),
123
+
PF8200 = BIT(3),
124
+
};
125
+
#define PF8X00_FAM BIT(6)
126
+
#define PF8X00_DEVICE_FAM_MASK GENMASK(7, 4)
127
+
#define PF8X00_DEVICE_ID_MASK GENMASK(3, 0)
128
+
129
+
struct pf8x00_regulator {
130
+
struct regulator_desc desc;
131
+
u8 ilim;
132
+
u8 phase_shift;
133
+
};
134
+
135
+
struct pf8x00_chip {
136
+
struct regmap *regmap;
137
+
struct device *dev;
138
+
};
139
+
140
+
static const struct regmap_config pf8x00_regmap_config = {
141
+
.reg_bits = 8,
142
+
.val_bits = 8,
143
+
.max_register = PF8X00_PAGE_SELECT,
144
+
.cache_type = REGCACHE_RBTREE,
145
+
};
146
+
147
+
/* VLDOx output: 1.5V to 5.0V */
148
+
static const int pf8x00_ldo_voltages[] = {
149
+
1500000, 1600000, 1800000, 1850000, 2150000, 2500000, 2800000, 3000000,
150
+
3100000, 3150000, 3200000, 3300000, 3350000, 1650000, 1700000, 5000000,
151
+
};
152
+
153
+
#define SWV(i) (6250 * i + 400000)
154
+
#define SWV_LINE(i) SWV(i*8+0), SWV(i*8+1), SWV(i*8+2), SWV(i*8+3), \
155
+
SWV(i*8+4), SWV(i*8+5), SWV(i*8+6), SWV(i*8+7)
156
+
157
+
/* Output: 0.4V to 1.8V */
158
+
static const int pf8x00_sw1_to_6_voltages[] = {
159
+
SWV_LINE(0),
160
+
SWV_LINE(1),
161
+
SWV_LINE(2),
162
+
SWV_LINE(3),
163
+
SWV_LINE(4),
164
+
SWV_LINE(5),
165
+
SWV_LINE(6),
166
+
SWV_LINE(7),
167
+
SWV_LINE(8),
168
+
SWV_LINE(9),
169
+
SWV_LINE(10),
170
+
SWV_LINE(11),
171
+
SWV_LINE(12),
172
+
SWV_LINE(13),
173
+
SWV_LINE(14),
174
+
SWV_LINE(15),
175
+
SWV_LINE(16),
176
+
SWV_LINE(17),
177
+
SWV_LINE(18),
178
+
SWV_LINE(19),
179
+
SWV_LINE(20),
180
+
SWV_LINE(21),
181
+
1500000, 1800000,
182
+
};
183
+
184
+
/* Output: 1.0V to 4.1V */
185
+
static const int pf8x00_sw7_voltages[] = {
186
+
1000000, 1100000, 1200000, 1250000, 1300000, 1350000, 1500000, 1600000,
187
+
1800000, 1850000, 2000000, 2100000, 2150000, 2250000, 2300000, 2400000,
188
+
2500000, 2800000, 3150000, 3200000, 3250000, 3300000, 3350000, 3400000,
189
+
3500000, 3800000, 4000000, 4100000, 4100000, 4100000, 4100000, 4100000,
190
+
};
191
+
192
+
/* Output: 1.8V, 3.0V, or 3.3V */
193
+
static const int pf8x00_vsnvs_voltages[] = {
194
+
0, 1800000, 3000000, 3300000,
195
+
};
196
+
197
+
static struct pf8x00_regulator *desc_to_regulator(const struct regulator_desc *desc)
198
+
{
199
+
return container_of(desc, struct pf8x00_regulator, desc);
200
+
}
201
+
202
+
static void swxilim_select(const struct regulator_desc *desc, int ilim)
203
+
{
204
+
struct pf8x00_regulator *data = desc_to_regulator(desc);
205
+
u8 ilim_sel;
206
+
207
+
switch (ilim) {
208
+
case 2100:
209
+
ilim_sel = SWXILIM_2100_MA;
210
+
break;
211
+
case 2600:
212
+
ilim_sel = SWXILIM_2600_MA;
213
+
break;
214
+
case 3000:
215
+
ilim_sel = SWXILIM_3000_MA;
216
+
break;
217
+
case 4500:
218
+
ilim_sel = SWXILIM_4500_MA;
219
+
break;
220
+
default:
221
+
ilim_sel = SWXILIM_2100_MA;
222
+
break;
223
+
}
224
+
225
+
data->ilim = ilim_sel;
226
+
}
227
+
228
+
static int pf8x00_of_parse_cb(struct device_node *np,
229
+
const struct regulator_desc *desc,
230
+
struct regulator_config *config)
231
+
{
232
+
struct pf8x00_regulator *data = desc_to_regulator(desc);
233
+
struct pf8x00_chip *chip = config->driver_data;
234
+
int phase;
235
+
int val;
236
+
int ret;
237
+
238
+
ret = of_property_read_u32(np, "nxp,ilim-ma", &val);
239
+
if (ret)
240
+
dev_dbg(chip->dev, "unspecified ilim for BUCK%d, use 2100 mA\n",
241
+
desc->id - PF8X00_LDO4);
242
+
243
+
swxilim_select(desc, val);
244
+
245
+
ret = of_property_read_u32(np, "nxp,phase-shift", &val);
246
+
if (ret) {
247
+
dev_dbg(chip->dev,
248
+
"unspecified phase-shift for BUCK%d, use 0 degrees\n",
249
+
desc->id - PF8X00_LDO4);
250
+
val = PF8X00_SWXPHASE_DEFAULT;
251
+
}
252
+
253
+
phase = val / 45;
254
+
if ((phase * 45) != val) {
255
+
dev_warn(config->dev,
256
+
"invalid phase_shift %d for BUCK%d, use 0 degrees\n",
257
+
(phase * 45), desc->id - PF8X00_LDO4);
258
+
phase = PF8X00_SWXPHASE_SHIFT;
259
+
}
260
+
261
+
data->phase_shift = (phase >= 1) ? phase - 1 : PF8X00_SWXPHASE_SHIFT;
262
+
263
+
return 0;
264
+
}
265
+
266
+
static const struct regulator_ops pf8x00_ldo_ops = {
267
+
.enable = regulator_enable_regmap,
268
+
.disable = regulator_disable_regmap,
269
+
.is_enabled = regulator_is_enabled_regmap,
270
+
.list_voltage = regulator_list_voltage_table,
271
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
272
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
273
+
};
274
+
275
+
static const struct regulator_ops pf8x00_buck_ops = {
276
+
.enable = regulator_enable_regmap,
277
+
.disable = regulator_disable_regmap,
278
+
.is_enabled = regulator_is_enabled_regmap,
279
+
.list_voltage = regulator_list_voltage_table,
280
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
281
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
282
+
};
283
+
284
+
static const struct regulator_ops pf8x00_vsnvs_ops = {
285
+
.enable = regulator_enable_regmap,
286
+
.disable = regulator_disable_regmap,
287
+
.is_enabled = regulator_is_enabled_regmap,
288
+
.list_voltage = regulator_list_voltage_table,
289
+
.map_voltage = regulator_map_voltage_ascend,
290
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
291
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
292
+
};
293
+
294
+
#define PF8X00LDO(_id, _name, base, voltages) \
295
+
[PF8X00_LDO ## _id] = { \
296
+
.desc = { \
297
+
.name = _name, \
298
+
.of_match = _name, \
299
+
.regulators_node = "regulators", \
300
+
.n_voltages = ARRAY_SIZE(voltages), \
301
+
.ops = &pf8x00_ldo_ops, \
302
+
.type = REGULATOR_VOLTAGE, \
303
+
.id = PF8X00_LDO ## _id, \
304
+
.owner = THIS_MODULE, \
305
+
.volt_table = voltages, \
306
+
.vsel_reg = (base) + LDO_RUN_VOLT, \
307
+
.vsel_mask = 0xff, \
308
+
.enable_reg = (base) + LDO_CONFIG2, \
309
+
.enable_val = 0x2, \
310
+
.disable_val = 0x0, \
311
+
.enable_mask = 2, \
312
+
}, \
313
+
}
314
+
315
+
#define PF8X00BUCK(_id, _name, base, voltages) \
316
+
[PF8X00_BUCK ## _id] = { \
317
+
.desc = { \
318
+
.name = _name, \
319
+
.of_match = _name, \
320
+
.regulators_node = "regulators", \
321
+
.of_parse_cb = pf8x00_of_parse_cb, \
322
+
.n_voltages = ARRAY_SIZE(voltages), \
323
+
.ops = &pf8x00_buck_ops, \
324
+
.type = REGULATOR_VOLTAGE, \
325
+
.id = PF8X00_BUCK ## _id, \
326
+
.owner = THIS_MODULE, \
327
+
.volt_table = voltages, \
328
+
.vsel_reg = (base) + SW_RUN_VOLT, \
329
+
.vsel_mask = 0xff, \
330
+
.enable_reg = (base) + SW_MODE1, \
331
+
.enable_val = 0x3, \
332
+
.disable_val = 0x0, \
333
+
.enable_mask = 0x3, \
334
+
.enable_time = 500, \
335
+
}, \
336
+
}
337
+
338
+
#define PF8X00VSNVS(_name, base, voltages) \
339
+
[PF8X00_VSNVS] = { \
340
+
.desc = { \
341
+
.name = _name, \
342
+
.of_match = _name, \
343
+
.regulators_node = "regulators", \
344
+
.n_voltages = ARRAY_SIZE(voltages), \
345
+
.ops = &pf8x00_vsnvs_ops, \
346
+
.type = REGULATOR_VOLTAGE, \
347
+
.id = PF8X00_VSNVS, \
348
+
.owner = THIS_MODULE, \
349
+
.volt_table = voltages, \
350
+
.vsel_reg = (base), \
351
+
.vsel_mask = 0x3, \
352
+
}, \
353
+
}
354
+
355
+
static struct pf8x00_regulator pf8x00_regulators_data[PF8X00_MAX_REGULATORS] = {
356
+
PF8X00LDO(1, "ldo1", PF8X00_LDO_BASE(PF8X00_LDO1), pf8x00_ldo_voltages),
357
+
PF8X00LDO(2, "ldo2", PF8X00_LDO_BASE(PF8X00_LDO2), pf8x00_ldo_voltages),
358
+
PF8X00LDO(3, "ldo3", PF8X00_LDO_BASE(PF8X00_LDO3), pf8x00_ldo_voltages),
359
+
PF8X00LDO(4, "ldo4", PF8X00_LDO_BASE(PF8X00_LDO4), pf8x00_ldo_voltages),
360
+
PF8X00BUCK(1, "buck1", PF8X00_SW_BASE(PF8X00_BUCK1), pf8x00_sw1_to_6_voltages),
361
+
PF8X00BUCK(2, "buck2", PF8X00_SW_BASE(PF8X00_BUCK2), pf8x00_sw1_to_6_voltages),
362
+
PF8X00BUCK(3, "buck3", PF8X00_SW_BASE(PF8X00_BUCK3), pf8x00_sw1_to_6_voltages),
363
+
PF8X00BUCK(4, "buck4", PF8X00_SW_BASE(PF8X00_BUCK4), pf8x00_sw1_to_6_voltages),
364
+
PF8X00BUCK(5, "buck5", PF8X00_SW_BASE(PF8X00_BUCK5), pf8x00_sw1_to_6_voltages),
365
+
PF8X00BUCK(6, "buck6", PF8X00_SW_BASE(PF8X00_BUCK6), pf8x00_sw1_to_6_voltages),
366
+
PF8X00BUCK(7, "buck7", PF8X00_SW_BASE(PF8X00_BUCK7), pf8x00_sw7_voltages),
367
+
PF8X00VSNVS("vsnvs", PF8X00_VSNVS_CONFIG1, pf8x00_vsnvs_voltages),
368
+
};
369
+
370
+
static int pf8x00_identify(struct pf8x00_chip *chip)
371
+
{
372
+
unsigned int value;
373
+
u8 dev_fam, dev_id;
374
+
const char *name = NULL;
375
+
int ret;
376
+
377
+
ret = regmap_read(chip->regmap, PF8X00_DEVICEID, &value);
378
+
if (ret) {
379
+
dev_err(chip->dev, "failed to read chip family\n");
380
+
return ret;
381
+
}
382
+
383
+
dev_fam = value & PF8X00_DEVICE_FAM_MASK;
384
+
switch (dev_fam) {
385
+
case PF8X00_FAM:
386
+
break;
387
+
default:
388
+
dev_err(chip->dev,
389
+
"Chip 0x%x is not from PF8X00 family\n", dev_fam);
390
+
return ret;
391
+
}
392
+
393
+
dev_id = value & PF8X00_DEVICE_ID_MASK;
394
+
switch (dev_id) {
395
+
case PF8100:
396
+
name = "PF8100";
397
+
break;
398
+
case PF8121A:
399
+
name = "PF8121A";
400
+
break;
401
+
case PF8200:
402
+
name = "PF8100";
403
+
break;
404
+
default:
405
+
dev_err(chip->dev, "Unknown pf8x00 device id 0x%x\n", dev_id);
406
+
return -ENODEV;
407
+
}
408
+
409
+
dev_info(chip->dev, "%s PMIC found.\n", name);
410
+
411
+
return 0;
412
+
}
413
+
414
+
static int pf8x00_i2c_probe(struct i2c_client *client)
415
+
{
416
+
struct regulator_config config = { NULL, };
417
+
struct pf8x00_chip *chip;
418
+
int id;
419
+
int ret;
420
+
421
+
chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
422
+
if (!chip)
423
+
return -ENOMEM;
424
+
425
+
i2c_set_clientdata(client, chip);
426
+
chip->dev = &client->dev;
427
+
428
+
chip->regmap = devm_regmap_init_i2c(client, &pf8x00_regmap_config);
429
+
if (IS_ERR(chip->regmap)) {
430
+
ret = PTR_ERR(chip->regmap);
431
+
dev_err(&client->dev,
432
+
"regmap allocation failed with err %d\n", ret);
433
+
return ret;
434
+
}
435
+
436
+
ret = pf8x00_identify(chip);
437
+
if (ret)
438
+
return ret;
439
+
440
+
for (id = 0; id < ARRAY_SIZE(pf8x00_regulators_data); id++) {
441
+
struct pf8x00_regulator *data = &pf8x00_regulators_data[id];
442
+
struct regulator_dev *rdev;
443
+
444
+
config.dev = chip->dev;
445
+
config.driver_data = chip;
446
+
config.regmap = chip->regmap;
447
+
448
+
rdev = devm_regulator_register(&client->dev, &data->desc, &config);
449
+
if (IS_ERR(rdev)) {
450
+
dev_err(&client->dev,
451
+
"failed to register %s regulator\n", data->desc.name);
452
+
return PTR_ERR(rdev);
453
+
}
454
+
455
+
if ((id >= PF8X00_BUCK1) && (id <= PF8X00_BUCK7)) {
456
+
u8 reg = PF8X00_SW_BASE(id) + SW_CONFIG2;
457
+
458
+
regmap_update_bits(chip->regmap, reg,
459
+
PF8X00_SWXPHASE_MASK,
460
+
data->phase_shift);
461
+
462
+
regmap_update_bits(chip->regmap, reg,
463
+
PF8X00_SWXILIM_MASK,
464
+
data->ilim << PF8X00_SWXILIM_SHIFT);
465
+
}
466
+
}
467
+
468
+
return 0;
469
+
}
470
+
471
+
static const struct of_device_id pf8x00_dt_ids[] = {
472
+
{ .compatible = "nxp,pf8x00",},
473
+
{ }
474
+
};
475
+
MODULE_DEVICE_TABLE(of, pf8x00_dt_ids);
476
+
477
+
static const struct i2c_device_id pf8x00_i2c_id[] = {
478
+
{ "pf8x00", 0 },
479
+
{},
480
+
};
481
+
MODULE_DEVICE_TABLE(i2c, pf8x00_i2c_id);
482
+
483
+
static struct i2c_driver pf8x00_regulator_driver = {
484
+
.id_table = pf8x00_i2c_id,
485
+
.driver = {
486
+
.name = "pf8x00",
487
+
.of_match_table = pf8x00_dt_ids,
488
+
},
489
+
.probe_new = pf8x00_i2c_probe,
490
+
};
491
+
module_i2c_driver(pf8x00_regulator_driver);
492
+
493
+
MODULE_AUTHOR("Jagan Teki <jagan@amarulasolutions.com>");
494
+
MODULE_AUTHOR("Troy Kisky <troy.kisky@boundarydevices.com>");
495
+
MODULE_DESCRIPTION("Regulator Driver for NXP's PF8100/PF8121A/PF8200 PMIC");
496
+
MODULE_LICENSE("GPL v2");
+1
-33
drivers/regulator/pfuze100-regulator.c
+1
-33
drivers/regulator/pfuze100-regulator.c
···
105
105
2500000, 2800000, 2850000, 3000000, 3100000, 3150000, 3200000, 3300000,
106
106
};
107
107
108
-
static const struct i2c_device_id pfuze_device_id[] = {
109
-
{.name = "pfuze100", .driver_data = PFUZE100},
110
-
{.name = "pfuze200", .driver_data = PFUZE200},
111
-
{.name = "pfuze3000", .driver_data = PFUZE3000},
112
-
{.name = "pfuze3001", .driver_data = PFUZE3001},
113
-
{ }
114
-
};
115
-
MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
116
-
117
108
static const struct of_device_id pfuze_dt_ids[] = {
118
109
{ .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
119
110
{ .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
···
431
440
PFUZE100_VGEN_REG(PFUZE3001, VLDO4, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
432
441
};
433
442
434
-
#ifdef CONFIG_OF
435
443
/* PFUZE100 */
436
444
static struct of_regulator_match pfuze100_matches[] = {
437
445
{ .name = "sw1ab", },
···
568
578
{
569
579
return pfuze_matches[index].of_node;
570
580
}
571
-
#else
572
-
static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
573
-
{
574
-
return 0;
575
-
}
576
-
577
-
static inline struct regulator_init_data *match_init_data(int index)
578
-
{
579
-
return NULL;
580
-
}
581
-
582
-
static inline struct device_node *match_of_node(int index)
583
-
{
584
-
return NULL;
585
-
}
586
-
#endif
587
581
588
582
static struct pfuze_chip *syspm_pfuze_chip;
589
583
···
682
708
const struct i2c_device_id *id)
683
709
{
684
710
struct pfuze_chip *pfuze_chip;
685
-
struct pfuze_regulator_platform_data *pdata =
686
-
dev_get_platdata(&client->dev);
687
711
struct regulator_config config = { };
688
712
int i, ret;
689
713
const struct of_device_id *match;
···
774
802
775
803
desc = &pfuze_chip->regulator_descs[i].desc;
776
804
777
-
if (pdata)
778
-
init_data = pdata->init_data[i];
779
-
else
780
-
init_data = match_init_data(i);
805
+
init_data = match_init_data(i);
781
806
782
807
/* SW2~SW4 high bit check and modify the voltage value table */
783
808
if (i >= sw_check_start && i <= sw_check_end) {
···
848
879
}
849
880
850
881
static struct i2c_driver pfuze_driver = {
851
-
.id_table = pfuze_device_id,
852
882
.driver = {
853
883
.name = "pfuze100-regulator",
854
884
.of_match_table = pfuze_dt_ids,
+93
drivers/regulator/qcom-rpmh-regulator.c
+93
drivers/regulator/qcom-rpmh-regulator.c
···
865
865
{},
866
866
};
867
867
868
+
static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {
869
+
RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
870
+
RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
871
+
RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
872
+
RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
873
+
RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
874
+
RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
875
+
RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
876
+
RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
877
+
RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
878
+
RPMH_VREG("smps10", "smp%s10", &pmic5_hfsmps510, "vdd-s10"),
879
+
RPMH_VREG("smps11", "smp%s11", &pmic5_hfsmps510, "vdd-s11"),
880
+
RPMH_VREG("smps12", "smp%s12", &pmic5_hfsmps510, "vdd-s12"),
881
+
RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4"),
882
+
RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
883
+
RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l5"),
884
+
RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4"),
885
+
RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l5"),
886
+
RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
887
+
RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
888
+
RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
889
+
RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
890
+
RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
891
+
{},
892
+
};
893
+
894
+
static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {
895
+
RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
896
+
RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
897
+
RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
898
+
RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
899
+
RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
900
+
RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
901
+
RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
902
+
RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
903
+
RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
904
+
RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
905
+
RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l12"),
906
+
RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo_lv, "vdd-l2-l8"),
907
+
RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
908
+
RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
909
+
RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
910
+
RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l9-l11"),
911
+
RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
912
+
RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l2-l8"),
913
+
RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l6-l9-l11"),
914
+
RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l10"),
915
+
RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l6-l9-l11"),
916
+
RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"),
917
+
RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
918
+
RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
919
+
{},
920
+
};
921
+
868
922
static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
869
923
RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
870
924
RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515, "vdd-s2"),
···
984
930
{},
985
931
};
986
932
933
+
static const struct rpmh_vreg_init_data pmx55_vreg_data[] = {
934
+
RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
935
+
RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"),
936
+
RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
937
+
RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
938
+
RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
939
+
RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
940
+
RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"),
941
+
RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
942
+
RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
943
+
RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l9"),
944
+
RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l12"),
945
+
RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
946
+
RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
947
+
RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7-l8"),
948
+
RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l7-l8"),
949
+
RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l3-l9"),
950
+
RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10-l11-l13"),
951
+
RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l10-l11-l13"),
952
+
RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l4-l12"),
953
+
RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l10-l11-l13"),
954
+
RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"),
955
+
RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"),
956
+
RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l16"),
957
+
{},
958
+
};
959
+
987
960
static int rpmh_regulator_probe(struct platform_device *pdev)
988
961
{
989
962
struct device *dev = &pdev->dev;
···
1066
985
.data = pm8150l_vreg_data,
1067
986
},
1068
987
{
988
+
.compatible = "qcom,pm8350-rpmh-regulators",
989
+
.data = pm8350_vreg_data,
990
+
},
991
+
{
992
+
.compatible = "qcom,pm8350c-rpmh-regulators",
993
+
.data = pm8350c_vreg_data,
994
+
},
995
+
{
1069
996
.compatible = "qcom,pm8998-rpmh-regulators",
1070
997
.data = pm8998_vreg_data,
1071
998
},
···
1088
999
{
1089
1000
.compatible = "qcom,pm6150l-rpmh-regulators",
1090
1001
.data = pm6150l_vreg_data,
1002
+
},
1003
+
{
1004
+
.compatible = "qcom,pmx55-rpmh-regulators",
1005
+
.data = pmx55_vreg_data,
1091
1006
},
1092
1007
{}
1093
1008
};
+417
drivers/regulator/scmi-regulator.c
+417
drivers/regulator/scmi-regulator.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
//
3
+
// System Control and Management Interface (SCMI) based regulator driver
4
+
//
5
+
// Copyright (C) 2020 ARM Ltd.
6
+
//
7
+
// Implements a regulator driver on top of the SCMI Voltage Protocol.
8
+
//
9
+
// The ARM SCMI Protocol aims in general to hide as much as possible all the
10
+
// underlying operational details while providing an abstracted interface for
11
+
// its users to operate upon: as a consequence the resulting operational
12
+
// capabilities and configurability of this regulator device are much more
13
+
// limited than the ones usually available on a standard physical regulator.
14
+
//
15
+
// The supported SCMI regulator ops are restricted to the bare minimum:
16
+
//
17
+
// - 'status_ops': enable/disable/is_enabled
18
+
// - 'voltage_ops': get_voltage_sel/set_voltage_sel
19
+
// list_voltage/map_voltage
20
+
//
21
+
// Each SCMI regulator instance is associated, through the means of a proper DT
22
+
// entry description, to a specific SCMI Voltage Domain.
23
+
24
+
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25
+
26
+
#include <linux/linear_range.h>
27
+
#include <linux/module.h>
28
+
#include <linux/of.h>
29
+
#include <linux/regulator/driver.h>
30
+
#include <linux/regulator/machine.h>
31
+
#include <linux/regulator/of_regulator.h>
32
+
#include <linux/scmi_protocol.h>
33
+
#include <linux/slab.h>
34
+
#include <linux/types.h>
35
+
36
+
struct scmi_regulator {
37
+
u32 id;
38
+
struct scmi_device *sdev;
39
+
struct regulator_dev *rdev;
40
+
struct device_node *of_node;
41
+
struct regulator_desc desc;
42
+
struct regulator_config conf;
43
+
};
44
+
45
+
struct scmi_regulator_info {
46
+
int num_doms;
47
+
struct scmi_regulator **sregv;
48
+
};
49
+
50
+
static int scmi_reg_enable(struct regulator_dev *rdev)
51
+
{
52
+
struct scmi_regulator *sreg = rdev_get_drvdata(rdev);
53
+
const struct scmi_handle *handle = sreg->sdev->handle;
54
+
55
+
return handle->voltage_ops->config_set(handle, sreg->id,
56
+
SCMI_VOLTAGE_ARCH_STATE_ON);
57
+
}
58
+
59
+
static int scmi_reg_disable(struct regulator_dev *rdev)
60
+
{
61
+
struct scmi_regulator *sreg = rdev_get_drvdata(rdev);
62
+
const struct scmi_handle *handle = sreg->sdev->handle;
63
+
64
+
return handle->voltage_ops->config_set(handle, sreg->id,
65
+
SCMI_VOLTAGE_ARCH_STATE_OFF);
66
+
}
67
+
68
+
static int scmi_reg_is_enabled(struct regulator_dev *rdev)
69
+
{
70
+
int ret;
71
+
u32 config;
72
+
struct scmi_regulator *sreg = rdev_get_drvdata(rdev);
73
+
const struct scmi_handle *handle = sreg->sdev->handle;
74
+
75
+
ret = handle->voltage_ops->config_get(handle, sreg->id,
76
+
&config);
77
+
if (ret) {
78
+
dev_err(&sreg->sdev->dev,
79
+
"Error %d reading regulator %s status.\n",
80
+
ret, sreg->desc.name);
81
+
return ret;
82
+
}
83
+
84
+
return config & SCMI_VOLTAGE_ARCH_STATE_ON;
85
+
}
86
+
87
+
static int scmi_reg_get_voltage_sel(struct regulator_dev *rdev)
88
+
{
89
+
int ret;
90
+
s32 volt_uV;
91
+
struct scmi_regulator *sreg = rdev_get_drvdata(rdev);
92
+
const struct scmi_handle *handle = sreg->sdev->handle;
93
+
94
+
ret = handle->voltage_ops->level_get(handle, sreg->id, &volt_uV);
95
+
if (ret)
96
+
return ret;
97
+
98
+
return sreg->desc.ops->map_voltage(rdev, volt_uV, volt_uV);
99
+
}
100
+
101
+
static int scmi_reg_set_voltage_sel(struct regulator_dev *rdev,
102
+
unsigned int selector)
103
+
{
104
+
s32 volt_uV;
105
+
struct scmi_regulator *sreg = rdev_get_drvdata(rdev);
106
+
const struct scmi_handle *handle = sreg->sdev->handle;
107
+
108
+
volt_uV = sreg->desc.ops->list_voltage(rdev, selector);
109
+
if (volt_uV <= 0)
110
+
return -EINVAL;
111
+
112
+
return handle->voltage_ops->level_set(handle, sreg->id, 0x0, volt_uV);
113
+
}
114
+
115
+
static const struct regulator_ops scmi_reg_fixed_ops = {
116
+
.enable = scmi_reg_enable,
117
+
.disable = scmi_reg_disable,
118
+
.is_enabled = scmi_reg_is_enabled,
119
+
};
120
+
121
+
static const struct regulator_ops scmi_reg_linear_ops = {
122
+
.enable = scmi_reg_enable,
123
+
.disable = scmi_reg_disable,
124
+
.is_enabled = scmi_reg_is_enabled,
125
+
.get_voltage_sel = scmi_reg_get_voltage_sel,
126
+
.set_voltage_sel = scmi_reg_set_voltage_sel,
127
+
.list_voltage = regulator_list_voltage_linear,
128
+
.map_voltage = regulator_map_voltage_linear,
129
+
};
130
+
131
+
static const struct regulator_ops scmi_reg_discrete_ops = {
132
+
.enable = scmi_reg_enable,
133
+
.disable = scmi_reg_disable,
134
+
.is_enabled = scmi_reg_is_enabled,
135
+
.get_voltage_sel = scmi_reg_get_voltage_sel,
136
+
.set_voltage_sel = scmi_reg_set_voltage_sel,
137
+
.list_voltage = regulator_list_voltage_table,
138
+
.map_voltage = regulator_map_voltage_iterate,
139
+
};
140
+
141
+
static int
142
+
scmi_config_linear_regulator_mappings(struct scmi_regulator *sreg,
143
+
const struct scmi_voltage_info *vinfo)
144
+
{
145
+
s32 delta_uV;
146
+
147
+
/*
148
+
* Note that SCMI voltage domains describable by linear ranges
149
+
* (segments) {low, high, step} are guaranteed to come in one single
150
+
* triplet by the SCMI Voltage Domain protocol support itself.
151
+
*/
152
+
153
+
delta_uV = (vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_HIGH] -
154
+
vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_LOW]);
155
+
156
+
/* Rule out buggy negative-intervals answers from fw */
157
+
if (delta_uV < 0) {
158
+
dev_err(&sreg->sdev->dev,
159
+
"Invalid volt-range %d-%duV for domain %d\n",
160
+
vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_LOW],
161
+
vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_HIGH],
162
+
sreg->id);
163
+
return -EINVAL;
164
+
}
165
+
166
+
if (!delta_uV) {
167
+
/* Just one fixed voltage exposed by SCMI */
168
+
sreg->desc.fixed_uV =
169
+
vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_LOW];
170
+
sreg->desc.n_voltages = 1;
171
+
sreg->desc.ops = &scmi_reg_fixed_ops;
172
+
} else {
173
+
/* One simple linear mapping. */
174
+
sreg->desc.min_uV =
175
+
vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_LOW];
176
+
sreg->desc.uV_step =
177
+
vinfo->levels_uv[SCMI_VOLTAGE_SEGMENT_STEP];
178
+
sreg->desc.linear_min_sel = 0;
179
+
sreg->desc.n_voltages = delta_uV / sreg->desc.uV_step;
180
+
sreg->desc.ops = &scmi_reg_linear_ops;
181
+
}
182
+
183
+
return 0;
184
+
}
185
+
186
+
static int
187
+
scmi_config_discrete_regulator_mappings(struct scmi_regulator *sreg,
188
+
const struct scmi_voltage_info *vinfo)
189
+
{
190
+
/* Discrete non linear levels are mapped to volt_table */
191
+
sreg->desc.n_voltages = vinfo->num_levels;
192
+
193
+
if (sreg->desc.n_voltages > 1) {
194
+
sreg->desc.volt_table = (const unsigned int *)vinfo->levels_uv;
195
+
sreg->desc.ops = &scmi_reg_discrete_ops;
196
+
} else {
197
+
sreg->desc.fixed_uV = vinfo->levels_uv[0];
198
+
sreg->desc.ops = &scmi_reg_fixed_ops;
199
+
}
200
+
201
+
return 0;
202
+
}
203
+
204
+
static int scmi_regulator_common_init(struct scmi_regulator *sreg)
205
+
{
206
+
int ret;
207
+
const struct scmi_handle *handle = sreg->sdev->handle;
208
+
struct device *dev = &sreg->sdev->dev;
209
+
const struct scmi_voltage_info *vinfo;
210
+
211
+
vinfo = handle->voltage_ops->info_get(handle, sreg->id);
212
+
if (!vinfo) {
213
+
dev_warn(dev, "Failure to get voltage domain %d\n",
214
+
sreg->id);
215
+
return -ENODEV;
216
+
}
217
+
218
+
/*
219
+
* Regulator framework does not fully support negative voltages
220
+
* so we discard any voltage domain reported as supporting negative
221
+
* voltages: as a consequence each levels_uv entry is guaranteed to
222
+
* be non-negative from here on.
223
+
*/
224
+
if (vinfo->negative_volts_allowed) {
225
+
dev_warn(dev, "Negative voltages NOT supported...skip %s\n",
226
+
sreg->of_node->full_name);
227
+
return -EOPNOTSUPP;
228
+
}
229
+
230
+
sreg->desc.name = devm_kasprintf(dev, GFP_KERNEL, "%s", vinfo->name);
231
+
if (!sreg->desc.name)
232
+
return -ENOMEM;
233
+
234
+
sreg->desc.id = sreg->id;
235
+
sreg->desc.type = REGULATOR_VOLTAGE;
236
+
sreg->desc.owner = THIS_MODULE;
237
+
sreg->desc.of_match_full_name = true;
238
+
sreg->desc.of_match = sreg->of_node->full_name;
239
+
sreg->desc.regulators_node = "regulators";
240
+
if (vinfo->segmented)
241
+
ret = scmi_config_linear_regulator_mappings(sreg, vinfo);
242
+
else
243
+
ret = scmi_config_discrete_regulator_mappings(sreg, vinfo);
244
+
if (ret)
245
+
return ret;
246
+
247
+
/*
248
+
* Using the scmi device here to have DT searched from Voltage
249
+
* protocol node down.
250
+
*/
251
+
sreg->conf.dev = dev;
252
+
253
+
/* Store for later retrieval via rdev_get_drvdata() */
254
+
sreg->conf.driver_data = sreg;
255
+
256
+
return 0;
257
+
}
258
+
259
+
static int process_scmi_regulator_of_node(struct scmi_device *sdev,
260
+
struct device_node *np,
261
+
struct scmi_regulator_info *rinfo)
262
+
{
263
+
u32 dom, ret;
264
+
265
+
ret = of_property_read_u32(np, "reg", &dom);
266
+
if (ret)
267
+
return ret;
268
+
269
+
if (dom >= rinfo->num_doms)
270
+
return -ENODEV;
271
+
272
+
if (rinfo->sregv[dom]) {
273
+
dev_err(&sdev->dev,
274
+
"SCMI Voltage Domain %d already in use. Skipping: %s\n",
275
+
dom, np->full_name);
276
+
return -EINVAL;
277
+
}
278
+
279
+
rinfo->sregv[dom] = devm_kzalloc(&sdev->dev,
280
+
sizeof(struct scmi_regulator),
281
+
GFP_KERNEL);
282
+
if (!rinfo->sregv[dom])
283
+
return -ENOMEM;
284
+
285
+
rinfo->sregv[dom]->id = dom;
286
+
rinfo->sregv[dom]->sdev = sdev;
287
+
288
+
/* get hold of good nodes */
289
+
of_node_get(np);
290
+
rinfo->sregv[dom]->of_node = np;
291
+
292
+
dev_dbg(&sdev->dev,
293
+
"Found SCMI Regulator entry -- OF node [%d] -> %s\n",
294
+
dom, np->full_name);
295
+
296
+
return 0;
297
+
}
298
+
299
+
static int scmi_regulator_probe(struct scmi_device *sdev)
300
+
{
301
+
int d, ret, num_doms;
302
+
struct device_node *np, *child;
303
+
const struct scmi_handle *handle = sdev->handle;
304
+
struct scmi_regulator_info *rinfo;
305
+
306
+
if (!handle || !handle->voltage_ops)
307
+
return -ENODEV;
308
+
309
+
num_doms = handle->voltage_ops->num_domains_get(handle);
310
+
if (num_doms <= 0) {
311
+
if (!num_doms) {
312
+
dev_err(&sdev->dev,
313
+
"number of voltage domains invalid\n");
314
+
num_doms = -EINVAL;
315
+
} else {
316
+
dev_err(&sdev->dev,
317
+
"failed to get voltage domains - err:%d\n",
318
+
num_doms);
319
+
}
320
+
321
+
return num_doms;
322
+
}
323
+
324
+
rinfo = devm_kzalloc(&sdev->dev, sizeof(*rinfo), GFP_KERNEL);
325
+
if (!rinfo)
326
+
return -ENOMEM;
327
+
328
+
/* Allocate pointers array for all possible domains */
329
+
rinfo->sregv = devm_kcalloc(&sdev->dev, num_doms,
330
+
sizeof(void *), GFP_KERNEL);
331
+
if (!rinfo->sregv)
332
+
return -ENOMEM;
333
+
334
+
rinfo->num_doms = num_doms;
335
+
336
+
/*
337
+
* Start collecting into rinfo->sregv possibly good SCMI Regulators as
338
+
* described by a well-formed DT entry and associated with an existing
339
+
* plausible SCMI Voltage Domain number, all belonging to this SCMI
340
+
* platform instance node (handle->dev->of_node).
341
+
*/
342
+
np = of_find_node_by_name(handle->dev->of_node, "regulators");
343
+
for_each_child_of_node(np, child) {
344
+
ret = process_scmi_regulator_of_node(sdev, child, rinfo);
345
+
/* abort on any mem issue */
346
+
if (ret == -ENOMEM)
347
+
return ret;
348
+
}
349
+
350
+
/*
351
+
* Register a regulator for each valid regulator-DT-entry that we
352
+
* can successfully reach via SCMI and has a valid associated voltage
353
+
* domain.
354
+
*/
355
+
for (d = 0; d < num_doms; d++) {
356
+
struct scmi_regulator *sreg = rinfo->sregv[d];
357
+
358
+
/* Skip empty slots */
359
+
if (!sreg)
360
+
continue;
361
+
362
+
ret = scmi_regulator_common_init(sreg);
363
+
/* Skip invalid voltage domains */
364
+
if (ret)
365
+
continue;
366
+
367
+
sreg->rdev = devm_regulator_register(&sdev->dev, &sreg->desc,
368
+
&sreg->conf);
369
+
if (IS_ERR(sreg->rdev)) {
370
+
sreg->rdev = NULL;
371
+
continue;
372
+
}
373
+
374
+
dev_info(&sdev->dev,
375
+
"Regulator %s registered for domain [%d]\n",
376
+
sreg->desc.name, sreg->id);
377
+
}
378
+
379
+
dev_set_drvdata(&sdev->dev, rinfo);
380
+
381
+
return 0;
382
+
}
383
+
384
+
static void scmi_regulator_remove(struct scmi_device *sdev)
385
+
{
386
+
int d;
387
+
struct scmi_regulator_info *rinfo;
388
+
389
+
rinfo = dev_get_drvdata(&sdev->dev);
390
+
if (!rinfo)
391
+
return;
392
+
393
+
for (d = 0; d < rinfo->num_doms; d++) {
394
+
if (!rinfo->sregv[d])
395
+
continue;
396
+
of_node_put(rinfo->sregv[d]->of_node);
397
+
}
398
+
}
399
+
400
+
static const struct scmi_device_id scmi_regulator_id_table[] = {
401
+
{ SCMI_PROTOCOL_VOLTAGE, "regulator" },
402
+
{ },
403
+
};
404
+
MODULE_DEVICE_TABLE(scmi, scmi_regulator_id_table);
405
+
406
+
static struct scmi_driver scmi_drv = {
407
+
.name = "scmi-regulator",
408
+
.probe = scmi_regulator_probe,
409
+
.remove = scmi_regulator_remove,
410
+
.id_table = scmi_regulator_id_table,
411
+
};
412
+
413
+
module_scmi_driver(scmi_drv);
414
+
415
+
MODULE_AUTHOR("Cristian Marussi <cristian.marussi@arm.com>");
416
+
MODULE_DESCRIPTION("ARM SCMI regulator driver");
417
+
MODULE_LICENSE("GPL v2");
+22
include/dt-bindings/regulator/dlg,da9121-regulator.h
+22
include/dt-bindings/regulator/dlg,da9121-regulator.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0+ */
2
+
3
+
#ifndef _DT_BINDINGS_REGULATOR_DLG_DA9121_H
4
+
#define _DT_BINDINGS_REGULATOR_DLG_DA9121_H
5
+
6
+
/*
7
+
* These buck mode constants may be used to specify values in device tree
8
+
* properties (e.g. regulator-initial-mode).
9
+
* A description of the following modes is in the manufacturers datasheet.
10
+
*/
11
+
12
+
#define DA9121_BUCK_MODE_FORCE_PFM 0
13
+
#define DA9121_BUCK_MODE_FORCE_PWM 1
14
+
#define DA9121_BUCK_MODE_FORCE_PWM_SHEDDING 2
15
+
#define DA9121_BUCK_MODE_AUTO 3
16
+
17
+
#define DA9121_BUCK_RIPPLE_CANCEL_NONE 0
18
+
#define DA9121_BUCK_RIPPLE_CANCEL_SMALL 1
19
+
#define DA9121_BUCK_RIPPLE_CANCEL_MID 2
20
+
#define DA9121_BUCK_RIPPLE_CANCEL_LARGE 3
21
+
22
+
#endif
+36
include/linux/regulator/da9121.h
+36
include/linux/regulator/da9121.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0+ */
2
+
/*
3
+
* DA9121 Single-channel dual-phase 10A buck converter
4
+
* DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5
+
* DA9217 Single-channel dual-phase 6A buck converter
6
+
* DA9122 Dual-channel single-phase 5A buck converter
7
+
* DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8
+
* DA9220 Dual-channel single-phase 3A buck converter
9
+
* DA9132 Dual-channel single-phase 3A buck converter (Automotive)
10
+
*
11
+
* Copyright (C) 2020 Dialog Semiconductor
12
+
*
13
+
* Authors: Adam Ward, Dialog Semiconductor
14
+
*/
15
+
16
+
#ifndef __LINUX_REGULATOR_DA9121_H
17
+
#define __LINUX_REGULATOR_DA9121_H
18
+
19
+
#include <linux/regulator/machine.h>
20
+
21
+
struct gpio_desc;
22
+
23
+
enum {
24
+
DA9121_IDX_BUCK1,
25
+
DA9121_IDX_BUCK2,
26
+
DA9121_IDX_MAX
27
+
};
28
+
29
+
struct da9121_pdata {
30
+
int num_buck;
31
+
struct gpio_desc *gpiod_ren[DA9121_IDX_MAX];
32
+
struct device_node *reg_node[DA9121_IDX_MAX];
33
+
struct regulator_init_data *init_data[DA9121_IDX_MAX];
34
+
};
35
+
36
+
#endif
+3
include/linux/regulator/driver.h
+3
include/linux/regulator/driver.h
···
223
223
* @name: Identifying name for the regulator.
224
224
* @supply_name: Identifying the regulator supply
225
225
* @of_match: Name used to identify regulator in DT.
226
+
* @of_match_full_name: A flag to indicate that the of_match string, if
227
+
* present, should be matched against the node full_name.
226
228
* @regulators_node: Name of node containing regulator definitions in DT.
227
229
* @of_parse_cb: Optional callback called only if of_match is present.
228
230
* Will be called for each regulator parsed from DT, during
···
316
314
const char *name;
317
315
const char *supply_name;
318
316
const char *of_match;
317
+
bool of_match_full_name;
319
318
const char *regulators_node;
320
319
int (*of_parse_cb)(struct device_node *,
321
320
const struct regulator_desc *,
-6
include/linux/regulator/pfuze100.h
-6
include/linux/regulator/pfuze100.h
+64
include/linux/scmi_protocol.h
+64
include/linux/scmi_protocol.h
···
210
210
};
211
211
212
212
/**
213
+
* struct scmi_voltage_info - describe one available SCMI Voltage Domain
214
+
*
215
+
* @id: the domain ID as advertised by the platform
216
+
* @segmented: defines the layout of the entries of array @levels_uv.
217
+
* - when True the entries are to be interpreted as triplets,
218
+
* each defining a segment representing a range of equally
219
+
* space voltages: <lowest_volts>, <highest_volt>, <step_uV>
220
+
* - when False the entries simply represent a single discrete
221
+
* supported voltage level
222
+
* @negative_volts_allowed: True if any of the entries of @levels_uv represent
223
+
* a negative voltage.
224
+
* @attributes: represents Voltage Domain advertised attributes
225
+
* @name: name assigned to the Voltage Domain by platform
226
+
* @num_levels: number of total entries in @levels_uv.
227
+
* @levels_uv: array of entries describing the available voltage levels for
228
+
* this domain.
229
+
*/
230
+
struct scmi_voltage_info {
231
+
unsigned int id;
232
+
bool segmented;
233
+
bool negative_volts_allowed;
234
+
unsigned int attributes;
235
+
char name[SCMI_MAX_STR_SIZE];
236
+
unsigned int num_levels;
237
+
#define SCMI_VOLTAGE_SEGMENT_LOW 0
238
+
#define SCMI_VOLTAGE_SEGMENT_HIGH 1
239
+
#define SCMI_VOLTAGE_SEGMENT_STEP 2
240
+
int *levels_uv;
241
+
};
242
+
243
+
/**
244
+
* struct scmi_voltage_ops - represents the various operations provided
245
+
* by SCMI Voltage Protocol
246
+
*
247
+
* @num_domains_get: get the count of voltage domains provided by SCMI
248
+
* @info_get: get the information of the specified domain
249
+
* @config_set: set the config for the specified domain
250
+
* @config_get: get the config of the specified domain
251
+
* @level_set: set the voltage level for the specified domain
252
+
* @level_get: get the voltage level of the specified domain
253
+
*/
254
+
struct scmi_voltage_ops {
255
+
int (*num_domains_get)(const struct scmi_handle *handle);
256
+
const struct scmi_voltage_info __must_check *(*info_get)
257
+
(const struct scmi_handle *handle, u32 domain_id);
258
+
int (*config_set)(const struct scmi_handle *handle, u32 domain_id,
259
+
u32 config);
260
+
#define SCMI_VOLTAGE_ARCH_STATE_OFF 0x0
261
+
#define SCMI_VOLTAGE_ARCH_STATE_ON 0x7
262
+
int (*config_get)(const struct scmi_handle *handle, u32 domain_id,
263
+
u32 *config);
264
+
int (*level_set)(const struct scmi_handle *handle, u32 domain_id,
265
+
u32 flags, s32 volt_uV);
266
+
int (*level_get)(const struct scmi_handle *handle, u32 domain_id,
267
+
s32 *volt_uV);
268
+
};
269
+
270
+
/**
213
271
* struct scmi_notify_ops - represents notifications' operations provided by
214
272
* SCMI core
215
273
* @register_event_notifier: Register a notifier_block for the requested event
···
320
262
* @clk_ops: pointer to set of clock protocol operations
321
263
* @sensor_ops: pointer to set of sensor protocol operations
322
264
* @reset_ops: pointer to set of reset protocol operations
265
+
* @voltage_ops: pointer to set of voltage protocol operations
323
266
* @notify_ops: pointer to set of notifications related operations
324
267
* @perf_priv: pointer to private data structure specific to performance
325
268
* protocol(for internal use only)
···
331
272
* @sensor_priv: pointer to private data structure specific to sensors
332
273
* protocol(for internal use only)
333
274
* @reset_priv: pointer to private data structure specific to reset
275
+
* protocol(for internal use only)
276
+
* @voltage_priv: pointer to private data structure specific to voltage
334
277
* protocol(for internal use only)
335
278
* @notify_priv: pointer to private data structure specific to notifications
336
279
* (for internal use only)
···
345
284
const struct scmi_power_ops *power_ops;
346
285
const struct scmi_sensor_ops *sensor_ops;
347
286
const struct scmi_reset_ops *reset_ops;
287
+
const struct scmi_voltage_ops *voltage_ops;
348
288
const struct scmi_notify_ops *notify_ops;
349
289
/* for protocol internal use */
350
290
void *perf_priv;
···
353
291
void *power_priv;
354
292
void *sensor_priv;
355
293
void *reset_priv;
294
+
void *voltage_priv;
356
295
void *notify_priv;
357
296
void *system_priv;
358
297
};
···
366
303
SCMI_PROTOCOL_CLOCK = 0x14,
367
304
SCMI_PROTOCOL_SENSOR = 0x15,
368
305
SCMI_PROTOCOL_RESET = 0x16,
306
+
SCMI_PROTOCOL_VOLTAGE = 0x17,
369
307
};
370
308
371
309
enum scmi_system_events {