Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mmc-v6.1-rc5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC fixes from Ulf Hansson:
"MMC core:
- Fix ambiguous TRIM and DISCARD args
- Fix removal of debugfs file for mmc_test
MMC host:
- mtk-sd: Add missing clk_disable_unprepare() in an error path
- sdhci: Fix I/O voltage switch delay for UHS-I SD cards
- sdhci-esdhc-imx: Fix CQHCI exit halt state check
- sdhci-sprd: Fix voltage switch"
* tag 'mmc-v6.1-rc5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
mmc: sdhci-sprd: Fix no reset data and command after voltage switch
mmc: sdhci: Fix voltage switch delay
mmc: mtk-sd: Fix missing clk_disable_unprepare in msdc_of_clock_parse()
mmc: mmc_test: Fix removal of debugfs file
mmc: sdhci-esdhc-imx: correct CQHCI exit halt state check
mmc: core: Fix ambiguous TRIM and DISCARD arg
+72
-17
+7
-2
drivers/mmc/core/core.c
+7
-2
drivers/mmc/core/core.c
···
1484
1484
card->pref_erase = 0;
1485
1485
}
1486
1486
1487
+
static bool is_trim_arg(unsigned int arg)
1488
+
{
1489
+
return (arg & MMC_TRIM_OR_DISCARD_ARGS) && arg != MMC_DISCARD_ARG;
1490
+
}
1491
+
1487
1492
static unsigned int mmc_mmc_erase_timeout(struct mmc_card *card,
1488
1493
unsigned int arg, unsigned int qty)
1489
1494
{
···
1771
1766
!(card->ext_csd.sec_feature_support & EXT_CSD_SEC_ER_EN))
1772
1767
return -EOPNOTSUPP;
1773
1768
1774
-
if (mmc_card_mmc(card) && (arg & MMC_TRIM_ARGS) &&
1769
+
if (mmc_card_mmc(card) && is_trim_arg(arg) &&
1775
1770
!(card->ext_csd.sec_feature_support & EXT_CSD_SEC_GB_CL_EN))
1776
1771
return -EOPNOTSUPP;
1777
1772
···
1801
1796
* identified by the card->eg_boundary flag.
1802
1797
*/
1803
1798
rem = card->erase_size - (from % card->erase_size);
1804
-
if ((arg & MMC_TRIM_ARGS) && (card->eg_boundary) && (nr > rem)) {
1799
+
if ((arg & MMC_TRIM_OR_DISCARD_ARGS) && card->eg_boundary && nr > rem) {
1805
1800
err = mmc_do_erase(card, from, from + rem - 1, arg);
1806
1801
from += rem;
1807
1802
if ((err) || (to <= from))
+2
-1
drivers/mmc/core/mmc_test.c
+2
-1
drivers/mmc/core/mmc_test.c
···
3179
3179
struct mmc_test_dbgfs_file *df;
3180
3180
3181
3181
if (card->debugfs_root)
3182
-
debugfs_create_file(name, mode, card->debugfs_root, card, fops);
3182
+
file = debugfs_create_file(name, mode, card->debugfs_root,
3183
+
card, fops);
3183
3184
3184
3185
df = kmalloc(sizeof(*df), GFP_KERNEL);
3185
3186
if (!df) {
+2
-4
drivers/mmc/host/mtk-sd.c
+2
-4
drivers/mmc/host/mtk-sd.c
···
2588
2588
return PTR_ERR(host->src_clk_cg);
2589
2589
}
2590
2590
2591
-
host->sys_clk_cg = devm_clk_get_optional(&pdev->dev, "sys_cg");
2591
+
/* If present, always enable for this clock gate */
2592
+
host->sys_clk_cg = devm_clk_get_optional_enabled(&pdev->dev, "sys_cg");
2592
2593
if (IS_ERR(host->sys_clk_cg))
2593
2594
host->sys_clk_cg = NULL;
2594
-
2595
-
/* If present, always enable for this clock gate */
2596
-
clk_prepare_enable(host->sys_clk_cg);
2597
2595
2598
2596
host->bulk_clks[0].id = "pclk_cg";
2599
2597
host->bulk_clks[1].id = "axi_cg";
+1
-1
drivers/mmc/host/sdhci-esdhc-imx.c
+1
-1
drivers/mmc/host/sdhci-esdhc-imx.c
···
1512
1512
* system resume back.
1513
1513
*/
1514
1514
cqhci_writel(cq_host, 0, CQHCI_CTL);
1515
-
if (cqhci_readl(cq_host, CQHCI_CTL) && CQHCI_HALT)
1515
+
if (cqhci_readl(cq_host, CQHCI_CTL) & CQHCI_HALT)
1516
1516
dev_err(mmc_dev(host->mmc),
1517
1517
"failed to exit halt state when enable CQE\n");
1518
1518
+3
-1
drivers/mmc/host/sdhci-sprd.c
+3
-1
drivers/mmc/host/sdhci-sprd.c
···
470
470
}
471
471
472
472
if (IS_ERR(sprd_host->pinctrl))
473
-
return 0;
473
+
goto reset;
474
474
475
475
switch (ios->signal_voltage) {
476
476
case MMC_SIGNAL_VOLTAGE_180:
···
498
498
499
499
/* Wait for 300 ~ 500 us for pin state stable */
500
500
usleep_range(300, 500);
501
+
502
+
reset:
501
503
sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
502
504
503
505
return 0;
+54
-7
drivers/mmc/host/sdhci.c
+54
-7
drivers/mmc/host/sdhci.c
···
373
373
if (soft) {
374
374
/* force clock reconfiguration */
375
375
host->clock = 0;
376
+
host->reinit_uhs = true;
376
377
mmc->ops->set_ios(mmc, &mmc->ios);
377
378
}
378
379
}
···
2294
2293
}
2295
2294
EXPORT_SYMBOL_GPL(sdhci_set_uhs_signaling);
2296
2295
2296
+
static bool sdhci_timing_has_preset(unsigned char timing)
2297
+
{
2298
+
switch (timing) {
2299
+
case MMC_TIMING_UHS_SDR12:
2300
+
case MMC_TIMING_UHS_SDR25:
2301
+
case MMC_TIMING_UHS_SDR50:
2302
+
case MMC_TIMING_UHS_SDR104:
2303
+
case MMC_TIMING_UHS_DDR50:
2304
+
case MMC_TIMING_MMC_DDR52:
2305
+
return true;
2306
+
};
2307
+
return false;
2308
+
}
2309
+
2310
+
static bool sdhci_preset_needed(struct sdhci_host *host, unsigned char timing)
2311
+
{
2312
+
return !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN) &&
2313
+
sdhci_timing_has_preset(timing);
2314
+
}
2315
+
2316
+
static bool sdhci_presetable_values_change(struct sdhci_host *host, struct mmc_ios *ios)
2317
+
{
2318
+
/*
2319
+
* Preset Values are: Driver Strength, Clock Generator and SDCLK/RCLK
2320
+
* Frequency. Check if preset values need to be enabled, or the Driver
2321
+
* Strength needs updating. Note, clock changes are handled separately.
2322
+
*/
2323
+
return !host->preset_enabled &&
2324
+
(sdhci_preset_needed(host, ios->timing) || host->drv_type != ios->drv_type);
2325
+
}
2326
+
2297
2327
void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
2298
2328
{
2299
2329
struct sdhci_host *host = mmc_priv(mmc);
2330
+
bool reinit_uhs = host->reinit_uhs;
2331
+
bool turning_on_clk = false;
2300
2332
u8 ctrl;
2333
+
2334
+
host->reinit_uhs = false;
2301
2335
2302
2336
if (ios->power_mode == MMC_POWER_UNDEFINED)
2303
2337
return;
···
2359
2323
sdhci_enable_preset_value(host, false);
2360
2324
2361
2325
if (!ios->clock || ios->clock != host->clock) {
2326
+
turning_on_clk = ios->clock && !host->clock;
2327
+
2362
2328
host->ops->set_clock(host, ios->clock);
2363
2329
host->clock = ios->clock;
2364
2330
···
2386
2348
host->ops->platform_send_init_74_clocks(host, ios->power_mode);
2387
2349
2388
2350
host->ops->set_bus_width(host, ios->bus_width);
2351
+
2352
+
/*
2353
+
* Special case to avoid multiple clock changes during voltage
2354
+
* switching.
2355
+
*/
2356
+
if (!reinit_uhs &&
2357
+
turning_on_clk &&
2358
+
host->timing == ios->timing &&
2359
+
host->version >= SDHCI_SPEC_300 &&
2360
+
!sdhci_presetable_values_change(host, ios))
2361
+
return;
2389
2362
2390
2363
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
2391
2364
···
2441
2392
}
2442
2393
2443
2394
sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
2395
+
host->drv_type = ios->drv_type;
2444
2396
} else {
2445
2397
/*
2446
2398
* According to SDHC Spec v3.00, if the Preset Value
···
2469
2419
host->ops->set_uhs_signaling(host, ios->timing);
2470
2420
host->timing = ios->timing;
2471
2421
2472
-
if (!(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN) &&
2473
-
((ios->timing == MMC_TIMING_UHS_SDR12) ||
2474
-
(ios->timing == MMC_TIMING_UHS_SDR25) ||
2475
-
(ios->timing == MMC_TIMING_UHS_SDR50) ||
2476
-
(ios->timing == MMC_TIMING_UHS_SDR104) ||
2477
-
(ios->timing == MMC_TIMING_UHS_DDR50) ||
2478
-
(ios->timing == MMC_TIMING_MMC_DDR52))) {
2422
+
if (sdhci_preset_needed(host, ios->timing)) {
2479
2423
u16 preset;
2480
2424
2481
2425
sdhci_enable_preset_value(host, true);
2482
2426
preset = sdhci_get_preset_value(host);
2483
2427
ios->drv_type = FIELD_GET(SDHCI_PRESET_DRV_MASK,
2484
2428
preset);
2429
+
host->drv_type = ios->drv_type;
2485
2430
}
2486
2431
2487
2432
/* Re-enable SD Clock */
···
3813
3768
sdhci_init(host, 0);
3814
3769
host->pwr = 0;
3815
3770
host->clock = 0;
3771
+
host->reinit_uhs = true;
3816
3772
mmc->ops->set_ios(mmc, &mmc->ios);
3817
3773
} else {
3818
3774
sdhci_init(host, (mmc->pm_flags & MMC_PM_KEEP_POWER));
···
3876
3830
/* Force clock and power re-program */
3877
3831
host->pwr = 0;
3878
3832
host->clock = 0;
3833
+
host->reinit_uhs = true;
3879
3834
mmc->ops->start_signal_voltage_switch(mmc, &mmc->ios);
3880
3835
mmc->ops->set_ios(mmc, &mmc->ios);
3881
3836
+2
drivers/mmc/host/sdhci.h
+2
drivers/mmc/host/sdhci.h
···
524
524
525
525
unsigned int clock; /* Current clock (MHz) */
526
526
u8 pwr; /* Current voltage */
527
+
u8 drv_type; /* Current UHS-I driver type */
528
+
bool reinit_uhs; /* Force UHS-related re-initialization */
527
529
528
530
bool runtime_suspended; /* Host is runtime suspended */
529
531
bool bus_on; /* Bus power prevents runtime suspend */
+1
-1
include/linux/mmc/mmc.h
+1
-1
include/linux/mmc/mmc.h