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arm64/sysreg: Add ICH_HFGRTR_EL2

Add ICH_HFGRTR_EL2 register description.

Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20250703-gicv5-host-v7-12-12e71f1b3528@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>

authored by

Lorenzo Pieralisi and committed by
Marc Zyngier 2e00c546 f987581a

+18
+18
arch/arm64/tools/sysreg
··· 4434 4434 Field 15:0 PhyPARTID28 4435 4435 EndSysreg 4436 4436 4437 + Sysreg ICH_HFGRTR_EL2 3 4 12 9 4 4438 + Res0 63:21 4439 + Field 20 ICC_PPI_ACTIVERn_EL1 4440 + Field 19 ICC_PPI_PRIORITYRn_EL1 4441 + Field 18 ICC_PPI_PENDRn_EL1 4442 + Field 17 ICC_PPI_ENABLERn_EL1 4443 + Field 16 ICC_PPI_HMRn_EL1 4444 + Res0 15:8 4445 + Field 7 ICC_IAFFIDR_EL1 4446 + Field 6 ICC_ICSR_EL1 4447 + Field 5 ICC_PCR_EL1 4448 + Field 4 ICC_HPPIR_EL1 4449 + Field 3 ICC_HAPR_EL1 4450 + Field 2 ICC_CR0_EL1 4451 + Field 1 ICC_IDRn_EL1 4452 + Field 0 ICC_APR_EL1 4453 + EndSysreg 4454 + 4437 4455 Sysreg ICH_HCR_EL2 3 4 12 11 0 4438 4456 Res0 63:32 4439 4457 Field 31:27 EOIcount