Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'pci-v6.7-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci
Pull pci fixes from Bjorn Helgaas:
- Limit Max_Read_Request_Size (MRRS) on some MIPS Loongson systems
because they don't all support MRRS > 256, and firmware doesn't
always initialize it correctly, which meant some PCIe devices didn't
work (Jiaxun Yang)
- Add and use pci_enable_link_state_locked() to prevent potential
deadlocks in vmd and qcom drivers (Johan Hovold)
- Revert recent (v6.5) acpiphp resource assignment changes that fixed
issues with hot-adding devices on a root bus or with large BARs, but
introduced new issues with GPU initialization and hot-adding SCSI
disks in QEMU VMs and (Bjorn Helgaas)
* tag 'pci-v6.7-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci:
Revert "PCI: acpiphp: Reassign resources on bridge if necessary"
PCI/ASPM: Add pci_disable_link_state_locked() lockdep assert
PCI/ASPM: Clean up __pci_disable_link_state() 'sem' parameter
PCI: qcom: Clean up ASPM comment
PCI: qcom: Fix potential deadlock when enabling ASPM
PCI: vmd: Fix potential deadlock when enabling ASPM
PCI/ASPM: Add pci_enable_link_state_locked()
PCI: loongson: Limit MRRS to 256
+100
-32
+5
-2
drivers/pci/controller/dwc/pcie-qcom.c
+5
-2
drivers/pci/controller/dwc/pcie-qcom.c
···
968
968
969
969
static int qcom_pcie_enable_aspm(struct pci_dev *pdev, void *userdata)
970
970
{
971
-
/* Downstream devices need to be in D0 state before enabling PCI PM substates */
971
+
/*
972
+
* Downstream devices need to be in D0 state before enabling PCI PM
973
+
* substates.
974
+
*/
972
975
pci_set_power_state(pdev, PCI_D0);
973
-
pci_enable_link_state(pdev, PCIE_LINK_STATE_ALL);
976
+
pci_enable_link_state_locked(pdev, PCIE_LINK_STATE_ALL);
974
977
975
978
return 0;
976
979
}
+41
-5
drivers/pci/controller/pci-loongson.c
+41
-5
drivers/pci/controller/pci-loongson.c
···
80
80
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
81
81
DEV_LS7A_LPC, system_bus_quirk);
82
82
83
+
/*
84
+
* Some Loongson PCIe ports have hardware limitations on their Maximum Read
85
+
* Request Size. They can't handle anything larger than this. Sane
86
+
* firmware will set proper MRRS at boot, so we only need no_inc_mrrs for
87
+
* bridges. However, some MIPS Loongson firmware doesn't set MRRS properly,
88
+
* so we have to enforce maximum safe MRRS, which is 256 bytes.
89
+
*/
90
+
#ifdef CONFIG_MIPS
91
+
static void loongson_set_min_mrrs_quirk(struct pci_dev *pdev)
92
+
{
93
+
struct pci_bus *bus = pdev->bus;
94
+
struct pci_dev *bridge;
95
+
static const struct pci_device_id bridge_devids[] = {
96
+
{ PCI_VDEVICE(LOONGSON, DEV_LS2K_PCIE_PORT0) },
97
+
{ PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT0) },
98
+
{ PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT1) },
99
+
{ PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT2) },
100
+
{ PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT3) },
101
+
{ PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT4) },
102
+
{ PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT5) },
103
+
{ PCI_VDEVICE(LOONGSON, DEV_LS7A_PCIE_PORT6) },
104
+
{ 0, },
105
+
};
106
+
107
+
/* look for the matching bridge */
108
+
while (!pci_is_root_bus(bus)) {
109
+
bridge = bus->self;
110
+
bus = bus->parent;
111
+
112
+
if (pci_match_id(bridge_devids, bridge)) {
113
+
if (pcie_get_readrq(pdev) > 256) {
114
+
pci_info(pdev, "limiting MRRS to 256\n");
115
+
pcie_set_readrq(pdev, 256);
116
+
}
117
+
break;
118
+
}
119
+
}
120
+
}
121
+
DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, loongson_set_min_mrrs_quirk);
122
+
#endif
123
+
83
124
static void loongson_mrrs_quirk(struct pci_dev *pdev)
84
125
{
85
-
/*
86
-
* Some Loongson PCIe ports have h/w limitations of maximum read
87
-
* request size. They can't handle anything larger than this. So
88
-
* force this limit on any devices attached under these ports.
89
-
*/
90
126
struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus);
91
127
92
128
bridge->no_inc_mrrs = 1;
+1
-1
drivers/pci/controller/vmd.c
+1
-1
drivers/pci/controller/vmd.c
+3
-6
drivers/pci/hotplug/acpiphp_glue.c
+3
-6
drivers/pci/hotplug/acpiphp_glue.c
···
512
512
if (pass && dev->subordinate) {
513
513
check_hotplug_bridge(slot, dev);
514
514
pcibios_resource_survey_bus(dev->subordinate);
515
-
if (pci_is_root_bus(bus))
516
-
__pci_bus_size_bridges(dev->subordinate, &add_list);
515
+
__pci_bus_size_bridges(dev->subordinate,
516
+
&add_list);
517
517
}
518
518
}
519
519
}
520
-
if (pci_is_root_bus(bus))
521
-
__pci_bus_assign_resources(bus, &add_list, NULL);
522
-
else
523
-
pci_assign_unassigned_bridge_resources(bus->self);
520
+
__pci_bus_assign_resources(bus, &add_list, NULL);
524
521
}
525
522
526
523
acpiphp_sanitize_bus(bus);
+47
-18
drivers/pci/pcie/aspm.c
+47
-18
drivers/pci/pcie/aspm.c
···
1041
1041
return bridge->link_state;
1042
1042
}
1043
1043
1044
-
static int __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem)
1044
+
static int __pci_disable_link_state(struct pci_dev *pdev, int state, bool locked)
1045
1045
{
1046
1046
struct pcie_link_state *link = pcie_aspm_get_link(pdev);
1047
1047
···
1060
1060
return -EPERM;
1061
1061
}
1062
1062
1063
-
if (sem)
1063
+
if (!locked)
1064
1064
down_read(&pci_bus_sem);
1065
1065
mutex_lock(&aspm_lock);
1066
1066
if (state & PCIE_LINK_STATE_L0S)
···
1082
1082
link->clkpm_disable = 1;
1083
1083
pcie_set_clkpm(link, policy_to_clkpm_state(link));
1084
1084
mutex_unlock(&aspm_lock);
1085
-
if (sem)
1085
+
if (!locked)
1086
1086
up_read(&pci_bus_sem);
1087
1087
1088
1088
return 0;
···
1090
1090
1091
1091
int pci_disable_link_state_locked(struct pci_dev *pdev, int state)
1092
1092
{
1093
-
return __pci_disable_link_state(pdev, state, false);
1093
+
lockdep_assert_held_read(&pci_bus_sem);
1094
+
1095
+
return __pci_disable_link_state(pdev, state, true);
1094
1096
}
1095
1097
EXPORT_SYMBOL(pci_disable_link_state_locked);
1096
1098
···
1107
1105
*/
1108
1106
int pci_disable_link_state(struct pci_dev *pdev, int state)
1109
1107
{
1110
-
return __pci_disable_link_state(pdev, state, true);
1108
+
return __pci_disable_link_state(pdev, state, false);
1111
1109
}
1112
1110
EXPORT_SYMBOL(pci_disable_link_state);
1113
1111
1114
-
/**
1115
-
* pci_enable_link_state - Clear and set the default device link state so that
1116
-
* the link may be allowed to enter the specified states. Note that if the
1117
-
* BIOS didn't grant ASPM control to the OS, this does nothing because we can't
1118
-
* touch the LNKCTL register. Also note that this does not enable states
1119
-
* disabled by pci_disable_link_state(). Return 0 or a negative errno.
1120
-
*
1121
-
* @pdev: PCI device
1122
-
* @state: Mask of ASPM link states to enable
1123
-
*/
1124
-
int pci_enable_link_state(struct pci_dev *pdev, int state)
1112
+
static int __pci_enable_link_state(struct pci_dev *pdev, int state, bool locked)
1125
1113
{
1126
1114
struct pcie_link_state *link = pcie_aspm_get_link(pdev);
1127
1115
···
1128
1136
return -EPERM;
1129
1137
}
1130
1138
1131
-
down_read(&pci_bus_sem);
1139
+
if (!locked)
1140
+
down_read(&pci_bus_sem);
1132
1141
mutex_lock(&aspm_lock);
1133
1142
link->aspm_default = 0;
1134
1143
if (state & PCIE_LINK_STATE_L0S)
···
1150
1157
link->clkpm_default = (state & PCIE_LINK_STATE_CLKPM) ? 1 : 0;
1151
1158
pcie_set_clkpm(link, policy_to_clkpm_state(link));
1152
1159
mutex_unlock(&aspm_lock);
1153
-
up_read(&pci_bus_sem);
1160
+
if (!locked)
1161
+
up_read(&pci_bus_sem);
1154
1162
1155
1163
return 0;
1156
1164
}
1165
+
1166
+
/**
1167
+
* pci_enable_link_state - Clear and set the default device link state so that
1168
+
* the link may be allowed to enter the specified states. Note that if the
1169
+
* BIOS didn't grant ASPM control to the OS, this does nothing because we can't
1170
+
* touch the LNKCTL register. Also note that this does not enable states
1171
+
* disabled by pci_disable_link_state(). Return 0 or a negative errno.
1172
+
*
1173
+
* @pdev: PCI device
1174
+
* @state: Mask of ASPM link states to enable
1175
+
*/
1176
+
int pci_enable_link_state(struct pci_dev *pdev, int state)
1177
+
{
1178
+
return __pci_enable_link_state(pdev, state, false);
1179
+
}
1157
1180
EXPORT_SYMBOL(pci_enable_link_state);
1181
+
1182
+
/**
1183
+
* pci_enable_link_state_locked - Clear and set the default device link state
1184
+
* so that the link may be allowed to enter the specified states. Note that if
1185
+
* the BIOS didn't grant ASPM control to the OS, this does nothing because we
1186
+
* can't touch the LNKCTL register. Also note that this does not enable states
1187
+
* disabled by pci_disable_link_state(). Return 0 or a negative errno.
1188
+
*
1189
+
* @pdev: PCI device
1190
+
* @state: Mask of ASPM link states to enable
1191
+
*
1192
+
* Context: Caller holds pci_bus_sem read lock.
1193
+
*/
1194
+
int pci_enable_link_state_locked(struct pci_dev *pdev, int state)
1195
+
{
1196
+
lockdep_assert_held_read(&pci_bus_sem);
1197
+
1198
+
return __pci_enable_link_state(pdev, state, true);
1199
+
}
1200
+
EXPORT_SYMBOL(pci_enable_link_state_locked);
1158
1201
1159
1202
static int pcie_aspm_set_policy(const char *val,
1160
1203
const struct kernel_param *kp)
+3
include/linux/pci.h
+3
include/linux/pci.h
···
1829
1829
int pci_disable_link_state(struct pci_dev *pdev, int state);
1830
1830
int pci_disable_link_state_locked(struct pci_dev *pdev, int state);
1831
1831
int pci_enable_link_state(struct pci_dev *pdev, int state);
1832
+
int pci_enable_link_state_locked(struct pci_dev *pdev, int state);
1832
1833
void pcie_no_aspm(void);
1833
1834
bool pcie_aspm_support_enabled(void);
1834
1835
bool pcie_aspm_enabled(struct pci_dev *pdev);
···
1839
1838
static inline int pci_disable_link_state_locked(struct pci_dev *pdev, int state)
1840
1839
{ return 0; }
1841
1840
static inline int pci_enable_link_state(struct pci_dev *pdev, int state)
1841
+
{ return 0; }
1842
+
static inline int pci_enable_link_state_locked(struct pci_dev *pdev, int state)
1842
1843
{ return 0; }
1843
1844
static inline void pcie_no_aspm(void) { }
1844
1845
static inline bool pcie_aspm_support_enabled(void) { return false; }