Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"Intel, radeon and exynos fixes. Nothing too major or wierd: one dmar
fix and a radeon cursor corruption, along with misc exynos fixes."
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (21 commits)
drm/exynos: add check for the device power status
drm/exynos: Make 'drm_hdmi_get_edid' static
drm/exynos: fimd and ipp are broken on multiplatform
drm/exynos: don't include plat/gpio-cfg.h
drm/exynos: Remove "internal" interrupt handling
drm/exynos: Add missing static specifiers in exynos_drm_rotator.c
drm/exynos: Replace mdelay with usleep_range
drm/exynos: Make ipp_handle_cmd_work static
drm/exynos: Make g2d_userptr_get_dma_addr static
drm/exynos: consider DMA_NONE flag to dmabuf import
drm/exynos: free sg object if dma_map_sg is failed
drm/exynos: added validation of edid for vidi connection
drm/exynos: let drm handle edid allocations
drm/radeon: Enable DMA_IB_SWAP_ENABLE on big endian hosts.
drm/radeon: fix a rare case of double kfree
radeon_display: Use pointer return error codes
drm/radeon: fix cursor corruption on DCE6 and newer
drm/i915: dump UTS_RELEASE into the error_state
iommu/intel: disable DMAR for g4x integrated gfx
drm/i915: GFX_MODE Flush TLB Invalidate Mode must be '1' for scanline waits
...
+155
-158
+2
-2
drivers/gpu/drm/exynos/Kconfig
+2
-2
drivers/gpu/drm/exynos/Kconfig
···
24
24
25
25
config DRM_EXYNOS_FIMD
26
26
bool "Exynos DRM FIMD"
27
-
depends on DRM_EXYNOS && !FB_S3C
27
+
depends on DRM_EXYNOS && !FB_S3C && !ARCH_MULTIPLATFORM
28
28
help
29
29
Choose this option if you want to use Exynos FIMD for DRM.
30
30
···
48
48
49
49
config DRM_EXYNOS_IPP
50
50
bool "Exynos DRM IPP"
51
-
depends on DRM_EXYNOS
51
+
depends on DRM_EXYNOS && !ARCH_MULTIPLATFORM
52
52
help
53
53
Choose this option if you want to use IPP feature for DRM.
54
54
+15
-18
drivers/gpu/drm/exynos/exynos_drm_connector.c
+15
-18
drivers/gpu/drm/exynos/exynos_drm_connector.c
···
18
18
#include "exynos_drm_drv.h"
19
19
#include "exynos_drm_encoder.h"
20
20
21
-
#define MAX_EDID 256
22
21
#define to_exynos_connector(x) container_of(x, struct exynos_drm_connector,\
23
22
drm_connector)
24
23
···
95
96
to_exynos_connector(connector);
96
97
struct exynos_drm_manager *manager = exynos_connector->manager;
97
98
struct exynos_drm_display_ops *display_ops = manager->display_ops;
98
-
unsigned int count;
99
+
struct edid *edid = NULL;
100
+
unsigned int count = 0;
101
+
int ret;
99
102
100
103
DRM_DEBUG_KMS("%s\n", __FILE__);
101
104
···
115
114
* because lcd panel has only one mode.
116
115
*/
117
116
if (display_ops->get_edid) {
118
-
int ret;
119
-
void *edid;
120
-
121
-
edid = kzalloc(MAX_EDID, GFP_KERNEL);
122
-
if (!edid) {
123
-
DRM_ERROR("failed to allocate edid\n");
124
-
return 0;
117
+
edid = display_ops->get_edid(manager->dev, connector);
118
+
if (IS_ERR_OR_NULL(edid)) {
119
+
ret = PTR_ERR(edid);
120
+
edid = NULL;
121
+
DRM_ERROR("Panel operation get_edid failed %d\n", ret);
122
+
goto out;
125
123
}
126
124
127
-
ret = display_ops->get_edid(manager->dev, connector,
128
-
edid, MAX_EDID);
129
-
if (ret < 0) {
130
-
DRM_ERROR("failed to get edid data.\n");
131
-
kfree(edid);
132
-
edid = NULL;
133
-
return 0;
125
+
count = drm_add_edid_modes(connector, edid);
126
+
if (count < 0) {
127
+
DRM_ERROR("Add edid modes failed %d\n", count);
128
+
goto out;
134
129
}
135
130
136
131
drm_mode_connector_update_edid_property(connector, edid);
137
-
count = drm_add_edid_modes(connector, edid);
138
-
kfree(edid);
139
132
} else {
140
133
struct exynos_drm_panel_info *panel;
141
134
struct drm_display_mode *mode = drm_mode_create(connector->dev);
···
156
161
count = 1;
157
162
}
158
163
164
+
out:
165
+
kfree(edid);
159
166
return count;
160
167
}
161
168
+11
-13
drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
+11
-13
drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
···
19
19
struct exynos_drm_dmabuf_attachment {
20
20
struct sg_table sgt;
21
21
enum dma_data_direction dir;
22
+
bool is_mapped;
22
23
};
23
24
24
25
static int exynos_gem_attach_dma_buf(struct dma_buf *dmabuf,
···
73
72
74
73
DRM_DEBUG_PRIME("%s\n", __FILE__);
75
74
76
-
if (WARN_ON(dir == DMA_NONE))
77
-
return ERR_PTR(-EINVAL);
78
-
79
75
/* just return current sgt if already requested. */
80
-
if (exynos_attach->dir == dir)
76
+
if (exynos_attach->dir == dir && exynos_attach->is_mapped)
81
77
return &exynos_attach->sgt;
82
-
83
-
/* reattaching is not allowed. */
84
-
if (WARN_ON(exynos_attach->dir != DMA_NONE))
85
-
return ERR_PTR(-EBUSY);
86
78
87
79
buf = gem_obj->buffer;
88
80
if (!buf) {
···
101
107
wr = sg_next(wr);
102
108
}
103
109
104
-
nents = dma_map_sg(attach->dev, sgt->sgl, sgt->orig_nents, dir);
105
-
if (!nents) {
106
-
DRM_ERROR("failed to map sgl with iommu.\n");
107
-
sgt = ERR_PTR(-EIO);
108
-
goto err_unlock;
110
+
if (dir != DMA_NONE) {
111
+
nents = dma_map_sg(attach->dev, sgt->sgl, sgt->orig_nents, dir);
112
+
if (!nents) {
113
+
DRM_ERROR("failed to map sgl with iommu.\n");
114
+
sg_free_table(sgt);
115
+
sgt = ERR_PTR(-EIO);
116
+
goto err_unlock;
117
+
}
109
118
}
110
119
120
+
exynos_attach->is_mapped = true;
111
121
exynos_attach->dir = dir;
112
122
attach->priv = exynos_attach;
113
123
+2
-2
drivers/gpu/drm/exynos/exynos_drm_drv.h
+2
-2
drivers/gpu/drm/exynos/exynos_drm_drv.h
···
148
148
struct exynos_drm_display_ops {
149
149
enum exynos_drm_output_type type;
150
150
bool (*is_connected)(struct device *dev);
151
-
int (*get_edid)(struct device *dev, struct drm_connector *connector,
152
-
u8 *edid, int len);
151
+
struct edid *(*get_edid)(struct device *dev,
152
+
struct drm_connector *connector);
153
153
void *(*get_panel)(struct device *dev);
154
154
int (*check_timing)(struct device *dev, void *timing);
155
155
int (*power_on)(struct device *dev, int mode);
+1
-1
drivers/gpu/drm/exynos/exynos_drm_g2d.c
+1
-1
drivers/gpu/drm/exynos/exynos_drm_g2d.c
+4
-5
drivers/gpu/drm/exynos/exynos_drm_hdmi.c
+4
-5
drivers/gpu/drm/exynos/exynos_drm_hdmi.c
···
108
108
return false;
109
109
}
110
110
111
-
static int drm_hdmi_get_edid(struct device *dev,
112
-
struct drm_connector *connector, u8 *edid, int len)
111
+
static struct edid *drm_hdmi_get_edid(struct device *dev,
112
+
struct drm_connector *connector)
113
113
{
114
114
struct drm_hdmi_context *ctx = to_context(dev);
115
115
116
116
DRM_DEBUG_KMS("%s\n", __FILE__);
117
117
118
118
if (hdmi_ops && hdmi_ops->get_edid)
119
-
return hdmi_ops->get_edid(ctx->hdmi_ctx->ctx, connector, edid,
120
-
len);
119
+
return hdmi_ops->get_edid(ctx->hdmi_ctx->ctx, connector);
121
120
122
-
return 0;
121
+
return NULL;
123
122
}
124
123
125
124
static int drm_hdmi_check_timing(struct device *dev, void *timing)
+2
-2
drivers/gpu/drm/exynos/exynos_drm_hdmi.h
+2
-2
drivers/gpu/drm/exynos/exynos_drm_hdmi.h
···
30
30
struct exynos_hdmi_ops {
31
31
/* display */
32
32
bool (*is_connected)(void *ctx);
33
-
int (*get_edid)(void *ctx, struct drm_connector *connector,
34
-
u8 *edid, int len);
33
+
struct edid *(*get_edid)(void *ctx,
34
+
struct drm_connector *connector);
35
35
int (*check_timing)(void *ctx, void *timing);
36
36
int (*power_on)(void *ctx, int mode);
37
37
+1
-1
drivers/gpu/drm/exynos/exynos_drm_ipp.c
+1
-1
drivers/gpu/drm/exynos/exynos_drm_ipp.c
+2
-2
drivers/gpu/drm/exynos/exynos_drm_rotator.c
+2
-2
drivers/gpu/drm/exynos/exynos_drm_rotator.c
···
734
734
return 0;
735
735
}
736
736
737
-
struct rot_limit_table rot_limit_tbl = {
737
+
static struct rot_limit_table rot_limit_tbl = {
738
738
.ycbcr420_2p = {
739
739
.min_w = 32,
740
740
.min_h = 32,
···
751
751
},
752
752
};
753
753
754
-
struct platform_device_id rotator_driver_ids[] = {
754
+
static struct platform_device_id rotator_driver_ids[] = {
755
755
{
756
756
.name = "exynos-rot",
757
757
.driver_data = (unsigned long)&rot_limit_tbl,
+16
-10
drivers/gpu/drm/exynos/exynos_drm_vidi.c
+16
-10
drivers/gpu/drm/exynos/exynos_drm_vidi.c
···
98
98
return ctx->connected ? true : false;
99
99
}
100
100
101
-
static int vidi_get_edid(struct device *dev, struct drm_connector *connector,
102
-
u8 *edid, int len)
101
+
static struct edid *vidi_get_edid(struct device *dev,
102
+
struct drm_connector *connector)
103
103
{
104
104
struct vidi_context *ctx = get_vidi_context(dev);
105
+
struct edid *edid;
106
+
int edid_len;
105
107
106
108
DRM_DEBUG_KMS("%s\n", __FILE__);
107
109
···
113
111
*/
114
112
if (!ctx->raw_edid) {
115
113
DRM_DEBUG_KMS("raw_edid is null.\n");
116
-
return -EFAULT;
114
+
return ERR_PTR(-EFAULT);
117
115
}
118
116
119
-
memcpy(edid, ctx->raw_edid, min((1 + ctx->raw_edid->extensions)
120
-
* EDID_LENGTH, len));
117
+
edid_len = (1 + ctx->raw_edid->extensions) * EDID_LENGTH;
118
+
edid = kzalloc(edid_len, GFP_KERNEL);
119
+
if (!edid) {
120
+
DRM_DEBUG_KMS("failed to allocate edid\n");
121
+
return ERR_PTR(-ENOMEM);
122
+
}
121
123
122
-
return 0;
124
+
memcpy(edid, ctx->raw_edid, edid_len);
125
+
return edid;
123
126
}
124
127
125
128
static void *vidi_get_panel(struct device *dev)
···
521
514
struct exynos_drm_manager *manager;
522
515
struct exynos_drm_display_ops *display_ops;
523
516
struct drm_exynos_vidi_connection *vidi = data;
524
-
struct edid *raw_edid;
525
517
int edid_len;
526
518
527
519
DRM_DEBUG_KMS("%s\n", __FILE__);
···
557
551
}
558
552
559
553
if (vidi->connection) {
560
-
if (!vidi->edid) {
561
-
DRM_DEBUG_KMS("edid data is null.\n");
554
+
struct edid *raw_edid = (struct edid *)(uint32_t)vidi->edid;
555
+
if (!drm_edid_is_valid(raw_edid)) {
556
+
DRM_DEBUG_KMS("edid data is invalid.\n");
562
557
return -EINVAL;
563
558
}
564
-
raw_edid = (struct edid *)(uint32_t)vidi->edid;
565
559
edid_len = (1 + raw_edid->extensions) * EDID_LENGTH;
566
560
ctx->raw_edid = kzalloc(edid_len, GFP_KERNEL);
567
561
if (!ctx->raw_edid) {
+38
-83
drivers/gpu/drm/exynos/exynos_hdmi.c
+38
-83
drivers/gpu/drm/exynos/exynos_hdmi.c
···
34
34
#include <linux/regulator/consumer.h>
35
35
#include <linux/io.h>
36
36
#include <linux/of_gpio.h>
37
-
#include <plat/gpio-cfg.h>
38
37
39
38
#include <drm/exynos_drm.h>
40
39
···
97
98
98
99
void __iomem *regs;
99
100
void *parent_ctx;
100
-
int external_irq;
101
-
int internal_irq;
101
+
int irq;
102
102
103
103
struct i2c_client *ddc_port;
104
104
struct i2c_client *hdmiphy_port;
···
1389
1391
return hdata->hpd;
1390
1392
}
1391
1393
1392
-
static int hdmi_get_edid(void *ctx, struct drm_connector *connector,
1393
-
u8 *edid, int len)
1394
+
static struct edid *hdmi_get_edid(void *ctx, struct drm_connector *connector)
1394
1395
{
1395
1396
struct edid *raw_edid;
1396
1397
struct hdmi_context *hdata = ctx;
···
1397
1400
DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
1398
1401
1399
1402
if (!hdata->ddc_port)
1400
-
return -ENODEV;
1403
+
return ERR_PTR(-ENODEV);
1401
1404
1402
1405
raw_edid = drm_get_edid(connector, hdata->ddc_port->adapter);
1403
-
if (raw_edid) {
1404
-
hdata->dvi_mode = !drm_detect_hdmi_monitor(raw_edid);
1405
-
memcpy(edid, raw_edid, min((1 + raw_edid->extensions)
1406
-
* EDID_LENGTH, len));
1407
-
DRM_DEBUG_KMS("%s : width[%d] x height[%d]\n",
1408
-
(hdata->dvi_mode ? "dvi monitor" : "hdmi monitor"),
1409
-
raw_edid->width_cm, raw_edid->height_cm);
1410
-
kfree(raw_edid);
1411
-
} else {
1412
-
return -ENODEV;
1413
-
}
1406
+
if (!raw_edid)
1407
+
return ERR_PTR(-ENODEV);
1414
1408
1415
-
return 0;
1409
+
hdata->dvi_mode = !drm_detect_hdmi_monitor(raw_edid);
1410
+
DRM_DEBUG_KMS("%s : width[%d] x height[%d]\n",
1411
+
(hdata->dvi_mode ? "dvi monitor" : "hdmi monitor"),
1412
+
raw_edid->width_cm, raw_edid->height_cm);
1413
+
1414
+
return raw_edid;
1416
1415
}
1417
1416
1418
1417
static int hdmi_v13_check_timing(struct fb_videomode *check_timing)
···
1645
1652
1646
1653
/* resetting HDMI core */
1647
1654
hdmi_reg_writemask(hdata, reg, 0, HDMI_CORE_SW_RSTOUT);
1648
-
mdelay(10);
1655
+
usleep_range(10000, 12000);
1649
1656
hdmi_reg_writemask(hdata, reg, ~0, HDMI_CORE_SW_RSTOUT);
1650
-
mdelay(10);
1657
+
usleep_range(10000, 12000);
1651
1658
}
1652
1659
1653
1660
static void hdmi_conf_init(struct hdmi_context *hdata)
1654
1661
{
1655
1662
struct hdmi_infoframe infoframe;
1656
1663
1657
-
/* disable HPD interrupts */
1664
+
/* disable HPD interrupts from HDMI IP block, use GPIO instead */
1658
1665
hdmi_reg_writemask(hdata, HDMI_INTC_CON, 0, HDMI_INTC_EN_GLOBAL |
1659
1666
HDMI_INTC_EN_HPD_PLUG | HDMI_INTC_EN_HPD_UNPLUG);
1660
1667
···
1772
1779
u32 val = hdmi_reg_read(hdata, HDMI_V13_PHY_STATUS);
1773
1780
if (val & HDMI_PHY_STATUS_READY)
1774
1781
break;
1775
-
mdelay(1);
1782
+
usleep_range(1000, 2000);
1776
1783
}
1777
1784
/* steady state not achieved */
1778
1785
if (tries == 0) {
···
1939
1946
u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS_0);
1940
1947
if (val & HDMI_PHY_STATUS_READY)
1941
1948
break;
1942
-
mdelay(1);
1949
+
usleep_range(1000, 2000);
1943
1950
}
1944
1951
/* steady state not achieved */
1945
1952
if (tries == 0) {
···
1991
1998
1992
1999
/* reset hdmiphy */
1993
2000
hdmi_reg_writemask(hdata, reg, ~0, HDMI_PHY_SW_RSTOUT);
1994
-
mdelay(10);
2001
+
usleep_range(10000, 12000);
1995
2002
hdmi_reg_writemask(hdata, reg, 0, HDMI_PHY_SW_RSTOUT);
1996
-
mdelay(10);
2003
+
usleep_range(10000, 12000);
1997
2004
}
1998
2005
1999
2006
static void hdmiphy_poweron(struct hdmi_context *hdata)
···
2041
2048
return;
2042
2049
}
2043
2050
2044
-
mdelay(10);
2051
+
usleep_range(10000, 12000);
2045
2052
2046
2053
/* operation mode */
2047
2054
operation[0] = 0x1f;
···
2163
2170
2164
2171
DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
2165
2172
2173
+
mutex_lock(&hdata->hdmi_mutex);
2174
+
if (!hdata->powered) {
2175
+
mutex_unlock(&hdata->hdmi_mutex);
2176
+
return;
2177
+
}
2178
+
mutex_unlock(&hdata->hdmi_mutex);
2179
+
2166
2180
hdmi_conf_apply(hdata);
2167
2181
}
2168
2182
···
2265
2265
.dpms = hdmi_dpms,
2266
2266
};
2267
2267
2268
-
static irqreturn_t hdmi_external_irq_thread(int irq, void *arg)
2268
+
static irqreturn_t hdmi_irq_thread(int irq, void *arg)
2269
2269
{
2270
2270
struct exynos_drm_hdmi_context *ctx = arg;
2271
2271
struct hdmi_context *hdata = ctx->ctx;
···
2273
2273
mutex_lock(&hdata->hdmi_mutex);
2274
2274
hdata->hpd = gpio_get_value(hdata->hpd_gpio);
2275
2275
mutex_unlock(&hdata->hdmi_mutex);
2276
-
2277
-
if (ctx->drm_dev)
2278
-
drm_helper_hpd_irq_event(ctx->drm_dev);
2279
-
2280
-
return IRQ_HANDLED;
2281
-
}
2282
-
2283
-
static irqreturn_t hdmi_internal_irq_thread(int irq, void *arg)
2284
-
{
2285
-
struct exynos_drm_hdmi_context *ctx = arg;
2286
-
struct hdmi_context *hdata = ctx->ctx;
2287
-
u32 intc_flag;
2288
-
2289
-
intc_flag = hdmi_reg_read(hdata, HDMI_INTC_FLAG);
2290
-
/* clearing flags for HPD plug/unplug */
2291
-
if (intc_flag & HDMI_INTC_FLAG_HPD_UNPLUG) {
2292
-
DRM_DEBUG_KMS("unplugged\n");
2293
-
hdmi_reg_writemask(hdata, HDMI_INTC_FLAG, ~0,
2294
-
HDMI_INTC_FLAG_HPD_UNPLUG);
2295
-
}
2296
-
if (intc_flag & HDMI_INTC_FLAG_HPD_PLUG) {
2297
-
DRM_DEBUG_KMS("plugged\n");
2298
-
hdmi_reg_writemask(hdata, HDMI_INTC_FLAG, ~0,
2299
-
HDMI_INTC_FLAG_HPD_PLUG);
2300
-
}
2301
2276
2302
2277
if (ctx->drm_dev)
2303
2278
drm_helper_hpd_irq_event(ctx->drm_dev);
···
2530
2555
2531
2556
hdata->hdmiphy_port = hdmi_hdmiphy;
2532
2557
2533
-
hdata->external_irq = gpio_to_irq(hdata->hpd_gpio);
2534
-
if (hdata->external_irq < 0) {
2535
-
DRM_ERROR("failed to get GPIO external irq\n");
2536
-
ret = hdata->external_irq;
2537
-
goto err_hdmiphy;
2538
-
}
2539
-
2540
-
hdata->internal_irq = platform_get_irq(pdev, 0);
2541
-
if (hdata->internal_irq < 0) {
2542
-
DRM_ERROR("failed to get platform internal irq\n");
2543
-
ret = hdata->internal_irq;
2558
+
hdata->irq = gpio_to_irq(hdata->hpd_gpio);
2559
+
if (hdata->irq < 0) {
2560
+
DRM_ERROR("failed to get GPIO irq\n");
2561
+
ret = hdata->irq;
2544
2562
goto err_hdmiphy;
2545
2563
}
2546
2564
2547
2565
hdata->hpd = gpio_get_value(hdata->hpd_gpio);
2548
2566
2549
-
ret = request_threaded_irq(hdata->external_irq, NULL,
2550
-
hdmi_external_irq_thread, IRQF_TRIGGER_RISING |
2567
+
ret = request_threaded_irq(hdata->irq, NULL,
2568
+
hdmi_irq_thread, IRQF_TRIGGER_RISING |
2551
2569
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
2552
-
"hdmi_external", drm_hdmi_ctx);
2570
+
"hdmi", drm_hdmi_ctx);
2553
2571
if (ret) {
2554
-
DRM_ERROR("failed to register hdmi external interrupt\n");
2572
+
DRM_ERROR("failed to register hdmi interrupt\n");
2555
2573
goto err_hdmiphy;
2556
-
}
2557
-
2558
-
ret = request_threaded_irq(hdata->internal_irq, NULL,
2559
-
hdmi_internal_irq_thread, IRQF_ONESHOT,
2560
-
"hdmi_internal", drm_hdmi_ctx);
2561
-
if (ret) {
2562
-
DRM_ERROR("failed to register hdmi internal interrupt\n");
2563
-
goto err_free_irq;
2564
2574
}
2565
2575
2566
2576
/* Attach HDMI Driver to common hdmi. */
···
2558
2598
2559
2599
return 0;
2560
2600
2561
-
err_free_irq:
2562
-
free_irq(hdata->external_irq, drm_hdmi_ctx);
2563
2601
err_hdmiphy:
2564
2602
i2c_del_driver(&hdmiphy_driver);
2565
2603
err_ddc:
···
2575
2617
2576
2618
pm_runtime_disable(dev);
2577
2619
2578
-
free_irq(hdata->internal_irq, hdata);
2579
-
free_irq(hdata->external_irq, hdata);
2620
+
free_irq(hdata->irq, hdata);
2580
2621
2581
2622
2582
2623
/* hdmiphy i2c driver */
···
2594
2637
2595
2638
DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
2596
2639
2597
-
disable_irq(hdata->internal_irq);
2598
-
disable_irq(hdata->external_irq);
2640
+
disable_irq(hdata->irq);
2599
2641
2600
2642
hdata->hpd = false;
2601
2643
if (ctx->drm_dev)
···
2619
2663
2620
2664
hdata->hpd = gpio_get_value(hdata->hpd_gpio);
2621
2665
2622
-
enable_irq(hdata->external_irq);
2623
-
enable_irq(hdata->internal_irq);
2666
+
enable_irq(hdata->irq);
2624
2667
2625
2668
if (!pm_runtime_suspended(dev)) {
2626
2669
DRM_DEBUG_KMS("%s : Already resumed\n", __func__);
+8
-1
drivers/gpu/drm/exynos/exynos_mixer.c
+8
-1
drivers/gpu/drm/exynos/exynos_mixer.c
···
600
600
/* waiting until VP_SRESET_PROCESSING is 0 */
601
601
if (~vp_reg_read(res, VP_SRESET) & VP_SRESET_PROCESSING)
602
602
break;
603
-
mdelay(10);
603
+
usleep_range(10000, 12000);
604
604
}
605
605
WARN(tries == 0, "failed to reset Video Processor\n");
606
606
}
···
775
775
struct mixer_context *mixer_ctx = ctx;
776
776
777
777
DRM_DEBUG_KMS("[%d] %s, win: %d\n", __LINE__, __func__, win);
778
+
779
+
mutex_lock(&mixer_ctx->mixer_mutex);
780
+
if (!mixer_ctx->powered) {
781
+
mutex_unlock(&mixer_ctx->mixer_mutex);
782
+
return;
783
+
}
784
+
mutex_unlock(&mixer_ctx->mixer_mutex);
778
785
779
786
if (win > 1 && mixer_ctx->vp_enabled)
780
787
vp_video_buffer(mixer_ctx, win);
+2
drivers/gpu/drm/i915/i915_debugfs.c
+2
drivers/gpu/drm/i915/i915_debugfs.c
···
30
30
#include <linux/debugfs.h>
31
31
#include <linux/slab.h>
32
32
#include <linux/export.h>
33
+
#include <generated/utsrelease.h>
33
34
#include <drm/drmP.h>
34
35
#include "intel_drv.h"
35
36
#include "intel_ringbuffer.h"
···
691
690
692
691
seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
693
692
error->time.tv_usec);
693
+
seq_printf(m, "Kernel: " UTS_RELEASE);
694
694
seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
695
695
seq_printf(m, "EIR: 0x%08x\n", error->eir);
696
696
seq_printf(m, "IER: 0x%08x\n", error->ier);
+1
drivers/gpu/drm/i915/i915_reg.h
+1
drivers/gpu/drm/i915/i915_reg.h
+18
-6
drivers/gpu/drm/i915/intel_ringbuffer.c
+18
-6
drivers/gpu/drm/i915/intel_ringbuffer.c
···
505
505
struct drm_i915_private *dev_priv = dev->dev_private;
506
506
int ret = init_ring_common(ring);
507
507
508
-
if (INTEL_INFO(dev)->gen > 3) {
508
+
if (INTEL_INFO(dev)->gen > 3)
509
509
I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(VS_TIMER_DISPATCH));
510
-
if (IS_GEN7(dev))
511
-
I915_WRITE(GFX_MODE_GEN7,
512
-
_MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) |
513
-
_MASKED_BIT_ENABLE(GFX_REPLAY_MODE));
514
-
}
510
+
511
+
/* We need to disable the AsyncFlip performance optimisations in order
512
+
* to use MI_WAIT_FOR_EVENT within the CS. It should already be
513
+
* programmed to '1' on all products.
514
+
*/
515
+
if (INTEL_INFO(dev)->gen >= 6)
516
+
I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(ASYNC_FLIP_PERF_DISABLE));
517
+
518
+
/* Required for the hardware to program scanline values for waiting */
519
+
if (INTEL_INFO(dev)->gen == 6)
520
+
I915_WRITE(GFX_MODE,
521
+
_MASKED_BIT_ENABLE(GFX_TLB_INVALIDATE_ALWAYS));
522
+
523
+
if (IS_GEN7(dev))
524
+
I915_WRITE(GFX_MODE_GEN7,
525
+
_MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) |
526
+
_MASKED_BIT_ENABLE(GFX_REPLAY_MODE));
515
527
516
528
if (INTEL_INFO(dev)->gen >= 5) {
517
529
ret = init_pipe_control(ring);
+6
-2
drivers/gpu/drm/radeon/ni.c
+6
-2
drivers/gpu/drm/radeon/ni.c
···
1216
1216
int cayman_dma_resume(struct radeon_device *rdev)
1217
1217
{
1218
1218
struct radeon_ring *ring;
1219
-
u32 rb_cntl, dma_cntl;
1219
+
u32 rb_cntl, dma_cntl, ib_cntl;
1220
1220
u32 rb_bufsz;
1221
1221
u32 reg_offset, wb_offset;
1222
1222
int i, r;
···
1265
1265
WREG32(DMA_RB_BASE + reg_offset, ring->gpu_addr >> 8);
1266
1266
1267
1267
/* enable DMA IBs */
1268
-
WREG32(DMA_IB_CNTL + reg_offset, DMA_IB_ENABLE | CMD_VMID_FORCE);
1268
+
ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE;
1269
+
#ifdef __BIG_ENDIAN
1270
+
ib_cntl |= DMA_IB_SWAP_ENABLE;
1271
+
#endif
1272
+
WREG32(DMA_IB_CNTL + reg_offset, ib_cntl);
1269
1273
1270
1274
dma_cntl = RREG32(DMA_CNTL + reg_offset);
1271
1275
dma_cntl &= ~CTXEMPTY_INT_ENABLE;
+6
-2
drivers/gpu/drm/radeon/r600.c
+6
-2
drivers/gpu/drm/radeon/r600.c
···
2313
2313
int r600_dma_resume(struct radeon_device *rdev)
2314
2314
{
2315
2315
struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX];
2316
-
u32 rb_cntl, dma_cntl;
2316
+
u32 rb_cntl, dma_cntl, ib_cntl;
2317
2317
u32 rb_bufsz;
2318
2318
int r;
2319
2319
···
2353
2353
WREG32(DMA_RB_BASE, ring->gpu_addr >> 8);
2354
2354
2355
2355
/* enable DMA IBs */
2356
-
WREG32(DMA_IB_CNTL, DMA_IB_ENABLE);
2356
+
ib_cntl = DMA_IB_ENABLE;
2357
+
#ifdef __BIG_ENDIAN
2358
+
ib_cntl |= DMA_IB_SWAP_ENABLE;
2359
+
#endif
2360
+
WREG32(DMA_IB_CNTL, ib_cntl);
2357
2361
2358
2362
dma_cntl = RREG32(DMA_CNTL);
2359
2363
dma_cntl &= ~CTXEMPTY_INT_ENABLE;
+2
drivers/gpu/drm/radeon/radeon_cs.c
+2
drivers/gpu/drm/radeon/radeon_cs.c
···
286
286
p->chunks[p->chunk_ib_idx].kpage[1] == NULL) {
287
287
kfree(p->chunks[p->chunk_ib_idx].kpage[0]);
288
288
kfree(p->chunks[p->chunk_ib_idx].kpage[1]);
289
+
p->chunks[p->chunk_ib_idx].kpage[0] = NULL;
290
+
p->chunks[p->chunk_ib_idx].kpage[1] = NULL;
289
291
return -ENOMEM;
290
292
}
291
293
}
+2
-1
drivers/gpu/drm/radeon/radeon_cursor.c
+2
-1
drivers/gpu/drm/radeon/radeon_cursor.c
+1
-1
drivers/gpu/drm/radeon/radeon_display.c
+1
-1
drivers/gpu/drm/radeon/radeon_display.c
+15
-6
drivers/iommu/intel-iommu.c
+15
-6
drivers/iommu/intel-iommu.c
···
4234
4234
.pgsize_bitmap = INTEL_IOMMU_PGSIZES,
4235
4235
};
4236
4236
4237
+
static void quirk_iommu_g4x_gfx(struct pci_dev *dev)
4238
+
{
4239
+
/* G4x/GM45 integrated gfx dmar support is totally busted. */
4240
+
printk(KERN_INFO "DMAR: Disabling IOMMU for graphics on this chipset\n");
4241
+
dmar_map_gfx = 0;
4242
+
}
4243
+
4244
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_g4x_gfx);
4245
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_g4x_gfx);
4246
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_g4x_gfx);
4247
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_g4x_gfx);
4248
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_g4x_gfx);
4249
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_g4x_gfx);
4250
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_g4x_gfx);
4251
+
4237
4252
static void quirk_iommu_rwbf(struct pci_dev *dev)
4238
4253
{
4239
4254
/*
···
4257
4242
*/
4258
4243
printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n");
4259
4244
rwbf_quirk = 1;
4260
-
4261
-
/* https://bugzilla.redhat.com/show_bug.cgi?id=538163 */
4262
-
if (dev->revision == 0x07) {
4263
-
printk(KERN_INFO "DMAR: Disabling IOMMU for graphics on this chipset\n");
4264
-
dmar_map_gfx = 0;
4265
-
}
4266
4245
}
4267
4246
4268
4247
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);