tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'riscv/for-v5.3-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Paul Walmsley:

- Two patches to fix significant bugs in floating point register
context handling

- A minor fix in RISC-V flush_tlb_page(), to supply a valid end address
to flush_tlb_range()

- Two minor defconfig additions: to build the virtio hwrng driver by
default (for QEMU targets), and to partially synchronize the 32-bit
defconfig with the 64-bit defconfig

* tag 'riscv/for-v5.3-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: Make __fstate_clean() work correctly.
riscv: Correct the initialized flow of FP register
riscv: defconfig: Update the defconfig
riscv: rv32_defconfig: Update the defconfig
riscv: fix flush_tlb_range() end address for flush_tlb_page()

Linus Torvalds 2f478b60 6e625a1a

+30 -5
+2
arch/riscv/configs/defconfig
··· 54 54 CONFIG_SERIAL_OF_PLATFORM=y 55 55 CONFIG_SERIAL_EARLYCON_RISCV_SBI=y 56 56 CONFIG_HVC_RISCV_SBI=y 57 + CONFIG_HW_RANDOM=y 58 + CONFIG_HW_RANDOM_VIRTIO=y 57 59 CONFIG_SPI=y 58 60 CONFIG_SPI_SIFIVE=y 59 61 # CONFIG_PTP_1588_CLOCK is not set
+3
arch/riscv/configs/rv32_defconfig
··· 34 34 CONFIG_PCI_HOST_GENERIC=y 35 35 CONFIG_PCIE_XILINX=y 36 36 CONFIG_DEVTMPFS=y 37 + CONFIG_DEVTMPFS_MOUNT=y 37 38 CONFIG_BLK_DEV_LOOP=y 38 39 CONFIG_VIRTIO_BLK=y 39 40 CONFIG_BLK_DEV_SD=y ··· 54 53 CONFIG_SERIAL_OF_PLATFORM=y 55 54 CONFIG_SERIAL_EARLYCON_RISCV_SBI=y 56 55 CONFIG_HVC_RISCV_SBI=y 56 + CONFIG_HW_RANDOM=y 57 + CONFIG_HW_RANDOM_VIRTIO=y 57 58 # CONFIG_PTP_1588_CLOCK is not set 58 59 CONFIG_DRM=y 59 60 CONFIG_DRM_RADEON=y
+7 -1
arch/riscv/include/asm/switch_to.h
··· 16 16 17 17 static inline void __fstate_clean(struct pt_regs *regs) 18 18 { 19 - regs->sstatus |= (regs->sstatus & ~(SR_FS)) | SR_FS_CLEAN; 19 + regs->sstatus = (regs->sstatus & ~SR_FS) | SR_FS_CLEAN; 20 + } 21 + 22 + static inline void fstate_off(struct task_struct *task, 23 + struct pt_regs *regs) 24 + { 25 + regs->sstatus = (regs->sstatus & ~SR_FS) | SR_FS_OFF; 20 26 } 21 27 22 28 static inline void fstate_save(struct task_struct *task,
+9 -2
arch/riscv/include/asm/tlbflush.h
··· 53 53 } 54 54 55 55 #define flush_tlb_all() sbi_remote_sfence_vma(NULL, 0, -1) 56 - #define flush_tlb_page(vma, addr) flush_tlb_range(vma, addr, 0) 56 + 57 57 #define flush_tlb_range(vma, start, end) \ 58 58 remote_sfence_vma(mm_cpumask((vma)->vm_mm), start, (end) - (start)) 59 - #define flush_tlb_mm(mm) \ 59 + 60 + static inline void flush_tlb_page(struct vm_area_struct *vma, 61 + unsigned long addr) 62 + { 63 + flush_tlb_range(vma, addr, addr + PAGE_SIZE); 64 + } 65 + 66 + #define flush_tlb_mm(mm) \ 60 67 remote_sfence_vma(mm_cpumask(mm), 0, -1) 61 68 62 69 #endif /* CONFIG_SMP */
+9 -2
arch/riscv/kernel/process.c
··· 64 64 unsigned long sp) 65 65 { 66 66 regs->sstatus = SR_SPIE; 67 - if (has_fpu) 67 + if (has_fpu) { 68 68 regs->sstatus |= SR_FS_INITIAL; 69 + /* 70 + * Restore the initial value to the FP register 71 + * before starting the user program. 72 + */ 73 + fstate_restore(current, regs); 74 + } 69 75 regs->sepc = pc; 70 76 regs->sp = sp; 71 77 set_fs(USER_DS); ··· 81 75 { 82 76 #ifdef CONFIG_FPU 83 77 /* 84 - * Reset FPU context 78 + * Reset FPU state and context 85 79 * frm: round to nearest, ties to even (IEEE default) 86 80 * fflags: accrued exceptions cleared 87 81 */ 82 + fstate_off(current, task_pt_regs(current)); 88 83 memset(&current->thread.fstate, 0, sizeof(current->thread.fstate)); 89 84 #endif 90 85 }