tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/msm/a6xx: Sync relevant adreno_pm4.xml changes

In mesa CP_SET_CTXSWITCH_IB is renamed to CP_SET_AMBLE and some other
names are changed to match KGSL. Import those changes.

The changes have not been merged yet in mesa but are necessary for this
series.

Tested-by: Rob Clark <robdclark@gmail.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8450-HDK
Signed-off-by: Antonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/618023/
Signed-off-by: Rob Clark <robdclark@chromium.org>

authored by

Antonino Maniscalco and committed by
Rob Clark 3044f928 e7ae83da

+17 -22
+17 -22
drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml
··· 581 581 and forcibly switch to the indicated context. 582 582 </doc> 583 583 <value name="CP_CONTEXT_SWITCH" value="0x54" variants="A6XX"/> 584 - <!-- Note, kgsl calls this CP_SET_AMBLE: --> 585 - <value name="CP_SET_CTXSWITCH_IB" value="0x55" variants="A6XX-"/> 584 + <value name="CP_SET_AMBLE" value="0x55" variants="A6XX-"/> 586 585 587 586 <!-- 588 587 Seems to always have the payload: ··· 2012 2013 </reg32> 2013 2014 </domain> 2014 2015 2015 - <domain name="CP_SET_CTXSWITCH_IB" width="32"> 2016 + <domain name="CP_SET_AMBLE" width="32"> 2016 2017 <doc> 2017 - Used by the userspace driver to set various IB's which are 2018 - executed during context save/restore for handling 2019 - state that isn't restored by the 2020 - context switch routine itself. 2021 - </doc> 2022 - <enum name="ctxswitch_ib"> 2023 - <value name="RESTORE_IB" value="0"> 2018 + Used by the userspace and kernel drivers to set various IB's 2019 + which are executed during context save/restore for handling 2020 + state that isn't restored by the context switch routine itself. 2021 + </doc> 2022 + <enum name="amble_type"> 2023 + <value name="PREAMBLE_AMBLE_TYPE" value="0"> 2024 2024 <doc>Executed unconditionally when switching back to the context.</doc> 2025 2025 </value> 2026 - <value name="YIELD_RESTORE_IB" value="1"> 2026 + <value name="BIN_PREAMBLE_AMBLE_TYPE" value="1"> 2027 2027 <doc> 2028 2028 Executed when switching back after switching 2029 2029 away during execution of 2030 - a CP_SET_MARKER packet with RM6_YIELD as the 2031 - payload *and* the normal save routine was 2032 - bypassed for a shorter one. I think this is 2033 - connected to the "skipsaverestore" bit set by 2034 - the kernel when preempting. 2030 + a CP_SET_MARKER packet with RM6_BIN_RENDER_END as the 2031 + payload *and* skipsaverestore is set. This is 2032 + expected to restore static register values not 2033 + saved when skipsaverestore is set. 2035 2034 </doc> 2036 2035 </value> 2037 - <value name="SAVE_IB" value="2"> 2036 + <value name="POSTAMBLE_AMBLE_TYPE" value="2"> 2038 2037 <doc> 2039 2038 Executed when switching away from the context, 2040 2039 except for context switches initiated via 2041 2040 CP_YIELD. 2042 2041 </doc> 2043 2042 </value> 2044 - <value name="RB_SAVE_IB" value="3"> 2043 + <value name="KMD_AMBLE_TYPE" value="3"> 2045 2044 <doc> 2046 2045 This can only be set by the RB (i.e. the kernel) 2047 2046 and executes with protected mode off, but 2048 - is otherwise similar to SAVE_IB. 2049 - 2050 - Note, kgsl calls this CP_KMD_AMBLE_TYPE 2047 + is otherwise similar to POSTAMBLE_AMBLE_TYPE. 2051 2048 </doc> 2052 2049 </value> 2053 2050 </enum> ··· 2055 2060 </reg32> 2056 2061 <reg32 offset="2" name="2"> 2057 2062 <bitfield name="DWORDS" low="0" high="19" type="uint"/> 2058 - <bitfield name="TYPE" low="20" high="21" type="ctxswitch_ib"/> 2063 + <bitfield name="TYPE" low="20" high="21" type="amble_type"/> 2059 2064 </reg32> 2060 2065 </domain> 2061 2066