Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
dt-bindings: soc: fsl: Convert q(b)man-* to yaml format
Convert qman, bman, qman-portals, bman-portals to yaml format.
Additional Change for fsl,q(b)man-portal:
- Only keep one example.
- Add fsl,qman-channel-id property.
- Use interrupt type macro.
- Remove top level qman-portals@ff4200000 at example.
Additional change for fsl,q(b)man:
- Fixed example error.
- Remove redundent part, only keep fsl,qman node.
- Change memory-regions to memory-region.
- fsl,q(b)man-portals is not required property
Additional change for fsl,qman-fqd.yaml:
- Fixed example error.
- Only keep one example.
- Ref to reserve-memory.yaml
- Merge fsl,bman reserver memory part
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20240626193753.2088926-1-Frank.Li@nxp.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
authored by
Frank Li
and committed by
Rob Herring (Arm)
304a90c4
bfb921b2
+407
-514
-56
Documentation/devicetree/bindings/soc/fsl/bman-portals.txt
-56
Documentation/devicetree/bindings/soc/fsl/bman-portals.txt
···
1
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QorIQ DPAA Buffer Manager Portals Device Tree Binding
2
-
3
-
Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
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CONTENTS
6
-
7
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- BMan Portal
8
-
- Example
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-
10
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BMan Portal Node
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-
12
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Portals are memory mapped interfaces to BMan that allow low-latency, lock-less
13
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interaction by software running on processor cores, accelerators and network
14
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interfaces with the BMan
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-
16
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PROPERTIES
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-
18
-
- compatible
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Usage: Required
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Value type: <stringlist>
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Definition: Must include "fsl,bman-portal-<hardware revision>"
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May include "fsl,<SoC>-bman-portal" or "fsl,bman-portal"
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-
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- reg
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Usage: Required
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Value type: <prop-encoded-array>
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Definition: Two regions. The first is the cache-enabled region of
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the portal. The second is the cache-inhibited region of
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the portal
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-
31
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- interrupts
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Usage: Required
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Value type: <prop-encoded-array>
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Definition: Standard property
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-
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EXAMPLE
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-
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The example below shows a (P4080) BMan portals container/bus node with two portals
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-
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bman-portals@ff4000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0 0xf 0xf4000000 0x200000>;
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-
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bman-portal@0 {
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compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
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reg = <0x0 0x4000>, <0x100000 0x1000>;
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interrupts = <105 2 0 0>;
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};
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bman-portal@4000 {
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compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
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reg = <0x4000 0x4000>, <0x101000 0x1000>;
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interrupts = <107 2 0 0>;
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};
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};
-137
Documentation/devicetree/bindings/soc/fsl/bman.txt
-137
Documentation/devicetree/bindings/soc/fsl/bman.txt
···
1
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QorIQ DPAA Buffer Manager Device Tree Bindings
2
-
3
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Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
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-
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CONTENTS
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-
7
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- BMan Node
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- BMan Private Memory Node
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- Example
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-
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BMan Node
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-
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The Buffer Manager is part of the Data-Path Acceleration Architecture (DPAA).
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BMan supports hardware allocation and deallocation of buffers belonging to pools
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originally created by software with configurable depletion thresholds. This
16
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binding covers the CCSR space programming model
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-
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PROPERTIES
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-
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- compatible
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Usage: Required
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Value type: <stringlist>
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Definition: Must include "fsl,bman"
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May include "fsl,<SoC>-bman"
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-
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- reg
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Usage: Required
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Value type: <prop-encoded-array>
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Definition: Registers region within the CCSR address space
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-
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The BMan revision information is located in the BMAN_IP_REV_1/2 registers which
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are located at offsets 0xbf8 and 0xbfc
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-
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- interrupts
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Usage: Required
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Value type: <prop-encoded-array>
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Definition: Standard property. The error interrupt
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-
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- fsl,bman-portals
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Usage: Required
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Value type: <phandle>
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Definition: Phandle to this BMan instance's portals
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-
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- fsl,liodn
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Usage: See pamu.txt
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Value type: <prop-encoded-array>
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Definition: PAMU property used for static LIODN assignment
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-
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- fsl,iommu-parent
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Usage: See pamu.txt
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Value type: <phandle>
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Definition: PAMU property used for dynamic LIODN assignment
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-
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For additional details about the PAMU/LIODN binding(s) see pamu.txt
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-
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Devices connected to a BMan instance via Direct Connect Portals (DCP) must link
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to the respective BMan instance
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-
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- fsl,bman
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Usage: Required
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Value type: <prop-encoded-array>
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Description: List of phandle and DCP index pairs, to the BMan instance
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to which this device is connected via the DCP
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-
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BMan Private Memory Node
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-
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BMan requires a contiguous range of physical memory used for the backing store
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for BMan Free Buffer Proxy Records (FBPR). This memory is reserved/allocated as
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a node under the /reserved-memory node.
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-
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The BMan FBPR memory node must be named "bman-fbpr"
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-
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PROPERTIES
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-
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- compatible
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Usage: required
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Value type: <stringlist>
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Definition: PPC platforms: Must include "fsl,bman-fbpr"
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ARM platforms: Must include "shared-dma-pool"
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as well as the "no-map" property
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-
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The following constraints are relevant to the FBPR private memory:
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- The size must be 2^(size + 1), with size = 11..33. That is 4 KiB to
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16 GiB
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- The alignment must be a muliptle of the memory size
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-
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The size of the FBPR must be chosen by observing the hardware features configured
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via the Reset Configuration Word (RCW) and that are relevant to a specific board
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(e.g. number of MAC(s) pinned-out, number of offline/host command FMan ports,
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etc.). The size configured in the DT must reflect the hardware capabilities and
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not the specific needs of an application
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-
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For additional details about reserved memory regions see reserved-memory.txt
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EXAMPLE
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-
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The example below shows a BMan FBPR dynamic allocation memory node
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-
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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-
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bman_fbpr: bman-fbpr {
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compatible = "shared-mem-pool";
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size = <0 0x1000000>;
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alignment = <0 0x1000000>;
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no-map;
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};
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};
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-
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The example below shows a (P4080) BMan CCSR-space node
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bportals: bman-portals@ff4000000 {
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...
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};
117
-
118
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crypto@300000 {
119
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...
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fsl,bman = <&bman, 2>;
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...
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};
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-
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bman: bman@31a000 {
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compatible = "fsl,bman";
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reg = <0x31a000 0x1000>;
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interrupts = <16 2 1 2>;
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fsl,liodn = <0x17>;
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fsl,bman-portals = <&bportals>;
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memory-region = <&bman_fbpr>;
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};
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-
133
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fman@400000 {
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...
135
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fsl,bman = <&bman, 0>;
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-
...
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};
+52
Documentation/devicetree/bindings/soc/fsl/fsl,bman-portal.yaml
+52
Documentation/devicetree/bindings/soc/fsl/fsl,bman-portal.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
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%YAML 1.2
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+
---
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$id: http://devicetree.org/schemas/soc/fsl/fsl,bman-portal.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
7
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title: QorIQ DPAA Queue Manager Portals
8
+
9
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maintainers:
10
+
- Frank Li <Frank.Li@nxp.com>
11
+
12
+
description:
13
+
QorIQ DPAA Buffer Manager Portal
14
+
15
+
Portals are memory mapped interfaces to BMan that allow low-latency, lock-less
16
+
interaction by software running on processor cores, accelerators and network
17
+
interfaces with the BMan
18
+
19
+
properties:
20
+
compatible:
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+
oneOf:
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+
- const: fsl,bman-portal
23
+
- items:
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+
- enum:
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- fsl,bman-portal-1.0.0
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- fsl,ls1043a-bmap-portal
27
+
- fsl,ls1046a-bmap-portal
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- const: fsl,bman-portal
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reg:
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items:
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- description: the cache-enabled region of the portal
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+
- description: the cache-inhibited region of the portal
33
+
34
+
interrupts:
35
+
maxItems: 1
36
+
37
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required:
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+
- compatible
39
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- reg
40
+
- interrupts
41
+
42
+
additionalProperties: false
43
+
44
+
examples:
45
+
- |
46
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#include <dt-bindings/interrupt-controller/irq.h>
47
+
48
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bman-portal@0 {
49
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compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
50
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reg = <0x0 0x4000>, <0x100000 0x1000>;
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interrupts = <105 IRQ_TYPE_EDGE_FALLING 0 0>;
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};
+83
Documentation/devicetree/bindings/soc/fsl/fsl,bman.yaml
+83
Documentation/devicetree/bindings/soc/fsl/fsl,bman.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
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$id: http://devicetree.org/schemas/soc/fsl/fsl,bman.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
7
+
title: QorIQ DPAA Buffer Manager
8
+
9
+
maintainers:
10
+
- Frank Li <Frank.Li@nxp.com>
11
+
12
+
description:
13
+
The Buffer Manager is part of the Data-Path Acceleration Architecture (DPAA).
14
+
BMan supports hardware allocation and deallocation of buffers belonging to
15
+
pools originally created by software with configurable depletion thresholds.
16
+
This binding covers the CCSR space programming model
17
+
18
+
properties:
19
+
compatible:
20
+
oneOf:
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+
- const: fsl,bman
22
+
- items:
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+
- enum:
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+
- fsl,ls1043a-bman
25
+
- fsl,ls1046a-bman
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- const: fsl,bman
27
+
28
+
reg:
29
+
items:
30
+
- description: |
31
+
Registers region within the CCSR address space
32
+
33
+
The BMan revision information is located in the BMAN_IP_REV_1/2
34
+
registers which are located at offsets 0xbf8 and 0xbfc
35
+
36
+
interrupts:
37
+
items:
38
+
- description: The error interrupt
39
+
40
+
memory-region:
41
+
minItems: 1
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+
maxItems: 2
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+
description:
44
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List of phandles referencing the BMan private memory
45
+
nodes (described below). The bman-fqd node must be
46
+
first followed by bman-pfdr node. Only used on ARM
47
+
48
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Devices connected to a BMan instance via Direct Connect Portals (DCP) must link
49
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to the respective BMan instance
50
+
51
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fsl,bman-portals:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: ref fsl,bman-port.yaml
54
+
55
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fsl,liodn:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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+
description:
58
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See pamu.txt, PAMU property used for static LIODN assignment
59
+
60
+
fsl,iommu-parent:
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$ref: /schemas/types.yaml#/definitions/phandle
62
+
description:
63
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See pamu.txt, PAMU property used for dynamic LIODN assignment
64
+
65
+
required:
66
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- compatible
67
+
- reg
68
+
- interrupts
69
+
70
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additionalProperties: false
71
+
72
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examples:
73
+
- |
74
+
#include <dt-bindings/interrupt-controller/irq.h>
75
+
76
+
bman@31a000 {
77
+
compatible = "fsl,bman";
78
+
reg = <0x31a000 0x1000>;
79
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interrupts = <16 IRQ_TYPE_EDGE_FALLING 1 2>;
80
+
fsl,liodn = <0x17>;
81
+
fsl,bman-portals = <&bportals>;
82
+
memory-region = <&bman_fbpr>;
83
+
};
+69
Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml
+69
Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/soc/fsl/fsl,qman-fqd.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: QMan Private Memory Nodes
8
+
9
+
maintainers:
10
+
- Frank Li <Frank.Li@nxp.com>
11
+
12
+
description: |
13
+
QMan requires two contiguous range of physical memory used for the backing store
14
+
for QMan Frame Queue Descriptor (FQD) and Packed Frame Descriptor Record (PFDR).
15
+
This memory is reserved/allocated as a node under the /reserved-memory node.
16
+
17
+
BMan requires a contiguous range of physical memory used for the backing store
18
+
for BMan Free Buffer Proxy Records (FBPR). This memory is reserved/allocated as
19
+
a node under the /reserved-memory node.
20
+
21
+
The QMan FQD memory node must be named "qman-fqd"
22
+
The QMan PFDR memory node must be named "qman-pfdr"
23
+
The BMan FBPR memory node must be named "bman-fbpr"
24
+
25
+
The following constraints are relevant to the FQD and PFDR private memory:
26
+
- The size must be 2^(size + 1), with size = 11..29. That is 4 KiB to
27
+
1 GiB
28
+
- The alignment must be a muliptle of the memory size
29
+
30
+
The size of the FQD and PFDP must be chosen by observing the hardware features
31
+
configured via the Reset Configuration Word (RCW) and that are relevant to a
32
+
specific board (e.g. number of MAC(s) pinned-out, number of offline/host command
33
+
FMan ports, etc.). The size configured in the DT must reflect the hardware
34
+
capabilities and not the specific needs of an application
35
+
36
+
For additional details about reserved memory regions see
37
+
reserved-memory/reserved-memory.yaml in dtschema project.
38
+
39
+
properties:
40
+
$nodename:
41
+
pattern: '^(qman-fqd|qman-pfdr|bman-fbpr)+$'
42
+
43
+
compatible:
44
+
enum:
45
+
- fsl,qman-fqd
46
+
- fsl,qman-pfdr
47
+
- fsl,bman-fbpr
48
+
49
+
required:
50
+
- compatible
51
+
52
+
allOf:
53
+
- $ref: reserved-memory.yaml
54
+
55
+
unevaluatedProperties: false
56
+
57
+
examples:
58
+
- |
59
+
reserved-memory {
60
+
#address-cells = <2>;
61
+
#size-cells = <2>;
62
+
63
+
qman-fqd {
64
+
compatible = "shared-dma-pool";
65
+
size = <0 0x400000>;
66
+
alignment = <0 0x400000>;
67
+
no-map;
68
+
};
69
+
};
+110
Documentation/devicetree/bindings/soc/fsl/fsl,qman-portal.yaml
+110
Documentation/devicetree/bindings/soc/fsl/fsl,qman-portal.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/soc/fsl/fsl,qman-portal.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: QorIQ DPAA Queue Manager Portals
8
+
9
+
maintainers:
10
+
- Frank Li <Frank.Li@nxp.com>
11
+
12
+
description:
13
+
Portals are memory mapped interfaces to QMan that allow low-latency, lock-less
14
+
interaction by software running on processor cores, accelerators and network
15
+
interfaces with the QMan
16
+
17
+
properties:
18
+
compatible:
19
+
oneOf:
20
+
- const: fsl,qman-portal
21
+
- items:
22
+
- enum:
23
+
- fsl,ls1043-qman-portal
24
+
- fsl,ls1046-qman-portal
25
+
- fsl,qman-portal-1.2.0
26
+
- const: fsl,qman-portal
27
+
28
+
reg:
29
+
items:
30
+
- description: the cache-enabled region of the portal
31
+
- description: the cache-inhibited region of the portal
32
+
33
+
interrupts:
34
+
maxItems: 1
35
+
36
+
fsl,liodn:
37
+
$ref: /schemas/types.yaml#/definitions/uint32-array
38
+
description: See pamu.txt. Two LIODN(s). DQRR LIODN (DLIODN) and Frame LIODN
39
+
(FLIODN)
40
+
41
+
fsl,iommu-parent:
42
+
$ref: /schemas/types.yaml#/definitions/phandle
43
+
description: See pamu.txt.
44
+
45
+
fsl,qman-channel-id:
46
+
$ref: /schemas/types.yaml#/definitions/uint32
47
+
description: qman channel id.
48
+
49
+
cell-index:
50
+
$ref: /schemas/types.yaml#/definitions/uint32
51
+
description:
52
+
The hardware index of the channel. This can also be
53
+
determined by dividing any of the channel's 8 work queue
54
+
IDs by 8
55
+
56
+
In addition to these properties the qman-portals should have sub-nodes to
57
+
represent the HW devices/portals that are connected to the software portal
58
+
described here
59
+
60
+
required:
61
+
- compatible
62
+
- reg
63
+
- interrupts
64
+
65
+
additionalProperties: false
66
+
67
+
patternProperties:
68
+
'^(fman0|fman1|pme|crypto)+$':
69
+
type: object
70
+
properties:
71
+
fsl,liodn:
72
+
description: See pamu.txt, PAMU property used for static LIODN assignment
73
+
74
+
fsl,iommu-parent:
75
+
description: See pamu.txt, PAMU property used for dynamic LIODN assignment
76
+
77
+
dev-handle:
78
+
$ref: /schemas/types.yaml#/definitions/phandle
79
+
description:
80
+
The phandle to the particular hardware device that this
81
+
portal is connected to.
82
+
83
+
additionalProperties: false
84
+
85
+
examples:
86
+
- |
87
+
#include <dt-bindings/interrupt-controller/irq.h>
88
+
89
+
qman-portal@0 {
90
+
compatible = "fsl,qman-portal-1.2.0", "fsl,qman-portal";
91
+
reg = <0 0x4000>, <0x100000 0x1000>;
92
+
interrupts = <104 IRQ_TYPE_EDGE_FALLING 0 0>;
93
+
fsl,liodn = <1 2>;
94
+
fsl,qman-channel-id = <0>;
95
+
96
+
fman0 {
97
+
fsl,liodn = <0x21>;
98
+
dev-handle = <&fman0>;
99
+
};
100
+
101
+
fman1 {
102
+
fsl,liodn = <0xa1>;
103
+
dev-handle = <&fman1>;
104
+
};
105
+
106
+
crypto {
107
+
fsl,liodn = <0x41 0x66>;
108
+
dev-handle = <&crypto>;
109
+
};
110
+
};
+93
Documentation/devicetree/bindings/soc/fsl/fsl,qman.yaml
+93
Documentation/devicetree/bindings/soc/fsl/fsl,qman.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/soc/fsl/fsl,qman.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: QorIQ DPAA Queue Manager
8
+
9
+
maintainers:
10
+
- Frank Li <Frank.Li@nxp.com>
11
+
12
+
description:
13
+
The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA). QMan
14
+
supports queuing and QoS scheduling of frames to CPUs, network interfaces and
15
+
DPAA logic modules, maintains packet ordering within flows. Besides providing
16
+
flow-level queuing, is also responsible for congestion management functions such
17
+
as RED/WRED, congestion notifications and tail discards. This binding covers the
18
+
CCSR space programming model
19
+
20
+
properties:
21
+
compatible:
22
+
oneOf:
23
+
- const: fsl,qman
24
+
- items:
25
+
- enum:
26
+
- fsl,ls1043a-qman
27
+
- fsl,ls1046a-qman
28
+
- const: fsl,qman
29
+
reg:
30
+
items:
31
+
- description: |
32
+
Registers region within the CCSR address space
33
+
34
+
The QMan revision information is located in the QMAN_IP_REV_1/2
35
+
registers which are located at offsets 0xbf8 and 0xbfc
36
+
37
+
interrupts:
38
+
items:
39
+
- description: The error interrupt
40
+
41
+
fsl,qman-portals:
42
+
$ref: /schemas/types.yaml#/definitions/phandle
43
+
description: ref fsl,qman-port.yaml
44
+
45
+
fsl,liodn:
46
+
$ref: /schemas/types.yaml#/definitions/uint32-array
47
+
description:
48
+
See pamu.txt, PAMU property used for static LIODN assignment
49
+
50
+
fsl,iommu-parent:
51
+
$ref: /schemas/types.yaml#/definitions/phandle
52
+
description:
53
+
See pamu.txt, PAMU property used for dynamic LIODN assignment
54
+
55
+
clocks:
56
+
maxItems: 1
57
+
description:
58
+
Reference input clock. Its frequency is half of the platform clock
59
+
60
+
memory-region:
61
+
maxItems: 2
62
+
description:
63
+
List of phandles referencing the QMan private memory nodes (described
64
+
below). The qman-fqd node must be first followed by qman-pfdr node.
65
+
Only used on ARM Devices connected to a QMan instance via Direct Connect
66
+
Portals (DCP) must link to the respective QMan instance.
67
+
68
+
fsl,qman:
69
+
$ref: /schemas/types.yaml#/definitions/uint32-array
70
+
description:
71
+
List of phandle and DCP index pairs, to the QMan instance
72
+
to which this device is connected via the DCP
73
+
74
+
required:
75
+
- compatible
76
+
- reg
77
+
- interrupts
78
+
79
+
additionalProperties: false
80
+
81
+
examples:
82
+
- |
83
+
#include <dt-bindings/interrupt-controller/irq.h>
84
+
85
+
qman: qman@318000 {
86
+
compatible = "fsl,qman";
87
+
reg = <0x318000 0x1000>;
88
+
interrupts = <16 IRQ_TYPE_EDGE_FALLING 1 3>;
89
+
fsl,liodn = <0x16>;
90
+
fsl,qman-portals = <&qportals>;
91
+
memory-region = <&qman_fqd &qman_pfdr>;
92
+
clocks = <&platform_pll 1>;
93
+
};
-134
Documentation/devicetree/bindings/soc/fsl/qman-portals.txt
-134
Documentation/devicetree/bindings/soc/fsl/qman-portals.txt
···
1
-
QorIQ DPAA Queue Manager Portals Device Tree Binding
2
-
3
-
Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
4
-
5
-
CONTENTS
6
-
7
-
- QMan Portal
8
-
- Example
9
-
10
-
QMan Portal Node
11
-
12
-
Portals are memory mapped interfaces to QMan that allow low-latency, lock-less
13
-
interaction by software running on processor cores, accelerators and network
14
-
interfaces with the QMan
15
-
16
-
PROPERTIES
17
-
18
-
- compatible
19
-
Usage: Required
20
-
Value type: <stringlist>
21
-
Definition: Must include "fsl,qman-portal-<hardware revision>"
22
-
May include "fsl,<SoC>-qman-portal" or "fsl,qman-portal"
23
-
24
-
- reg
25
-
Usage: Required
26
-
Value type: <prop-encoded-array>
27
-
Definition: Two regions. The first is the cache-enabled region of
28
-
the portal. The second is the cache-inhibited region of
29
-
the portal
30
-
31
-
- interrupts
32
-
Usage: Required
33
-
Value type: <prop-encoded-array>
34
-
Definition: Standard property
35
-
36
-
- fsl,liodn
37
-
Usage: See pamu.txt
38
-
Value type: <prop-encoded-array>
39
-
Definition: Two LIODN(s). DQRR LIODN (DLIODN) and Frame LIODN
40
-
(FLIODN)
41
-
42
-
- fsl,iommu-parent
43
-
Usage: See pamu.txt
44
-
Value type: <phandle>
45
-
Definition: PAMU property used for dynamic LIODN assignment
46
-
47
-
For additional details about the PAMU/LIODN binding(s) see pamu.txt
48
-
49
-
- cell-index
50
-
Usage: Required
51
-
Value type: <u32>
52
-
Definition: The hardware index of the channel. This can also be
53
-
determined by dividing any of the channel's 8 work queue
54
-
IDs by 8
55
-
56
-
In addition to these properties the qman-portals should have sub-nodes to
57
-
represent the HW devices/portals that are connected to the software portal
58
-
described here
59
-
60
-
The currently supported sub-nodes are:
61
-
* fman0
62
-
* fman1
63
-
* pme
64
-
* crypto
65
-
66
-
These subnodes should have the following properties:
67
-
68
-
- fsl,liodn
69
-
Usage: See pamu.txt
70
-
Value type: <prop-encoded-array>
71
-
Definition: PAMU property used for static LIODN assignment
72
-
73
-
- fsl,iommu-parent
74
-
Usage: See pamu.txt
75
-
Value type: <phandle>
76
-
Definition: PAMU property used for dynamic LIODN assignment
77
-
78
-
- dev-handle
79
-
Usage: Required
80
-
Value type: <phandle>
81
-
Definition: The phandle to the particular hardware device that this
82
-
portal is connected to.
83
-
84
-
EXAMPLE
85
-
86
-
The example below shows a (P4080) QMan portals container/bus node with two portals
87
-
88
-
qman-portals@ff4200000 {
89
-
#address-cells = <1>;
90
-
#size-cells = <1>;
91
-
compatible = "simple-bus";
92
-
ranges = <0 0xf 0xf4200000 0x200000>;
93
-
94
-
qman-portal@0 {
95
-
compatible = "fsl,qman-portal-1.2.0", "fsl,qman-portal";
96
-
reg = <0 0x4000>, <0x100000 0x1000>;
97
-
interrupts = <104 2 0 0>;
98
-
fsl,liodn = <1 2>;
99
-
fsl,qman-channel-id = <0>;
100
-
101
-
fman0 {
102
-
fsl,liodn = <0x21>;
103
-
dev-handle = <&fman0>;
104
-
};
105
-
fman1 {
106
-
fsl,liodn = <0xa1>;
107
-
dev-handle = <&fman1>;
108
-
};
109
-
crypto {
110
-
fsl,liodn = <0x41 0x66>;
111
-
dev-handle = <&crypto>;
112
-
};
113
-
};
114
-
qman-portal@4000 {
115
-
compatible = "fsl,qman-portal-1.2.0", "fsl,qman-portal";
116
-
reg = <0x4000 0x4000>, <0x101000 0x1000>;
117
-
interrupts = <106 2 0 0>;
118
-
fsl,liodn = <3 4>;
119
-
cell-index = <1>;
120
-
121
-
fman0 {
122
-
fsl,liodn = <0x22>;
123
-
dev-handle = <&fman0>;
124
-
};
125
-
fman1 {
126
-
fsl,liodn = <0xa2>;
127
-
dev-handle = <&fman1>;
128
-
};
129
-
crypto {
130
-
fsl,liodn = <0x42 0x67>;
131
-
dev-handle = <&crypto>;
132
-
};
133
-
};
134
-
};
-187
Documentation/devicetree/bindings/soc/fsl/qman.txt
-187
Documentation/devicetree/bindings/soc/fsl/qman.txt
···
1
-
QorIQ DPAA Queue Manager Device Tree Binding
2
-
3
-
Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
4
-
5
-
CONTENTS
6
-
7
-
- QMan Node
8
-
- QMan Private Memory Nodes
9
-
- Example
10
-
11
-
QMan Node
12
-
13
-
The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA). QMan
14
-
supports queuing and QoS scheduling of frames to CPUs, network interfaces and
15
-
DPAA logic modules, maintains packet ordering within flows. Besides providing
16
-
flow-level queuing, is also responsible for congestion management functions such
17
-
as RED/WRED, congestion notifications and tail discards. This binding covers the
18
-
CCSR space programming model
19
-
20
-
PROPERTIES
21
-
22
-
- compatible
23
-
Usage: Required
24
-
Value type: <stringlist>
25
-
Definition: Must include "fsl,qman"
26
-
May include "fsl,<SoC>-qman"
27
-
28
-
- reg
29
-
Usage: Required
30
-
Value type: <prop-encoded-array>
31
-
Definition: Registers region within the CCSR address space
32
-
33
-
The QMan revision information is located in the QMAN_IP_REV_1/2 registers which
34
-
are located at offsets 0xbf8 and 0xbfc
35
-
36
-
- interrupts
37
-
Usage: Required
38
-
Value type: <prop-encoded-array>
39
-
Definition: Standard property. The error interrupt
40
-
41
-
- fsl,qman-portals
42
-
Usage: Required
43
-
Value type: <phandle>
44
-
Definition: Phandle to this QMan instance's portals
45
-
46
-
- fsl,liodn
47
-
Usage: See pamu.txt
48
-
Value type: <prop-encoded-array>
49
-
Definition: PAMU property used for static LIODN assignment
50
-
51
-
- fsl,iommu-parent
52
-
Usage: See pamu.txt
53
-
Value type: <phandle>
54
-
Definition: PAMU property used for dynamic LIODN assignment
55
-
56
-
For additional details about the PAMU/LIODN binding(s) see pamu.txt
57
-
58
-
- clocks
59
-
Usage: See clock-bindings.txt and qoriq-clock.txt
60
-
Value type: <prop-encoded-array>
61
-
Definition: Reference input clock. Its frequency is half of the
62
-
platform clock
63
-
- memory-regions
64
-
Usage: Required for ARM
65
-
Value type: <phandle array>
66
-
Definition: List of phandles referencing the QMan private memory
67
-
nodes (described below). The qman-fqd node must be
68
-
first followed by qman-pfdr node. Only used on ARM
69
-
70
-
Devices connected to a QMan instance via Direct Connect Portals (DCP) must link
71
-
to the respective QMan instance
72
-
73
-
- fsl,qman
74
-
Usage: Required
75
-
Value type: <prop-encoded-array>
76
-
Description: List of phandle and DCP index pairs, to the QMan instance
77
-
to which this device is connected via the DCP
78
-
79
-
QMan Private Memory Nodes
80
-
81
-
QMan requires two contiguous range of physical memory used for the backing store
82
-
for QMan Frame Queue Descriptor (FQD) and Packed Frame Descriptor Record (PFDR).
83
-
This memory is reserved/allocated as a node under the /reserved-memory node.
84
-
85
-
For additional details about reserved memory regions see reserved-memory.txt
86
-
87
-
The QMan FQD memory node must be named "qman-fqd"
88
-
89
-
PROPERTIES
90
-
91
-
- compatible
92
-
Usage: required
93
-
Value type: <stringlist>
94
-
Definition: PPC platforms: Must include "fsl,qman-fqd"
95
-
ARM platforms: Must include "shared-dma-pool"
96
-
as well as the "no-map" property
97
-
98
-
The QMan PFDR memory node must be named "qman-pfdr"
99
-
100
-
PROPERTIES
101
-
102
-
- compatible
103
-
Usage: required
104
-
Value type: <stringlist>
105
-
Definition: PPC platforms: Must include "fsl,qman-pfdr"
106
-
ARM platforms: Must include "shared-dma-pool"
107
-
as well as the "no-map" property
108
-
109
-
The following constraints are relevant to the FQD and PFDR private memory:
110
-
- The size must be 2^(size + 1), with size = 11..29. That is 4 KiB to
111
-
1 GiB
112
-
- The alignment must be a muliptle of the memory size
113
-
114
-
The size of the FQD and PFDP must be chosen by observing the hardware features
115
-
configured via the Reset Configuration Word (RCW) and that are relevant to a
116
-
specific board (e.g. number of MAC(s) pinned-out, number of offline/host command
117
-
FMan ports, etc.). The size configured in the DT must reflect the hardware
118
-
capabilities and not the specific needs of an application
119
-
120
-
For additional details about reserved memory regions see reserved-memory.txt
121
-
122
-
EXAMPLE
123
-
124
-
The example below shows a QMan FQD and a PFDR dynamic allocation memory nodes
125
-
126
-
reserved-memory {
127
-
#address-cells = <2>;
128
-
#size-cells = <2>;
129
-
ranges;
130
-
131
-
qman_fqd: qman-fqd {
132
-
compatible = "shared-dma-pool";
133
-
size = <0 0x400000>;
134
-
alignment = <0 0x400000>;
135
-
no-map;
136
-
};
137
-
qman_pfdr: qman-pfdr {
138
-
compatible = "shared-dma-pool";
139
-
size = <0 0x2000000>;
140
-
alignment = <0 0x2000000>;
141
-
no-map;
142
-
};
143
-
};
144
-
145
-
The example below shows a (P4080) QMan CCSR-space node
146
-
147
-
qportals: qman-portals@ff4200000 {
148
-
...
149
-
};
150
-
151
-
clockgen: global-utilities@e1000 {
152
-
...
153
-
sysclk: sysclk {
154
-
...
155
-
};
156
-
...
157
-
platform_pll: platform-pll@c00 {
158
-
#clock-cells = <1>;
159
-
reg = <0xc00 0x4>;
160
-
compatible = "fsl,qoriq-platform-pll-1.0";
161
-
clocks = <&sysclk>;
162
-
clock-output-names = "platform-pll", "platform-pll-div2";
163
-
};
164
-
...
165
-
};
166
-
167
-
crypto@300000 {
168
-
...
169
-
fsl,qman = <&qman, 2>;
170
-
...
171
-
};
172
-
173
-
qman: qman@318000 {
174
-
compatible = "fsl,qman";
175
-
reg = <0x318000 0x1000>;
176
-
interrupts = <16 2 1 3>
177
-
fsl,liodn = <0x16>;
178
-
fsl,qman-portals = <&qportals>;
179
-
memory-region = <&qman_fqd &qman_pfdr>;
180
-
clocks = <&platform_pll 1>;
181
-
};
182
-
183
-
fman@400000 {
184
-
...
185
-
fsl,qman = <&qman, 0>;
186
-
...
187
-
};